Commit | Line | Data |
---|---|---|
ad0a504f AK |
1 | /* Target dependent code for ARC arhitecture, for GDB. |
2 | ||
61baf725 | 3 | Copyright 2005-2017 Free Software Foundation, Inc. |
ad0a504f AK |
4 | Contributed by Synopsys Inc. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | /* GDB header files. */ | |
22 | #include "defs.h" | |
23 | #include "arch-utils.h" | |
24 | #include "disasm.h" | |
25 | #include "dwarf2-frame.h" | |
26 | #include "frame-base.h" | |
27 | #include "frame-unwind.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "objfiles.h" | |
31 | #include "trad-frame.h" | |
32 | ||
33 | /* ARC header files. */ | |
34 | #include "opcode/arc.h" | |
35 | #include "arc-tdep.h" | |
36 | ||
37 | /* Standard headers. */ | |
38 | #include <algorithm> | |
39 | ||
40 | /* Default target descriptions. */ | |
41 | #include "features/arc-v2.c" | |
42 | #include "features/arc-arcompact.c" | |
43 | ||
44 | /* The frame unwind cache for the ARC. Current structure is a stub, because | |
45 | it should be filled in during the prologue analysis. */ | |
46 | ||
47 | struct arc_frame_cache | |
48 | { | |
49 | /* The stack pointer at the time this frame was created; i.e. the caller's | |
50 | stack pointer when this function was called. It is used to identify this | |
51 | frame. */ | |
52 | CORE_ADDR prev_sp; | |
53 | ||
54 | /* Store addresses for registers saved in prologue. */ | |
55 | struct trad_frame_saved_reg *saved_regs; | |
56 | }; | |
57 | ||
58 | /* Global debug flag. */ | |
59 | ||
60 | int arc_debug; | |
61 | ||
3be78afd AK |
62 | /* List of "maintenance print arc" commands. */ |
63 | ||
64 | static struct cmd_list_element *maintenance_print_arc_list = NULL; | |
65 | ||
ad0a504f AK |
66 | /* XML target description features. */ |
67 | ||
68 | static const char core_v2_feature_name[] = "org.gnu.gdb.arc.core.v2"; | |
69 | static const char | |
70 | core_reduced_v2_feature_name[] = "org.gnu.gdb.arc.core-reduced.v2"; | |
71 | static const char | |
72 | core_arcompact_feature_name[] = "org.gnu.gdb.arc.core.arcompact"; | |
73 | static const char aux_minimal_feature_name[] = "org.gnu.gdb.arc.aux-minimal"; | |
74 | ||
75 | /* XML target description known registers. */ | |
76 | ||
77 | static const char *const core_v2_register_names[] = { | |
78 | "r0", "r1", "r2", "r3", | |
79 | "r4", "r5", "r6", "r7", | |
80 | "r8", "r9", "r10", "r11", | |
81 | "r12", "r13", "r14", "r15", | |
82 | "r16", "r17", "r18", "r19", | |
83 | "r20", "r21", "r22", "r23", | |
84 | "r24", "r25", "gp", "fp", | |
85 | "sp", "ilink", "r30", "blink", | |
86 | "r32", "r33", "r34", "r35", | |
87 | "r36", "r37", "r38", "r39", | |
88 | "r40", "r41", "r42", "r43", | |
89 | "r44", "r45", "r46", "r47", | |
90 | "r48", "r49", "r50", "r51", | |
91 | "r52", "r53", "r54", "r55", | |
92 | "r56", "r57", "accl", "acch", | |
296ec4fa | 93 | "lp_count", "reserved", "limm", "pcl", |
ad0a504f AK |
94 | }; |
95 | ||
96 | static const char *const aux_minimal_register_names[] = { | |
97 | "pc", "status32", | |
98 | }; | |
99 | ||
100 | static const char *const core_arcompact_register_names[] = { | |
101 | "r0", "r1", "r2", "r3", | |
102 | "r4", "r5", "r6", "r7", | |
103 | "r8", "r9", "r10", "r11", | |
104 | "r12", "r13", "r14", "r15", | |
105 | "r16", "r17", "r18", "r19", | |
106 | "r20", "r21", "r22", "r23", | |
107 | "r24", "r25", "gp", "fp", | |
108 | "sp", "ilink1", "ilink2", "blink", | |
109 | "r32", "r33", "r34", "r35", | |
110 | "r36", "r37", "r38", "r39", | |
111 | "r40", "r41", "r42", "r43", | |
112 | "r44", "r45", "r46", "r47", | |
113 | "r48", "r49", "r50", "r51", | |
114 | "r52", "r53", "r54", "r55", | |
115 | "r56", "r57", "r58", "r59", | |
296ec4fa | 116 | "lp_count", "reserved", "limm", "pcl", |
ad0a504f AK |
117 | }; |
118 | ||
119 | /* Implement the "write_pc" gdbarch method. | |
120 | ||
121 | In ARC PC register is a normal register so in most cases setting PC value | |
122 | is a straightforward process: debugger just writes PC value. However it | |
123 | gets trickier in case when current instruction is an instruction in delay | |
124 | slot. In this case CPU will execute instruction at current PC value, then | |
125 | will set PC to the current value of BTA register; also current instruction | |
126 | cannot be branch/jump and some of the other instruction types. Thus if | |
127 | debugger would try to just change PC value in this case, this instruction | |
128 | will get executed, but then core will "jump" to the original branch target. | |
129 | ||
130 | Whether current instruction is a delay-slot instruction or not is indicated | |
131 | by DE bit in STATUS32 register indicates if current instruction is a delay | |
132 | slot instruction. This bit is writable by debug host, which allows debug | |
133 | host to prevent core from jumping after the delay slot instruction. It | |
134 | also works in another direction: setting this bit will make core to treat | |
135 | any current instructions as a delay slot instruction and to set PC to the | |
136 | current value of BTA register. | |
137 | ||
138 | To workaround issues with changing PC register while in delay slot | |
139 | instruction, debugger should check for the STATUS32.DE bit and reset it if | |
140 | it is set. No other change is required in this function. Most common | |
141 | case, where this function might be required is calling inferior functions | |
142 | from debugger. Generic GDB logic handles this pretty well: current values | |
143 | of registers are stored, value of PC is changed (that is the job of this | |
144 | function), and after inferior function is executed, GDB restores all | |
145 | registers, include BTA and STATUS32, which also means that core is returned | |
146 | to its original state of being halted on delay slot instructions. | |
147 | ||
148 | This method is useless for ARC 600, because it doesn't have externally | |
149 | exposed BTA register. In the case of ARC 600 it is impossible to restore | |
150 | core to its state in all occasions thus core should never be halted (from | |
151 | the perspective of debugger host) in the delay slot. */ | |
152 | ||
153 | static void | |
154 | arc_write_pc (struct regcache *regcache, CORE_ADDR new_pc) | |
155 | { | |
156 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
157 | ||
158 | if (arc_debug) | |
159 | debug_printf ("arc: Writing PC, new value=%s\n", | |
160 | paddress (gdbarch, new_pc)); | |
161 | ||
162 | regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), | |
163 | new_pc); | |
164 | ||
165 | ULONGEST status32; | |
166 | regcache_cooked_read_unsigned (regcache, gdbarch_ps_regnum (gdbarch), | |
167 | &status32); | |
168 | ||
169 | /* Mask for DE bit is 0x40. */ | |
170 | if (status32 & 0x40) | |
171 | { | |
172 | if (arc_debug) | |
173 | { | |
174 | debug_printf ("arc: Changing PC while in delay slot. Will " | |
175 | "reset STATUS32.DE bit to zero. Value of STATUS32 " | |
176 | "register is 0x%s\n", | |
177 | phex (status32, ARC_REGISTER_SIZE)); | |
178 | } | |
179 | ||
180 | /* Reset bit and write to the cache. */ | |
181 | status32 &= ~0x40; | |
182 | regcache_cooked_write_unsigned (regcache, gdbarch_ps_regnum (gdbarch), | |
183 | status32); | |
184 | } | |
185 | } | |
186 | ||
187 | /* Implement the "virtual_frame_pointer" gdbarch method. | |
188 | ||
189 | According to ABI the FP (r27) is used to point to the middle of the current | |
190 | stack frame, just below the saved FP and before local variables, register | |
191 | spill area and outgoing args. However for optimization levels above O2 and | |
192 | in any case in leaf functions, the frame pointer is usually not set at all. | |
193 | The exception being when handling nested functions. | |
194 | ||
195 | We use this function to return a "virtual" frame pointer, marking the start | |
196 | of the current stack frame as a register-offset pair. If the FP is not | |
197 | being used, then it should return SP, with an offset of the frame size. | |
198 | ||
199 | The current implementation doesn't actually know the frame size, nor | |
200 | whether the FP is actually being used, so for now we just return SP and an | |
201 | offset of zero. This is no worse than other architectures, but is needed | |
202 | to avoid assertion failures. | |
203 | ||
204 | TODO: Can we determine the frame size to get a correct offset? | |
205 | ||
206 | PC is a program counter where we need the virtual FP. REG_PTR is the base | |
207 | register used for the virtual FP. OFFSET_PTR is the offset used for the | |
208 | virtual FP. */ | |
209 | ||
210 | static void | |
211 | arc_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc, | |
212 | int *reg_ptr, LONGEST *offset_ptr) | |
213 | { | |
214 | *reg_ptr = gdbarch_sp_regnum (gdbarch); | |
215 | *offset_ptr = 0; | |
216 | } | |
217 | ||
218 | /* Implement the "dummy_id" gdbarch method. | |
219 | ||
220 | Tear down a dummy frame created by arc_push_dummy_call (). This data has | |
221 | to be constructed manually from the data in our hand. The stack pointer | |
222 | and program counter can be obtained from the frame info. */ | |
223 | ||
224 | static struct frame_id | |
225 | arc_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
226 | { | |
227 | return frame_id_build (get_frame_sp (this_frame), | |
228 | get_frame_pc (this_frame)); | |
229 | } | |
230 | ||
231 | /* Implement the "push_dummy_call" gdbarch method. | |
232 | ||
233 | Stack Frame Layout | |
234 | ||
235 | This shows the layout of the stack frame for the general case of a | |
236 | function call; a given function might not have a variable number of | |
237 | arguments or local variables, or might not save any registers, so it would | |
238 | not have the corresponding frame areas. Additionally, a leaf function | |
239 | (i.e. one which calls no other functions) does not need to save the | |
240 | contents of the BLINK register (which holds its return address), and a | |
241 | function might not have a frame pointer. | |
242 | ||
243 | The stack grows downward, so SP points below FP in memory; SP always | |
244 | points to the last used word on the stack, not the first one. | |
245 | ||
246 | | | | | |
247 | | arg word N | | caller's | |
248 | | : | | frame | |
249 | | arg word 10 | | | |
250 | | arg word 9 | | | |
251 | old SP ---> +-----------------------+ --+ | |
252 | | | | | |
253 | | callee-saved | | | |
254 | | registers | | | |
255 | | including fp, blink | | | |
256 | | | | callee's | |
257 | new FP ---> +-----------------------+ | frame | |
258 | | | | | |
259 | | local | | | |
260 | | variables | | | |
261 | | | | | |
262 | | register | | | |
263 | | spill area | | | |
264 | | | | | |
265 | | outgoing args | | | |
266 | | | | | |
267 | new SP ---> +-----------------------+ --+ | |
268 | | | | |
269 | | unused | | |
270 | | | | |
271 | | | |
272 | | | |
273 | V | |
274 | downwards | |
275 | ||
276 | The list of arguments to be passed to a function is considered to be a | |
277 | sequence of _N_ words (as though all the parameters were stored in order in | |
278 | memory with each parameter occupying an integral number of words). Words | |
279 | 1..8 are passed in registers 0..7; if the function has more than 8 words of | |
280 | arguments then words 9..@em N are passed on the stack in the caller's frame. | |
281 | ||
282 | If the function has a variable number of arguments, e.g. it has a form such | |
283 | as `function (p1, p2, ...);' and _P_ words are required to hold the values | |
284 | of the named parameters (which are passed in registers 0..@em P -1), then | |
285 | the remaining 8 - _P_ words passed in registers _P_..7 are spilled into the | |
286 | top of the frame so that the anonymous parameter words occupy a continuous | |
287 | region. | |
288 | ||
289 | Any arguments are already in target byte order. We just need to store | |
290 | them! | |
291 | ||
292 | BP_ADDR is the return address where breakpoint must be placed. NARGS is | |
293 | the number of arguments to the function. ARGS is the arguments values (in | |
294 | target byte order). SP is the Current value of SP register. STRUCT_RETURN | |
295 | is TRUE if structures are returned by the function. STRUCT_ADDR is the | |
296 | hidden address for returning a struct. Returns SP of a new frame. */ | |
297 | ||
298 | static CORE_ADDR | |
299 | arc_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
300 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
301 | struct value **args, CORE_ADDR sp, int struct_return, | |
302 | CORE_ADDR struct_addr) | |
303 | { | |
304 | if (arc_debug) | |
305 | debug_printf ("arc: push_dummy_call (nargs = %d)\n", nargs); | |
306 | ||
307 | int arg_reg = ARC_FIRST_ARG_REGNUM; | |
308 | ||
309 | /* Push the return address. */ | |
310 | regcache_cooked_write_unsigned (regcache, ARC_BLINK_REGNUM, bp_addr); | |
311 | ||
312 | /* Are we returning a value using a structure return instead of a normal | |
313 | value return? If so, struct_addr is the address of the reserved space for | |
314 | the return structure to be written on the stack, and that address is | |
315 | passed to that function as a hidden first argument. */ | |
316 | if (struct_return) | |
317 | { | |
318 | /* Pass the return address in the first argument register. */ | |
319 | regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr); | |
320 | ||
321 | if (arc_debug) | |
322 | debug_printf ("arc: struct return address %s passed in R%d", | |
323 | print_core_address (gdbarch, struct_addr), arg_reg); | |
324 | ||
325 | arg_reg++; | |
326 | } | |
327 | ||
328 | if (nargs > 0) | |
329 | { | |
330 | unsigned int total_space = 0; | |
331 | ||
332 | /* How much space do the arguments occupy in total? Must round each | |
333 | argument's size up to an integral number of words. */ | |
334 | for (int i = 0; i < nargs; i++) | |
335 | { | |
336 | unsigned int len = TYPE_LENGTH (value_type (args[i])); | |
337 | unsigned int space = align_up (len, 4); | |
338 | ||
339 | total_space += space; | |
340 | ||
341 | if (arc_debug) | |
342 | debug_printf ("arc: arg %d: %u bytes -> %u\n", i, len, space); | |
343 | } | |
344 | ||
345 | /* Allocate a buffer to hold a memory image of the arguments. */ | |
346 | gdb_byte *memory_image = XCNEWVEC (gdb_byte, total_space); | |
347 | ||
348 | /* Now copy all of the arguments into the buffer, correctly aligned. */ | |
349 | gdb_byte *data = memory_image; | |
350 | for (int i = 0; i < nargs; i++) | |
351 | { | |
352 | unsigned int len = TYPE_LENGTH (value_type (args[i])); | |
353 | unsigned int space = align_up (len, 4); | |
354 | ||
355 | memcpy (data, value_contents (args[i]), (size_t) len); | |
356 | if (arc_debug) | |
357 | debug_printf ("arc: copying arg %d, val 0x%08x, len %d to mem\n", | |
358 | i, *((int *) value_contents (args[i])), len); | |
359 | ||
360 | data += space; | |
361 | } | |
362 | ||
363 | /* Now load as much as possible of the memory image into registers. */ | |
364 | data = memory_image; | |
365 | while (arg_reg <= ARC_LAST_ARG_REGNUM) | |
366 | { | |
367 | if (arc_debug) | |
368 | debug_printf ("arc: passing 0x%02x%02x%02x%02x in register R%d\n", | |
369 | data[0], data[1], data[2], data[3], arg_reg); | |
370 | ||
371 | /* Note we don't use write_unsigned here, since that would convert | |
372 | the byte order, but we are already in the correct byte order. */ | |
373 | regcache_cooked_write (regcache, arg_reg, data); | |
374 | ||
375 | data += ARC_REGISTER_SIZE; | |
376 | total_space -= ARC_REGISTER_SIZE; | |
377 | ||
378 | /* All the data is now in registers. */ | |
379 | if (total_space == 0) | |
380 | break; | |
381 | ||
382 | arg_reg++; | |
383 | } | |
384 | ||
385 | /* If there is any data left, push it onto the stack (in a single write | |
386 | operation). */ | |
387 | if (total_space > 0) | |
388 | { | |
389 | if (arc_debug) | |
390 | debug_printf ("arc: passing %d bytes on stack\n", total_space); | |
391 | ||
392 | sp -= total_space; | |
393 | write_memory (sp, data, (int) total_space); | |
394 | } | |
395 | ||
396 | xfree (memory_image); | |
397 | } | |
398 | ||
399 | /* Finally, update the SP register. */ | |
400 | regcache_cooked_write_unsigned (regcache, gdbarch_sp_regnum (gdbarch), sp); | |
401 | ||
402 | return sp; | |
403 | } | |
404 | ||
405 | /* Implement the "push_dummy_code" gdbarch method. | |
406 | ||
407 | We don't actually push any code. We just identify where a breakpoint can | |
408 | be inserted to which we are can return and the resume address where we | |
409 | should be called. | |
410 | ||
411 | ARC does not necessarily have an executable stack, so we can't put the | |
412 | return breakpoint there. Instead we put it at the entry point of the | |
413 | function. This means the SP is unchanged. | |
414 | ||
415 | SP is a current stack pointer FUNADDR is an address of the function to be | |
416 | called. ARGS is arguments to pass. NARGS is a number of args to pass. | |
417 | VALUE_TYPE is a type of value returned. REAL_PC is a resume address when | |
418 | the function is called. BP_ADDR is an address where breakpoint should be | |
419 | set. Returns the updated stack pointer. */ | |
420 | ||
421 | static CORE_ADDR | |
422 | arc_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, | |
423 | struct value **args, int nargs, struct type *value_type, | |
424 | CORE_ADDR *real_pc, CORE_ADDR *bp_addr, | |
425 | struct regcache *regcache) | |
426 | { | |
427 | *real_pc = funaddr; | |
428 | *bp_addr = entry_point_address (); | |
429 | return sp; | |
430 | } | |
431 | ||
432 | /* Implement the "cannot_fetch_register" gdbarch method. */ | |
433 | ||
434 | static int | |
435 | arc_cannot_fetch_register (struct gdbarch *gdbarch, int regnum) | |
436 | { | |
296ec4fa AK |
437 | /* Assume that register is readable if it is unknown. LIMM and RESERVED are |
438 | not real registers, but specific register numbers. They are available as | |
439 | regnums to align architectural register numbers with GDB internal regnums, | |
440 | but they shouldn't appear in target descriptions generated by | |
441 | GDB-servers. */ | |
442 | switch (regnum) | |
443 | { | |
444 | case ARC_RESERVED_REGNUM: | |
445 | case ARC_LIMM_REGNUM: | |
446 | return true; | |
447 | default: | |
448 | return false; | |
449 | } | |
ad0a504f AK |
450 | } |
451 | ||
452 | /* Implement the "cannot_store_register" gdbarch method. */ | |
453 | ||
454 | static int | |
455 | arc_cannot_store_register (struct gdbarch *gdbarch, int regnum) | |
456 | { | |
296ec4fa AK |
457 | /* Assume that register is writable if it is unknown. See comment in |
458 | arc_cannot_fetch_register about LIMM and RESERVED. */ | |
ad0a504f AK |
459 | switch (regnum) |
460 | { | |
296ec4fa AK |
461 | case ARC_RESERVED_REGNUM: |
462 | case ARC_LIMM_REGNUM: | |
ad0a504f | 463 | case ARC_PCL_REGNUM: |
296ec4fa | 464 | return true; |
ad0a504f | 465 | default: |
296ec4fa | 466 | return false; |
ad0a504f AK |
467 | } |
468 | } | |
469 | ||
470 | /* Get the return value of a function from the registers/memory used to | |
471 | return it, according to the convention used by the ABI - 4-bytes values are | |
472 | in the R0, while 8-byte values are in the R0-R1. | |
473 | ||
474 | TODO: This implementation ignores the case of "complex double", where | |
475 | according to ABI, value is returned in the R0-R3 registers. | |
476 | ||
477 | TYPE is a returned value's type. VALBUF is a buffer for the returned | |
478 | value. */ | |
479 | ||
480 | static void | |
481 | arc_extract_return_value (struct gdbarch *gdbarch, struct type *type, | |
482 | struct regcache *regcache, gdb_byte *valbuf) | |
483 | { | |
484 | unsigned int len = TYPE_LENGTH (type); | |
485 | ||
486 | if (arc_debug) | |
487 | debug_printf ("arc: extract_return_value\n"); | |
488 | ||
489 | if (len <= ARC_REGISTER_SIZE) | |
490 | { | |
491 | ULONGEST val; | |
492 | ||
493 | /* Get the return value from one register. */ | |
494 | regcache_cooked_read_unsigned (regcache, ARC_R0_REGNUM, &val); | |
495 | store_unsigned_integer (valbuf, (int) len, | |
496 | gdbarch_byte_order (gdbarch), val); | |
497 | ||
498 | if (arc_debug) | |
499 | debug_printf ("arc: returning 0x%s\n", phex (val, ARC_REGISTER_SIZE)); | |
500 | } | |
501 | else if (len <= ARC_REGISTER_SIZE * 2) | |
502 | { | |
503 | ULONGEST low, high; | |
504 | ||
505 | /* Get the return value from two registers. */ | |
506 | regcache_cooked_read_unsigned (regcache, ARC_R0_REGNUM, &low); | |
507 | regcache_cooked_read_unsigned (regcache, ARC_R1_REGNUM, &high); | |
508 | ||
509 | store_unsigned_integer (valbuf, ARC_REGISTER_SIZE, | |
510 | gdbarch_byte_order (gdbarch), low); | |
511 | store_unsigned_integer (valbuf + ARC_REGISTER_SIZE, | |
512 | (int) len - ARC_REGISTER_SIZE, | |
513 | gdbarch_byte_order (gdbarch), high); | |
514 | ||
515 | if (arc_debug) | |
516 | debug_printf ("arc: returning 0x%s%s\n", | |
517 | phex (high, ARC_REGISTER_SIZE), | |
518 | phex (low, ARC_REGISTER_SIZE)); | |
519 | } | |
520 | else | |
521 | error (_("arc: extract_return_value: type length %u too large"), len); | |
522 | } | |
523 | ||
524 | ||
525 | /* Store the return value of a function into the registers/memory used to | |
526 | return it, according to the convention used by the ABI. | |
527 | ||
528 | TODO: This implementation ignores the case of "complex double", where | |
529 | according to ABI, value is returned in the R0-R3 registers. | |
530 | ||
531 | TYPE is a returned value's type. VALBUF is a buffer with the value to | |
532 | return. */ | |
533 | ||
534 | static void | |
535 | arc_store_return_value (struct gdbarch *gdbarch, struct type *type, | |
536 | struct regcache *regcache, const gdb_byte *valbuf) | |
537 | { | |
538 | unsigned int len = TYPE_LENGTH (type); | |
539 | ||
540 | if (arc_debug) | |
541 | debug_printf ("arc: store_return_value\n"); | |
542 | ||
543 | if (len <= ARC_REGISTER_SIZE) | |
544 | { | |
545 | ULONGEST val; | |
546 | ||
547 | /* Put the return value into one register. */ | |
548 | val = extract_unsigned_integer (valbuf, (int) len, | |
549 | gdbarch_byte_order (gdbarch)); | |
550 | regcache_cooked_write_unsigned (regcache, ARC_R0_REGNUM, val); | |
551 | ||
552 | if (arc_debug) | |
553 | debug_printf ("arc: storing 0x%s\n", phex (val, ARC_REGISTER_SIZE)); | |
554 | } | |
555 | else if (len <= ARC_REGISTER_SIZE * 2) | |
556 | { | |
557 | ULONGEST low, high; | |
558 | ||
559 | /* Put the return value into two registers. */ | |
560 | low = extract_unsigned_integer (valbuf, ARC_REGISTER_SIZE, | |
561 | gdbarch_byte_order (gdbarch)); | |
562 | high = extract_unsigned_integer (valbuf + ARC_REGISTER_SIZE, | |
563 | (int) len - ARC_REGISTER_SIZE, | |
564 | gdbarch_byte_order (gdbarch)); | |
565 | ||
566 | regcache_cooked_write_unsigned (regcache, ARC_R0_REGNUM, low); | |
567 | regcache_cooked_write_unsigned (regcache, ARC_R1_REGNUM, high); | |
568 | ||
569 | if (arc_debug) | |
570 | debug_printf ("arc: storing 0x%s%s\n", | |
571 | phex (high, ARC_REGISTER_SIZE), | |
572 | phex (low, ARC_REGISTER_SIZE)); | |
573 | } | |
574 | else | |
575 | error (_("arc_store_return_value: type length too large.")); | |
576 | } | |
577 | ||
aaf43c48 AK |
578 | /* Implement the "get_longjmp_target" gdbarch method. */ |
579 | ||
580 | static int | |
581 | arc_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) | |
582 | { | |
583 | if (arc_debug) | |
584 | debug_printf ("arc: get_longjmp_target\n"); | |
585 | ||
586 | struct gdbarch *gdbarch = get_frame_arch (frame); | |
587 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
588 | int pc_offset = tdep->jb_pc * ARC_REGISTER_SIZE; | |
589 | gdb_byte buf[ARC_REGISTER_SIZE]; | |
590 | CORE_ADDR jb_addr = get_frame_register_unsigned (frame, ARC_FIRST_ARG_REGNUM); | |
591 | ||
592 | if (target_read_memory (jb_addr + pc_offset, buf, ARC_REGISTER_SIZE)) | |
593 | return 0; /* Failed to read from memory. */ | |
594 | ||
595 | *pc = extract_unsigned_integer (buf, ARC_REGISTER_SIZE, | |
596 | gdbarch_byte_order (gdbarch)); | |
597 | return 1; | |
598 | } | |
599 | ||
ad0a504f AK |
600 | /* Implement the "return_value" gdbarch method. */ |
601 | ||
602 | static enum return_value_convention | |
603 | arc_return_value (struct gdbarch *gdbarch, struct value *function, | |
604 | struct type *valtype, struct regcache *regcache, | |
605 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
606 | { | |
607 | /* If the return type is a struct, or a union, or would occupy more than two | |
608 | registers, the ABI uses the "struct return convention": the calling | |
609 | function passes a hidden first parameter to the callee (in R0). That | |
610 | parameter is the address at which the value being returned should be | |
611 | stored. Otherwise, the result is returned in registers. */ | |
612 | int is_struct_return = (TYPE_CODE (valtype) == TYPE_CODE_STRUCT | |
613 | || TYPE_CODE (valtype) == TYPE_CODE_UNION | |
614 | || TYPE_LENGTH (valtype) > 2 * ARC_REGISTER_SIZE); | |
615 | ||
616 | if (arc_debug) | |
fa42dd2e AK |
617 | debug_printf ("arc: return_value (readbuf = %s, writebuf = %s)\n", |
618 | host_address_to_string (readbuf), | |
619 | host_address_to_string (writebuf)); | |
ad0a504f AK |
620 | |
621 | if (writebuf != NULL) | |
622 | { | |
623 | /* Case 1. GDB should not ask us to set a struct return value: it | |
624 | should know the struct return location and write the value there | |
625 | itself. */ | |
626 | gdb_assert (!is_struct_return); | |
627 | arc_store_return_value (gdbarch, valtype, regcache, writebuf); | |
628 | } | |
629 | else if (readbuf != NULL) | |
630 | { | |
631 | /* Case 2. GDB should not ask us to get a struct return value: it | |
632 | should know the struct return location and read the value from there | |
633 | itself. */ | |
634 | gdb_assert (!is_struct_return); | |
635 | arc_extract_return_value (gdbarch, valtype, regcache, readbuf); | |
636 | } | |
637 | ||
638 | return (is_struct_return | |
639 | ? RETURN_VALUE_STRUCT_CONVENTION | |
640 | : RETURN_VALUE_REGISTER_CONVENTION); | |
641 | } | |
642 | ||
643 | /* Return the base address of the frame. For ARC, the base address is the | |
644 | frame pointer. */ | |
645 | ||
646 | static CORE_ADDR | |
647 | arc_frame_base_address (struct frame_info *this_frame, void **prologue_cache) | |
648 | { | |
649 | return (CORE_ADDR) get_frame_register_unsigned (this_frame, ARC_FP_REGNUM); | |
650 | } | |
651 | ||
652 | /* Implement the "skip_prologue" gdbarch method. | |
653 | ||
654 | Skip the prologue for the function at PC. This is done by checking from | |
655 | the line information read from the DWARF, if possible; otherwise, we scan | |
656 | the function prologue to find its end. */ | |
657 | ||
658 | static CORE_ADDR | |
659 | arc_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
660 | { | |
661 | if (arc_debug) | |
662 | debug_printf ("arc: skip_prologue\n"); | |
663 | ||
664 | CORE_ADDR func_addr; | |
665 | const char *func_name; | |
666 | ||
667 | /* See what the symbol table says. */ | |
668 | if (find_pc_partial_function (pc, &func_name, &func_addr, NULL)) | |
669 | { | |
670 | /* Found a function. */ | |
671 | CORE_ADDR postprologue_pc | |
672 | = skip_prologue_using_sal (gdbarch, func_addr); | |
673 | ||
674 | if (postprologue_pc != 0) | |
675 | return std::max (pc, postprologue_pc); | |
676 | } | |
677 | ||
678 | /* No prologue info in symbol table, have to analyze prologue. */ | |
679 | ||
680 | /* Find an upper limit on the function prologue using the debug | |
681 | information. If the debug information could not be used to provide that | |
682 | bound, then pass 0 and arc_scan_prologue will estimate value itself. */ | |
683 | CORE_ADDR limit_pc = skip_prologue_using_sal (gdbarch, pc); | |
684 | /* We don't have a proper analyze_prologue function yet, but its result | |
685 | should be returned here. Currently GDB will just stop at the first | |
686 | instruction of function if debug information doesn't have prologue info; | |
687 | and if there is a debug info about prologue - this code path will not be | |
688 | taken at all. */ | |
689 | return (limit_pc == 0 ? pc : limit_pc); | |
690 | } | |
691 | ||
692 | /* Implement the "print_insn" gdbarch method. | |
693 | ||
694 | arc_get_disassembler () may return different functions depending on bfd | |
695 | type, so it is not possible to pass print_insn directly to | |
696 | set_gdbarch_print_insn (). Instead this wrapper function is used. It also | |
697 | may be used by other functions to get disassemble_info for address. It is | |
698 | important to note, that those print_insn from opcodes always print | |
699 | instruction to the stream specified in the INFO. If this is not desired, | |
700 | then either `print_insn` function in INFO should be set to some function | |
701 | that will not print, or `stream` should be different from standard | |
702 | gdb_stdlog. */ | |
703 | ||
704 | static int | |
705 | arc_delayed_print_insn (bfd_vma addr, struct disassemble_info *info) | |
706 | { | |
707 | int (*print_insn) (bfd_vma, struct disassemble_info *); | |
708 | /* exec_bfd may be null, if GDB is run without a target BFD file. Opcodes | |
709 | will handle NULL value gracefully. */ | |
710 | print_insn = arc_get_disassembler (exec_bfd); | |
711 | gdb_assert (print_insn != NULL); | |
712 | return print_insn (addr, info); | |
713 | } | |
714 | ||
715 | /* Baremetal breakpoint instructions. | |
716 | ||
717 | ARC supports both big- and little-endian. However, instructions for | |
718 | little-endian processors are encoded in the middle-endian: half-words are | |
719 | in big-endian, while bytes inside the half-words are in little-endian; data | |
720 | is represented in the "normal" little-endian. Big-endian processors treat | |
721 | data and code identically. | |
722 | ||
723 | Assuming the number 0x01020304, it will be presented this way: | |
724 | ||
725 | Address : N N+1 N+2 N+3 | |
726 | little-endian : 0x04 0x03 0x02 0x01 | |
727 | big-endian : 0x01 0x02 0x03 0x04 | |
728 | ARC middle-endian : 0x02 0x01 0x04 0x03 | |
729 | */ | |
730 | ||
731 | static const gdb_byte arc_brk_s_be[] = { 0x7f, 0xff }; | |
732 | static const gdb_byte arc_brk_s_le[] = { 0xff, 0x7f }; | |
733 | static const gdb_byte arc_brk_be[] = { 0x25, 0x6f, 0x00, 0x3f }; | |
734 | static const gdb_byte arc_brk_le[] = { 0x6f, 0x25, 0x3f, 0x00 }; | |
735 | ||
d19280ad | 736 | /* For ARC ELF, breakpoint uses the 16-bit BRK_S instruction, which is 0x7fff |
ad0a504f AK |
737 | (little endian) or 0xff7f (big endian). We used to insert BRK_S even |
738 | instead of 32-bit instructions, which works mostly ok, unless breakpoint is | |
739 | inserted into delay slot instruction. In this case if branch is taken | |
740 | BLINK value will be set to address of instruction after delay slot, however | |
741 | if we replaced 32-bit instruction in delay slot with 16-bit long BRK_S, | |
742 | then BLINK value will have an invalid value - it will point to the address | |
743 | after the BRK_S (which was there at the moment of branch execution) while | |
744 | it should point to the address after the 32-bit long instruction. To avoid | |
745 | such issues this function disassembles instruction at target location and | |
746 | evaluates it value. | |
747 | ||
748 | ARC 600 supports only 16-bit BRK_S. | |
749 | ||
750 | NB: Baremetal GDB uses BRK[_S], while user-space GDB uses TRAP_S. BRK[_S] | |
751 | is much better because it doesn't commit unlike TRAP_S, so it can be set in | |
752 | delay slots; however it cannot be used in user-mode, hence usage of TRAP_S | |
d19280ad | 753 | in GDB for user-space. */ |
ad0a504f | 754 | |
d19280ad | 755 | /* Implement the "breakpoint_kind_from_pc" gdbarch method. */ |
ad0a504f | 756 | |
d19280ad YQ |
757 | static int |
758 | arc_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr) | |
ad0a504f AK |
759 | { |
760 | size_t length_with_limm = gdb_insn_length (gdbarch, *pcptr); | |
761 | ||
762 | /* Replace 16-bit instruction with BRK_S, replace 32-bit instructions with | |
763 | BRK. LIMM is part of instruction length, so it can be either 4 or 8 | |
764 | bytes for 32-bit instructions. */ | |
765 | if ((length_with_limm == 4 || length_with_limm == 8) | |
766 | && !arc_mach_is_arc600 (gdbarch)) | |
d19280ad YQ |
767 | return sizeof (arc_brk_le); |
768 | else | |
769 | return sizeof (arc_brk_s_le); | |
770 | } | |
771 | ||
772 | /* Implement the "sw_breakpoint_from_kind" gdbarch method. */ | |
773 | ||
774 | static const gdb_byte * | |
775 | arc_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size) | |
776 | { | |
777 | *size = kind; | |
778 | ||
779 | if (kind == sizeof (arc_brk_le)) | |
ad0a504f | 780 | { |
ad0a504f AK |
781 | return ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) |
782 | ? arc_brk_be | |
783 | : arc_brk_le); | |
784 | } | |
785 | else | |
786 | { | |
ad0a504f AK |
787 | return ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) |
788 | ? arc_brk_s_be | |
789 | : arc_brk_s_le); | |
790 | } | |
791 | } | |
792 | ||
793 | /* Implement the "unwind_pc" gdbarch method. */ | |
794 | ||
795 | static CORE_ADDR | |
796 | arc_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
797 | { | |
798 | int pc_regnum = gdbarch_pc_regnum (gdbarch); | |
799 | CORE_ADDR pc = frame_unwind_register_unsigned (next_frame, pc_regnum); | |
800 | ||
801 | if (arc_debug) | |
802 | debug_printf ("arc: unwind PC: %s\n", paddress (gdbarch, pc)); | |
803 | ||
804 | return pc; | |
805 | } | |
806 | ||
807 | /* Implement the "unwind_sp" gdbarch method. */ | |
808 | ||
809 | static CORE_ADDR | |
810 | arc_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
811 | { | |
812 | int sp_regnum = gdbarch_sp_regnum (gdbarch); | |
813 | CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, sp_regnum); | |
814 | ||
815 | if (arc_debug) | |
816 | debug_printf ("arc: unwind SP: %s\n", paddress (gdbarch, sp)); | |
817 | ||
818 | return sp; | |
819 | } | |
820 | ||
821 | /* Implement the "frame_align" gdbarch method. */ | |
822 | ||
823 | static CORE_ADDR | |
824 | arc_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) | |
825 | { | |
826 | return align_down (sp, 4); | |
827 | } | |
828 | ||
829 | /* Frame unwinder for normal frames. */ | |
830 | ||
831 | static struct arc_frame_cache * | |
832 | arc_make_frame_cache (struct frame_info *this_frame) | |
833 | { | |
834 | if (arc_debug) | |
835 | debug_printf ("arc: frame_cache\n"); | |
836 | ||
837 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
838 | ||
839 | CORE_ADDR block_addr = get_frame_address_in_block (this_frame); | |
840 | CORE_ADDR prev_pc = get_frame_pc (this_frame); | |
841 | ||
842 | CORE_ADDR entrypoint, prologue_end; | |
843 | if (find_pc_partial_function (block_addr, NULL, &entrypoint, &prologue_end)) | |
844 | { | |
845 | struct symtab_and_line sal = find_pc_line (entrypoint, 0); | |
846 | if (sal.line == 0) | |
847 | /* No line info so use current PC. */ | |
848 | prologue_end = prev_pc; | |
849 | else if (sal.end < prologue_end) | |
850 | /* The next line begins after the function end. */ | |
851 | prologue_end = sal.end; | |
852 | ||
853 | prologue_end = std::min (prologue_end, prev_pc); | |
854 | } | |
855 | else | |
856 | { | |
857 | entrypoint = get_frame_register_unsigned (this_frame, | |
858 | gdbarch_pc_regnum (gdbarch)); | |
859 | prologue_end = 0; | |
860 | } | |
861 | ||
862 | /* Allocate new frame cache instance and space for saved register info. | |
863 | * FRAME_OBSTACK_ZALLOC will initialize fields to zeroes. */ | |
864 | struct arc_frame_cache *cache | |
865 | = FRAME_OBSTACK_ZALLOC (struct arc_frame_cache); | |
866 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); | |
867 | ||
868 | /* Should call analyze_prologue here, when it will be implemented. */ | |
869 | ||
870 | return cache; | |
871 | } | |
872 | ||
873 | /* Implement the "this_id" frame_unwind method. */ | |
874 | ||
875 | static void | |
876 | arc_frame_this_id (struct frame_info *this_frame, void **this_cache, | |
877 | struct frame_id *this_id) | |
878 | { | |
879 | if (arc_debug) | |
880 | debug_printf ("arc: frame_this_id\n"); | |
881 | ||
882 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
883 | ||
884 | if (*this_cache == NULL) | |
885 | *this_cache = arc_make_frame_cache (this_frame); | |
886 | struct arc_frame_cache *cache = (struct arc_frame_cache *) (*this_cache); | |
887 | ||
888 | CORE_ADDR stack_addr = cache->prev_sp; | |
889 | ||
890 | /* There are 4 possible situation which decide how frame_id->code_addr is | |
891 | evaluated: | |
892 | ||
893 | 1) Function is compiled with option -g. Then frame_id will be created | |
894 | in dwarf_* function and not in this function. NB: even if target | |
895 | binary is compiled with -g, some std functions like __start and _init | |
896 | are not, so they still will follow one of the following choices. | |
897 | ||
898 | 2) Function is compiled without -g and binary hasn't been stripped in | |
899 | any way. In this case GDB still has enough information to evaluate | |
900 | frame code_addr properly. This case is covered by call to | |
901 | get_frame_func (). | |
902 | ||
903 | 3) Binary has been striped with option -g (strip debug symbols). In | |
904 | this case there is still enough symbols for get_frame_func () to work | |
905 | properly, so this case is also covered by it. | |
906 | ||
907 | 4) Binary has been striped with option -s (strip all symbols). In this | |
908 | case GDB cannot get function start address properly, so we return current | |
909 | PC value instead. | |
910 | */ | |
911 | CORE_ADDR code_addr = get_frame_func (this_frame); | |
912 | if (code_addr == 0) | |
913 | code_addr = get_frame_register_unsigned (this_frame, | |
914 | gdbarch_pc_regnum (gdbarch)); | |
915 | ||
916 | *this_id = frame_id_build (stack_addr, code_addr); | |
917 | } | |
918 | ||
919 | /* Implement the "prev_register" frame_unwind method. */ | |
920 | ||
921 | static struct value * | |
922 | arc_frame_prev_register (struct frame_info *this_frame, | |
923 | void **this_cache, int regnum) | |
924 | { | |
ad0a504f AK |
925 | if (*this_cache == NULL) |
926 | *this_cache = arc_make_frame_cache (this_frame); | |
927 | struct arc_frame_cache *cache = (struct arc_frame_cache *) (*this_cache); | |
928 | ||
929 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
930 | ||
931 | /* If we are asked to unwind the PC, then we need to return BLINK instead: | |
932 | the saved value of PC points into this frame's function's prologue, not | |
933 | the next frame's function's resume location. */ | |
934 | if (regnum == gdbarch_pc_regnum (gdbarch)) | |
935 | regnum = ARC_BLINK_REGNUM; | |
936 | ||
937 | /* SP is a special case - we should return prev_sp, because | |
938 | trad_frame_get_prev_register will return _current_ SP value. | |
939 | Alternatively we could have stored cache->prev_sp in the cache->saved | |
940 | regs, but here we follow the lead of AArch64, ARM and Xtensa and will | |
941 | leave that logic in this function, instead of prologue analyzers. That I | |
942 | think is a bit more clear as `saved_regs` should contain saved regs, not | |
943 | computable. | |
944 | ||
945 | Because value has been computed, "got_constant" should be used, so that | |
946 | returned value will be a "not_lval" - immutable. */ | |
947 | ||
948 | if (regnum == gdbarch_sp_regnum (gdbarch)) | |
949 | return frame_unwind_got_constant (this_frame, regnum, cache->prev_sp); | |
950 | ||
951 | return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum); | |
952 | } | |
953 | ||
954 | /* Implement the "init_reg" dwarf2_frame method. */ | |
955 | ||
956 | static void | |
957 | arc_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
958 | struct dwarf2_frame_state_reg *reg, | |
959 | struct frame_info *info) | |
960 | { | |
961 | if (regnum == gdbarch_pc_regnum (gdbarch)) | |
962 | /* The return address column. */ | |
963 | reg->how = DWARF2_FRAME_REG_RA; | |
964 | else if (regnum == gdbarch_sp_regnum (gdbarch)) | |
965 | /* The call frame address. */ | |
966 | reg->how = DWARF2_FRAME_REG_CFA; | |
967 | } | |
968 | ||
969 | /* Structure defining the ARC ordinary frame unwind functions. Since we are | |
970 | the fallback unwinder, we use the default frame sniffer, which always | |
971 | accepts the frame. */ | |
972 | ||
973 | static const struct frame_unwind arc_frame_unwind = { | |
974 | NORMAL_FRAME, | |
975 | default_frame_unwind_stop_reason, | |
976 | arc_frame_this_id, | |
977 | arc_frame_prev_register, | |
978 | NULL, | |
979 | default_frame_sniffer, | |
980 | NULL, | |
981 | NULL | |
982 | }; | |
983 | ||
984 | ||
985 | static const struct frame_base arc_normal_base = { | |
986 | &arc_frame_unwind, | |
987 | arc_frame_base_address, | |
988 | arc_frame_base_address, | |
989 | arc_frame_base_address | |
990 | }; | |
991 | ||
992 | /* Initialize target description for the ARC. | |
993 | ||
994 | Returns TRUE if input tdesc was valid and in this case it will assign TDESC | |
995 | and TDESC_DATA output parameters. */ | |
996 | ||
997 | static int | |
998 | arc_tdesc_init (struct gdbarch_info info, const struct target_desc **tdesc, | |
999 | struct tdesc_arch_data **tdesc_data) | |
1000 | { | |
1001 | if (arc_debug) | |
1002 | debug_printf ("arc: Target description initialization.\n"); | |
1003 | ||
1004 | const struct target_desc *tdesc_loc = info.target_desc; | |
1005 | ||
1006 | /* Depending on whether this is ARCompact or ARCv2 we will assign | |
1007 | different default registers sets (which will differ in exactly two core | |
1008 | registers). GDB will also refuse to accept register feature from invalid | |
1009 | ISA - v2 features can be used only with v2 ARChitecture. We read | |
1010 | bfd_arch_info, which looks like to be a safe bet here, as it looks like it | |
1011 | is always initialized even when we don't pass any elf file to GDB at all | |
1012 | (it uses default arch in this case). Also GDB will call this function | |
1013 | multiple times, and if XML target description file contains architecture | |
1014 | specifications, then GDB will set this architecture to info.bfd_arch_info, | |
1015 | overriding value from ELF file if they are different. That means that, | |
1016 | where matters, this value is always our best guess on what CPU we are | |
1017 | debugging. It has been noted that architecture specified in tdesc file | |
1018 | has higher precedence over ELF and even "set architecture" - that is, | |
1019 | using "set architecture" command will have no effect when tdesc has "arch" | |
1020 | tag. */ | |
1021 | /* Cannot use arc_mach_is_arcv2 (), because gdbarch is not created yet. */ | |
1022 | const int is_arcv2 = (info.bfd_arch_info->mach == bfd_mach_arc_arcv2); | |
1023 | int is_reduced_rf; | |
1024 | const char *const *core_regs; | |
1025 | const char *core_feature_name; | |
1026 | ||
1027 | /* If target doesn't provide a description - use default one. */ | |
1028 | if (!tdesc_has_registers (tdesc_loc)) | |
1029 | { | |
1030 | if (is_arcv2) | |
1031 | { | |
1032 | tdesc_loc = tdesc_arc_v2; | |
1033 | if (arc_debug) | |
1034 | debug_printf ("arc: Using default register set for ARC v2.\n"); | |
1035 | } | |
1036 | else | |
1037 | { | |
1038 | tdesc_loc = tdesc_arc_arcompact; | |
1039 | if (arc_debug) | |
1040 | debug_printf ("arc: Using default register set for ARCompact.\n"); | |
1041 | } | |
1042 | } | |
1043 | else | |
1044 | { | |
1045 | if (arc_debug) | |
1046 | debug_printf ("arc: Using provided register set.\n"); | |
1047 | } | |
1048 | gdb_assert (tdesc_loc != NULL); | |
1049 | ||
1050 | /* Now we can search for base registers. Core registers can be either full | |
1051 | or reduced. Summary: | |
1052 | ||
1053 | - core.v2 + aux-minimal | |
1054 | - core-reduced.v2 + aux-minimal | |
1055 | - core.arcompact + aux-minimal | |
1056 | ||
1057 | NB: It is entirely feasible to have ARCompact with reduced core regs, but | |
1058 | we ignore that because GCC doesn't support that and at the same time | |
1059 | ARCompact is considered obsolete, so there is not much reason to support | |
1060 | that. */ | |
1061 | const struct tdesc_feature *feature | |
1062 | = tdesc_find_feature (tdesc_loc, core_v2_feature_name); | |
1063 | if (feature != NULL) | |
1064 | { | |
1065 | /* Confirm that register and architecture match, to prevent accidents in | |
1066 | some situations. This code will trigger an error if: | |
1067 | ||
1068 | 1. XML tdesc doesn't specify arch explicitly, registers are for arch | |
1069 | X, but ELF specifies arch Y. | |
1070 | ||
1071 | 2. XML tdesc specifies arch X, but contains registers for arch Y. | |
1072 | ||
1073 | It will not protect from case where XML or ELF specify arch X, | |
1074 | registers are for the same arch X, but the real target is arch Y. To | |
1075 | detect this case we need to check IDENTITY register. */ | |
1076 | if (!is_arcv2) | |
1077 | { | |
1078 | arc_print (_("Error: ARC v2 target description supplied for " | |
1079 | "non-ARCv2 target.\n")); | |
1080 | return FALSE; | |
1081 | } | |
1082 | ||
1083 | is_reduced_rf = FALSE; | |
1084 | core_feature_name = core_v2_feature_name; | |
1085 | core_regs = core_v2_register_names; | |
1086 | } | |
1087 | else | |
1088 | { | |
1089 | feature = tdesc_find_feature (tdesc_loc, core_reduced_v2_feature_name); | |
1090 | if (feature != NULL) | |
1091 | { | |
1092 | if (!is_arcv2) | |
1093 | { | |
1094 | arc_print (_("Error: ARC v2 target description supplied for " | |
1095 | "non-ARCv2 target.\n")); | |
1096 | return FALSE; | |
1097 | } | |
1098 | ||
1099 | is_reduced_rf = TRUE; | |
1100 | core_feature_name = core_reduced_v2_feature_name; | |
1101 | core_regs = core_v2_register_names; | |
1102 | } | |
1103 | else | |
1104 | { | |
1105 | feature = tdesc_find_feature (tdesc_loc, | |
1106 | core_arcompact_feature_name); | |
1107 | if (feature != NULL) | |
1108 | { | |
1109 | if (is_arcv2) | |
1110 | { | |
1111 | arc_print (_("Error: ARCompact target description supplied " | |
1112 | "for non-ARCompact target.\n")); | |
1113 | return FALSE; | |
1114 | } | |
1115 | ||
1116 | is_reduced_rf = FALSE; | |
1117 | core_feature_name = core_arcompact_feature_name; | |
1118 | core_regs = core_arcompact_register_names; | |
1119 | } | |
1120 | else | |
1121 | { | |
1122 | arc_print (_("Error: Couldn't find core register feature in " | |
1123 | "supplied target description.")); | |
1124 | return FALSE; | |
1125 | } | |
1126 | } | |
1127 | } | |
1128 | ||
1129 | struct tdesc_arch_data *tdesc_data_loc = tdesc_data_alloc (); | |
1130 | ||
1131 | gdb_assert (feature != NULL); | |
1132 | int valid_p = 1; | |
1133 | ||
1134 | for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++) | |
1135 | { | |
1136 | /* If rf16, then skip extra registers. */ | |
1137 | if (is_reduced_rf && ((i >= ARC_R4_REGNUM && i <= ARC_R9_REGNUM) | |
1138 | || (i >= ARC_R16_REGNUM && i <= ARC_R25_REGNUM))) | |
1139 | continue; | |
1140 | ||
1141 | valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i, | |
1142 | core_regs[i]); | |
1143 | ||
1144 | /* - Ignore errors in extension registers - they are optional. | |
1145 | - Ignore missing ILINK because it doesn't make sense for Linux. | |
1146 | - Ignore missing ILINK2 when architecture is ARCompact, because it | |
1147 | doesn't make sense for Linux targets. | |
1148 | ||
1149 | In theory those optional registers should be in separate features, but | |
1150 | that would create numerous but tiny features, which looks like an | |
1151 | overengineering of a rather simple task. */ | |
1152 | if (!valid_p && (i <= ARC_SP_REGNUM || i == ARC_BLINK_REGNUM | |
1153 | || i == ARC_LP_COUNT_REGNUM || i == ARC_PCL_REGNUM | |
1154 | || (i == ARC_R30_REGNUM && is_arcv2))) | |
1155 | { | |
1156 | arc_print (_("Error: Cannot find required register `%s' in " | |
1157 | "feature `%s'.\n"), core_regs[i], core_feature_name); | |
1158 | tdesc_data_cleanup (tdesc_data_loc); | |
1159 | return FALSE; | |
1160 | } | |
1161 | } | |
1162 | ||
1163 | /* Mandatory AUX registeres are intentionally few and are common between | |
1164 | ARCompact and ARC v2, so same code can be used for both. */ | |
1165 | feature = tdesc_find_feature (tdesc_loc, aux_minimal_feature_name); | |
1166 | if (feature == NULL) | |
1167 | { | |
1168 | arc_print (_("Error: Cannot find required feature `%s' in supplied " | |
1169 | "target description.\n"), aux_minimal_feature_name); | |
1170 | tdesc_data_cleanup (tdesc_data_loc); | |
1171 | return FALSE; | |
1172 | } | |
1173 | ||
1174 | for (int i = ARC_FIRST_AUX_REGNUM; i <= ARC_LAST_AUX_REGNUM; i++) | |
1175 | { | |
1176 | const char *name = aux_minimal_register_names[i - ARC_FIRST_AUX_REGNUM]; | |
1177 | valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i, name); | |
1178 | if (!valid_p) | |
1179 | { | |
1180 | arc_print (_("Error: Cannot find required register `%s' " | |
1181 | "in feature `%s'.\n"), | |
1182 | name, tdesc_feature_name (feature)); | |
1183 | tdesc_data_cleanup (tdesc_data_loc); | |
1184 | return FALSE; | |
1185 | } | |
1186 | } | |
1187 | ||
1188 | *tdesc = tdesc_loc; | |
1189 | *tdesc_data = tdesc_data_loc; | |
1190 | ||
1191 | return TRUE; | |
1192 | } | |
1193 | ||
1194 | /* Implement the "init" gdbarch method. */ | |
1195 | ||
1196 | static struct gdbarch * | |
1197 | arc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1198 | { | |
1199 | const struct target_desc *tdesc; | |
1200 | struct tdesc_arch_data *tdesc_data; | |
1201 | ||
1202 | if (arc_debug) | |
1203 | debug_printf ("arc: Architecture initialization.\n"); | |
1204 | ||
1205 | if (!arc_tdesc_init (info, &tdesc, &tdesc_data)) | |
1206 | return NULL; | |
1207 | ||
b845c31e AK |
1208 | /* Allocate the ARC-private target-dependent information structure, and the |
1209 | GDB target-independent information structure. */ | |
1210 | struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep); | |
aaf43c48 | 1211 | tdep->jb_pc = -1; /* No longjmp support by default. */ |
b845c31e | 1212 | struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep); |
ad0a504f AK |
1213 | |
1214 | /* Data types. */ | |
1215 | set_gdbarch_short_bit (gdbarch, 16); | |
1216 | set_gdbarch_int_bit (gdbarch, 32); | |
1217 | set_gdbarch_long_bit (gdbarch, 32); | |
1218 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1219 | set_gdbarch_long_long_align_bit (gdbarch, 32); | |
1220 | set_gdbarch_float_bit (gdbarch, 32); | |
1221 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); | |
1222 | set_gdbarch_double_bit (gdbarch, 64); | |
1223 | set_gdbarch_double_format (gdbarch, floatformats_ieee_double); | |
1224 | set_gdbarch_ptr_bit (gdbarch, 32); | |
1225 | set_gdbarch_addr_bit (gdbarch, 32); | |
1226 | set_gdbarch_char_signed (gdbarch, 0); | |
1227 | ||
1228 | set_gdbarch_write_pc (gdbarch, arc_write_pc); | |
1229 | ||
1230 | set_gdbarch_virtual_frame_pointer (gdbarch, arc_virtual_frame_pointer); | |
1231 | ||
1232 | /* tdesc_use_registers expects gdbarch_num_regs to return number of registers | |
1233 | parsed by gdbarch_init, and then it will add all of the remaining | |
1234 | registers and will increase number of registers. */ | |
1235 | set_gdbarch_num_regs (gdbarch, ARC_LAST_REGNUM + 1); | |
1236 | set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
1237 | set_gdbarch_sp_regnum (gdbarch, ARC_SP_REGNUM); | |
1238 | set_gdbarch_pc_regnum (gdbarch, ARC_PC_REGNUM); | |
1239 | set_gdbarch_ps_regnum (gdbarch, ARC_STATUS32_REGNUM); | |
1240 | set_gdbarch_fp0_regnum (gdbarch, -1); /* No FPU registers. */ | |
1241 | ||
1242 | set_gdbarch_dummy_id (gdbarch, arc_dummy_id); | |
1243 | set_gdbarch_push_dummy_call (gdbarch, arc_push_dummy_call); | |
1244 | set_gdbarch_push_dummy_code (gdbarch, arc_push_dummy_code); | |
1245 | ||
1246 | set_gdbarch_cannot_fetch_register (gdbarch, arc_cannot_fetch_register); | |
1247 | set_gdbarch_cannot_store_register (gdbarch, arc_cannot_store_register); | |
1248 | ||
1249 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1250 | ||
1251 | set_gdbarch_return_value (gdbarch, arc_return_value); | |
1252 | ||
1253 | set_gdbarch_skip_prologue (gdbarch, arc_skip_prologue); | |
1254 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1255 | ||
04180708 YQ |
1256 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, arc_breakpoint_kind_from_pc); |
1257 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, arc_sw_breakpoint_from_kind); | |
ad0a504f AK |
1258 | |
1259 | /* On ARC 600 BRK_S instruction advances PC, unlike other ARC cores. */ | |
1260 | if (!arc_mach_is_arc600 (gdbarch)) | |
1261 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1262 | else | |
1263 | set_gdbarch_decr_pc_after_break (gdbarch, 2); | |
1264 | ||
1265 | set_gdbarch_unwind_pc (gdbarch, arc_unwind_pc); | |
1266 | set_gdbarch_unwind_sp (gdbarch, arc_unwind_sp); | |
1267 | ||
1268 | set_gdbarch_frame_align (gdbarch, arc_frame_align); | |
1269 | ||
1270 | set_gdbarch_print_insn (gdbarch, arc_delayed_print_insn); | |
1271 | ||
1272 | set_gdbarch_cannot_step_breakpoint (gdbarch, 1); | |
1273 | ||
1274 | /* "nonsteppable" watchpoint means that watchpoint triggers before | |
1275 | instruction is committed, therefore it is required to remove watchpoint | |
1276 | to step though instruction that triggers it. ARC watchpoints trigger | |
1277 | only after instruction is committed, thus there is no need to remove | |
1278 | them. In fact on ARC watchpoint for memory writes may trigger with more | |
1279 | significant delay, like one or two instructions, depending on type of | |
1280 | memory where write is performed (CCM or external) and next instruction | |
1281 | after the memory write. */ | |
1282 | set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 0); | |
1283 | ||
1284 | /* This doesn't include possible long-immediate value. */ | |
1285 | set_gdbarch_max_insn_length (gdbarch, 4); | |
1286 | ||
1287 | /* Frame unwinders and sniffers. */ | |
1288 | dwarf2_frame_set_init_reg (gdbarch, arc_dwarf2_frame_init_reg); | |
1289 | dwarf2_append_unwinders (gdbarch); | |
1290 | frame_unwind_append_unwinder (gdbarch, &arc_frame_unwind); | |
1291 | frame_base_set_default (gdbarch, &arc_normal_base); | |
1292 | ||
1293 | /* Setup stuff specific to a particular environment (baremetal or Linux). | |
1294 | It can override functions set earlier. */ | |
1295 | gdbarch_init_osabi (info, gdbarch); | |
1296 | ||
aaf43c48 AK |
1297 | if (tdep->jb_pc >= 0) |
1298 | set_gdbarch_get_longjmp_target (gdbarch, arc_get_longjmp_target); | |
1299 | ||
ad0a504f AK |
1300 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); |
1301 | ||
1302 | return gdbarch; | |
1303 | } | |
1304 | ||
1305 | /* Implement the "dump_tdep" gdbarch method. */ | |
1306 | ||
1307 | static void | |
1308 | arc_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) | |
1309 | { | |
aaf43c48 AK |
1310 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1311 | ||
1312 | fprintf_unfiltered (file, "arc_dump_tdep: jb_pc = %i\n", tdep->jb_pc); | |
ad0a504f AK |
1313 | } |
1314 | ||
3be78afd AK |
1315 | /* Wrapper for "maintenance print arc" list of commands. */ |
1316 | ||
1317 | static void | |
1318 | maintenance_print_arc_command (char *args, int from_tty) | |
1319 | { | |
1320 | cmd_show_list (maintenance_print_arc_list, from_tty, ""); | |
1321 | } | |
1322 | ||
ad0a504f AK |
1323 | /* Suppress warning from -Wmissing-prototypes. */ |
1324 | extern initialize_file_ftype _initialize_arc_tdep; | |
1325 | ||
1326 | void | |
1327 | _initialize_arc_tdep (void) | |
1328 | { | |
1329 | gdbarch_register (bfd_arch_arc, arc_gdbarch_init, arc_dump_tdep); | |
1330 | ||
1331 | initialize_tdesc_arc_v2 (); | |
1332 | initialize_tdesc_arc_arcompact (); | |
1333 | ||
1334 | /* Register ARC-specific commands with gdb. */ | |
1335 | ||
3be78afd AK |
1336 | /* Add root prefix command for "maintenance print arc" commands. */ |
1337 | add_prefix_cmd ("arc", class_maintenance, maintenance_print_arc_command, | |
1338 | _("ARC-specific maintenance commands for printing GDB " | |
1339 | "internal state."), | |
1340 | &maintenance_print_arc_list, "maintenance print arc ", 0, | |
1341 | &maintenanceprintlist); | |
1342 | ||
ad0a504f AK |
1343 | /* Debug internals for ARC GDB. */ |
1344 | add_setshow_zinteger_cmd ("arc", class_maintenance, | |
1345 | &arc_debug, | |
1346 | _("Set ARC specific debugging."), | |
1347 | _("Show ARC specific debugging."), | |
1348 | _("Non-zero enables ARC specific debugging."), | |
1349 | NULL, NULL, &setdebuglist, &showdebuglist); | |
1350 | } |