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* config.guess: Update to version 2011-02-02
[deliverable/binutils-gdb.git] / gdb / bfin-tdep.c
CommitLineData
91021223
MF		 1/* Target-dependent code for Analog Devices Blackfin processor, for GDB.
2
7b6bb8da 3 Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011
91021223
MF		 4 Free Software Foundation, Inc.
5
6 Contributed by Analog Devices, Inc.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23#include "defs.h"
24#include "gdb_string.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "arch-utils.h"
28#include "regcache.h"
29#include "frame.h"
30#include "frame-unwind.h"
31#include "frame-base.h"
32#include "trad-frame.h"
33#include "dis-asm.h"
34#include "gdb_assert.h"
5387a0c6
MF		 35#include "sim-regno.h"
36#include "gdb/sim-bfin.h"
91021223
MF		 37#include "dwarf2-frame.h"
38#include "symtab.h"
39#include "elf-bfd.h"
40#include "elf/bfin.h"
41#include "osabi.h"
42#include "infcall.h"
43#include "xml-syscall.h"
44#include "bfin-tdep.h"
45
46/* Macros used by prologue functions. */
47#define P_LINKAGE 0xE800
48#define P_MINUS_SP1 0x0140
49#define P_MINUS_SP2 0x05C0
50#define P_MINUS_SP3 0x0540
51#define P_MINUS_SP4 0x04C0
52#define P_SP_PLUS 0x6C06
53#define P_P2_LOW 0xE10A
54#define P_P2_HIGH 0XE14A
55#define P_SP_EQ_SP_PLUS_P2 0X5BB2
56#define P_SP_EQ_P2_PLUS_SP 0x5B96
57#define P_MINUS_MINUS_SP_EQ_RETS 0x0167
58
59/* Macros used for program flow control. */
60/* 16 bit instruction, max */
61#define P_16_BIT_INSR_MAX 0xBFFF
62/* 32 bit instruction, min */
63#define P_32_BIT_INSR_MIN 0xC000
64/* 32 bit instruction, max */
65#define P_32_BIT_INSR_MAX 0xE801
66/* jump (preg), 16-bit, min */
67#define P_JUMP_PREG_MIN 0x0050
68/* jump (preg), 16-bit, max */
69#define P_JUMP_PREG_MAX 0x0057
70/* jump (pc+preg), 16-bit, min */
71#define P_JUMP_PC_PLUS_PREG_MIN 0x0080
72/* jump (pc+preg), 16-bit, max */
73#define P_JUMP_PC_PLUS_PREG_MAX 0x0087
74/* jump.s pcrel13m2, 16-bit, min */
75#define P_JUMP_S_MIN 0x2000
76/* jump.s pcrel13m2, 16-bit, max */
77#define P_JUMP_S_MAX 0x2FFF
78/* jump.l pcrel25m2, 32-bit, min */
79#define P_JUMP_L_MIN 0xE200
80/* jump.l pcrel25m2, 32-bit, max */
81#define P_JUMP_L_MAX 0xE2FF
82/* conditional jump pcrel11m2, 16-bit, min */
83#define P_IF_CC_JUMP_MIN 0x1800
84/* conditional jump pcrel11m2, 16-bit, max */
85#define P_IF_CC_JUMP_MAX 0x1BFF
86/* conditional jump(bp) pcrel11m2, 16-bit, min */
87#define P_IF_CC_JUMP_BP_MIN 0x1C00
88/* conditional jump(bp) pcrel11m2, 16-bit, max */
89#define P_IF_CC_JUMP_BP_MAX 0x1FFF
90/* conditional !jump pcrel11m2, 16-bit, min */
91#define P_IF_NOT_CC_JUMP_MIN 0x1000
92/* conditional !jump pcrel11m2, 16-bit, max */
93#define P_IF_NOT_CC_JUMP_MAX 0x13FF
94/* conditional jump(bp) pcrel11m2, 16-bit, min */
95#define P_IF_NOT_CC_JUMP_BP_MIN 0x1400
96/* conditional jump(bp) pcrel11m2, 16-bit, max */
97#define P_IF_NOT_CC_JUMP_BP_MAX 0x17FF
98/* call (preg), 16-bit, min */
99#define P_CALL_PREG_MIN 0x0060
100/* call (preg), 16-bit, max */
101#define P_CALL_PREG_MAX 0x0067
102/* call (pc+preg), 16-bit, min */
103#define P_CALL_PC_PLUS_PREG_MIN 0x0070
104/* call (pc+preg), 16-bit, max */
105#define P_CALL_PC_PLUS_PREG_MAX 0x0077
106/* call pcrel25m2, 32-bit, min */
107#define P_CALL_MIN 0xE300
108/* call pcrel25m2, 32-bit, max */
109#define P_CALL_MAX 0xE3FF
110/* RTS */
111#define P_RTS 0x0010
112/* MNOP */
113#define P_MNOP 0xC803
114/* EXCPT, 16-bit, min */
115#define P_EXCPT_MIN 0x00A0
116/* EXCPT, 16-bit, max */
117#define P_EXCPT_MAX 0x00AF
118/* multi instruction mask 1, 16-bit */
119#define P_BIT_MULTI_INS_1 0xC000
120/* multi instruction mask 2, 16-bit */
121#define P_BIT_MULTI_INS_2 0x0800
122
123/* The maximum bytes we search to skip the prologue. */
124#define UPPER_LIMIT 40
125
126/* ASTAT bits */
127#define ASTAT_CC_POS 5
128#define ASTAT_CC (1 << ASTAT_CC_POS)
129
130/* Initial value: Register names used in BFIN's ISA documentation. */
131
132static const char * const bfin_register_name_strings[] =
133{
134 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
135 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
136 "i0", "i1", "i2", "i3", "m0", "m1", "m2", "m3",
137 "b0", "b1", "b2", "b3", "l0", "l1", "l2", "l3",
138 "a0x", "a0w", "a1x", "a1w", "astat", "rets",
139 "lc0", "lt0", "lb0", "lc1", "lt1", "lb1", "cycles", "cycles2",
140 "usp", "seqstat", "syscfg", "reti", "retx", "retn", "rete",
141 "pc", "cc",
142};
143
144#define NUM_BFIN_REGNAMES ARRAY_SIZE (bfin_register_name_strings)
145
146
147/* In this diagram successive memory locations increase downwards or the
148 stack grows upwards with negative indices. (PUSH analogy for stack.)
149
150 The top frame is the "frame" of the current function being executed.
151
152 +--------------+ SP -
153 | local vars | ^
154 +--------------+ |
155 | save regs | |
156 +--------------+ FP |
157 | old FP -|-- top
158 +--------------+ | frame
159 | RETS | | |
160 +--------------+ | |
161 | param 1 | | |
162 | param 2 | | |
163 | ... | | V
164 +--------------+ | -
165 | local vars | | ^
166 +--------------+ | |
167 | save regs | | |
168 +--------------+<- |
169 | old FP -|-- next
170 +--------------+ | frame
171 | RETS | | |
172 +--------------+ | |
173 | param 1 | | |
174 | param 2 | | |
175 | ... | | V
176 +--------------+ | -
177 | local vars | | ^
178 +--------------+ | |
179 | save regs | | |
180 +--------------+<- next frame
181 | old FP | |
182 +--------------+ |
183 | RETS | V
184 +--------------+ -
185
186 The frame chain is formed as following:
187
188 FP has the topmost frame.
189 FP + 4 has the previous FP and so on. */
190
191
192/* Map from DWARF2 register number to GDB register number. */
193
194static const int map_gcc_gdb[] =
195{
196 BFIN_R0_REGNUM,
197 BFIN_R1_REGNUM,
198 BFIN_R2_REGNUM,
199 BFIN_R3_REGNUM,
200 BFIN_R4_REGNUM,
201 BFIN_R5_REGNUM,
202 BFIN_R6_REGNUM,
203 BFIN_R7_REGNUM,
204 BFIN_P0_REGNUM,
205 BFIN_P1_REGNUM,
206 BFIN_P2_REGNUM,
207 BFIN_P3_REGNUM,
208 BFIN_P4_REGNUM,
209 BFIN_P5_REGNUM,
210 BFIN_SP_REGNUM,
211 BFIN_FP_REGNUM,
212 BFIN_I0_REGNUM,
213 BFIN_I1_REGNUM,
214 BFIN_I2_REGNUM,
215 BFIN_I3_REGNUM,
216 BFIN_B0_REGNUM,
217 BFIN_B1_REGNUM,
218 BFIN_B2_REGNUM,
219 BFIN_B3_REGNUM,
220 BFIN_L0_REGNUM,
221 BFIN_L1_REGNUM,
222 BFIN_L2_REGNUM,
223 BFIN_L3_REGNUM,
224 BFIN_M0_REGNUM,
225 BFIN_M1_REGNUM,
226 BFIN_M2_REGNUM,
227 BFIN_M3_REGNUM,
228 BFIN_A0_DOT_X_REGNUM,
229 BFIN_A1_DOT_X_REGNUM,
230 BFIN_CC_REGNUM,
231 BFIN_RETS_REGNUM,
232 BFIN_RETI_REGNUM,
233 BFIN_RETX_REGNUM,
234 BFIN_RETN_REGNUM,
235 BFIN_RETE_REGNUM,
236 BFIN_ASTAT_REGNUM,
237 BFIN_SEQSTAT_REGNUM,
238 BFIN_USP_REGNUM,
239 BFIN_LT0_REGNUM,
240 BFIN_LT1_REGNUM,
241 BFIN_LC0_REGNUM,
242 BFIN_LC1_REGNUM,
243 BFIN_LB0_REGNUM,
244 BFIN_LB1_REGNUM
245};
246
247
248struct bfin_frame_cache
249{
250 /* Base address. */
251 CORE_ADDR base;
252 CORE_ADDR sp_offset;
253 CORE_ADDR pc;
254 int frameless_pc_value;
255
256 /* Saved registers. */
257 CORE_ADDR saved_regs[BFIN_NUM_REGS];
258 CORE_ADDR saved_sp;
259
260 /* Stack space reserved for local variables. */
261 long locals;
262};
263
264/* Allocate and initialize a frame cache. */
265
266static struct bfin_frame_cache *
267bfin_alloc_frame_cache (void)
268{
269 struct bfin_frame_cache *cache;
270 int i;
271
272 cache = FRAME_OBSTACK_ZALLOC (struct bfin_frame_cache);
273
274 /* Base address. */
275 cache->base = 0;
276 cache->sp_offset = -4;
277 cache->pc = 0;
278 cache->frameless_pc_value = 0;
279
280 /* Saved registers. We initialize these to -1 since zero is a valid
281 offset (that's where fp is supposed to be stored). */
282 for (i = 0; i < BFIN_NUM_REGS; i++)
283 cache->saved_regs[i] = -1;
284
285 /* Frameless until proven otherwise. */
286 cache->locals = -1;
287
288 return cache;
289}
290
291static struct bfin_frame_cache *
292bfin_frame_cache (struct frame_info *this_frame, void **this_cache)
293{
294 struct bfin_frame_cache *cache;
295 int i;
296
297 if (*this_cache)
298 return *this_cache;
299
300 cache = bfin_alloc_frame_cache ();
301 *this_cache = cache;
302
303 cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
304 if (cache->base == 0)
305 return cache;
306
307 /* For normal frames, PC is stored at [FP + 4]. */
308 cache->saved_regs[BFIN_PC_REGNUM] = 4;
309 cache->saved_regs[BFIN_FP_REGNUM] = 0;
310
311 /* Adjust all the saved registers such that they contain addresses
312 instead of offsets. */
313 for (i = 0; i < BFIN_NUM_REGS; i++)
314 if (cache->saved_regs[i] != -1)
315 cache->saved_regs[i] += cache->base;
316
317 cache->pc = get_frame_func (this_frame) ;
318 if (cache->pc == 0 || cache->pc == get_frame_pc (this_frame))
319 {
320 /* Either there is no prologue (frameless function) or we are at
321 the start of a function. In short we do not have a frame.
322 PC is stored in rets register. FP points to previous frame. */
323
324 cache->saved_regs[BFIN_PC_REGNUM] =
325 get_frame_register_unsigned (this_frame, BFIN_RETS_REGNUM);
326 cache->frameless_pc_value = 1;
327 cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
328 cache->saved_regs[BFIN_FP_REGNUM] = cache->base;
329 cache->saved_sp = cache->base;
330 }
331 else
332 {
333 cache->frameless_pc_value = 0;
334
335 /* Now that we have the base address for the stack frame we can
336 calculate the value of SP in the calling frame. */
337 cache->saved_sp = cache->base + 8;
338 }
339
340 return cache;
341}
342
343static void
344bfin_frame_this_id (struct frame_info *this_frame,
345 void **this_cache,
346 struct frame_id *this_id)
347{
348 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
349
350 /* This marks the outermost frame. */
351 if (cache->base == 0)
352 return;
353
354 /* See the end of bfin_push_dummy_call. */
355 *this_id = frame_id_build (cache->base + 8, cache->pc);
356}
357
358static struct value *
359bfin_frame_prev_register (struct frame_info *this_frame,
360 void **this_cache,
361 int regnum)
362{
363 struct gdbarch *gdbarch = get_frame_arch (this_frame);
364 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
365
366 if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
367 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
368
369 if (regnum < BFIN_NUM_REGS && cache->saved_regs[regnum] != -1)
370 return frame_unwind_got_memory (this_frame, regnum,
371 cache->saved_regs[regnum]);
372
373 return frame_unwind_got_register (this_frame, regnum, regnum);
374}
375
376static const struct frame_unwind bfin_frame_unwind =
377{
378 NORMAL_FRAME,
379 bfin_frame_this_id,
380 bfin_frame_prev_register,
381 NULL,
382 default_frame_sniffer
383};
384
385/* Check for "[--SP] = <reg>;" insns. These are appear in function
386 prologues to save misc registers onto the stack. */
387
388static int
389is_minus_minus_sp (int op)
390{
391 op &= 0xFFC0;
392
393 if ((op == P_MINUS_SP1) || (op == P_MINUS_SP2)
394 || (op == P_MINUS_SP3) || (op == P_MINUS_SP4))
395 return 1;
396
397 return 0;
398}
399
400/* Skip all the insns that appear in generated function prologues. */
401
402static CORE_ADDR
403bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
404{
405 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
406 int op = read_memory_unsigned_integer (pc, 2, byte_order);
407 CORE_ADDR orig_pc = pc;
408 int done = 0;
409
410 /* The new gcc prologue generates the register saves BEFORE the link
411 or RETS saving instruction.
412 So, our job is to stop either at those instructions or some upper
413 limit saying there is no frame! */
414
415 while (!done)
416 {
417 if (is_minus_minus_sp (op))
418 {
419 while (is_minus_minus_sp (op))
420 {
421 pc += 2;
422 op = read_memory_unsigned_integer (pc, 2, byte_order);
423 }
424
425 if (op == P_LINKAGE)
426 pc += 4;
427
428 done = 1;
429 }
430 else if (op == P_LINKAGE)
431 {
432 pc += 4;
433 done = 1;
434 }
435 else if (op == P_MINUS_MINUS_SP_EQ_RETS)
436 {
437 pc += 2;
438 done = 1;
439 }
440 else if (op == P_RTS)
441 {
442 done = 1;
443 }
444 else if ((op >= P_JUMP_PREG_MIN && op <= P_JUMP_PREG_MAX)
445 || (op >= P_JUMP_PC_PLUS_PREG_MIN
446 && op <= P_JUMP_PC_PLUS_PREG_MAX)
447 || (op == P_JUMP_S_MIN && op <= P_JUMP_S_MAX))
448 {
449 done = 1;
450 }
451 else if (pc - orig_pc >= UPPER_LIMIT)
452 {
453 warning (_("Function Prologue not recognised; "
454 "pc will point to ENTRY_POINT of the function"));
455 pc = orig_pc + 2;
456 done = 1;
457 }
458 else
459 {
460 pc += 2; /* Not a terminating instruction go on. */
461 op = read_memory_unsigned_integer (pc, 2, byte_order);
462 }
463 }
464
465 /* TODO:
466 Dwarf2 uses entry point value AFTER some register initializations.
467 We should perhaps skip such asssignments as well (R6 = R1, ...). */
468
469 return pc;
470}
471
472/* Return the GDB type object for the "standard" data type of data in
473 register N. This should be void pointer for P0-P5, SP, FP;
474 void pointer to function for PC; int otherwise. */
475
476static struct type *
477bfin_register_type (struct gdbarch *gdbarch, int regnum)
478{
479 if ((regnum >= BFIN_P0_REGNUM && regnum <= BFIN_FP_REGNUM)
480 || regnum == BFIN_USP_REGNUM)
481 return builtin_type (gdbarch)->builtin_data_ptr;
482
2ce7ff1d
MF		 483 if (regnum == BFIN_PC_REGNUM || regnum == BFIN_RETS_REGNUM
484 || regnum == BFIN_RETI_REGNUM || regnum == BFIN_RETX_REGNUM
485 || regnum == BFIN_RETN_REGNUM || regnum == BFIN_RETE_REGNUM
486 || regnum == BFIN_LT0_REGNUM || regnum == BFIN_LB0_REGNUM
487 || regnum == BFIN_LT1_REGNUM || regnum == BFIN_LB1_REGNUM)
91021223
MF		 488 return builtin_type (gdbarch)->builtin_func_ptr;
489
490 return builtin_type (gdbarch)->builtin_int32;
491}
492
493static CORE_ADDR
494bfin_push_dummy_call (struct gdbarch *gdbarch,
495 struct value *function,
496 struct regcache *regcache,
497 CORE_ADDR bp_addr,
498 int nargs,
499 struct value **args,
500 CORE_ADDR sp,
501 int struct_return,
502 CORE_ADDR struct_addr)
503{
504 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
505 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
506 char buf[4];
507 int i;
508 long reg_r0, reg_r1, reg_r2;
509 int total_len = 0;
510 enum bfin_abi abi = bfin_abi (gdbarch);
511 CORE_ADDR func_addr = find_function_addr (function, NULL);
512
513 for (i = nargs - 1; i >= 0; i--)
514 {
515 struct type *value_type = value_enclosing_type (args[i]);
516 int len = TYPE_LENGTH (value_type);
517
518 total_len += (len + 3) & ~3;
519 }
520
521 /* At least twelve bytes of stack space must be allocated for the function's
522 arguments, even for functions that have less than 12 bytes of argument
523 data. */
524
525 if (total_len < 12)
526 sp -= 12 - total_len;
527
528 /* Push arguments in reverse order. */
529
530 for (i = nargs - 1; i >= 0; i--)
531 {
532 struct type *value_type = value_enclosing_type (args[i]);
533 struct type *arg_type = check_typedef (value_type);
534 int len = TYPE_LENGTH (value_type);
535 int container_len = (len + 3) & ~3;
536
537 sp -= container_len;
538 write_memory (sp, value_contents_writeable (args[i]), container_len);
539 }
540
541 /* Initialize R0, R1, and R2 to the first 3 words of parameters. */
542
543 reg_r0 = read_memory_integer (sp, 4, byte_order);
544 regcache_cooked_write_unsigned (regcache, BFIN_R0_REGNUM, reg_r0);
545 reg_r1 = read_memory_integer (sp + 4, 4, byte_order);
546 regcache_cooked_write_unsigned (regcache, BFIN_R1_REGNUM, reg_r1);
547 reg_r2 = read_memory_integer (sp + 8, 4, byte_order);
548 regcache_cooked_write_unsigned (regcache, BFIN_R2_REGNUM, reg_r2);
549
550 /* Store struct value address. */
551
552 if (struct_return)
553 regcache_cooked_write_unsigned (regcache, BFIN_P0_REGNUM, struct_addr);
554
555 /* Set the dummy return value to bp_addr.
556 A dummy breakpoint will be setup to execute the call. */
557
558 regcache_cooked_write_unsigned (regcache, BFIN_RETS_REGNUM, bp_addr);
559
560 /* Finally, update the stack pointer. */
561
562 regcache_cooked_write_unsigned (regcache, BFIN_SP_REGNUM, sp);
563
564 return sp;
565}
566
567/* Convert DWARF2 register number REG to the appropriate register number
568 used by GDB. */
569
570static int
571bfin_reg_to_regnum (struct gdbarch *gdbarch, int reg)
572{
573 if (reg > ARRAY_SIZE (map_gcc_gdb))
574 return 0;
575
576 return map_gcc_gdb[reg];
577}
578
579/* This function implements the BREAKPOINT_FROM_PC macro. It returns
580 a pointer to a string of bytes that encode a breakpoint instruction,
581 stores the length of the string to *lenptr, and adjusts the program
582 counter (if necessary) to point to the actual memory location where
583 the breakpoint should be inserted. */
584
585static const unsigned char *
0963b4bd
MS		 586bfin_breakpoint_from_pc (struct gdbarch *gdbarch,
587 CORE_ADDR *pcptr, int *lenptr)
91021223
MF		 588{
589 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
590 unsigned short iw;
591 static unsigned char bfin_breakpoint[] = {0xa1, 0x00, 0x00, 0x00};
592 static unsigned char bfin_sim_breakpoint[] = {0x25, 0x00, 0x00, 0x00};
593
594 iw = read_memory_unsigned_integer (*pcptr, 2, byte_order);
595
596 if ((iw & 0xf000) >= 0xc000)
597 /* 32-bit instruction. */
598 *lenptr = 4;
599 else
600 *lenptr = 2;
601
602 if (strcmp (target_shortname, "sim") == 0)
603 return bfin_sim_breakpoint;
604 else
605 return bfin_breakpoint;
606}
607
608static void
609bfin_extract_return_value (struct type *type,
610 struct regcache *regs,
611 gdb_byte *dst)
612{
613 struct gdbarch *gdbarch = get_regcache_arch (regs);
614 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
615 bfd_byte *valbuf = dst;
616 int len = TYPE_LENGTH (type);
617 ULONGEST tmp;
618 int regno = BFIN_R0_REGNUM;
619
620 gdb_assert (len <= 8);
621
622 while (len > 0)
623 {
624 regcache_cooked_read_unsigned (regs, regno++, &tmp);
625 store_unsigned_integer (valbuf, (len > 4 ? 4 : len), tmp, byte_order);
626 len -= 4;
627 valbuf += 4;
628 }
629}
630
631/* Write into appropriate registers a function return value of type
632 TYPE, given in virtual format. */
633
634static void
635bfin_store_return_value (struct type *type,
636 struct regcache *regs,
637 const gdb_byte *src)
638{
639 const bfd_byte *valbuf = src;
640
641 /* Integral values greater than one word are stored in consecutive
642 registers starting with R0. This will always be a multiple of
643 the register size. */
644
645 int len = TYPE_LENGTH (type);
646 int regno = BFIN_R0_REGNUM;
647
648 gdb_assert (len <= 8);
649
650 while (len > 0)
651 {
652 regcache_cooked_write (regs, regno++, valbuf);
653 len -= 4;
654 valbuf += 4;
655 }
656}
657
658/* Determine, for architecture GDBARCH, how a return value of TYPE
659 should be returned. If it is supposed to be returned in registers,
660 and READBUF is nonzero, read the appropriate value from REGCACHE,
661 and copy it into READBUF. If WRITEBUF is nonzero, write the value
662 from WRITEBUF into REGCACHE. */
663
664static enum return_value_convention
665bfin_return_value (struct gdbarch *gdbarch,
666 struct type *func_type,
667 struct type *type,
668 struct regcache *regcache,
669 gdb_byte *readbuf,
670 const gdb_byte *writebuf)
671{
672 if (TYPE_LENGTH (type) > 8)
673 return RETURN_VALUE_STRUCT_CONVENTION;
674
675 if (readbuf)
676 bfin_extract_return_value (type, regcache, readbuf);
677
678 if (writebuf)
679 bfin_store_return_value (type, regcache, writebuf);
680
681 return RETURN_VALUE_REGISTER_CONVENTION;
682}
683
684/* Return the BFIN register name corresponding to register I. */
685
686static const char *
687bfin_register_name (struct gdbarch *gdbarch, int i)
688{
689 return bfin_register_name_strings[i];
690}
691
692static void
693bfin_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
694 int regnum, gdb_byte *buffer)
695{
696 gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
697
698 if (regnum != BFIN_CC_REGNUM)
699 internal_error (__FILE__, __LINE__,
700 _("invalid register number %d"), regnum);
701
702 /* Extract the CC bit from the ASTAT register. */
703 regcache_raw_read (regcache, BFIN_ASTAT_REGNUM, buf);
704 buffer[1] = buffer[2] = buffer[3] = 0;
705 buffer[0] = !!(buf[0] & ASTAT_CC);
706}
707
708static void
709bfin_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
710 int regnum, const gdb_byte *buffer)
711{
712 gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
713
714 if (regnum != BFIN_CC_REGNUM)
715 internal_error (__FILE__, __LINE__,
716 _("invalid register number %d"), regnum);
717
718 /* Overlay the CC bit in the ASTAT register. */
719 regcache_raw_read (regcache, BFIN_ASTAT_REGNUM, buf);
720 buf[0] = (buf[0] & ~ASTAT_CC) | ((buffer[0] & 1) << ASTAT_CC_POS);
721 regcache_raw_write (regcache, BFIN_ASTAT_REGNUM, buf);
722}
723
724static CORE_ADDR
725bfin_frame_base_address (struct frame_info *this_frame, void **this_cache)
726{
727 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
728
729 return cache->base;
730}
731
732static CORE_ADDR
733bfin_frame_local_address (struct frame_info *this_frame, void **this_cache)
734{
735 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
736
737 return cache->base - 4;
738}
739
740static CORE_ADDR
741bfin_frame_args_address (struct frame_info *this_frame, void **this_cache)
742{
743 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
744
745 return cache->base + 8;
746}
747
748static const struct frame_base bfin_frame_base =
749{
750 &bfin_frame_unwind,
751 bfin_frame_base_address,
752 bfin_frame_local_address,
753 bfin_frame_args_address
754};
755
756static struct frame_id
757bfin_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
758{
759 CORE_ADDR sp;
760
761 sp = get_frame_register_unsigned (this_frame, BFIN_SP_REGNUM);
762
763 return frame_id_build (sp, get_frame_pc (this_frame));
764}
765
766static CORE_ADDR
767bfin_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
768{
769 return frame_unwind_register_unsigned (next_frame, BFIN_PC_REGNUM);
770}
771
772static CORE_ADDR
773bfin_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
774{
775 return (address & ~0x3);
776}
777
778enum bfin_abi
779bfin_abi (struct gdbarch *gdbarch)
780{
781 return gdbarch_tdep (gdbarch)->bfin_abi;
782}
783
784/* Initialize the current architecture based on INFO. If possible,
785 re-use an architecture from ARCHES, which is a list of
786 architectures already created during this debugging session.
787
788 Called e.g. at program startup, when reading a core file, and when
789 reading a binary file. */
790
791static struct gdbarch *
792bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
793{
794 struct gdbarch_tdep *tdep;
795 struct gdbarch *gdbarch;
796 int elf_flags;
797 enum bfin_abi abi;
798
799 /* Extract the ELF flags, if available. */
800 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
801 elf_flags = elf_elfheader (info.abfd)->e_flags;
802 else
803 elf_flags = 0;
804
805 abi = BFIN_ABI_FLAT;
806
807 /* If there is already a candidate, use it. */
808
809 for (arches = gdbarch_list_lookup_by_info (arches, &info);
810 arches != NULL;
811 arches = gdbarch_list_lookup_by_info (arches->next, &info))
812 {
813 if (gdbarch_tdep (arches->gdbarch)->bfin_abi != abi)
814 continue;
815 return arches->gdbarch;
816 }
817
818 tdep = XMALLOC (struct gdbarch_tdep);
819 gdbarch = gdbarch_alloc (&info, tdep);
820
821 tdep->bfin_abi = abi;
822
823 set_gdbarch_num_regs (gdbarch, BFIN_NUM_REGS);
824 set_gdbarch_pseudo_register_read (gdbarch, bfin_pseudo_register_read);
825 set_gdbarch_pseudo_register_write (gdbarch, bfin_pseudo_register_write);
826 set_gdbarch_num_pseudo_regs (gdbarch, BFIN_NUM_PSEUDO_REGS);
827 set_gdbarch_sp_regnum (gdbarch, BFIN_SP_REGNUM);
828 set_gdbarch_pc_regnum (gdbarch, BFIN_PC_REGNUM);
829 set_gdbarch_ps_regnum (gdbarch, BFIN_ASTAT_REGNUM);
830 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, bfin_reg_to_regnum);
831 set_gdbarch_register_name (gdbarch, bfin_register_name);
832 set_gdbarch_register_type (gdbarch, bfin_register_type);
833 set_gdbarch_dummy_id (gdbarch, bfin_dummy_id);
834 set_gdbarch_push_dummy_call (gdbarch, bfin_push_dummy_call);
835 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
836 set_gdbarch_return_value (gdbarch, bfin_return_value);
837 set_gdbarch_skip_prologue (gdbarch, bfin_skip_prologue);
838 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
839 set_gdbarch_breakpoint_from_pc (gdbarch, bfin_breakpoint_from_pc);
840 set_gdbarch_decr_pc_after_break (gdbarch, 2);
841 set_gdbarch_frame_args_skip (gdbarch, 8);
842 set_gdbarch_unwind_pc (gdbarch, bfin_unwind_pc);
843 set_gdbarch_frame_align (gdbarch, bfin_frame_align);
844 set_gdbarch_print_insn (gdbarch, print_insn_bfin);
845
846 /* Hook in ABI-specific overrides, if they have been registered. */
847 gdbarch_init_osabi (info, gdbarch);
848
849 dwarf2_append_unwinders (gdbarch);
850
851 frame_base_set_default (gdbarch, &bfin_frame_base);
852
853 frame_unwind_append_unwinder (gdbarch, &bfin_frame_unwind);
854
855 return gdbarch;
856}
857
858/* Provide a prototype to silence -Wmissing-prototypes. */
859extern initialize_file_ftype _initialize_bfin_tdep;
860
861void
862_initialize_bfin_tdep (void)
863{
864 register_gdbarch_init (bfd_arch_bfin, bfin_gdbarch_init);
865}
GDB Binutils - Deliverables
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