Fix bug in arm_push_dummy_call by -fsanitize=address
[deliverable/binutils-gdb.git] / gdb / bfin-tdep.c
CommitLineData
91021223
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1/* Target-dependent code for Analog Devices Blackfin processor, for GDB.
2
32d0add0 3 Copyright (C) 2005-2015 Free Software Foundation, Inc.
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4
5 Contributed by Analog Devices, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22#include "defs.h"
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23#include "inferior.h"
24#include "gdbcore.h"
25#include "arch-utils.h"
26#include "regcache.h"
27#include "frame.h"
28#include "frame-unwind.h"
29#include "frame-base.h"
30#include "trad-frame.h"
31#include "dis-asm.h"
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32#include "sim-regno.h"
33#include "gdb/sim-bfin.h"
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34#include "dwarf2-frame.h"
35#include "symtab.h"
36#include "elf-bfd.h"
37#include "elf/bfin.h"
38#include "osabi.h"
39#include "infcall.h"
40#include "xml-syscall.h"
41#include "bfin-tdep.h"
42
43/* Macros used by prologue functions. */
44#define P_LINKAGE 0xE800
45#define P_MINUS_SP1 0x0140
46#define P_MINUS_SP2 0x05C0
47#define P_MINUS_SP3 0x0540
48#define P_MINUS_SP4 0x04C0
49#define P_SP_PLUS 0x6C06
50#define P_P2_LOW 0xE10A
51#define P_P2_HIGH 0XE14A
52#define P_SP_EQ_SP_PLUS_P2 0X5BB2
53#define P_SP_EQ_P2_PLUS_SP 0x5B96
54#define P_MINUS_MINUS_SP_EQ_RETS 0x0167
55
56/* Macros used for program flow control. */
57/* 16 bit instruction, max */
58#define P_16_BIT_INSR_MAX 0xBFFF
59/* 32 bit instruction, min */
60#define P_32_BIT_INSR_MIN 0xC000
61/* 32 bit instruction, max */
62#define P_32_BIT_INSR_MAX 0xE801
63/* jump (preg), 16-bit, min */
64#define P_JUMP_PREG_MIN 0x0050
65/* jump (preg), 16-bit, max */
66#define P_JUMP_PREG_MAX 0x0057
67/* jump (pc+preg), 16-bit, min */
68#define P_JUMP_PC_PLUS_PREG_MIN 0x0080
69/* jump (pc+preg), 16-bit, max */
70#define P_JUMP_PC_PLUS_PREG_MAX 0x0087
71/* jump.s pcrel13m2, 16-bit, min */
72#define P_JUMP_S_MIN 0x2000
73/* jump.s pcrel13m2, 16-bit, max */
74#define P_JUMP_S_MAX 0x2FFF
75/* jump.l pcrel25m2, 32-bit, min */
76#define P_JUMP_L_MIN 0xE200
77/* jump.l pcrel25m2, 32-bit, max */
78#define P_JUMP_L_MAX 0xE2FF
79/* conditional jump pcrel11m2, 16-bit, min */
80#define P_IF_CC_JUMP_MIN 0x1800
81/* conditional jump pcrel11m2, 16-bit, max */
82#define P_IF_CC_JUMP_MAX 0x1BFF
83/* conditional jump(bp) pcrel11m2, 16-bit, min */
84#define P_IF_CC_JUMP_BP_MIN 0x1C00
85/* conditional jump(bp) pcrel11m2, 16-bit, max */
86#define P_IF_CC_JUMP_BP_MAX 0x1FFF
87/* conditional !jump pcrel11m2, 16-bit, min */
88#define P_IF_NOT_CC_JUMP_MIN 0x1000
89/* conditional !jump pcrel11m2, 16-bit, max */
90#define P_IF_NOT_CC_JUMP_MAX 0x13FF
91/* conditional jump(bp) pcrel11m2, 16-bit, min */
92#define P_IF_NOT_CC_JUMP_BP_MIN 0x1400
93/* conditional jump(bp) pcrel11m2, 16-bit, max */
94#define P_IF_NOT_CC_JUMP_BP_MAX 0x17FF
95/* call (preg), 16-bit, min */
96#define P_CALL_PREG_MIN 0x0060
97/* call (preg), 16-bit, max */
98#define P_CALL_PREG_MAX 0x0067
99/* call (pc+preg), 16-bit, min */
100#define P_CALL_PC_PLUS_PREG_MIN 0x0070
101/* call (pc+preg), 16-bit, max */
102#define P_CALL_PC_PLUS_PREG_MAX 0x0077
103/* call pcrel25m2, 32-bit, min */
104#define P_CALL_MIN 0xE300
105/* call pcrel25m2, 32-bit, max */
106#define P_CALL_MAX 0xE3FF
107/* RTS */
108#define P_RTS 0x0010
109/* MNOP */
110#define P_MNOP 0xC803
111/* EXCPT, 16-bit, min */
112#define P_EXCPT_MIN 0x00A0
113/* EXCPT, 16-bit, max */
114#define P_EXCPT_MAX 0x00AF
115/* multi instruction mask 1, 16-bit */
116#define P_BIT_MULTI_INS_1 0xC000
117/* multi instruction mask 2, 16-bit */
118#define P_BIT_MULTI_INS_2 0x0800
119
120/* The maximum bytes we search to skip the prologue. */
121#define UPPER_LIMIT 40
122
123/* ASTAT bits */
124#define ASTAT_CC_POS 5
125#define ASTAT_CC (1 << ASTAT_CC_POS)
126
127/* Initial value: Register names used in BFIN's ISA documentation. */
128
129static const char * const bfin_register_name_strings[] =
130{
131 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
132 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
133 "i0", "i1", "i2", "i3", "m0", "m1", "m2", "m3",
134 "b0", "b1", "b2", "b3", "l0", "l1", "l2", "l3",
135 "a0x", "a0w", "a1x", "a1w", "astat", "rets",
136 "lc0", "lt0", "lb0", "lc1", "lt1", "lb1", "cycles", "cycles2",
137 "usp", "seqstat", "syscfg", "reti", "retx", "retn", "rete",
138 "pc", "cc",
139};
140
141#define NUM_BFIN_REGNAMES ARRAY_SIZE (bfin_register_name_strings)
142
143
144/* In this diagram successive memory locations increase downwards or the
145 stack grows upwards with negative indices. (PUSH analogy for stack.)
146
147 The top frame is the "frame" of the current function being executed.
148
149 +--------------+ SP -
150 | local vars | ^
151 +--------------+ |
152 | save regs | |
153 +--------------+ FP |
154 | old FP -|-- top
155 +--------------+ | frame
156 | RETS | | |
157 +--------------+ | |
158 | param 1 | | |
159 | param 2 | | |
160 | ... | | V
161 +--------------+ | -
162 | local vars | | ^
163 +--------------+ | |
164 | save regs | | |
165 +--------------+<- |
166 | old FP -|-- next
167 +--------------+ | frame
168 | RETS | | |
169 +--------------+ | |
170 | param 1 | | |
171 | param 2 | | |
172 | ... | | V
173 +--------------+ | -
174 | local vars | | ^
175 +--------------+ | |
176 | save regs | | |
177 +--------------+<- next frame
178 | old FP | |
179 +--------------+ |
180 | RETS | V
181 +--------------+ -
182
183 The frame chain is formed as following:
184
185 FP has the topmost frame.
186 FP + 4 has the previous FP and so on. */
187
188
189/* Map from DWARF2 register number to GDB register number. */
190
191static const int map_gcc_gdb[] =
192{
193 BFIN_R0_REGNUM,
194 BFIN_R1_REGNUM,
195 BFIN_R2_REGNUM,
196 BFIN_R3_REGNUM,
197 BFIN_R4_REGNUM,
198 BFIN_R5_REGNUM,
199 BFIN_R6_REGNUM,
200 BFIN_R7_REGNUM,
201 BFIN_P0_REGNUM,
202 BFIN_P1_REGNUM,
203 BFIN_P2_REGNUM,
204 BFIN_P3_REGNUM,
205 BFIN_P4_REGNUM,
206 BFIN_P5_REGNUM,
207 BFIN_SP_REGNUM,
208 BFIN_FP_REGNUM,
209 BFIN_I0_REGNUM,
210 BFIN_I1_REGNUM,
211 BFIN_I2_REGNUM,
212 BFIN_I3_REGNUM,
213 BFIN_B0_REGNUM,
214 BFIN_B1_REGNUM,
215 BFIN_B2_REGNUM,
216 BFIN_B3_REGNUM,
217 BFIN_L0_REGNUM,
218 BFIN_L1_REGNUM,
219 BFIN_L2_REGNUM,
220 BFIN_L3_REGNUM,
221 BFIN_M0_REGNUM,
222 BFIN_M1_REGNUM,
223 BFIN_M2_REGNUM,
224 BFIN_M3_REGNUM,
225 BFIN_A0_DOT_X_REGNUM,
226 BFIN_A1_DOT_X_REGNUM,
227 BFIN_CC_REGNUM,
228 BFIN_RETS_REGNUM,
229 BFIN_RETI_REGNUM,
230 BFIN_RETX_REGNUM,
231 BFIN_RETN_REGNUM,
232 BFIN_RETE_REGNUM,
233 BFIN_ASTAT_REGNUM,
234 BFIN_SEQSTAT_REGNUM,
235 BFIN_USP_REGNUM,
236 BFIN_LT0_REGNUM,
237 BFIN_LT1_REGNUM,
238 BFIN_LC0_REGNUM,
239 BFIN_LC1_REGNUM,
240 BFIN_LB0_REGNUM,
241 BFIN_LB1_REGNUM
242};
243
244
245struct bfin_frame_cache
246{
247 /* Base address. */
248 CORE_ADDR base;
249 CORE_ADDR sp_offset;
250 CORE_ADDR pc;
251 int frameless_pc_value;
252
253 /* Saved registers. */
254 CORE_ADDR saved_regs[BFIN_NUM_REGS];
255 CORE_ADDR saved_sp;
256
257 /* Stack space reserved for local variables. */
258 long locals;
259};
260
261/* Allocate and initialize a frame cache. */
262
263static struct bfin_frame_cache *
264bfin_alloc_frame_cache (void)
265{
266 struct bfin_frame_cache *cache;
267 int i;
268
269 cache = FRAME_OBSTACK_ZALLOC (struct bfin_frame_cache);
270
271 /* Base address. */
272 cache->base = 0;
273 cache->sp_offset = -4;
274 cache->pc = 0;
275 cache->frameless_pc_value = 0;
276
277 /* Saved registers. We initialize these to -1 since zero is a valid
278 offset (that's where fp is supposed to be stored). */
279 for (i = 0; i < BFIN_NUM_REGS; i++)
280 cache->saved_regs[i] = -1;
281
282 /* Frameless until proven otherwise. */
283 cache->locals = -1;
284
285 return cache;
286}
287
288static struct bfin_frame_cache *
289bfin_frame_cache (struct frame_info *this_frame, void **this_cache)
290{
291 struct bfin_frame_cache *cache;
292 int i;
293
294 if (*this_cache)
9a3c8263 295 return (struct bfin_frame_cache *) *this_cache;
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296
297 cache = bfin_alloc_frame_cache ();
298 *this_cache = cache;
299
300 cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
301 if (cache->base == 0)
302 return cache;
303
304 /* For normal frames, PC is stored at [FP + 4]. */
305 cache->saved_regs[BFIN_PC_REGNUM] = 4;
306 cache->saved_regs[BFIN_FP_REGNUM] = 0;
307
308 /* Adjust all the saved registers such that they contain addresses
309 instead of offsets. */
310 for (i = 0; i < BFIN_NUM_REGS; i++)
311 if (cache->saved_regs[i] != -1)
312 cache->saved_regs[i] += cache->base;
313
314 cache->pc = get_frame_func (this_frame) ;
315 if (cache->pc == 0 || cache->pc == get_frame_pc (this_frame))
316 {
317 /* Either there is no prologue (frameless function) or we are at
318 the start of a function. In short we do not have a frame.
319 PC is stored in rets register. FP points to previous frame. */
320
321 cache->saved_regs[BFIN_PC_REGNUM] =
322 get_frame_register_unsigned (this_frame, BFIN_RETS_REGNUM);
323 cache->frameless_pc_value = 1;
324 cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
325 cache->saved_regs[BFIN_FP_REGNUM] = cache->base;
326 cache->saved_sp = cache->base;
327 }
328 else
329 {
330 cache->frameless_pc_value = 0;
331
332 /* Now that we have the base address for the stack frame we can
333 calculate the value of SP in the calling frame. */
334 cache->saved_sp = cache->base + 8;
335 }
336
337 return cache;
338}
339
340static void
341bfin_frame_this_id (struct frame_info *this_frame,
342 void **this_cache,
343 struct frame_id *this_id)
344{
345 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
346
347 /* This marks the outermost frame. */
348 if (cache->base == 0)
349 return;
350
351 /* See the end of bfin_push_dummy_call. */
352 *this_id = frame_id_build (cache->base + 8, cache->pc);
353}
354
355static struct value *
356bfin_frame_prev_register (struct frame_info *this_frame,
357 void **this_cache,
358 int regnum)
359{
360 struct gdbarch *gdbarch = get_frame_arch (this_frame);
361 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
362
363 if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
364 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
365
366 if (regnum < BFIN_NUM_REGS && cache->saved_regs[regnum] != -1)
367 return frame_unwind_got_memory (this_frame, regnum,
368 cache->saved_regs[regnum]);
369
370 return frame_unwind_got_register (this_frame, regnum, regnum);
371}
372
373static const struct frame_unwind bfin_frame_unwind =
374{
375 NORMAL_FRAME,
8fbca658 376 default_frame_unwind_stop_reason,
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377 bfin_frame_this_id,
378 bfin_frame_prev_register,
379 NULL,
380 default_frame_sniffer
381};
382
383/* Check for "[--SP] = <reg>;" insns. These are appear in function
384 prologues to save misc registers onto the stack. */
385
386static int
387is_minus_minus_sp (int op)
388{
389 op &= 0xFFC0;
390
391 if ((op == P_MINUS_SP1) || (op == P_MINUS_SP2)
392 || (op == P_MINUS_SP3) || (op == P_MINUS_SP4))
393 return 1;
394
395 return 0;
396}
397
398/* Skip all the insns that appear in generated function prologues. */
399
400static CORE_ADDR
401bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
402{
403 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
404 int op = read_memory_unsigned_integer (pc, 2, byte_order);
405 CORE_ADDR orig_pc = pc;
406 int done = 0;
407
408 /* The new gcc prologue generates the register saves BEFORE the link
409 or RETS saving instruction.
410 So, our job is to stop either at those instructions or some upper
411 limit saying there is no frame! */
412
413 while (!done)
414 {
415 if (is_minus_minus_sp (op))
416 {
417 while (is_minus_minus_sp (op))
418 {
419 pc += 2;
420 op = read_memory_unsigned_integer (pc, 2, byte_order);
421 }
422
423 if (op == P_LINKAGE)
424 pc += 4;
425
426 done = 1;
427 }
428 else if (op == P_LINKAGE)
429 {
430 pc += 4;
431 done = 1;
432 }
433 else if (op == P_MINUS_MINUS_SP_EQ_RETS)
434 {
435 pc += 2;
436 done = 1;
437 }
438 else if (op == P_RTS)
439 {
440 done = 1;
441 }
442 else if ((op >= P_JUMP_PREG_MIN && op <= P_JUMP_PREG_MAX)
443 || (op >= P_JUMP_PC_PLUS_PREG_MIN
444 && op <= P_JUMP_PC_PLUS_PREG_MAX)
445 || (op == P_JUMP_S_MIN && op <= P_JUMP_S_MAX))
446 {
447 done = 1;
448 }
449 else if (pc - orig_pc >= UPPER_LIMIT)
450 {
451 warning (_("Function Prologue not recognised; "
452 "pc will point to ENTRY_POINT of the function"));
453 pc = orig_pc + 2;
454 done = 1;
455 }
456 else
457 {
458 pc += 2; /* Not a terminating instruction go on. */
459 op = read_memory_unsigned_integer (pc, 2, byte_order);
460 }
461 }
462
463 /* TODO:
464 Dwarf2 uses entry point value AFTER some register initializations.
465 We should perhaps skip such asssignments as well (R6 = R1, ...). */
466
467 return pc;
468}
469
470/* Return the GDB type object for the "standard" data type of data in
471 register N. This should be void pointer for P0-P5, SP, FP;
472 void pointer to function for PC; int otherwise. */
473
474static struct type *
475bfin_register_type (struct gdbarch *gdbarch, int regnum)
476{
477 if ((regnum >= BFIN_P0_REGNUM && regnum <= BFIN_FP_REGNUM)
478 || regnum == BFIN_USP_REGNUM)
479 return builtin_type (gdbarch)->builtin_data_ptr;
480
2ce7ff1d
MF
481 if (regnum == BFIN_PC_REGNUM || regnum == BFIN_RETS_REGNUM
482 || regnum == BFIN_RETI_REGNUM || regnum == BFIN_RETX_REGNUM
483 || regnum == BFIN_RETN_REGNUM || regnum == BFIN_RETE_REGNUM
484 || regnum == BFIN_LT0_REGNUM || regnum == BFIN_LB0_REGNUM
485 || regnum == BFIN_LT1_REGNUM || regnum == BFIN_LB1_REGNUM)
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MF
486 return builtin_type (gdbarch)->builtin_func_ptr;
487
488 return builtin_type (gdbarch)->builtin_int32;
489}
490
491static CORE_ADDR
492bfin_push_dummy_call (struct gdbarch *gdbarch,
493 struct value *function,
494 struct regcache *regcache,
495 CORE_ADDR bp_addr,
496 int nargs,
497 struct value **args,
498 CORE_ADDR sp,
499 int struct_return,
500 CORE_ADDR struct_addr)
501{
502 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
503 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e362b510 504 gdb_byte buf[4];
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505 int i;
506 long reg_r0, reg_r1, reg_r2;
507 int total_len = 0;
508 enum bfin_abi abi = bfin_abi (gdbarch);
509 CORE_ADDR func_addr = find_function_addr (function, NULL);
510
511 for (i = nargs - 1; i >= 0; i--)
512 {
513 struct type *value_type = value_enclosing_type (args[i]);
91021223 514
744a8059 515 total_len += (TYPE_LENGTH (value_type) + 3) & ~3;
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MF
516 }
517
518 /* At least twelve bytes of stack space must be allocated for the function's
519 arguments, even for functions that have less than 12 bytes of argument
520 data. */
521
522 if (total_len < 12)
523 sp -= 12 - total_len;
524
525 /* Push arguments in reverse order. */
526
527 for (i = nargs - 1; i >= 0; i--)
528 {
529 struct type *value_type = value_enclosing_type (args[i]);
530 struct type *arg_type = check_typedef (value_type);
744a8059 531 int container_len = (TYPE_LENGTH (value_type) + 3) & ~3;
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532
533 sp -= container_len;
534 write_memory (sp, value_contents_writeable (args[i]), container_len);
535 }
536
537 /* Initialize R0, R1, and R2 to the first 3 words of parameters. */
538
539 reg_r0 = read_memory_integer (sp, 4, byte_order);
540 regcache_cooked_write_unsigned (regcache, BFIN_R0_REGNUM, reg_r0);
541 reg_r1 = read_memory_integer (sp + 4, 4, byte_order);
542 regcache_cooked_write_unsigned (regcache, BFIN_R1_REGNUM, reg_r1);
543 reg_r2 = read_memory_integer (sp + 8, 4, byte_order);
544 regcache_cooked_write_unsigned (regcache, BFIN_R2_REGNUM, reg_r2);
545
546 /* Store struct value address. */
547
548 if (struct_return)
549 regcache_cooked_write_unsigned (regcache, BFIN_P0_REGNUM, struct_addr);
550
551 /* Set the dummy return value to bp_addr.
552 A dummy breakpoint will be setup to execute the call. */
553
554 regcache_cooked_write_unsigned (regcache, BFIN_RETS_REGNUM, bp_addr);
555
556 /* Finally, update the stack pointer. */
557
558 regcache_cooked_write_unsigned (regcache, BFIN_SP_REGNUM, sp);
559
560 return sp;
561}
562
563/* Convert DWARF2 register number REG to the appropriate register number
564 used by GDB. */
565
566static int
567bfin_reg_to_regnum (struct gdbarch *gdbarch, int reg)
568{
0fde2c53
DE
569 if (reg < 0 || reg >= ARRAY_SIZE (map_gcc_gdb))
570 return -1;
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MF
571
572 return map_gcc_gdb[reg];
573}
574
be7d37a2
TT
575/* This function implements the 'breakpoint_from_pc' gdbarch method.
576 It returns a pointer to a string of bytes that encode a breakpoint
577 instruction, stores the length of the string to *lenptr, and
578 adjusts the program counter (if necessary) to point to the actual
579 memory location where the breakpoint should be inserted. */
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MF
580
581static const unsigned char *
0963b4bd
MS
582bfin_breakpoint_from_pc (struct gdbarch *gdbarch,
583 CORE_ADDR *pcptr, int *lenptr)
91021223
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584{
585 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
586 unsigned short iw;
587 static unsigned char bfin_breakpoint[] = {0xa1, 0x00, 0x00, 0x00};
588 static unsigned char bfin_sim_breakpoint[] = {0x25, 0x00, 0x00, 0x00};
589
590 iw = read_memory_unsigned_integer (*pcptr, 2, byte_order);
591
592 if ((iw & 0xf000) >= 0xc000)
593 /* 32-bit instruction. */
594 *lenptr = 4;
595 else
596 *lenptr = 2;
597
598 if (strcmp (target_shortname, "sim") == 0)
599 return bfin_sim_breakpoint;
600 else
601 return bfin_breakpoint;
602}
603
604static void
605bfin_extract_return_value (struct type *type,
606 struct regcache *regs,
607 gdb_byte *dst)
608{
609 struct gdbarch *gdbarch = get_regcache_arch (regs);
610 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
611 bfd_byte *valbuf = dst;
612 int len = TYPE_LENGTH (type);
613 ULONGEST tmp;
614 int regno = BFIN_R0_REGNUM;
615
bad43aa5 616 gdb_assert (len <= 8);
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MF
617
618 while (len > 0)
619 {
620 regcache_cooked_read_unsigned (regs, regno++, &tmp);
1364323a 621 store_unsigned_integer (valbuf, (len > 4 ? 4 : len), byte_order, tmp);
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MF
622 len -= 4;
623 valbuf += 4;
624 }
625}
626
627/* Write into appropriate registers a function return value of type
628 TYPE, given in virtual format. */
629
630static void
631bfin_store_return_value (struct type *type,
632 struct regcache *regs,
633 const gdb_byte *src)
634{
635 const bfd_byte *valbuf = src;
636
637 /* Integral values greater than one word are stored in consecutive
638 registers starting with R0. This will always be a multiple of
639 the register size. */
640
641 int len = TYPE_LENGTH (type);
642 int regno = BFIN_R0_REGNUM;
643
bad43aa5 644 gdb_assert (len <= 8);
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MF
645
646 while (len > 0)
647 {
648 regcache_cooked_write (regs, regno++, valbuf);
649 len -= 4;
650 valbuf += 4;
651 }
652}
653
654/* Determine, for architecture GDBARCH, how a return value of TYPE
655 should be returned. If it is supposed to be returned in registers,
656 and READBUF is nonzero, read the appropriate value from REGCACHE,
657 and copy it into READBUF. If WRITEBUF is nonzero, write the value
658 from WRITEBUF into REGCACHE. */
659
660static enum return_value_convention
661bfin_return_value (struct gdbarch *gdbarch,
6a3a010b 662 struct value *function,
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663 struct type *type,
664 struct regcache *regcache,
665 gdb_byte *readbuf,
666 const gdb_byte *writebuf)
667{
668 if (TYPE_LENGTH (type) > 8)
669 return RETURN_VALUE_STRUCT_CONVENTION;
670
671 if (readbuf)
672 bfin_extract_return_value (type, regcache, readbuf);
673
674 if (writebuf)
675 bfin_store_return_value (type, regcache, writebuf);
676
677 return RETURN_VALUE_REGISTER_CONVENTION;
678}
679
680/* Return the BFIN register name corresponding to register I. */
681
682static const char *
683bfin_register_name (struct gdbarch *gdbarch, int i)
684{
685 return bfin_register_name_strings[i];
686}
687
05d1431c 688static enum register_status
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689bfin_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
690 int regnum, gdb_byte *buffer)
691{
692 gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
05d1431c 693 enum register_status status;
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694
695 if (regnum != BFIN_CC_REGNUM)
696 internal_error (__FILE__, __LINE__,
697 _("invalid register number %d"), regnum);
698
699 /* Extract the CC bit from the ASTAT register. */
05d1431c
PA
700 status = regcache_raw_read (regcache, BFIN_ASTAT_REGNUM, buf);
701 if (status == REG_VALID)
702 {
703 buffer[1] = buffer[2] = buffer[3] = 0;
704 buffer[0] = !!(buf[0] & ASTAT_CC);
705 }
706 return status;
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707}
708
709static void
710bfin_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
711 int regnum, const gdb_byte *buffer)
712{
713 gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
714
715 if (regnum != BFIN_CC_REGNUM)
716 internal_error (__FILE__, __LINE__,
717 _("invalid register number %d"), regnum);
718
719 /* Overlay the CC bit in the ASTAT register. */
720 regcache_raw_read (regcache, BFIN_ASTAT_REGNUM, buf);
721 buf[0] = (buf[0] & ~ASTAT_CC) | ((buffer[0] & 1) << ASTAT_CC_POS);
722 regcache_raw_write (regcache, BFIN_ASTAT_REGNUM, buf);
723}
724
725static CORE_ADDR
726bfin_frame_base_address (struct frame_info *this_frame, void **this_cache)
727{
728 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
729
730 return cache->base;
731}
732
733static CORE_ADDR
734bfin_frame_local_address (struct frame_info *this_frame, void **this_cache)
735{
736 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
737
738 return cache->base - 4;
739}
740
741static CORE_ADDR
742bfin_frame_args_address (struct frame_info *this_frame, void **this_cache)
743{
744 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
745
746 return cache->base + 8;
747}
748
749static const struct frame_base bfin_frame_base =
750{
751 &bfin_frame_unwind,
752 bfin_frame_base_address,
753 bfin_frame_local_address,
754 bfin_frame_args_address
755};
756
757static struct frame_id
758bfin_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
759{
760 CORE_ADDR sp;
761
762 sp = get_frame_register_unsigned (this_frame, BFIN_SP_REGNUM);
763
764 return frame_id_build (sp, get_frame_pc (this_frame));
765}
766
767static CORE_ADDR
768bfin_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
769{
770 return frame_unwind_register_unsigned (next_frame, BFIN_PC_REGNUM);
771}
772
773static CORE_ADDR
774bfin_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
775{
776 return (address & ~0x3);
777}
778
779enum bfin_abi
780bfin_abi (struct gdbarch *gdbarch)
781{
782 return gdbarch_tdep (gdbarch)->bfin_abi;
783}
784
785/* Initialize the current architecture based on INFO. If possible,
786 re-use an architecture from ARCHES, which is a list of
787 architectures already created during this debugging session.
788
789 Called e.g. at program startup, when reading a core file, and when
790 reading a binary file. */
791
792static struct gdbarch *
793bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
794{
795 struct gdbarch_tdep *tdep;
796 struct gdbarch *gdbarch;
797 int elf_flags;
798 enum bfin_abi abi;
799
800 /* Extract the ELF flags, if available. */
801 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
802 elf_flags = elf_elfheader (info.abfd)->e_flags;
803 else
804 elf_flags = 0;
805
806 abi = BFIN_ABI_FLAT;
807
808 /* If there is already a candidate, use it. */
809
810 for (arches = gdbarch_list_lookup_by_info (arches, &info);
811 arches != NULL;
812 arches = gdbarch_list_lookup_by_info (arches->next, &info))
813 {
814 if (gdbarch_tdep (arches->gdbarch)->bfin_abi != abi)
815 continue;
816 return arches->gdbarch;
817 }
818
70ba0933 819 tdep = XNEW (struct gdbarch_tdep);
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820 gdbarch = gdbarch_alloc (&info, tdep);
821
822 tdep->bfin_abi = abi;
823
824 set_gdbarch_num_regs (gdbarch, BFIN_NUM_REGS);
825 set_gdbarch_pseudo_register_read (gdbarch, bfin_pseudo_register_read);
826 set_gdbarch_pseudo_register_write (gdbarch, bfin_pseudo_register_write);
827 set_gdbarch_num_pseudo_regs (gdbarch, BFIN_NUM_PSEUDO_REGS);
828 set_gdbarch_sp_regnum (gdbarch, BFIN_SP_REGNUM);
829 set_gdbarch_pc_regnum (gdbarch, BFIN_PC_REGNUM);
830 set_gdbarch_ps_regnum (gdbarch, BFIN_ASTAT_REGNUM);
831 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, bfin_reg_to_regnum);
832 set_gdbarch_register_name (gdbarch, bfin_register_name);
833 set_gdbarch_register_type (gdbarch, bfin_register_type);
834 set_gdbarch_dummy_id (gdbarch, bfin_dummy_id);
835 set_gdbarch_push_dummy_call (gdbarch, bfin_push_dummy_call);
836 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
837 set_gdbarch_return_value (gdbarch, bfin_return_value);
838 set_gdbarch_skip_prologue (gdbarch, bfin_skip_prologue);
839 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
840 set_gdbarch_breakpoint_from_pc (gdbarch, bfin_breakpoint_from_pc);
841 set_gdbarch_decr_pc_after_break (gdbarch, 2);
842 set_gdbarch_frame_args_skip (gdbarch, 8);
843 set_gdbarch_unwind_pc (gdbarch, bfin_unwind_pc);
844 set_gdbarch_frame_align (gdbarch, bfin_frame_align);
845 set_gdbarch_print_insn (gdbarch, print_insn_bfin);
846
847 /* Hook in ABI-specific overrides, if they have been registered. */
848 gdbarch_init_osabi (info, gdbarch);
849
850 dwarf2_append_unwinders (gdbarch);
851
852 frame_base_set_default (gdbarch, &bfin_frame_base);
853
854 frame_unwind_append_unwinder (gdbarch, &bfin_frame_unwind);
855
856 return gdbarch;
857}
858
859/* Provide a prototype to silence -Wmissing-prototypes. */
860extern initialize_file_ftype _initialize_bfin_tdep;
861
862void
863_initialize_bfin_tdep (void)
864{
865 register_gdbarch_init (bfd_arch_bfin, bfin_gdbarch_init);
866}
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