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00dd4fd9 | 1 | /* Target-specific definition for a Hitachi Super-H. |
9faacb92 SC |
2 | Copyright (C) 1993 Free Software Foundation, Inc. |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
6c9638b4 | 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
9faacb92 SC |
19 | |
20 | /* Contributed by Steve Chamberlain sac@cygnus.com */ | |
21 | ||
22 | #define GDB_TARGET_IS_SH | |
23 | ||
24 | #define IEEE_FLOAT 1 | |
25 | ||
26 | /* Define the bit, byte, and word ordering of the machine. */ | |
27 | ||
5f2f2809 | 28 | #define TARGET_BYTE_ORDER_SELECTABLE |
9faacb92 SC |
29 | |
30 | ||
31 | /* Offset from address of function to start of its code. | |
32 | Zero on most machines. */ | |
33 | ||
34 | #define FUNCTION_START_OFFSET 0 | |
35 | ||
36 | /* Advance PC across any function entry prologue instructions | |
37 | to reach some "real" code. */ | |
38 | ||
39 | extern CORE_ADDR sh_skip_prologue (); | |
40 | #define SKIP_PROLOGUE(ip) \ | |
41 | {(ip) = sh_skip_prologue(ip);} | |
42 | ||
43 | ||
44 | /* Immediately after a function call, return the saved pc. | |
45 | Can't always go through the frames for this because on some machines | |
46 | the new frame is not set up until the new function executes | |
47 | some instructions. | |
48 | ||
49 | The return address is the value saved in the PR register + 4 */ | |
50 | ||
51 | #define SAVED_PC_AFTER_CALL(frame) \ | |
ee824ca6 | 52 | (ADDR_BITS_REMOVE(read_register(PR_REGNUM))) |
9faacb92 SC |
53 | |
54 | /* Stack grows downward. */ | |
55 | ||
56 | #define INNER_THAN < | |
57 | ||
58 | /* Illegal instruction - used by the simulator for breakpoint | |
59 | detection */ | |
60 | ||
5f2f2809 SC |
61 | #define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big |
62 | and little endian modes */ | |
fea17b55 SS |
63 | |
64 | #define BIG_REMOTE_BREAKPOINT { 0xc3, 0x20 } | |
65 | #define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 } | |
9faacb92 SC |
66 | |
67 | /* If your kernel resets the pc after the trap happens you may need to | |
68 | define this before including this file. */ | |
2e2b2779 | 69 | #define DECR_PC_AFTER_BREAK 0 |
9faacb92 SC |
70 | |
71 | /* Nonzero if instruction at PC is a return instruction. */ | |
72 | #define ABOUT_TO_RETURN(pc) (read_memory_integer(pc,2) == 0x000b) | |
73 | ||
826e69cf SC |
74 | /* Say how long registers are. */ |
75 | #define REGISTER_TYPE long | |
9faacb92 SC |
76 | |
77 | /* Say how much memory is needed to store a copy of the register set */ | |
78 | #define REGISTER_BYTES (NUM_REGS*4) | |
79 | ||
80 | /* Index within `registers' of the first byte of the space for | |
81 | register N. */ | |
82 | ||
83 | #define REGISTER_BYTE(N) ((N)*4) | |
84 | ||
85 | /* Number of bytes of storage in the actual machine representation | |
86 | for register N. */ | |
87 | ||
88 | #define REGISTER_RAW_SIZE(N) 4 | |
89 | ||
90 | #define REGISTER_VIRTUAL_SIZE(N) 4 | |
91 | ||
92 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
93 | ||
94 | #define MAX_REGISTER_RAW_SIZE 4 | |
95 | ||
96 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ | |
97 | ||
98 | #define MAX_REGISTER_VIRTUAL_SIZE 4 | |
99 | ||
9faacb92 SC |
100 | /* Return the GDB type object for the "standard" data type |
101 | of data in register N. */ | |
102 | ||
a8620985 | 103 | #define REGISTER_VIRTUAL_TYPE(N) \ |
05535e79 | 104 | ((((N) >= FP0_REGNUM && (N) <= FP15_REGNUM) \ |
a8620985 JW |
105 | || (N) == FPUL_REGNUM) \ |
106 | ? builtin_type_float : builtin_type_int) | |
9faacb92 SC |
107 | |
108 | /* Initializer for an array of names of registers. | |
109 | Entries beyond the first NUM_REGS are ignored. */ | |
110 | ||
a8620985 | 111 | #define REGISTER_NAMES \ |
00dd4fd9 SS |
112 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ |
113 | "r8", "r9", "r10","r11","r12", "r13", "r14","r15",\ | |
114 | "pc", "pr", "gbr","vbr","mach","macl","sr", \ | |
05535e79 SS |
115 | "ssr", "spc", \ |
116 | "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", \ | |
117 | "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", \ | |
00dd4fd9 | 118 | "fpul","fpscr", \ |
a8620985 | 119 | "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ |
05535e79 | 120 | "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15"\ |
a8620985 | 121 | } |
9faacb92 | 122 | |
05535e79 | 123 | #define NUM_REGS 59 |
9faacb92 SC |
124 | |
125 | /* Register numbers of various important registers. | |
126 | Note that some of these values are "real" register numbers, | |
127 | and correspond to the general registers of the machine, | |
128 | and some are "phony" register numbers which are too large | |
129 | to be actual register numbers as far as the user is concerned | |
130 | but do serve to get the desired values when passed to read_register. */ | |
131 | ||
1480482a | 132 | #define R0_REGNUM 0 |
9faacb92 SC |
133 | #define FP_REGNUM 14 |
134 | #define SP_REGNUM 15 | |
135 | #define PC_REGNUM 16 | |
136 | #define PR_REGNUM 17 | |
137 | #define GBR_REGNUM 18 | |
138 | #define VBR_REGNUM 19 | |
139 | #define MACH_REGNUM 20 | |
140 | #define MACL_REGNUM 21 | |
2f5e1736 | 141 | #define SR_REGNUM 22 |
a8620985 | 142 | #define NUM_REALREGS 23 |
05535e79 SS |
143 | #define FPUL_REGNUM 41 |
144 | #define FP0_REGNUM 43 | |
145 | #define FP15_REGNUM 58 | |
a8620985 | 146 | #undef NUM_REALREGS |
05535e79 | 147 | #define NUM_REALREGS 59 |
a8620985 | 148 | |
9faacb92 SC |
149 | /* Store the address of the place in which to copy the structure the |
150 | subroutine will return. This is called from call_function. | |
151 | ||
152 | We store structs through a pointer passed in R4 */ | |
153 | ||
154 | #define STORE_STRUCT_RETURN(ADDR, SP) \ | |
155 | { write_register (4, (ADDR)); } | |
156 | ||
157 | /* Extract from an array REGBUF containing the (raw) register state | |
158 | a function return value of type TYPE, and copy that, in virtual format, | |
159 | into VALBUF. */ | |
160 | ||
161 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ | |
ade40d31 | 162 | memcpy (VALBUF, (char *)(REGBUF), TYPE_LENGTH(TYPE)) |
9faacb92 SC |
163 | |
164 | ||
165 | /* Write into appropriate registers a function return value | |
166 | of type TYPE, given in virtual format. | |
167 | ||
168 | Things always get returned in R4/R5 */ | |
169 | ||
170 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ | |
171 | write_register_bytes (REGISTER_BYTE(4), VALBUF, TYPE_LENGTH (TYPE)) | |
172 | ||
173 | ||
174 | /* Extract from an array REGBUF containing the (raw) register state | |
175 | the address in which a function should return its structure value, | |
176 | as a CORE_ADDR (or an expression that can be used as one). */ | |
177 | ||
178 | #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF)) | |
179 | \f | |
180 | ||
181 | /* Define other aspects of the stack frame. | |
182 | we keep a copy of the worked out return pc lying around, since it | |
183 | is a useful bit of info */ | |
184 | ||
185 | #define EXTRA_FRAME_INFO \ | |
e4483b99 SC |
186 | CORE_ADDR return_pc; \ |
187 | int leaf_function; \ | |
188 | int f_offset; | |
9faacb92 SC |
189 | |
190 | #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \ | |
191 | init_extra_frame_info(fromleaf, fi) | |
192 | ||
193 | /* A macro that tells us whether the function invocation represented | |
194 | by FI does not have a frame on the stack associated with it. If it | |
195 | does not, FRAMELESS is set to 1, else 0. */ | |
196 | ||
197 | #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \ | |
198 | (FRAMELESS) = frameless_look_for_prologue(FI) | |
199 | ||
9faacb92 SC |
200 | #define FRAME_CHAIN(FRAME) sh_frame_chain(FRAME) |
201 | #define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc) | |
202 | #define FRAME_ARGS_ADDRESS(fi) (fi)->frame | |
203 | #define FRAME_LOCALS_ADDRESS(fi) (fi)->frame | |
204 | ||
205 | /* Set VAL to the number of args passed to frame described by FI. | |
206 | Can set VAL to -1, meaning no way to tell. */ | |
207 | ||
208 | /* We can't tell how many args there are */ | |
209 | ||
210 | #define FRAME_NUM_ARGS(val,fi) (val = -1) | |
211 | ||
212 | /* Return number of bytes at start of arglist that are not really args. */ | |
213 | ||
214 | #define FRAME_ARGS_SKIP 0 | |
215 | ||
216 | /* Put here the code to store, into a struct frame_saved_regs, | |
217 | the addresses of the saved registers of frame described by FRAME_INFO. | |
218 | This includes special registers such as pc and fp saved in special | |
219 | ways in the stack frame. sp is even more special: | |
220 | the address we return for it IS the sp for the next frame. */ | |
221 | ||
222 | #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \ | |
223 | frame_find_saved_regs(frame_info, &(frame_saved_regs)) | |
224 | ||
225 | #define NAMES_HAVE_UNDERSCORE | |
226 | ||
227 | typedef unsigned short INSN_WORD; | |
228 | ||
2f5e1736 | 229 | #define ADDR_BITS_REMOVE(addr) ((addr)) |
9faacb92 SC |
230 | |
231 | #define CALL_DUMMY_LENGTH 10 | |
232 | ||
233 | /* Discard from the stack the innermost frame, | |
234 | restoring all saved registers. */ | |
235 | ||
236 | #define POP_FRAME pop_frame(); | |
237 | ||
2f5e1736 | 238 | |
b4d3d0e5 | 239 | #define NOP {0x20, 0x0b} |
826e69cf SC |
240 | |
241 | #define REGISTER_SIZE 4 | |
7f4b5f94 | 242 |