* disasm.h (gdb_disassembly): Add GDBARCH parameter.
[deliverable/binutils-gdb.git] / gdb / dwarf2-frame.c
CommitLineData
cfc14b3a
MK
1/* Frame unwinder for frames with DWARF Call Frame Information.
2
0fb0cc75
JB
3 Copyright (C) 2003, 2004, 2005, 2007, 2008, 2009
4 Free Software Foundation, Inc.
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MK
5
6 Contributed by Mark Kettenis.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
cfc14b3a
MK
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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22
23#include "defs.h"
24#include "dwarf2expr.h"
25#include "elf/dwarf2.h"
26#include "frame.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbcore.h"
30#include "gdbtypes.h"
31#include "symtab.h"
32#include "objfiles.h"
33#include "regcache.h"
f2da6b3a 34#include "value.h"
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35
36#include "gdb_assert.h"
37#include "gdb_string.h"
38
6896c0c7 39#include "complaints.h"
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40#include "dwarf2-frame.h"
41
ae0d2f24
UW
42struct comp_unit;
43
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44/* Call Frame Information (CFI). */
45
46/* Common Information Entry (CIE). */
47
48struct dwarf2_cie
49{
ae0d2f24
UW
50 /* Computation Unit for this CIE. */
51 struct comp_unit *unit;
52
cfc14b3a
MK
53 /* Offset into the .debug_frame section where this CIE was found.
54 Used to identify this CIE. */
55 ULONGEST cie_pointer;
56
57 /* Constant that is factored out of all advance location
58 instructions. */
59 ULONGEST code_alignment_factor;
60
61 /* Constants that is factored out of all offset instructions. */
62 LONGEST data_alignment_factor;
63
64 /* Return address column. */
65 ULONGEST return_address_register;
66
67 /* Instruction sequence to initialize a register set. */
852483bc
MK
68 gdb_byte *initial_instructions;
69 gdb_byte *end;
cfc14b3a 70
303b6f5d
DJ
71 /* Saved augmentation, in case it's needed later. */
72 char *augmentation;
73
cfc14b3a 74 /* Encoding of addresses. */
852483bc 75 gdb_byte encoding;
cfc14b3a 76
ae0d2f24
UW
77 /* Target address size in bytes. */
78 int addr_size;
79
7131cb6e
RH
80 /* True if a 'z' augmentation existed. */
81 unsigned char saw_z_augmentation;
82
56c987f6
AO
83 /* True if an 'S' augmentation existed. */
84 unsigned char signal_frame;
85
303b6f5d
DJ
86 /* The version recorded in the CIE. */
87 unsigned char version;
88
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MK
89 struct dwarf2_cie *next;
90};
91
92/* Frame Description Entry (FDE). */
93
94struct dwarf2_fde
95{
96 /* CIE for this FDE. */
97 struct dwarf2_cie *cie;
98
99 /* First location associated with this FDE. */
100 CORE_ADDR initial_location;
101
102 /* Number of bytes of program instructions described by this FDE. */
103 CORE_ADDR address_range;
104
105 /* Instruction sequence. */
852483bc
MK
106 gdb_byte *instructions;
107 gdb_byte *end;
cfc14b3a 108
4bf8967c
AS
109 /* True if this FDE is read from a .eh_frame instead of a .debug_frame
110 section. */
111 unsigned char eh_frame_p;
112
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113 struct dwarf2_fde *next;
114};
115
ae0d2f24
UW
116/* A minimal decoding of DWARF2 compilation units. We only decode
117 what's needed to get to the call frame information. */
118
119struct comp_unit
120{
121 /* Keep the bfd convenient. */
122 bfd *abfd;
123
124 struct objfile *objfile;
125
126 /* Linked list of CIEs for this object. */
127 struct dwarf2_cie *cie;
128
129 /* Pointer to the .debug_frame section loaded into memory. */
130 gdb_byte *dwarf_frame_buffer;
131
132 /* Length of the loaded .debug_frame section. */
c098b58b 133 bfd_size_type dwarf_frame_size;
ae0d2f24
UW
134
135 /* Pointer to the .debug_frame section. */
136 asection *dwarf_frame_section;
137
138 /* Base for DW_EH_PE_datarel encodings. */
139 bfd_vma dbase;
140
141 /* Base for DW_EH_PE_textrel encodings. */
142 bfd_vma tbase;
143};
144
cfc14b3a 145static struct dwarf2_fde *dwarf2_frame_find_fde (CORE_ADDR *pc);
4fc771b8
DJ
146
147static int dwarf2_frame_adjust_regnum (struct gdbarch *gdbarch, int regnum,
148 int eh_frame_p);
ae0d2f24
UW
149
150static CORE_ADDR read_encoded_value (struct comp_unit *unit, gdb_byte encoding,
151 int ptr_len, gdb_byte *buf,
152 unsigned int *bytes_read_ptr,
153 CORE_ADDR func_base);
cfc14b3a
MK
154\f
155
156/* Structure describing a frame state. */
157
158struct dwarf2_frame_state
159{
160 /* Each register save state can be described in terms of a CFA slot,
161 another register, or a location expression. */
162 struct dwarf2_frame_state_reg_info
163 {
05cbe71a 164 struct dwarf2_frame_state_reg *reg;
cfc14b3a
MK
165 int num_regs;
166
2fd481e1
PP
167 LONGEST cfa_offset;
168 ULONGEST cfa_reg;
169 enum {
170 CFA_UNSET,
171 CFA_REG_OFFSET,
172 CFA_EXP
173 } cfa_how;
174 gdb_byte *cfa_exp;
175
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176 /* Used to implement DW_CFA_remember_state. */
177 struct dwarf2_frame_state_reg_info *prev;
178 } regs;
179
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180 /* The PC described by the current frame state. */
181 CORE_ADDR pc;
182
183 /* Initial register set from the CIE.
184 Used to implement DW_CFA_restore. */
185 struct dwarf2_frame_state_reg_info initial;
186
187 /* The information we care about from the CIE. */
188 LONGEST data_align;
189 ULONGEST code_align;
190 ULONGEST retaddr_column;
303b6f5d
DJ
191
192 /* Flags for known producer quirks. */
193
194 /* The ARM compilers, in DWARF2 mode, assume that DW_CFA_def_cfa
195 and DW_CFA_def_cfa_offset takes a factored offset. */
196 int armcc_cfa_offsets_sf;
197
198 /* The ARM compilers, in DWARF2 or DWARF3 mode, may assume that
199 the CFA is defined as REG - OFFSET rather than REG + OFFSET. */
200 int armcc_cfa_offsets_reversed;
cfc14b3a
MK
201};
202
203/* Store the length the expression for the CFA in the `cfa_reg' field,
204 which is unused in that case. */
205#define cfa_exp_len cfa_reg
206
f57d151a 207/* Assert that the register set RS is large enough to store gdbarch_num_regs
cfc14b3a
MK
208 columns. If necessary, enlarge the register set. */
209
210static void
211dwarf2_frame_state_alloc_regs (struct dwarf2_frame_state_reg_info *rs,
212 int num_regs)
213{
214 size_t size = sizeof (struct dwarf2_frame_state_reg);
215
216 if (num_regs <= rs->num_regs)
217 return;
218
219 rs->reg = (struct dwarf2_frame_state_reg *)
220 xrealloc (rs->reg, num_regs * size);
221
222 /* Initialize newly allocated registers. */
2473a4a9 223 memset (rs->reg + rs->num_regs, 0, (num_regs - rs->num_regs) * size);
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MK
224 rs->num_regs = num_regs;
225}
226
227/* Copy the register columns in register set RS into newly allocated
228 memory and return a pointer to this newly created copy. */
229
230static struct dwarf2_frame_state_reg *
231dwarf2_frame_state_copy_regs (struct dwarf2_frame_state_reg_info *rs)
232{
d10891d4 233 size_t size = rs->num_regs * sizeof (struct dwarf2_frame_state_reg);
cfc14b3a
MK
234 struct dwarf2_frame_state_reg *reg;
235
236 reg = (struct dwarf2_frame_state_reg *) xmalloc (size);
237 memcpy (reg, rs->reg, size);
238
239 return reg;
240}
241
242/* Release the memory allocated to register set RS. */
243
244static void
245dwarf2_frame_state_free_regs (struct dwarf2_frame_state_reg_info *rs)
246{
247 if (rs)
248 {
249 dwarf2_frame_state_free_regs (rs->prev);
250
251 xfree (rs->reg);
252 xfree (rs);
253 }
254}
255
256/* Release the memory allocated to the frame state FS. */
257
258static void
259dwarf2_frame_state_free (void *p)
260{
261 struct dwarf2_frame_state *fs = p;
262
263 dwarf2_frame_state_free_regs (fs->initial.prev);
264 dwarf2_frame_state_free_regs (fs->regs.prev);
265 xfree (fs->initial.reg);
266 xfree (fs->regs.reg);
267 xfree (fs);
268}
269\f
270
271/* Helper functions for execute_stack_op. */
272
273static CORE_ADDR
274read_reg (void *baton, int reg)
275{
4a4e5149
DJ
276 struct frame_info *this_frame = (struct frame_info *) baton;
277 struct gdbarch *gdbarch = get_frame_arch (this_frame);
cfc14b3a 278 int regnum;
852483bc 279 gdb_byte *buf;
cfc14b3a 280
ad010def 281 regnum = gdbarch_dwarf2_reg_to_regnum (gdbarch, reg);
cfc14b3a 282
852483bc 283 buf = alloca (register_size (gdbarch, regnum));
4a4e5149 284 get_frame_register (this_frame, regnum, buf);
f2da6b3a
DJ
285
286 /* Convert the register to an integer. This returns a LONGEST
287 rather than a CORE_ADDR, but unpack_pointer does the same thing
288 under the covers, and this makes more sense for non-pointer
289 registers. Maybe read_reg and the associated interfaces should
290 deal with "struct value" instead of CORE_ADDR. */
291 return unpack_long (register_type (gdbarch, regnum), buf);
cfc14b3a
MK
292}
293
294static void
852483bc 295read_mem (void *baton, gdb_byte *buf, CORE_ADDR addr, size_t len)
cfc14b3a
MK
296{
297 read_memory (addr, buf, len);
298}
299
300static void
852483bc 301no_get_frame_base (void *baton, gdb_byte **start, size_t *length)
cfc14b3a
MK
302{
303 internal_error (__FILE__, __LINE__,
e2e0b3e5 304 _("Support for DW_OP_fbreg is unimplemented"));
cfc14b3a
MK
305}
306
307static CORE_ADDR
308no_get_tls_address (void *baton, CORE_ADDR offset)
309{
310 internal_error (__FILE__, __LINE__,
e2e0b3e5 311 _("Support for DW_OP_GNU_push_tls_address is unimplemented"));
cfc14b3a
MK
312}
313
a6a5a945
LM
314/* Execute the required actions for both the DW_CFA_restore and
315DW_CFA_restore_extended instructions. */
316static void
317dwarf2_restore_rule (struct gdbarch *gdbarch, ULONGEST reg_num,
318 struct dwarf2_frame_state *fs, int eh_frame_p)
319{
320 ULONGEST reg;
321
322 gdb_assert (fs->initial.reg);
323 reg = dwarf2_frame_adjust_regnum (gdbarch, reg_num, eh_frame_p);
324 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
325
326 /* Check if this register was explicitly initialized in the
327 CIE initial instructions. If not, default the rule to
328 UNSPECIFIED. */
329 if (reg < fs->initial.num_regs)
330 fs->regs.reg[reg] = fs->initial.reg[reg];
331 else
332 fs->regs.reg[reg].how = DWARF2_FRAME_REG_UNSPECIFIED;
333
334 if (fs->regs.reg[reg].how == DWARF2_FRAME_REG_UNSPECIFIED)
335 complaint (&symfile_complaints, _("\
336incomplete CFI data; DW_CFA_restore unspecified\n\
337register %s (#%d) at 0x%s"),
338 gdbarch_register_name
339 (gdbarch, gdbarch_dwarf2_reg_to_regnum (gdbarch, reg)),
340 gdbarch_dwarf2_reg_to_regnum (gdbarch, reg),
341 paddr (fs->pc));
342}
343
cfc14b3a 344static CORE_ADDR
ae0d2f24 345execute_stack_op (gdb_byte *exp, ULONGEST len, int addr_size,
4a4e5149 346 struct frame_info *this_frame, CORE_ADDR initial)
cfc14b3a
MK
347{
348 struct dwarf_expr_context *ctx;
349 CORE_ADDR result;
350
351 ctx = new_dwarf_expr_context ();
f7fd4728 352 ctx->gdbarch = get_frame_arch (this_frame);
ae0d2f24 353 ctx->addr_size = addr_size;
4a4e5149 354 ctx->baton = this_frame;
cfc14b3a
MK
355 ctx->read_reg = read_reg;
356 ctx->read_mem = read_mem;
357 ctx->get_frame_base = no_get_frame_base;
358 ctx->get_tls_address = no_get_tls_address;
359
360 dwarf_expr_push (ctx, initial);
361 dwarf_expr_eval (ctx, exp, len);
362 result = dwarf_expr_fetch (ctx, 0);
363
364 if (ctx->in_reg)
4a4e5149 365 result = read_reg (this_frame, result);
cfc14b3a
MK
366
367 free_dwarf_expr_context (ctx);
368
369 return result;
370}
371\f
372
373static void
ae0d2f24 374execute_cfa_program (struct dwarf2_fde *fde, gdb_byte *insn_ptr,
4a4e5149 375 gdb_byte *insn_end, struct frame_info *this_frame,
ae0d2f24 376 struct dwarf2_frame_state *fs)
cfc14b3a 377{
ae0d2f24 378 int eh_frame_p = fde->eh_frame_p;
4a4e5149 379 CORE_ADDR pc = get_frame_pc (this_frame);
cfc14b3a 380 int bytes_read;
4a4e5149 381 struct gdbarch *gdbarch = get_frame_arch (this_frame);
cfc14b3a
MK
382
383 while (insn_ptr < insn_end && fs->pc <= pc)
384 {
852483bc 385 gdb_byte insn = *insn_ptr++;
cfc14b3a
MK
386 ULONGEST utmp, reg;
387 LONGEST offset;
388
389 if ((insn & 0xc0) == DW_CFA_advance_loc)
390 fs->pc += (insn & 0x3f) * fs->code_align;
391 else if ((insn & 0xc0) == DW_CFA_offset)
392 {
393 reg = insn & 0x3f;
4fc771b8 394 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
cfc14b3a
MK
395 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
396 offset = utmp * fs->data_align;
397 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
05cbe71a 398 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
cfc14b3a
MK
399 fs->regs.reg[reg].loc.offset = offset;
400 }
401 else if ((insn & 0xc0) == DW_CFA_restore)
402 {
cfc14b3a 403 reg = insn & 0x3f;
a6a5a945 404 dwarf2_restore_rule (gdbarch, reg, fs, eh_frame_p);
cfc14b3a
MK
405 }
406 else
407 {
408 switch (insn)
409 {
410 case DW_CFA_set_loc:
ae0d2f24
UW
411 fs->pc = read_encoded_value (fde->cie->unit, fde->cie->encoding,
412 fde->cie->addr_size, insn_ptr,
413 &bytes_read, fde->initial_location);
414 /* Apply the objfile offset for relocatable objects. */
415 fs->pc += ANOFFSET (fde->cie->unit->objfile->section_offsets,
416 SECT_OFF_TEXT (fde->cie->unit->objfile));
cfc14b3a
MK
417 insn_ptr += bytes_read;
418 break;
419
420 case DW_CFA_advance_loc1:
421 utmp = extract_unsigned_integer (insn_ptr, 1);
422 fs->pc += utmp * fs->code_align;
423 insn_ptr++;
424 break;
425 case DW_CFA_advance_loc2:
426 utmp = extract_unsigned_integer (insn_ptr, 2);
427 fs->pc += utmp * fs->code_align;
428 insn_ptr += 2;
429 break;
430 case DW_CFA_advance_loc4:
431 utmp = extract_unsigned_integer (insn_ptr, 4);
432 fs->pc += utmp * fs->code_align;
433 insn_ptr += 4;
434 break;
435
436 case DW_CFA_offset_extended:
437 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 438 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
cfc14b3a
MK
439 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
440 offset = utmp * fs->data_align;
441 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
05cbe71a 442 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
cfc14b3a
MK
443 fs->regs.reg[reg].loc.offset = offset;
444 break;
445
446 case DW_CFA_restore_extended:
cfc14b3a 447 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
a6a5a945 448 dwarf2_restore_rule (gdbarch, reg, fs, eh_frame_p);
cfc14b3a
MK
449 break;
450
451 case DW_CFA_undefined:
452 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 453 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
cfc14b3a 454 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
05cbe71a 455 fs->regs.reg[reg].how = DWARF2_FRAME_REG_UNDEFINED;
cfc14b3a
MK
456 break;
457
458 case DW_CFA_same_value:
459 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 460 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
cfc14b3a 461 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
05cbe71a 462 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAME_VALUE;
cfc14b3a
MK
463 break;
464
465 case DW_CFA_register:
466 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 467 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
cfc14b3a 468 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
4fc771b8 469 utmp = dwarf2_frame_adjust_regnum (gdbarch, utmp, eh_frame_p);
cfc14b3a 470 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
05cbe71a 471 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
cfc14b3a
MK
472 fs->regs.reg[reg].loc.reg = utmp;
473 break;
474
475 case DW_CFA_remember_state:
476 {
477 struct dwarf2_frame_state_reg_info *new_rs;
478
479 new_rs = XMALLOC (struct dwarf2_frame_state_reg_info);
480 *new_rs = fs->regs;
481 fs->regs.reg = dwarf2_frame_state_copy_regs (&fs->regs);
482 fs->regs.prev = new_rs;
483 }
484 break;
485
486 case DW_CFA_restore_state:
487 {
488 struct dwarf2_frame_state_reg_info *old_rs = fs->regs.prev;
489
50ea7769
MK
490 if (old_rs == NULL)
491 {
e2e0b3e5
AC
492 complaint (&symfile_complaints, _("\
493bad CFI data; mismatched DW_CFA_restore_state at 0x%s"), paddr (fs->pc));
50ea7769
MK
494 }
495 else
496 {
497 xfree (fs->regs.reg);
498 fs->regs = *old_rs;
499 xfree (old_rs);
500 }
cfc14b3a
MK
501 }
502 break;
503
504 case DW_CFA_def_cfa:
2fd481e1 505 insn_ptr = read_uleb128 (insn_ptr, insn_end, &fs->regs.cfa_reg);
cfc14b3a 506 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
303b6f5d
DJ
507
508 if (fs->armcc_cfa_offsets_sf)
509 utmp *= fs->data_align;
510
2fd481e1
PP
511 fs->regs.cfa_offset = utmp;
512 fs->regs.cfa_how = CFA_REG_OFFSET;
cfc14b3a
MK
513 break;
514
515 case DW_CFA_def_cfa_register:
2fd481e1
PP
516 insn_ptr = read_uleb128 (insn_ptr, insn_end, &fs->regs.cfa_reg);
517 fs->regs.cfa_reg = dwarf2_frame_adjust_regnum (gdbarch,
518 fs->regs.cfa_reg,
519 eh_frame_p);
520 fs->regs.cfa_how = CFA_REG_OFFSET;
cfc14b3a
MK
521 break;
522
523 case DW_CFA_def_cfa_offset:
852483bc 524 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
303b6f5d
DJ
525
526 if (fs->armcc_cfa_offsets_sf)
527 utmp *= fs->data_align;
528
2fd481e1 529 fs->regs.cfa_offset = utmp;
cfc14b3a
MK
530 /* cfa_how deliberately not set. */
531 break;
532
a8504492
MK
533 case DW_CFA_nop:
534 break;
535
cfc14b3a 536 case DW_CFA_def_cfa_expression:
2fd481e1
PP
537 insn_ptr = read_uleb128 (insn_ptr, insn_end,
538 &fs->regs.cfa_exp_len);
539 fs->regs.cfa_exp = insn_ptr;
540 fs->regs.cfa_how = CFA_EXP;
541 insn_ptr += fs->regs.cfa_exp_len;
cfc14b3a
MK
542 break;
543
544 case DW_CFA_expression:
545 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 546 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
cfc14b3a
MK
547 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
548 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
549 fs->regs.reg[reg].loc.exp = insn_ptr;
550 fs->regs.reg[reg].exp_len = utmp;
05cbe71a 551 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_EXP;
cfc14b3a
MK
552 insn_ptr += utmp;
553 break;
554
a8504492
MK
555 case DW_CFA_offset_extended_sf:
556 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 557 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
a8504492 558 insn_ptr = read_sleb128 (insn_ptr, insn_end, &offset);
f6da8dd8 559 offset *= fs->data_align;
a8504492 560 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
05cbe71a 561 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
a8504492
MK
562 fs->regs.reg[reg].loc.offset = offset;
563 break;
564
46ea248b
AO
565 case DW_CFA_val_offset:
566 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
567 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
568 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
569 offset = utmp * fs->data_align;
570 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_VAL_OFFSET;
571 fs->regs.reg[reg].loc.offset = offset;
572 break;
573
574 case DW_CFA_val_offset_sf:
575 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
576 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
577 insn_ptr = read_sleb128 (insn_ptr, insn_end, &offset);
578 offset *= fs->data_align;
579 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_VAL_OFFSET;
580 fs->regs.reg[reg].loc.offset = offset;
581 break;
582
583 case DW_CFA_val_expression:
584 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
585 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
586 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
587 fs->regs.reg[reg].loc.exp = insn_ptr;
588 fs->regs.reg[reg].exp_len = utmp;
589 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_VAL_EXP;
590 insn_ptr += utmp;
591 break;
592
a8504492 593 case DW_CFA_def_cfa_sf:
2fd481e1
PP
594 insn_ptr = read_uleb128 (insn_ptr, insn_end, &fs->regs.cfa_reg);
595 fs->regs.cfa_reg = dwarf2_frame_adjust_regnum (gdbarch,
596 fs->regs.cfa_reg,
597 eh_frame_p);
a8504492 598 insn_ptr = read_sleb128 (insn_ptr, insn_end, &offset);
2fd481e1
PP
599 fs->regs.cfa_offset = offset * fs->data_align;
600 fs->regs.cfa_how = CFA_REG_OFFSET;
a8504492
MK
601 break;
602
603 case DW_CFA_def_cfa_offset_sf:
604 insn_ptr = read_sleb128 (insn_ptr, insn_end, &offset);
2fd481e1 605 fs->regs.cfa_offset = offset * fs->data_align;
a8504492 606 /* cfa_how deliberately not set. */
cfc14b3a
MK
607 break;
608
a77f4086
MK
609 case DW_CFA_GNU_window_save:
610 /* This is SPARC-specific code, and contains hard-coded
611 constants for the register numbering scheme used by
612 GCC. Rather than having a architecture-specific
613 operation that's only ever used by a single
614 architecture, we provide the implementation here.
615 Incidentally that's what GCC does too in its
616 unwinder. */
617 {
4a4e5149 618 int size = register_size (gdbarch, 0);
a77f4086
MK
619 dwarf2_frame_state_alloc_regs (&fs->regs, 32);
620 for (reg = 8; reg < 16; reg++)
621 {
622 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
623 fs->regs.reg[reg].loc.reg = reg + 16;
624 }
625 for (reg = 16; reg < 32; reg++)
626 {
627 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
628 fs->regs.reg[reg].loc.offset = (reg - 16) * size;
629 }
630 }
631 break;
632
cfc14b3a
MK
633 case DW_CFA_GNU_args_size:
634 /* Ignored. */
635 insn_ptr = read_uleb128 (insn_ptr, insn_end, &utmp);
636 break;
637
58894217
JK
638 case DW_CFA_GNU_negative_offset_extended:
639 insn_ptr = read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 640 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
58894217
JK
641 insn_ptr = read_uleb128 (insn_ptr, insn_end, &offset);
642 offset *= fs->data_align;
643 dwarf2_frame_state_alloc_regs (&fs->regs, reg + 1);
644 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
645 fs->regs.reg[reg].loc.offset = -offset;
646 break;
647
cfc14b3a 648 default:
e2e0b3e5 649 internal_error (__FILE__, __LINE__, _("Unknown CFI encountered."));
cfc14b3a
MK
650 }
651 }
652 }
653
654 /* Don't allow remember/restore between CIE and FDE programs. */
655 dwarf2_frame_state_free_regs (fs->regs.prev);
656 fs->regs.prev = NULL;
657}
8f22cb90 658\f
cfc14b3a 659
8f22cb90 660/* Architecture-specific operations. */
cfc14b3a 661
8f22cb90
MK
662/* Per-architecture data key. */
663static struct gdbarch_data *dwarf2_frame_data;
664
665struct dwarf2_frame_ops
666{
667 /* Pre-initialize the register state REG for register REGNUM. */
aff37fc1
DM
668 void (*init_reg) (struct gdbarch *, int, struct dwarf2_frame_state_reg *,
669 struct frame_info *);
3ed09a32 670
4a4e5149 671 /* Check whether the THIS_FRAME is a signal trampoline. */
3ed09a32 672 int (*signal_frame_p) (struct gdbarch *, struct frame_info *);
4bf8967c 673
4fc771b8
DJ
674 /* Convert .eh_frame register number to DWARF register number, or
675 adjust .debug_frame register number. */
676 int (*adjust_regnum) (struct gdbarch *, int, int);
cfc14b3a
MK
677};
678
8f22cb90
MK
679/* Default architecture-specific register state initialization
680 function. */
681
682static void
683dwarf2_frame_default_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 684 struct dwarf2_frame_state_reg *reg,
4a4e5149 685 struct frame_info *this_frame)
8f22cb90
MK
686{
687 /* If we have a register that acts as a program counter, mark it as
688 a destination for the return address. If we have a register that
689 serves as the stack pointer, arrange for it to be filled with the
690 call frame address (CFA). The other registers are marked as
691 unspecified.
692
693 We copy the return address to the program counter, since many
694 parts in GDB assume that it is possible to get the return address
695 by unwinding the program counter register. However, on ISA's
696 with a dedicated return address register, the CFI usually only
697 contains information to unwind that return address register.
698
699 The reason we're treating the stack pointer special here is
700 because in many cases GCC doesn't emit CFI for the stack pointer
701 and implicitly assumes that it is equal to the CFA. This makes
702 some sense since the DWARF specification (version 3, draft 8,
703 p. 102) says that:
704
705 "Typically, the CFA is defined to be the value of the stack
706 pointer at the call site in the previous frame (which may be
707 different from its value on entry to the current frame)."
708
709 However, this isn't true for all platforms supported by GCC
710 (e.g. IBM S/390 and zSeries). Those architectures should provide
711 their own architecture-specific initialization function. */
05cbe71a 712
ad010def 713 if (regnum == gdbarch_pc_regnum (gdbarch))
8f22cb90 714 reg->how = DWARF2_FRAME_REG_RA;
ad010def 715 else if (regnum == gdbarch_sp_regnum (gdbarch))
8f22cb90
MK
716 reg->how = DWARF2_FRAME_REG_CFA;
717}
05cbe71a 718
8f22cb90 719/* Return a default for the architecture-specific operations. */
05cbe71a 720
8f22cb90 721static void *
030f20e1 722dwarf2_frame_init (struct obstack *obstack)
8f22cb90
MK
723{
724 struct dwarf2_frame_ops *ops;
725
030f20e1 726 ops = OBSTACK_ZALLOC (obstack, struct dwarf2_frame_ops);
8f22cb90
MK
727 ops->init_reg = dwarf2_frame_default_init_reg;
728 return ops;
729}
05cbe71a 730
8f22cb90
MK
731/* Set the architecture-specific register state initialization
732 function for GDBARCH to INIT_REG. */
733
734void
735dwarf2_frame_set_init_reg (struct gdbarch *gdbarch,
736 void (*init_reg) (struct gdbarch *, int,
aff37fc1
DM
737 struct dwarf2_frame_state_reg *,
738 struct frame_info *))
8f22cb90 739{
030f20e1 740 struct dwarf2_frame_ops *ops = gdbarch_data (gdbarch, dwarf2_frame_data);
8f22cb90 741
8f22cb90
MK
742 ops->init_reg = init_reg;
743}
744
745/* Pre-initialize the register state REG for register REGNUM. */
05cbe71a
MK
746
747static void
748dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 749 struct dwarf2_frame_state_reg *reg,
4a4e5149 750 struct frame_info *this_frame)
05cbe71a 751{
030f20e1 752 struct dwarf2_frame_ops *ops = gdbarch_data (gdbarch, dwarf2_frame_data);
8f22cb90 753
4a4e5149 754 ops->init_reg (gdbarch, regnum, reg, this_frame);
05cbe71a 755}
3ed09a32
DJ
756
757/* Set the architecture-specific signal trampoline recognition
758 function for GDBARCH to SIGNAL_FRAME_P. */
759
760void
761dwarf2_frame_set_signal_frame_p (struct gdbarch *gdbarch,
762 int (*signal_frame_p) (struct gdbarch *,
763 struct frame_info *))
764{
765 struct dwarf2_frame_ops *ops = gdbarch_data (gdbarch, dwarf2_frame_data);
766
767 ops->signal_frame_p = signal_frame_p;
768}
769
770/* Query the architecture-specific signal frame recognizer for
4a4e5149 771 THIS_FRAME. */
3ed09a32
DJ
772
773static int
774dwarf2_frame_signal_frame_p (struct gdbarch *gdbarch,
4a4e5149 775 struct frame_info *this_frame)
3ed09a32
DJ
776{
777 struct dwarf2_frame_ops *ops = gdbarch_data (gdbarch, dwarf2_frame_data);
778
779 if (ops->signal_frame_p == NULL)
780 return 0;
4a4e5149 781 return ops->signal_frame_p (gdbarch, this_frame);
3ed09a32 782}
4bf8967c 783
4fc771b8
DJ
784/* Set the architecture-specific adjustment of .eh_frame and .debug_frame
785 register numbers. */
4bf8967c
AS
786
787void
4fc771b8
DJ
788dwarf2_frame_set_adjust_regnum (struct gdbarch *gdbarch,
789 int (*adjust_regnum) (struct gdbarch *,
790 int, int))
4bf8967c
AS
791{
792 struct dwarf2_frame_ops *ops = gdbarch_data (gdbarch, dwarf2_frame_data);
793
4fc771b8 794 ops->adjust_regnum = adjust_regnum;
4bf8967c
AS
795}
796
4fc771b8
DJ
797/* Translate a .eh_frame register to DWARF register, or adjust a .debug_frame
798 register. */
4bf8967c 799
4fc771b8
DJ
800static int
801dwarf2_frame_adjust_regnum (struct gdbarch *gdbarch, int regnum, int eh_frame_p)
4bf8967c
AS
802{
803 struct dwarf2_frame_ops *ops = gdbarch_data (gdbarch, dwarf2_frame_data);
804
4fc771b8 805 if (ops->adjust_regnum == NULL)
4bf8967c 806 return regnum;
4fc771b8 807 return ops->adjust_regnum (gdbarch, regnum, eh_frame_p);
4bf8967c 808}
303b6f5d
DJ
809
810static void
811dwarf2_frame_find_quirks (struct dwarf2_frame_state *fs,
812 struct dwarf2_fde *fde)
813{
814 static const char *arm_idents[] = {
815 "ARM C Compiler, ADS",
816 "Thumb C Compiler, ADS",
817 "ARM C++ Compiler, ADS",
818 "Thumb C++ Compiler, ADS",
819 "ARM/Thumb C/C++ Compiler, RVCT"
820 };
821 int i;
822
823 struct symtab *s;
824
825 s = find_pc_symtab (fs->pc);
826 if (s == NULL || s->producer == NULL)
827 return;
828
829 for (i = 0; i < ARRAY_SIZE (arm_idents); i++)
830 if (strncmp (s->producer, arm_idents[i], strlen (arm_idents[i])) == 0)
831 {
832 if (fde->cie->version == 1)
833 fs->armcc_cfa_offsets_sf = 1;
834
835 if (fde->cie->version == 1)
836 fs->armcc_cfa_offsets_reversed = 1;
837
838 /* The reversed offset problem is present in some compilers
839 using DWARF3, but it was eventually fixed. Check the ARM
840 defined augmentations, which are in the format "armcc" followed
841 by a list of one-character options. The "+" option means
842 this problem is fixed (no quirk needed). If the armcc
843 augmentation is missing, the quirk is needed. */
844 if (fde->cie->version == 3
845 && (strncmp (fde->cie->augmentation, "armcc", 5) != 0
846 || strchr (fde->cie->augmentation + 5, '+') == NULL))
847 fs->armcc_cfa_offsets_reversed = 1;
848
849 return;
850 }
851}
8f22cb90
MK
852\f
853
854struct dwarf2_frame_cache
855{
856 /* DWARF Call Frame Address. */
857 CORE_ADDR cfa;
858
0228dfb9
DJ
859 /* Set if the return address column was marked as undefined. */
860 int undefined_retaddr;
861
8f22cb90
MK
862 /* Saved registers, indexed by GDB register number, not by DWARF
863 register number. */
864 struct dwarf2_frame_state_reg *reg;
8d5a9abc
MK
865
866 /* Return address register. */
867 struct dwarf2_frame_state_reg retaddr_reg;
ae0d2f24
UW
868
869 /* Target address size in bytes. */
870 int addr_size;
8f22cb90 871};
05cbe71a 872
b9362cc7 873static struct dwarf2_frame_cache *
4a4e5149 874dwarf2_frame_cache (struct frame_info *this_frame, void **this_cache)
cfc14b3a
MK
875{
876 struct cleanup *old_chain;
4a4e5149 877 struct gdbarch *gdbarch = get_frame_arch (this_frame);
ad010def
UW
878 const int num_regs = gdbarch_num_regs (gdbarch)
879 + gdbarch_num_pseudo_regs (gdbarch);
cfc14b3a
MK
880 struct dwarf2_frame_cache *cache;
881 struct dwarf2_frame_state *fs;
882 struct dwarf2_fde *fde;
cfc14b3a
MK
883
884 if (*this_cache)
885 return *this_cache;
886
887 /* Allocate a new cache. */
888 cache = FRAME_OBSTACK_ZALLOC (struct dwarf2_frame_cache);
889 cache->reg = FRAME_OBSTACK_CALLOC (num_regs, struct dwarf2_frame_state_reg);
890
891 /* Allocate and initialize the frame state. */
892 fs = XMALLOC (struct dwarf2_frame_state);
893 memset (fs, 0, sizeof (struct dwarf2_frame_state));
894 old_chain = make_cleanup (dwarf2_frame_state_free, fs);
895
896 /* Unwind the PC.
897
4a4e5149 898 Note that if the next frame is never supposed to return (i.e. a call
cfc14b3a 899 to abort), the compiler might optimize away the instruction at
4a4e5149 900 its return address. As a result the return address will
cfc14b3a 901 point at some random instruction, and the CFI for that
e4e9607c 902 instruction is probably worthless to us. GCC's unwinder solves
cfc14b3a
MK
903 this problem by substracting 1 from the return address to get an
904 address in the middle of a presumed call instruction (or the
905 instruction in the associated delay slot). This should only be
906 done for "normal" frames and not for resume-type frames (signal
e4e9607c 907 handlers, sentinel frames, dummy frames). The function
ad1193e7 908 get_frame_address_in_block does just this. It's not clear how
e4e9607c
MK
909 reliable the method is though; there is the potential for the
910 register state pre-call being different to that on return. */
4a4e5149 911 fs->pc = get_frame_address_in_block (this_frame);
cfc14b3a
MK
912
913 /* Find the correct FDE. */
914 fde = dwarf2_frame_find_fde (&fs->pc);
915 gdb_assert (fde != NULL);
916
917 /* Extract any interesting information from the CIE. */
918 fs->data_align = fde->cie->data_alignment_factor;
919 fs->code_align = fde->cie->code_alignment_factor;
920 fs->retaddr_column = fde->cie->return_address_register;
ae0d2f24 921 cache->addr_size = fde->cie->addr_size;
cfc14b3a 922
303b6f5d
DJ
923 /* Check for "quirks" - known bugs in producers. */
924 dwarf2_frame_find_quirks (fs, fde);
925
cfc14b3a 926 /* First decode all the insns in the CIE. */
ae0d2f24 927 execute_cfa_program (fde, fde->cie->initial_instructions,
4a4e5149 928 fde->cie->end, this_frame, fs);
cfc14b3a
MK
929
930 /* Save the initialized register set. */
931 fs->initial = fs->regs;
932 fs->initial.reg = dwarf2_frame_state_copy_regs (&fs->regs);
933
934 /* Then decode the insns in the FDE up to our target PC. */
4a4e5149 935 execute_cfa_program (fde, fde->instructions, fde->end, this_frame, fs);
cfc14b3a 936
938f5214 937 /* Calculate the CFA. */
2fd481e1 938 switch (fs->regs.cfa_how)
cfc14b3a
MK
939 {
940 case CFA_REG_OFFSET:
2fd481e1 941 cache->cfa = read_reg (this_frame, fs->regs.cfa_reg);
303b6f5d 942 if (fs->armcc_cfa_offsets_reversed)
2fd481e1 943 cache->cfa -= fs->regs.cfa_offset;
303b6f5d 944 else
2fd481e1 945 cache->cfa += fs->regs.cfa_offset;
cfc14b3a
MK
946 break;
947
948 case CFA_EXP:
949 cache->cfa =
2fd481e1 950 execute_stack_op (fs->regs.cfa_exp, fs->regs.cfa_exp_len,
4a4e5149 951 cache->addr_size, this_frame, 0);
cfc14b3a
MK
952 break;
953
954 default:
e2e0b3e5 955 internal_error (__FILE__, __LINE__, _("Unknown CFA rule."));
cfc14b3a
MK
956 }
957
05cbe71a 958 /* Initialize the register state. */
3e2c4033
AC
959 {
960 int regnum;
e4e9607c 961
3e2c4033 962 for (regnum = 0; regnum < num_regs; regnum++)
4a4e5149 963 dwarf2_frame_init_reg (gdbarch, regnum, &cache->reg[regnum], this_frame);
3e2c4033
AC
964 }
965
966 /* Go through the DWARF2 CFI generated table and save its register
79c4cb80
MK
967 location information in the cache. Note that we don't skip the
968 return address column; it's perfectly all right for it to
969 correspond to a real register. If it doesn't correspond to a
970 real register, or if we shouldn't treat it as such,
055d23b8 971 gdbarch_dwarf2_reg_to_regnum should be defined to return a number outside
f57d151a 972 the range [0, gdbarch_num_regs). */
3e2c4033
AC
973 {
974 int column; /* CFI speak for "register number". */
e4e9607c 975
3e2c4033
AC
976 for (column = 0; column < fs->regs.num_regs; column++)
977 {
3e2c4033 978 /* Use the GDB register number as the destination index. */
ad010def 979 int regnum = gdbarch_dwarf2_reg_to_regnum (gdbarch, column);
3e2c4033
AC
980
981 /* If there's no corresponding GDB register, ignore it. */
982 if (regnum < 0 || regnum >= num_regs)
983 continue;
984
985 /* NOTE: cagney/2003-09-05: CFI should specify the disposition
e4e9607c
MK
986 of all debug info registers. If it doesn't, complain (but
987 not too loudly). It turns out that GCC assumes that an
3e2c4033
AC
988 unspecified register implies "same value" when CFI (draft
989 7) specifies nothing at all. Such a register could equally
990 be interpreted as "undefined". Also note that this check
e4e9607c
MK
991 isn't sufficient; it only checks that all registers in the
992 range [0 .. max column] are specified, and won't detect
3e2c4033 993 problems when a debug info register falls outside of the
e4e9607c 994 table. We need a way of iterating through all the valid
3e2c4033 995 DWARF2 register numbers. */
05cbe71a 996 if (fs->regs.reg[column].how == DWARF2_FRAME_REG_UNSPECIFIED)
f059bf6f
AC
997 {
998 if (cache->reg[regnum].how == DWARF2_FRAME_REG_UNSPECIFIED)
e2e0b3e5
AC
999 complaint (&symfile_complaints, _("\
1000incomplete CFI data; unspecified registers (e.g., %s) at 0x%s"),
f059bf6f
AC
1001 gdbarch_register_name (gdbarch, regnum),
1002 paddr_nz (fs->pc));
1003 }
35889917
MK
1004 else
1005 cache->reg[regnum] = fs->regs.reg[column];
3e2c4033
AC
1006 }
1007 }
cfc14b3a 1008
8d5a9abc
MK
1009 /* Eliminate any DWARF2_FRAME_REG_RA rules, and save the information
1010 we need for evaluating DWARF2_FRAME_REG_RA_OFFSET rules. */
35889917
MK
1011 {
1012 int regnum;
1013
1014 for (regnum = 0; regnum < num_regs; regnum++)
1015 {
8d5a9abc
MK
1016 if (cache->reg[regnum].how == DWARF2_FRAME_REG_RA
1017 || cache->reg[regnum].how == DWARF2_FRAME_REG_RA_OFFSET)
35889917 1018 {
05cbe71a
MK
1019 struct dwarf2_frame_state_reg *retaddr_reg =
1020 &fs->regs.reg[fs->retaddr_column];
1021
d4f10bf2
MK
1022 /* It seems rather bizarre to specify an "empty" column as
1023 the return adress column. However, this is exactly
1024 what GCC does on some targets. It turns out that GCC
1025 assumes that the return address can be found in the
1026 register corresponding to the return address column.
8d5a9abc
MK
1027 Incidentally, that's how we should treat a return
1028 address column specifying "same value" too. */
d4f10bf2 1029 if (fs->retaddr_column < fs->regs.num_regs
05cbe71a
MK
1030 && retaddr_reg->how != DWARF2_FRAME_REG_UNSPECIFIED
1031 && retaddr_reg->how != DWARF2_FRAME_REG_SAME_VALUE)
8d5a9abc
MK
1032 {
1033 if (cache->reg[regnum].how == DWARF2_FRAME_REG_RA)
1034 cache->reg[regnum] = *retaddr_reg;
1035 else
1036 cache->retaddr_reg = *retaddr_reg;
1037 }
35889917
MK
1038 else
1039 {
8d5a9abc
MK
1040 if (cache->reg[regnum].how == DWARF2_FRAME_REG_RA)
1041 {
1042 cache->reg[regnum].loc.reg = fs->retaddr_column;
1043 cache->reg[regnum].how = DWARF2_FRAME_REG_SAVED_REG;
1044 }
1045 else
1046 {
1047 cache->retaddr_reg.loc.reg = fs->retaddr_column;
1048 cache->retaddr_reg.how = DWARF2_FRAME_REG_SAVED_REG;
1049 }
35889917
MK
1050 }
1051 }
1052 }
1053 }
cfc14b3a 1054
0228dfb9
DJ
1055 if (fs->retaddr_column < fs->regs.num_regs
1056 && fs->regs.reg[fs->retaddr_column].how == DWARF2_FRAME_REG_UNDEFINED)
1057 cache->undefined_retaddr = 1;
1058
cfc14b3a
MK
1059 do_cleanups (old_chain);
1060
1061 *this_cache = cache;
1062 return cache;
1063}
1064
1065static void
4a4e5149 1066dwarf2_frame_this_id (struct frame_info *this_frame, void **this_cache,
cfc14b3a
MK
1067 struct frame_id *this_id)
1068{
1069 struct dwarf2_frame_cache *cache =
4a4e5149 1070 dwarf2_frame_cache (this_frame, this_cache);
cfc14b3a 1071
0228dfb9
DJ
1072 if (cache->undefined_retaddr)
1073 return;
1074
4a4e5149 1075 (*this_id) = frame_id_build (cache->cfa, get_frame_func (this_frame));
93d42b30
DJ
1076}
1077
4a4e5149
DJ
1078static struct value *
1079dwarf2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1080 int regnum)
93d42b30 1081{
4a4e5149 1082 struct gdbarch *gdbarch = get_frame_arch (this_frame);
93d42b30 1083 struct dwarf2_frame_cache *cache =
4a4e5149
DJ
1084 dwarf2_frame_cache (this_frame, this_cache);
1085 CORE_ADDR addr;
1086 int realnum;
cfc14b3a
MK
1087
1088 switch (cache->reg[regnum].how)
1089 {
05cbe71a 1090 case DWARF2_FRAME_REG_UNDEFINED:
3e2c4033 1091 /* If CFI explicitly specified that the value isn't defined,
e4e9607c 1092 mark it as optimized away; the value isn't available. */
4a4e5149 1093 return frame_unwind_got_optimized (this_frame, regnum);
cfc14b3a 1094
05cbe71a 1095 case DWARF2_FRAME_REG_SAVED_OFFSET:
4a4e5149
DJ
1096 addr = cache->cfa + cache->reg[regnum].loc.offset;
1097 return frame_unwind_got_memory (this_frame, regnum, addr);
cfc14b3a 1098
05cbe71a 1099 case DWARF2_FRAME_REG_SAVED_REG:
4a4e5149
DJ
1100 realnum
1101 = gdbarch_dwarf2_reg_to_regnum (gdbarch, cache->reg[regnum].loc.reg);
1102 return frame_unwind_got_register (this_frame, regnum, realnum);
cfc14b3a 1103
05cbe71a 1104 case DWARF2_FRAME_REG_SAVED_EXP:
4a4e5149
DJ
1105 addr = execute_stack_op (cache->reg[regnum].loc.exp,
1106 cache->reg[regnum].exp_len,
1107 cache->addr_size, this_frame, cache->cfa);
1108 return frame_unwind_got_memory (this_frame, regnum, addr);
cfc14b3a 1109
46ea248b 1110 case DWARF2_FRAME_REG_SAVED_VAL_OFFSET:
4a4e5149
DJ
1111 addr = cache->cfa + cache->reg[regnum].loc.offset;
1112 return frame_unwind_got_constant (this_frame, regnum, addr);
46ea248b
AO
1113
1114 case DWARF2_FRAME_REG_SAVED_VAL_EXP:
4a4e5149
DJ
1115 addr = execute_stack_op (cache->reg[regnum].loc.exp,
1116 cache->reg[regnum].exp_len,
1117 cache->addr_size, this_frame, cache->cfa);
1118 return frame_unwind_got_constant (this_frame, regnum, addr);
46ea248b 1119
05cbe71a 1120 case DWARF2_FRAME_REG_UNSPECIFIED:
3e2c4033
AC
1121 /* GCC, in its infinite wisdom decided to not provide unwind
1122 information for registers that are "same value". Since
1123 DWARF2 (3 draft 7) doesn't define such behavior, said
1124 registers are actually undefined (which is different to CFI
1125 "undefined"). Code above issues a complaint about this.
1126 Here just fudge the books, assume GCC, and that the value is
1127 more inner on the stack. */
4a4e5149 1128 return frame_unwind_got_register (this_frame, regnum, regnum);
3e2c4033 1129
05cbe71a 1130 case DWARF2_FRAME_REG_SAME_VALUE:
4a4e5149 1131 return frame_unwind_got_register (this_frame, regnum, regnum);
cfc14b3a 1132
05cbe71a 1133 case DWARF2_FRAME_REG_CFA:
4a4e5149 1134 return frame_unwind_got_address (this_frame, regnum, cache->cfa);
35889917 1135
ea7963f0 1136 case DWARF2_FRAME_REG_CFA_OFFSET:
4a4e5149
DJ
1137 addr = cache->cfa + cache->reg[regnum].loc.offset;
1138 return frame_unwind_got_address (this_frame, regnum, addr);
ea7963f0 1139
8d5a9abc 1140 case DWARF2_FRAME_REG_RA_OFFSET:
4a4e5149
DJ
1141 addr = cache->reg[regnum].loc.offset;
1142 regnum = gdbarch_dwarf2_reg_to_regnum
1143 (gdbarch, cache->retaddr_reg.loc.reg);
1144 addr += get_frame_register_unsigned (this_frame, regnum);
1145 return frame_unwind_got_address (this_frame, regnum, addr);
8d5a9abc 1146
b39cc962
DJ
1147 case DWARF2_FRAME_REG_FN:
1148 return cache->reg[regnum].loc.fn (this_frame, this_cache, regnum);
1149
cfc14b3a 1150 default:
e2e0b3e5 1151 internal_error (__FILE__, __LINE__, _("Unknown register rule."));
cfc14b3a
MK
1152 }
1153}
1154
4a4e5149
DJ
1155static int
1156dwarf2_frame_sniffer (const struct frame_unwind *self,
1157 struct frame_info *this_frame, void **this_cache)
cfc14b3a 1158{
1ce5d6dd 1159 /* Grab an address that is guarenteed to reside somewhere within the
4a4e5149 1160 function. get_frame_pc(), with a no-return next function, can
93d42b30
DJ
1161 end up returning something past the end of this function's body.
1162 If the frame we're sniffing for is a signal frame whose start
1163 address is placed on the stack by the OS, its FDE must
4a4e5149
DJ
1164 extend one byte before its start address or we could potentially
1165 select the FDE of the previous function. */
1166 CORE_ADDR block_addr = get_frame_address_in_block (this_frame);
56c987f6
AO
1167 struct dwarf2_fde *fde = dwarf2_frame_find_fde (&block_addr);
1168 if (!fde)
4a4e5149 1169 return 0;
3ed09a32
DJ
1170
1171 /* On some targets, signal trampolines may have unwind information.
1172 We need to recognize them so that we set the frame type
1173 correctly. */
1174
56c987f6 1175 if (fde->cie->signal_frame
4a4e5149
DJ
1176 || dwarf2_frame_signal_frame_p (get_frame_arch (this_frame),
1177 this_frame))
1178 return self->type == SIGTRAMP_FRAME;
1179
1180 return self->type != SIGTRAMP_FRAME;
1181}
1182
1183static const struct frame_unwind dwarf2_frame_unwind =
1184{
1185 NORMAL_FRAME,
1186 dwarf2_frame_this_id,
1187 dwarf2_frame_prev_register,
1188 NULL,
1189 dwarf2_frame_sniffer
1190};
1191
1192static const struct frame_unwind dwarf2_signal_frame_unwind =
1193{
1194 SIGTRAMP_FRAME,
1195 dwarf2_frame_this_id,
1196 dwarf2_frame_prev_register,
1197 NULL,
1198 dwarf2_frame_sniffer
1199};
cfc14b3a 1200
4a4e5149
DJ
1201/* Append the DWARF-2 frame unwinders to GDBARCH's list. */
1202
1203void
1204dwarf2_append_unwinders (struct gdbarch *gdbarch)
1205{
1206 frame_unwind_append_unwinder (gdbarch, &dwarf2_frame_unwind);
1207 frame_unwind_append_unwinder (gdbarch, &dwarf2_signal_frame_unwind);
cfc14b3a
MK
1208}
1209\f
1210
1211/* There is no explicitly defined relationship between the CFA and the
1212 location of frame's local variables and arguments/parameters.
1213 Therefore, frame base methods on this page should probably only be
1214 used as a last resort, just to avoid printing total garbage as a
1215 response to the "info frame" command. */
1216
1217static CORE_ADDR
4a4e5149 1218dwarf2_frame_base_address (struct frame_info *this_frame, void **this_cache)
cfc14b3a
MK
1219{
1220 struct dwarf2_frame_cache *cache =
4a4e5149 1221 dwarf2_frame_cache (this_frame, this_cache);
cfc14b3a
MK
1222
1223 return cache->cfa;
1224}
1225
1226static const struct frame_base dwarf2_frame_base =
1227{
1228 &dwarf2_frame_unwind,
1229 dwarf2_frame_base_address,
1230 dwarf2_frame_base_address,
1231 dwarf2_frame_base_address
1232};
1233
1234const struct frame_base *
4a4e5149 1235dwarf2_frame_base_sniffer (struct frame_info *this_frame)
cfc14b3a 1236{
4a4e5149 1237 CORE_ADDR block_addr = get_frame_address_in_block (this_frame);
93d42b30 1238 if (dwarf2_frame_find_fde (&block_addr))
cfc14b3a
MK
1239 return &dwarf2_frame_base;
1240
1241 return NULL;
1242}
1243\f
8f22cb90 1244const struct objfile_data *dwarf2_frame_objfile_data;
0d0e1a63 1245
cfc14b3a 1246static unsigned int
852483bc 1247read_1_byte (bfd *abfd, gdb_byte *buf)
cfc14b3a 1248{
852483bc 1249 return bfd_get_8 (abfd, buf);
cfc14b3a
MK
1250}
1251
1252static unsigned int
852483bc 1253read_4_bytes (bfd *abfd, gdb_byte *buf)
cfc14b3a 1254{
852483bc 1255 return bfd_get_32 (abfd, buf);
cfc14b3a
MK
1256}
1257
1258static ULONGEST
852483bc 1259read_8_bytes (bfd *abfd, gdb_byte *buf)
cfc14b3a 1260{
852483bc 1261 return bfd_get_64 (abfd, buf);
cfc14b3a
MK
1262}
1263
1264static ULONGEST
852483bc 1265read_unsigned_leb128 (bfd *abfd, gdb_byte *buf, unsigned int *bytes_read_ptr)
cfc14b3a
MK
1266{
1267 ULONGEST result;
1268 unsigned int num_read;
1269 int shift;
852483bc 1270 gdb_byte byte;
cfc14b3a
MK
1271
1272 result = 0;
1273 shift = 0;
1274 num_read = 0;
1275
1276 do
1277 {
1278 byte = bfd_get_8 (abfd, (bfd_byte *) buf);
1279 buf++;
1280 num_read++;
1281 result |= ((byte & 0x7f) << shift);
1282 shift += 7;
1283 }
1284 while (byte & 0x80);
1285
1286 *bytes_read_ptr = num_read;
1287
1288 return result;
1289}
1290
1291static LONGEST
852483bc 1292read_signed_leb128 (bfd *abfd, gdb_byte *buf, unsigned int *bytes_read_ptr)
cfc14b3a
MK
1293{
1294 LONGEST result;
1295 int shift;
1296 unsigned int num_read;
852483bc 1297 gdb_byte byte;
cfc14b3a
MK
1298
1299 result = 0;
1300 shift = 0;
1301 num_read = 0;
1302
1303 do
1304 {
1305 byte = bfd_get_8 (abfd, (bfd_byte *) buf);
1306 buf++;
1307 num_read++;
1308 result |= ((byte & 0x7f) << shift);
1309 shift += 7;
1310 }
1311 while (byte & 0x80);
1312
77e0b926
DJ
1313 if (shift < 8 * sizeof (result) && (byte & 0x40))
1314 result |= -(((LONGEST)1) << shift);
cfc14b3a
MK
1315
1316 *bytes_read_ptr = num_read;
1317
1318 return result;
1319}
1320
1321static ULONGEST
852483bc 1322read_initial_length (bfd *abfd, gdb_byte *buf, unsigned int *bytes_read_ptr)
cfc14b3a
MK
1323{
1324 LONGEST result;
1325
852483bc 1326 result = bfd_get_32 (abfd, buf);
cfc14b3a
MK
1327 if (result == 0xffffffff)
1328 {
852483bc 1329 result = bfd_get_64 (abfd, buf + 4);
cfc14b3a
MK
1330 *bytes_read_ptr = 12;
1331 }
1332 else
1333 *bytes_read_ptr = 4;
1334
1335 return result;
1336}
1337\f
1338
1339/* Pointer encoding helper functions. */
1340
1341/* GCC supports exception handling based on DWARF2 CFI. However, for
1342 technical reasons, it encodes addresses in its FDE's in a different
1343 way. Several "pointer encodings" are supported. The encoding
1344 that's used for a particular FDE is determined by the 'R'
1345 augmentation in the associated CIE. The argument of this
1346 augmentation is a single byte.
1347
1348 The address can be encoded as 2 bytes, 4 bytes, 8 bytes, or as a
1349 LEB128. This is encoded in bits 0, 1 and 2. Bit 3 encodes whether
1350 the address is signed or unsigned. Bits 4, 5 and 6 encode how the
1351 address should be interpreted (absolute, relative to the current
1352 position in the FDE, ...). Bit 7, indicates that the address
1353 should be dereferenced. */
1354
852483bc 1355static gdb_byte
cfc14b3a
MK
1356encoding_for_size (unsigned int size)
1357{
1358 switch (size)
1359 {
1360 case 2:
1361 return DW_EH_PE_udata2;
1362 case 4:
1363 return DW_EH_PE_udata4;
1364 case 8:
1365 return DW_EH_PE_udata8;
1366 default:
e2e0b3e5 1367 internal_error (__FILE__, __LINE__, _("Unsupported address size"));
cfc14b3a
MK
1368 }
1369}
1370
cfc14b3a 1371static CORE_ADDR
852483bc 1372read_encoded_value (struct comp_unit *unit, gdb_byte encoding,
ae0d2f24
UW
1373 int ptr_len, gdb_byte *buf, unsigned int *bytes_read_ptr,
1374 CORE_ADDR func_base)
cfc14b3a 1375{
68f6cf99 1376 ptrdiff_t offset;
cfc14b3a
MK
1377 CORE_ADDR base;
1378
1379 /* GCC currently doesn't generate DW_EH_PE_indirect encodings for
1380 FDE's. */
1381 if (encoding & DW_EH_PE_indirect)
1382 internal_error (__FILE__, __LINE__,
e2e0b3e5 1383 _("Unsupported encoding: DW_EH_PE_indirect"));
cfc14b3a 1384
68f6cf99
MK
1385 *bytes_read_ptr = 0;
1386
cfc14b3a
MK
1387 switch (encoding & 0x70)
1388 {
1389 case DW_EH_PE_absptr:
1390 base = 0;
1391 break;
1392 case DW_EH_PE_pcrel:
f2fec864 1393 base = bfd_get_section_vma (unit->abfd, unit->dwarf_frame_section);
852483bc 1394 base += (buf - unit->dwarf_frame_buffer);
cfc14b3a 1395 break;
0912c7f2
MK
1396 case DW_EH_PE_datarel:
1397 base = unit->dbase;
1398 break;
0fd85043
CV
1399 case DW_EH_PE_textrel:
1400 base = unit->tbase;
1401 break;
03ac2a74 1402 case DW_EH_PE_funcrel:
ae0d2f24 1403 base = func_base;
03ac2a74 1404 break;
68f6cf99
MK
1405 case DW_EH_PE_aligned:
1406 base = 0;
852483bc 1407 offset = buf - unit->dwarf_frame_buffer;
68f6cf99
MK
1408 if ((offset % ptr_len) != 0)
1409 {
1410 *bytes_read_ptr = ptr_len - (offset % ptr_len);
1411 buf += *bytes_read_ptr;
1412 }
1413 break;
cfc14b3a 1414 default:
e2e0b3e5 1415 internal_error (__FILE__, __LINE__, _("Invalid or unsupported encoding"));
cfc14b3a
MK
1416 }
1417
b04de778 1418 if ((encoding & 0x07) == 0x00)
f2fec864
DJ
1419 {
1420 encoding |= encoding_for_size (ptr_len);
1421 if (bfd_get_sign_extend_vma (unit->abfd))
1422 encoding |= DW_EH_PE_signed;
1423 }
cfc14b3a
MK
1424
1425 switch (encoding & 0x0f)
1426 {
a81b10ae
MK
1427 case DW_EH_PE_uleb128:
1428 {
1429 ULONGEST value;
852483bc 1430 gdb_byte *end_buf = buf + (sizeof (value) + 1) * 8 / 7;
a7289609 1431 *bytes_read_ptr += read_uleb128 (buf, end_buf, &value) - buf;
a81b10ae
MK
1432 return base + value;
1433 }
cfc14b3a 1434 case DW_EH_PE_udata2:
68f6cf99 1435 *bytes_read_ptr += 2;
cfc14b3a
MK
1436 return (base + bfd_get_16 (unit->abfd, (bfd_byte *) buf));
1437 case DW_EH_PE_udata4:
68f6cf99 1438 *bytes_read_ptr += 4;
cfc14b3a
MK
1439 return (base + bfd_get_32 (unit->abfd, (bfd_byte *) buf));
1440 case DW_EH_PE_udata8:
68f6cf99 1441 *bytes_read_ptr += 8;
cfc14b3a 1442 return (base + bfd_get_64 (unit->abfd, (bfd_byte *) buf));
a81b10ae
MK
1443 case DW_EH_PE_sleb128:
1444 {
1445 LONGEST value;
852483bc 1446 gdb_byte *end_buf = buf + (sizeof (value) + 1) * 8 / 7;
a7289609 1447 *bytes_read_ptr += read_sleb128 (buf, end_buf, &value) - buf;
a81b10ae
MK
1448 return base + value;
1449 }
cfc14b3a 1450 case DW_EH_PE_sdata2:
68f6cf99 1451 *bytes_read_ptr += 2;
cfc14b3a
MK
1452 return (base + bfd_get_signed_16 (unit->abfd, (bfd_byte *) buf));
1453 case DW_EH_PE_sdata4:
68f6cf99 1454 *bytes_read_ptr += 4;
cfc14b3a
MK
1455 return (base + bfd_get_signed_32 (unit->abfd, (bfd_byte *) buf));
1456 case DW_EH_PE_sdata8:
68f6cf99 1457 *bytes_read_ptr += 8;
cfc14b3a
MK
1458 return (base + bfd_get_signed_64 (unit->abfd, (bfd_byte *) buf));
1459 default:
e2e0b3e5 1460 internal_error (__FILE__, __LINE__, _("Invalid or unsupported encoding"));
cfc14b3a
MK
1461 }
1462}
1463\f
1464
1465/* GCC uses a single CIE for all FDEs in a .debug_frame section.
1466 That's why we use a simple linked list here. */
1467
1468static struct dwarf2_cie *
1469find_cie (struct comp_unit *unit, ULONGEST cie_pointer)
1470{
1471 struct dwarf2_cie *cie = unit->cie;
1472
1473 while (cie)
1474 {
1475 if (cie->cie_pointer == cie_pointer)
1476 return cie;
1477
1478 cie = cie->next;
1479 }
1480
1481 return NULL;
1482}
1483
1484static void
1485add_cie (struct comp_unit *unit, struct dwarf2_cie *cie)
1486{
1487 cie->next = unit->cie;
1488 unit->cie = cie;
ae0d2f24 1489 cie->unit = unit;
cfc14b3a
MK
1490}
1491
1492/* Find the FDE for *PC. Return a pointer to the FDE, and store the
1493 inital location associated with it into *PC. */
1494
1495static struct dwarf2_fde *
1496dwarf2_frame_find_fde (CORE_ADDR *pc)
1497{
1498 struct objfile *objfile;
1499
1500 ALL_OBJFILES (objfile)
1501 {
1502 struct dwarf2_fde *fde;
1503 CORE_ADDR offset;
1504
8f22cb90 1505 fde = objfile_data (objfile, dwarf2_frame_objfile_data);
4ae9ee8e
DJ
1506 if (fde == NULL)
1507 continue;
1508
1509 gdb_assert (objfile->section_offsets);
1510 offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
1511
cfc14b3a
MK
1512 while (fde)
1513 {
1514 if (*pc >= fde->initial_location + offset
1515 && *pc < fde->initial_location + offset + fde->address_range)
1516 {
1517 *pc = fde->initial_location + offset;
1518 return fde;
1519 }
1520
1521 fde = fde->next;
1522 }
1523 }
1524
1525 return NULL;
1526}
1527
1528static void
1529add_fde (struct comp_unit *unit, struct dwarf2_fde *fde)
1530{
8f22cb90
MK
1531 fde->next = objfile_data (unit->objfile, dwarf2_frame_objfile_data);
1532 set_objfile_data (unit->objfile, dwarf2_frame_objfile_data, fde);
cfc14b3a
MK
1533}
1534
1535#ifdef CC_HAS_LONG_LONG
1536#define DW64_CIE_ID 0xffffffffffffffffULL
1537#else
1538#define DW64_CIE_ID ~0
1539#endif
1540
852483bc
MK
1541static gdb_byte *decode_frame_entry (struct comp_unit *unit, gdb_byte *start,
1542 int eh_frame_p);
cfc14b3a 1543
6896c0c7
RH
1544/* Decode the next CIE or FDE. Return NULL if invalid input, otherwise
1545 the next byte to be processed. */
852483bc
MK
1546static gdb_byte *
1547decode_frame_entry_1 (struct comp_unit *unit, gdb_byte *start, int eh_frame_p)
cfc14b3a 1548{
5e2b427d 1549 struct gdbarch *gdbarch = get_objfile_arch (unit->objfile);
852483bc 1550 gdb_byte *buf, *end;
cfc14b3a
MK
1551 LONGEST length;
1552 unsigned int bytes_read;
6896c0c7
RH
1553 int dwarf64_p;
1554 ULONGEST cie_id;
cfc14b3a 1555 ULONGEST cie_pointer;
cfc14b3a 1556
6896c0c7 1557 buf = start;
cfc14b3a
MK
1558 length = read_initial_length (unit->abfd, buf, &bytes_read);
1559 buf += bytes_read;
1560 end = buf + length;
1561
6896c0c7
RH
1562 /* Are we still within the section? */
1563 if (end > unit->dwarf_frame_buffer + unit->dwarf_frame_size)
1564 return NULL;
1565
cfc14b3a
MK
1566 if (length == 0)
1567 return end;
1568
6896c0c7
RH
1569 /* Distinguish between 32 and 64-bit encoded frame info. */
1570 dwarf64_p = (bytes_read == 12);
cfc14b3a 1571
6896c0c7 1572 /* In a .eh_frame section, zero is used to distinguish CIEs from FDEs. */
cfc14b3a
MK
1573 if (eh_frame_p)
1574 cie_id = 0;
1575 else if (dwarf64_p)
1576 cie_id = DW64_CIE_ID;
6896c0c7
RH
1577 else
1578 cie_id = DW_CIE_ID;
cfc14b3a
MK
1579
1580 if (dwarf64_p)
1581 {
1582 cie_pointer = read_8_bytes (unit->abfd, buf);
1583 buf += 8;
1584 }
1585 else
1586 {
1587 cie_pointer = read_4_bytes (unit->abfd, buf);
1588 buf += 4;
1589 }
1590
1591 if (cie_pointer == cie_id)
1592 {
1593 /* This is a CIE. */
1594 struct dwarf2_cie *cie;
1595 char *augmentation;
28ba0b33 1596 unsigned int cie_version;
cfc14b3a
MK
1597
1598 /* Record the offset into the .debug_frame section of this CIE. */
1599 cie_pointer = start - unit->dwarf_frame_buffer;
1600
1601 /* Check whether we've already read it. */
1602 if (find_cie (unit, cie_pointer))
1603 return end;
1604
1605 cie = (struct dwarf2_cie *)
8b92e4d5 1606 obstack_alloc (&unit->objfile->objfile_obstack,
cfc14b3a
MK
1607 sizeof (struct dwarf2_cie));
1608 cie->initial_instructions = NULL;
1609 cie->cie_pointer = cie_pointer;
1610
1611 /* The encoding for FDE's in a normal .debug_frame section
32b05c07
MK
1612 depends on the target address size. */
1613 cie->encoding = DW_EH_PE_absptr;
cfc14b3a 1614
ae0d2f24
UW
1615 /* The target address size. For .eh_frame FDEs this is considered
1616 equal to the size of a target pointer. For .dwarf_frame FDEs,
1617 this is supposed to be the target address size from the associated
1618 CU header. FIXME: We do not have a good way to determine the
1619 latter. Always use the target pointer size for now. */
5e2b427d 1620 cie->addr_size = gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT;
ae0d2f24 1621
56c987f6
AO
1622 /* We'll determine the final value later, but we need to
1623 initialize it conservatively. */
1624 cie->signal_frame = 0;
1625
cfc14b3a 1626 /* Check version number. */
28ba0b33
PB
1627 cie_version = read_1_byte (unit->abfd, buf);
1628 if (cie_version != 1 && cie_version != 3)
6896c0c7 1629 return NULL;
303b6f5d 1630 cie->version = cie_version;
cfc14b3a
MK
1631 buf += 1;
1632
1633 /* Interpret the interesting bits of the augmentation. */
303b6f5d 1634 cie->augmentation = augmentation = (char *) buf;
852483bc 1635 buf += (strlen (augmentation) + 1);
cfc14b3a 1636
303b6f5d
DJ
1637 /* Ignore armcc augmentations. We only use them for quirks,
1638 and that doesn't happen until later. */
1639 if (strncmp (augmentation, "armcc", 5) == 0)
1640 augmentation += strlen (augmentation);
1641
cfc14b3a
MK
1642 /* The GCC 2.x "eh" augmentation has a pointer immediately
1643 following the augmentation string, so it must be handled
1644 first. */
1645 if (augmentation[0] == 'e' && augmentation[1] == 'h')
1646 {
1647 /* Skip. */
5e2b427d 1648 buf += gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT;
cfc14b3a
MK
1649 augmentation += 2;
1650 }
1651
1652 cie->code_alignment_factor =
1653 read_unsigned_leb128 (unit->abfd, buf, &bytes_read);
1654 buf += bytes_read;
1655
1656 cie->data_alignment_factor =
1657 read_signed_leb128 (unit->abfd, buf, &bytes_read);
1658 buf += bytes_read;
1659
28ba0b33
PB
1660 if (cie_version == 1)
1661 {
1662 cie->return_address_register = read_1_byte (unit->abfd, buf);
1663 bytes_read = 1;
1664 }
1665 else
1666 cie->return_address_register = read_unsigned_leb128 (unit->abfd, buf,
1667 &bytes_read);
4fc771b8 1668 cie->return_address_register
5e2b427d 1669 = dwarf2_frame_adjust_regnum (gdbarch,
4fc771b8
DJ
1670 cie->return_address_register,
1671 eh_frame_p);
4bf8967c 1672
28ba0b33 1673 buf += bytes_read;
cfc14b3a 1674
7131cb6e
RH
1675 cie->saw_z_augmentation = (*augmentation == 'z');
1676 if (cie->saw_z_augmentation)
cfc14b3a
MK
1677 {
1678 ULONGEST length;
1679
1680 length = read_unsigned_leb128 (unit->abfd, buf, &bytes_read);
1681 buf += bytes_read;
6896c0c7
RH
1682 if (buf > end)
1683 return NULL;
cfc14b3a
MK
1684 cie->initial_instructions = buf + length;
1685 augmentation++;
1686 }
1687
1688 while (*augmentation)
1689 {
1690 /* "L" indicates a byte showing how the LSDA pointer is encoded. */
1691 if (*augmentation == 'L')
1692 {
1693 /* Skip. */
1694 buf++;
1695 augmentation++;
1696 }
1697
1698 /* "R" indicates a byte indicating how FDE addresses are encoded. */
1699 else if (*augmentation == 'R')
1700 {
1701 cie->encoding = *buf++;
1702 augmentation++;
1703 }
1704
1705 /* "P" indicates a personality routine in the CIE augmentation. */
1706 else if (*augmentation == 'P')
1707 {
1234d960 1708 /* Skip. Avoid indirection since we throw away the result. */
852483bc 1709 gdb_byte encoding = (*buf++) & ~DW_EH_PE_indirect;
ae0d2f24
UW
1710 read_encoded_value (unit, encoding, cie->addr_size,
1711 buf, &bytes_read, 0);
f724bf08 1712 buf += bytes_read;
cfc14b3a
MK
1713 augmentation++;
1714 }
1715
56c987f6
AO
1716 /* "S" indicates a signal frame, such that the return
1717 address must not be decremented to locate the call frame
1718 info for the previous frame; it might even be the first
1719 instruction of a function, so decrementing it would take
1720 us to a different function. */
1721 else if (*augmentation == 'S')
1722 {
1723 cie->signal_frame = 1;
1724 augmentation++;
1725 }
1726
3e9a2e52
DJ
1727 /* Otherwise we have an unknown augmentation. Assume that either
1728 there is no augmentation data, or we saw a 'z' prefix. */
cfc14b3a
MK
1729 else
1730 {
3e9a2e52
DJ
1731 if (cie->initial_instructions)
1732 buf = cie->initial_instructions;
cfc14b3a
MK
1733 break;
1734 }
1735 }
1736
1737 cie->initial_instructions = buf;
1738 cie->end = end;
1739
1740 add_cie (unit, cie);
1741 }
1742 else
1743 {
1744 /* This is a FDE. */
1745 struct dwarf2_fde *fde;
1746
6896c0c7
RH
1747 /* In an .eh_frame section, the CIE pointer is the delta between the
1748 address within the FDE where the CIE pointer is stored and the
1749 address of the CIE. Convert it to an offset into the .eh_frame
1750 section. */
cfc14b3a
MK
1751 if (eh_frame_p)
1752 {
cfc14b3a
MK
1753 cie_pointer = buf - unit->dwarf_frame_buffer - cie_pointer;
1754 cie_pointer -= (dwarf64_p ? 8 : 4);
1755 }
1756
6896c0c7
RH
1757 /* In either case, validate the result is still within the section. */
1758 if (cie_pointer >= unit->dwarf_frame_size)
1759 return NULL;
1760
cfc14b3a 1761 fde = (struct dwarf2_fde *)
8b92e4d5 1762 obstack_alloc (&unit->objfile->objfile_obstack,
cfc14b3a
MK
1763 sizeof (struct dwarf2_fde));
1764 fde->cie = find_cie (unit, cie_pointer);
1765 if (fde->cie == NULL)
1766 {
1767 decode_frame_entry (unit, unit->dwarf_frame_buffer + cie_pointer,
1768 eh_frame_p);
1769 fde->cie = find_cie (unit, cie_pointer);
1770 }
1771
1772 gdb_assert (fde->cie != NULL);
1773
1774 fde->initial_location =
ae0d2f24
UW
1775 read_encoded_value (unit, fde->cie->encoding, fde->cie->addr_size,
1776 buf, &bytes_read, 0);
cfc14b3a
MK
1777 buf += bytes_read;
1778
1779 fde->address_range =
ae0d2f24
UW
1780 read_encoded_value (unit, fde->cie->encoding & 0x0f,
1781 fde->cie->addr_size, buf, &bytes_read, 0);
cfc14b3a
MK
1782 buf += bytes_read;
1783
7131cb6e
RH
1784 /* A 'z' augmentation in the CIE implies the presence of an
1785 augmentation field in the FDE as well. The only thing known
1786 to be in here at present is the LSDA entry for EH. So we
1787 can skip the whole thing. */
1788 if (fde->cie->saw_z_augmentation)
1789 {
1790 ULONGEST length;
1791
1792 length = read_unsigned_leb128 (unit->abfd, buf, &bytes_read);
1793 buf += bytes_read + length;
6896c0c7
RH
1794 if (buf > end)
1795 return NULL;
7131cb6e
RH
1796 }
1797
cfc14b3a
MK
1798 fde->instructions = buf;
1799 fde->end = end;
1800
4bf8967c
AS
1801 fde->eh_frame_p = eh_frame_p;
1802
cfc14b3a
MK
1803 add_fde (unit, fde);
1804 }
1805
1806 return end;
1807}
6896c0c7
RH
1808
1809/* Read a CIE or FDE in BUF and decode it. */
852483bc
MK
1810static gdb_byte *
1811decode_frame_entry (struct comp_unit *unit, gdb_byte *start, int eh_frame_p)
6896c0c7
RH
1812{
1813 enum { NONE, ALIGN4, ALIGN8, FAIL } workaround = NONE;
852483bc 1814 gdb_byte *ret;
6896c0c7
RH
1815 const char *msg;
1816 ptrdiff_t start_offset;
1817
1818 while (1)
1819 {
1820 ret = decode_frame_entry_1 (unit, start, eh_frame_p);
1821 if (ret != NULL)
1822 break;
1823
1824 /* We have corrupt input data of some form. */
1825
1826 /* ??? Try, weakly, to work around compiler/assembler/linker bugs
1827 and mismatches wrt padding and alignment of debug sections. */
1828 /* Note that there is no requirement in the standard for any
1829 alignment at all in the frame unwind sections. Testing for
1830 alignment before trying to interpret data would be incorrect.
1831
1832 However, GCC traditionally arranged for frame sections to be
1833 sized such that the FDE length and CIE fields happen to be
1834 aligned (in theory, for performance). This, unfortunately,
1835 was done with .align directives, which had the side effect of
1836 forcing the section to be aligned by the linker.
1837
1838 This becomes a problem when you have some other producer that
1839 creates frame sections that are not as strictly aligned. That
1840 produces a hole in the frame info that gets filled by the
1841 linker with zeros.
1842
1843 The GCC behaviour is arguably a bug, but it's effectively now
1844 part of the ABI, so we're now stuck with it, at least at the
1845 object file level. A smart linker may decide, in the process
1846 of compressing duplicate CIE information, that it can rewrite
1847 the entire output section without this extra padding. */
1848
1849 start_offset = start - unit->dwarf_frame_buffer;
1850 if (workaround < ALIGN4 && (start_offset & 3) != 0)
1851 {
1852 start += 4 - (start_offset & 3);
1853 workaround = ALIGN4;
1854 continue;
1855 }
1856 if (workaround < ALIGN8 && (start_offset & 7) != 0)
1857 {
1858 start += 8 - (start_offset & 7);
1859 workaround = ALIGN8;
1860 continue;
1861 }
1862
1863 /* Nothing left to try. Arrange to return as if we've consumed
1864 the entire input section. Hopefully we'll get valid info from
1865 the other of .debug_frame/.eh_frame. */
1866 workaround = FAIL;
1867 ret = unit->dwarf_frame_buffer + unit->dwarf_frame_size;
1868 break;
1869 }
1870
1871 switch (workaround)
1872 {
1873 case NONE:
1874 break;
1875
1876 case ALIGN4:
1877 complaint (&symfile_complaints,
e2e0b3e5 1878 _("Corrupt data in %s:%s; align 4 workaround apparently succeeded"),
6896c0c7
RH
1879 unit->dwarf_frame_section->owner->filename,
1880 unit->dwarf_frame_section->name);
1881 break;
1882
1883 case ALIGN8:
1884 complaint (&symfile_complaints,
e2e0b3e5 1885 _("Corrupt data in %s:%s; align 8 workaround apparently succeeded"),
6896c0c7
RH
1886 unit->dwarf_frame_section->owner->filename,
1887 unit->dwarf_frame_section->name);
1888 break;
1889
1890 default:
1891 complaint (&symfile_complaints,
e2e0b3e5 1892 _("Corrupt data in %s:%s"),
6896c0c7
RH
1893 unit->dwarf_frame_section->owner->filename,
1894 unit->dwarf_frame_section->name);
1895 break;
1896 }
1897
1898 return ret;
1899}
cfc14b3a
MK
1900\f
1901
cfc14b3a 1902/* Imported from dwarf2read.c. */
dce234bc
PP
1903extern void dwarf2_get_section_info (struct objfile *, const char *, asection **,
1904 gdb_byte **, bfd_size_type *);
cfc14b3a
MK
1905
1906void
1907dwarf2_build_frame_info (struct objfile *objfile)
1908{
ae0d2f24 1909 struct comp_unit *unit;
852483bc 1910 gdb_byte *frame_ptr;
cfc14b3a
MK
1911
1912 /* Build a minimal decoding of the DWARF2 compilation unit. */
ae0d2f24
UW
1913 unit = (struct comp_unit *) obstack_alloc (&objfile->objfile_obstack,
1914 sizeof (struct comp_unit));
1915 unit->abfd = objfile->obfd;
1916 unit->objfile = objfile;
1917 unit->dbase = 0;
1918 unit->tbase = 0;
cfc14b3a
MK
1919
1920 /* First add the information from the .eh_frame section. That way,
1921 the FDEs from that section are searched last. */
dce234bc
PP
1922 dwarf2_get_section_info (objfile, ".eh_frame",
1923 &unit->dwarf_frame_section,
1924 &unit->dwarf_frame_buffer,
1925 &unit->dwarf_frame_size);
1926 if (unit->dwarf_frame_size)
cfc14b3a 1927 {
0fd85043 1928 asection *got, *txt;
0912c7f2 1929
ae0d2f24 1930 unit->cie = NULL;
0912c7f2 1931 /* FIXME: kettenis/20030602: This is the DW_EH_PE_datarel base
37b517aa
MK
1932 that is used for the i386/amd64 target, which currently is
1933 the only target in GCC that supports/uses the
1934 DW_EH_PE_datarel encoding. */
ae0d2f24 1935 got = bfd_get_section_by_name (unit->abfd, ".got");
0912c7f2 1936 if (got)
ae0d2f24 1937 unit->dbase = got->vma;
0912c7f2 1938
22c7ba1a
MK
1939 /* GCC emits the DW_EH_PE_textrel encoding type on sh and ia64
1940 so far. */
ae0d2f24 1941 txt = bfd_get_section_by_name (unit->abfd, ".text");
0fd85043 1942 if (txt)
ae0d2f24 1943 unit->tbase = txt->vma;
0fd85043 1944
ae0d2f24
UW
1945 frame_ptr = unit->dwarf_frame_buffer;
1946 while (frame_ptr < unit->dwarf_frame_buffer + unit->dwarf_frame_size)
1947 frame_ptr = decode_frame_entry (unit, frame_ptr, 1);
cfc14b3a
MK
1948 }
1949
dce234bc
PP
1950 dwarf2_get_section_info (objfile, ".debug_frame",
1951 &unit->dwarf_frame_section,
1952 &unit->dwarf_frame_buffer,
1953 &unit->dwarf_frame_size);
1954 if (unit->dwarf_frame_size)
cfc14b3a 1955 {
ae0d2f24 1956 unit->cie = NULL;
ae0d2f24
UW
1957
1958 frame_ptr = unit->dwarf_frame_buffer;
1959 while (frame_ptr < unit->dwarf_frame_buffer + unit->dwarf_frame_size)
1960 frame_ptr = decode_frame_entry (unit, frame_ptr, 0);
cfc14b3a
MK
1961 }
1962}
0d0e1a63
MK
1963
1964/* Provide a prototype to silence -Wmissing-prototypes. */
1965void _initialize_dwarf2_frame (void);
1966
1967void
1968_initialize_dwarf2_frame (void)
1969{
030f20e1 1970 dwarf2_frame_data = gdbarch_data_register_pre_init (dwarf2_frame_init);
8f22cb90 1971 dwarf2_frame_objfile_data = register_objfile_data ();
0d0e1a63 1972}
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