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[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
3666a048 3 Copyright (C) 1986-2021 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
491144b5 44static bool hppa_debug = false;
369aa520 45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
73 struct hppa_unwind_info *unwind_info; /* a pointer */
74 struct so_list *so_info; /* a pointer */
75 CORE_ADDR dp;
76
77 int dummy_call_sequence_reg;
78 CORE_ADDR dummy_call_sequence_addr;
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
9a73f0ad
TT
87static const struct objfile_key<hppa_objfile_private,
88 gdb::noop_deleter<hppa_objfile_private>>
89 hppa_objfile_priv_data;
7c46b9fb 90
405feb71 91/* Get at various relevant fields of an instruction word. */
e2ac8128
JB
92#define MASK_5 0x1f
93#define MASK_11 0x7ff
94#define MASK_14 0x3fff
95#define MASK_21 0x1fffff
96
e2ac8128
JB
97/* Sizes (in bytes) of the native unwind entries. */
98#define UNWIND_ENTRY_SIZE 16
99#define STUB_UNWIND_ENTRY_SIZE 8
100
c906108c 101/* Routines to extract various sized constants out of hppa
1777feb0 102 instructions. */
c906108c
SS
103
104/* This assumes that no garbage lies outside of the lower bits of
1777feb0 105 value. */
c906108c 106
63807e1d 107static int
abc485a1 108hppa_sign_extend (unsigned val, unsigned bits)
c906108c 109{
66c6502d 110 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
111}
112
1777feb0 113/* For many immediate values the sign bit is the low bit! */
c906108c 114
63807e1d 115static int
abc485a1 116hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 117{
66c6502d 118 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
119}
120
e2ac8128 121/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 122 (MSB = 0). */
e2ac8128 123
abc485a1
RC
124int
125hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
126{
127 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
128}
129
1777feb0 130/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 131
abc485a1
RC
132int
133hppa_extract_5_load (unsigned word)
c906108c 134{
abc485a1 135 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
136}
137
1777feb0 138/* Extract the immediate field from a break instruction. */
c906108c 139
abc485a1
RC
140unsigned
141hppa_extract_5r_store (unsigned word)
c906108c
SS
142{
143 return (word & MASK_5);
144}
145
1777feb0 146/* Extract the immediate field from a {sr}sm instruction. */
c906108c 147
abc485a1
RC
148unsigned
149hppa_extract_5R_store (unsigned word)
c906108c
SS
150{
151 return (word >> 16 & MASK_5);
152}
153
1777feb0 154/* Extract a 14 bit immediate field. */
c906108c 155
abc485a1
RC
156int
157hppa_extract_14 (unsigned word)
c906108c 158{
abc485a1 159 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
160}
161
1777feb0 162/* Extract a 21 bit constant. */
c906108c 163
abc485a1
RC
164int
165hppa_extract_21 (unsigned word)
c906108c
SS
166{
167 int val;
168
169 word &= MASK_21;
170 word <<= 11;
abc485a1 171 val = hppa_get_field (word, 20, 20);
c906108c 172 val <<= 11;
abc485a1 173 val |= hppa_get_field (word, 9, 19);
c906108c 174 val <<= 2;
abc485a1 175 val |= hppa_get_field (word, 5, 6);
c906108c 176 val <<= 5;
abc485a1 177 val |= hppa_get_field (word, 0, 4);
c906108c 178 val <<= 2;
abc485a1
RC
179 val |= hppa_get_field (word, 7, 8);
180 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
181}
182
c906108c 183/* extract a 17 bit constant from branch instructions, returning the
1777feb0 184 19 bit signed value. */
c906108c 185
abc485a1
RC
186int
187hppa_extract_17 (unsigned word)
c906108c 188{
abc485a1
RC
189 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
190 hppa_get_field (word, 29, 29) << 10 |
191 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
192 (word & 0x1) << 16, 17) << 2;
193}
3388d7ff
RC
194
195CORE_ADDR
196hppa_symbol_address(const char *sym)
197{
3b7344d5 198 struct bound_minimal_symbol minsym;
3388d7ff
RC
199
200 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 201 if (minsym.minsym)
77e371c0 202 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
203 else
204 return (CORE_ADDR)-1;
205}
77d18ded 206
61a12cfa 207static struct hppa_objfile_private *
77d18ded
RC
208hppa_init_objfile_priv_data (struct objfile *objfile)
209{
e39db4db
SM
210 hppa_objfile_private *priv
211 = OBSTACK_ZALLOC (&objfile->objfile_obstack, hppa_objfile_private);
77d18ded 212
9a73f0ad 213 hppa_objfile_priv_data.set (objfile, priv);
77d18ded
RC
214
215 return priv;
216}
c906108c
SS
217\f
218
219/* Compare the start address for two unwind entries returning 1 if
220 the first address is larger than the second, -1 if the second is
221 larger than the first, and zero if they are equal. */
222
223static int
fba45db2 224compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 225{
9a3c8263
SM
226 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
227 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
228
229 if (a->region_start > b->region_start)
230 return 1;
231 else if (a->region_start < b->region_start)
232 return -1;
233 else
234 return 0;
235}
236
53a5351d 237static void
fdd72f95 238record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 239{
fdd72f95 240 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 241 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
242 {
243 bfd_vma value = section->vma - section->filepos;
244 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
245
246 if (value < *low_text_segment_address)
dda83cd7 247 *low_text_segment_address = value;
fdd72f95 248 }
53a5351d
JM
249}
250
c906108c 251static void
fba45db2 252internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 253 asection *section, unsigned int entries,
241fd515 254 size_t size, CORE_ADDR text_offset)
c906108c
SS
255{
256 /* We will read the unwind entries into temporary memory, then
257 fill in the actual unwind table. */
fdd72f95 258
c906108c
SS
259 if (size > 0)
260 {
08feed99 261 struct gdbarch *gdbarch = objfile->arch ();
c906108c
SS
262 unsigned long tmp;
263 unsigned i;
224c3ddb 264 char *buf = (char *) alloca (size);
fdd72f95 265 CORE_ADDR low_text_segment_address;
c906108c 266
fdd72f95 267 /* For ELF targets, then unwinds are supposed to
1777feb0 268 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
269
270 Note that when loading a shared library (text_offset != 0) the
271 unwinds are already relative to the text_offset that will be
272 passed in. */
5db8bbe5 273 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 274 {
dda83cd7 275 low_text_segment_address = -1;
fdd72f95 276
53a5351d 277 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
278 record_text_segment_lowaddr,
279 &low_text_segment_address);
53a5351d 280
fdd72f95 281 text_offset = low_text_segment_address;
53a5351d 282 }
5db8bbe5 283 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
dda83cd7 284 {
5db8bbe5 285 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 286 }
53a5351d 287
c906108c
SS
288 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
289
290 /* Now internalize the information being careful to handle host/target
dda83cd7 291 endian issues. */
c906108c
SS
292 for (i = 0; i < entries; i++)
293 {
294 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 295 (bfd_byte *) buf);
c906108c
SS
296 table[i].region_start += text_offset;
297 buf += 4;
c5aa993b 298 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
299 table[i].region_end += text_offset;
300 buf += 4;
c5aa993b 301 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
302 buf += 4;
303 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
304 table[i].Millicode = (tmp >> 30) & 0x1;
305 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
306 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 307 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
308 table[i].Entry_SR = (tmp >> 25) & 0x1;
309 table[i].Entry_FR = (tmp >> 21) & 0xf;
310 table[i].Entry_GR = (tmp >> 16) & 0x1f;
311 table[i].Args_stored = (tmp >> 15) & 0x1;
312 table[i].Variable_Frame = (tmp >> 14) & 0x1;
313 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
314 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
315 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
316 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 317 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
318 table[i].cxx_info = (tmp >> 8) & 0x1;
319 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
320 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 321 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
322 table[i].Save_SP = (tmp >> 4) & 0x1;
323 table[i].Save_RP = (tmp >> 3) & 0x1;
324 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 325 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 326 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 327 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
328 buf += 4;
329 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
330 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
331 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
332 table[i].alloca_frame = (tmp >> 28) & 0x1;
333 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
334 table[i].Total_frame_size = tmp & 0x7ffffff;
335
1777feb0 336 /* Stub unwinds are handled elsewhere. */
c906108c
SS
337 table[i].stub_unwind.stub_type = 0;
338 table[i].stub_unwind.padding = 0;
339 }
340 }
341}
342
343/* Read in the backtrace information stored in the `$UNWIND_START$' section of
344 the object file. This info is used mainly by find_unwind_entry() to find
345 out the stack frame size and frame pointer used by procedures. We put
346 everything on the psymbol obstack in the objfile so that it automatically
347 gets freed when the objfile is destroyed. */
348
349static void
fba45db2 350read_unwind_info (struct objfile *objfile)
c906108c 351{
d4f3574e 352 asection *unwind_sec, *stub_unwind_sec;
241fd515 353 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 354 unsigned index, unwind_entries;
c906108c
SS
355 unsigned stub_entries, total_entries;
356 CORE_ADDR text_offset;
7c46b9fb
RC
357 struct hppa_unwind_info *ui;
358 struct hppa_objfile_private *obj_private;
c906108c 359
b3b3bada 360 text_offset = objfile->text_section_offset ();
7c46b9fb
RC
361 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
362 sizeof (struct hppa_unwind_info));
c906108c
SS
363
364 ui->table = NULL;
365 ui->cache = NULL;
366 ui->last = -1;
367
d4f3574e
SS
368 /* For reasons unknown the HP PA64 tools generate multiple unwinder
369 sections in a single executable. So we just iterate over every
85102364 370 section in the BFD looking for unwinder sections instead of trying
1777feb0 371 to do a lookup with bfd_get_section_by_name.
c906108c 372
d4f3574e
SS
373 First determine the total size of the unwind tables so that we
374 can allocate memory in a nice big hunk. */
375 total_entries = 0;
376 for (unwind_sec = objfile->obfd->sections;
377 unwind_sec;
378 unwind_sec = unwind_sec->next)
c906108c 379 {
d4f3574e
SS
380 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
381 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
382 {
fd361982 383 unwind_size = bfd_section_size (unwind_sec);
d4f3574e 384 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 385
d4f3574e
SS
386 total_entries += unwind_entries;
387 }
c906108c
SS
388 }
389
d4f3574e 390 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 391 use stub unwinds at the current time. */
d4f3574e
SS
392 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
393
c906108c
SS
394 if (stub_unwind_sec)
395 {
fd361982 396 stub_unwind_size = bfd_section_size (stub_unwind_sec);
c906108c
SS
397 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
398 }
399 else
400 {
401 stub_unwind_size = 0;
402 stub_entries = 0;
403 }
404
405 /* Compute total number of unwind entries and their total size. */
d4f3574e 406 total_entries += stub_entries;
c906108c
SS
407 total_size = total_entries * sizeof (struct unwind_table_entry);
408
409 /* Allocate memory for the unwind table. */
410 ui->table = (struct unwind_table_entry *)
8b92e4d5 411 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 412 ui->last = total_entries - 1;
c906108c 413
d4f3574e
SS
414 /* Now read in each unwind section and internalize the standard unwind
415 entries. */
c906108c 416 index = 0;
d4f3574e
SS
417 for (unwind_sec = objfile->obfd->sections;
418 unwind_sec;
419 unwind_sec = unwind_sec->next)
420 {
421 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
422 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
423 {
fd361982 424 unwind_size = bfd_section_size (unwind_sec);
d4f3574e
SS
425 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
426
427 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
428 unwind_entries, unwind_size, text_offset);
429 index += unwind_entries;
430 }
431 }
432
433 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
434 if (stub_unwind_size > 0)
435 {
436 unsigned int i;
224c3ddb 437 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
438
439 /* Read in the stub unwind entries. */
440 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
441 0, stub_unwind_size);
442
443 /* Now convert them into regular unwind entries. */
444 for (i = 0; i < stub_entries; i++, index++)
445 {
446 /* Clear out the next unwind entry. */
447 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
448
1777feb0 449 /* Convert offset & size into region_start and region_end.
c906108c
SS
450 Stuff away the stub type into "reserved" fields. */
451 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
452 (bfd_byte *) buf);
453 ui->table[index].region_start += text_offset;
454 buf += 4;
455 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 456 (bfd_byte *) buf);
c906108c
SS
457 buf += 2;
458 ui->table[index].region_end
c5aa993b
JM
459 = ui->table[index].region_start + 4 *
460 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
461 buf += 2;
462 }
463
464 }
465
466 /* Unwind table needs to be kept sorted. */
467 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
468 compare_unwind_entries);
469
470 /* Keep a pointer to the unwind information. */
9a73f0ad 471 obj_private = hppa_objfile_priv_data.get (objfile);
7c46b9fb 472 if (obj_private == NULL)
77d18ded
RC
473 obj_private = hppa_init_objfile_priv_data (objfile);
474
c906108c
SS
475 obj_private->unwind_info = ui;
476}
477
478/* Lookup the unwind (stack backtrace) info for the given PC. We search all
479 of the objfiles seeking the unwind table entry for this PC. Each objfile
480 contains a sorted list of struct unwind_table_entry. Since we do a binary
481 search of the unwind tables, we depend upon them to be sorted. */
482
483struct unwind_table_entry *
fba45db2 484find_unwind_entry (CORE_ADDR pc)
c906108c
SS
485{
486 int first, middle, last;
7c46b9fb 487 struct hppa_objfile_private *priv;
c906108c 488
369aa520 489 if (hppa_debug)
5af949e3 490 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
dda83cd7 491 hex_string (pc));
369aa520 492
1777feb0 493 /* A function at address 0? Not in HP-UX! */
c906108c 494 if (pc == (CORE_ADDR) 0)
369aa520
RC
495 {
496 if (hppa_debug)
497 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
498 return NULL;
499 }
c906108c 500
2030c079 501 for (objfile *objfile : current_program_space->objfiles ())
aed57c53
TT
502 {
503 struct hppa_unwind_info *ui;
504 ui = NULL;
9a73f0ad 505 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
506 if (priv)
507 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
508
509 if (!ui)
510 {
511 read_unwind_info (objfile);
9a73f0ad 512 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
513 if (priv == NULL)
514 error (_("Internal error reading unwind information."));
515 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
516 }
517
518 /* First, check the cache. */
519
520 if (ui->cache
521 && pc >= ui->cache->region_start
522 && pc <= ui->cache->region_end)
523 {
524 if (hppa_debug)
525 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
526 hex_string ((uintptr_t) ui->cache));
527 return ui->cache;
528 }
529
530 /* Not in the cache, do a binary search. */
531
532 first = 0;
533 last = ui->last;
534
535 while (first <= last)
536 {
537 middle = (first + last) / 2;
538 if (pc >= ui->table[middle].region_start
539 && pc <= ui->table[middle].region_end)
540 {
541 ui->cache = &ui->table[middle];
542 if (hppa_debug)
543 fprintf_unfiltered (gdb_stdlog, "%s }\n",
544 hex_string ((uintptr_t) ui->cache));
545 return &ui->table[middle];
546 }
547
548 if (pc < ui->table[middle].region_start)
549 last = middle - 1;
550 else
551 first = middle + 1;
552 }
553 }
369aa520
RC
554
555 if (hppa_debug)
556 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
557
c906108c
SS
558 return NULL;
559}
560
c9cf6e20
MG
561/* Implement the stack_frame_destroyed_p gdbarch method.
562
563 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 564 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
565
566 We do not assume that the epilogue is at the end of a function as we can
567 also have return sequences in the middle of a function. */
c9cf6e20 568
1fb24930 569static int
c9cf6e20 570hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 571{
e17a4113 572 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
573 unsigned long status;
574 unsigned int inst;
e362b510 575 gdb_byte buf[4];
1fb24930 576
8defab1a 577 status = target_read_memory (pc, buf, 4);
1fb24930
RC
578 if (status != 0)
579 return 0;
580
e17a4113 581 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
582
583 /* The most common way to perform a stack adjustment ldo X(sp),sp
584 We are destroying a stack frame if the offset is negative. */
585 if ((inst & 0xffffc000) == 0x37de0000
586 && hppa_extract_14 (inst) < 0)
587 return 1;
588
589 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
590 if (((inst & 0x0fc010e0) == 0x0fc010e0
591 || (inst & 0x0fc010e0) == 0x0fc010e0)
592 && hppa_extract_14 (inst) < 0)
593 return 1;
594
595 /* bv %r0(%rp) or bv,n %r0(%rp) */
596 if (inst == 0xe840c000 || inst == 0xe840c002)
597 return 1;
598
599 return 0;
600}
601
04180708 602constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 603
04180708 604typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 605
e23457df
AC
606/* Return the name of a register. */
607
4a302917 608static const char *
d93859e2 609hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 610{
a121b7c1 611 static const char *names[] = {
e23457df
AC
612 "flags", "r1", "rp", "r3",
613 "r4", "r5", "r6", "r7",
614 "r8", "r9", "r10", "r11",
615 "r12", "r13", "r14", "r15",
616 "r16", "r17", "r18", "r19",
617 "r20", "r21", "r22", "r23",
618 "r24", "r25", "r26", "dp",
619 "ret0", "ret1", "sp", "r31",
620 "sar", "pcoqh", "pcsqh", "pcoqt",
621 "pcsqt", "eiem", "iir", "isr",
622 "ior", "ipsw", "goto", "sr4",
623 "sr0", "sr1", "sr2", "sr3",
624 "sr5", "sr6", "sr7", "cr0",
625 "cr8", "cr9", "ccr", "cr12",
626 "cr13", "cr24", "cr25", "cr26",
627 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
628 "fpsr", "fpe1", "fpe2", "fpe3",
629 "fpe4", "fpe5", "fpe6", "fpe7",
630 "fr4", "fr4R", "fr5", "fr5R",
631 "fr6", "fr6R", "fr7", "fr7R",
632 "fr8", "fr8R", "fr9", "fr9R",
633 "fr10", "fr10R", "fr11", "fr11R",
634 "fr12", "fr12R", "fr13", "fr13R",
635 "fr14", "fr14R", "fr15", "fr15R",
636 "fr16", "fr16R", "fr17", "fr17R",
637 "fr18", "fr18R", "fr19", "fr19R",
638 "fr20", "fr20R", "fr21", "fr21R",
639 "fr22", "fr22R", "fr23", "fr23R",
640 "fr24", "fr24R", "fr25", "fr25R",
641 "fr26", "fr26R", "fr27", "fr27R",
642 "fr28", "fr28R", "fr29", "fr29R",
643 "fr30", "fr30R", "fr31", "fr31R"
644 };
645 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
646 return NULL;
647 else
648 return names[i];
649}
650
4a302917 651static const char *
d93859e2 652hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 653{
a121b7c1 654 static const char *names[] = {
e23457df
AC
655 "flags", "r1", "rp", "r3",
656 "r4", "r5", "r6", "r7",
657 "r8", "r9", "r10", "r11",
658 "r12", "r13", "r14", "r15",
659 "r16", "r17", "r18", "r19",
660 "r20", "r21", "r22", "r23",
661 "r24", "r25", "r26", "dp",
662 "ret0", "ret1", "sp", "r31",
663 "sar", "pcoqh", "pcsqh", "pcoqt",
664 "pcsqt", "eiem", "iir", "isr",
665 "ior", "ipsw", "goto", "sr4",
666 "sr0", "sr1", "sr2", "sr3",
667 "sr5", "sr6", "sr7", "cr0",
668 "cr8", "cr9", "ccr", "cr12",
669 "cr13", "cr24", "cr25", "cr26",
670 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
671 "fpsr", "fpe1", "fpe2", "fpe3",
672 "fr4", "fr5", "fr6", "fr7",
673 "fr8", "fr9", "fr10", "fr11",
674 "fr12", "fr13", "fr14", "fr15",
675 "fr16", "fr17", "fr18", "fr19",
676 "fr20", "fr21", "fr22", "fr23",
677 "fr24", "fr25", "fr26", "fr27",
678 "fr28", "fr29", "fr30", "fr31"
679 };
680 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
681 return NULL;
682 else
683 return names[i];
684}
685
85c83e99 686/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 687static int
d3f73121 688hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 689{
85c83e99 690 /* The general registers and the sar are the same in both sets. */
0fde2c53 691 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
692 return reg;
693
694 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 695 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
696 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
697
1ef7fcb5
RC
698 return -1;
699}
700
79508e1e
AC
701/* This function pushes a stack frame with arguments as part of the
702 inferior function calling mechanism.
703
704 This is the version of the function for the 32-bit PA machines, in
705 which later arguments appear at lower addresses. (The stack always
706 grows towards higher addresses.)
707
708 We simply allocate the appropriate amount of stack space and put
709 arguments into their proper slots. */
710
4a302917 711static CORE_ADDR
7d9b040b 712hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
713 struct regcache *regcache, CORE_ADDR bp_addr,
714 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
715 function_call_return_method return_method,
716 CORE_ADDR struct_addr)
79508e1e 717{
e17a4113
UW
718 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
719
79508e1e
AC
720 /* Stack base address at which any pass-by-reference parameters are
721 stored. */
722 CORE_ADDR struct_end = 0;
723 /* Stack base address at which the first parameter is stored. */
724 CORE_ADDR param_end = 0;
725
79508e1e
AC
726 /* Two passes. First pass computes the location of everything,
727 second pass writes the bytes out. */
728 int write_pass;
d49771ef
RC
729
730 /* Global pointer (r19) of the function we are trying to call. */
731 CORE_ADDR gp;
732
733 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
734
79508e1e
AC
735 for (write_pass = 0; write_pass < 2; write_pass++)
736 {
1797a8f6 737 CORE_ADDR struct_ptr = 0;
1777feb0 738 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
dda83cd7 739 struct_ptr is adjusted for each argument below, so the first
2a6228ef
RC
740 argument will end up at sp-36. */
741 CORE_ADDR param_ptr = 32;
79508e1e 742 int i;
2a6228ef
RC
743 int small_struct = 0;
744
79508e1e
AC
745 for (i = 0; i < nargs; i++)
746 {
747 struct value *arg = args[i];
4991999e 748 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
749 /* The corresponding parameter that is pushed onto the
750 stack, and [possibly] passed in a register. */
948f8e3d 751 gdb_byte param_val[8];
79508e1e
AC
752 int param_len;
753 memset (param_val, 0, sizeof param_val);
754 if (TYPE_LENGTH (type) > 8)
755 {
756 /* Large parameter, pass by reference. Store the value
757 in "struct" area and then pass its address. */
758 param_len = 4;
1797a8f6 759 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 760 if (write_pass)
0fd88904 761 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 762 TYPE_LENGTH (type));
e17a4113
UW
763 store_unsigned_integer (param_val, 4, byte_order,
764 struct_end - struct_ptr);
79508e1e 765 }
78134374
SM
766 else if (type->code () == TYPE_CODE_INT
767 || type->code () == TYPE_CODE_ENUM)
79508e1e
AC
768 {
769 /* Integer value store, right aligned. "unpack_long"
770 takes care of any sign-extension problems. */
771 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 772 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 773 unpack_long (type,
0fd88904 774 value_contents (arg)));
79508e1e 775 }
78134374 776 else if (type->code () == TYPE_CODE_FLT)
dda83cd7 777 {
2a6228ef
RC
778 /* Floating point value store, right aligned. */
779 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 780 memcpy (param_val, value_contents (arg), param_len);
dda83cd7 781 }
79508e1e
AC
782 else
783 {
79508e1e 784 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
785
786 /* Small struct value are stored right-aligned. */
79508e1e 787 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 788 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
789
790 /* Structures of size 5, 6 and 7 bytes are special in that
dda83cd7 791 the higher-ordered word is stored in the lower-ordered
2a6228ef
RC
792 argument, and even though it is a 8-byte quantity the
793 registers need not be 8-byte aligned. */
1b07b470 794 if (param_len > 4 && param_len < 8)
2a6228ef 795 small_struct = 1;
79508e1e 796 }
2a6228ef 797
1797a8f6 798 param_ptr += param_len;
2a6228ef 799 if (param_len == 8 && !small_struct)
dda83cd7 800 param_ptr = align_up (param_ptr, 8);
2a6228ef
RC
801
802 /* First 4 non-FP arguments are passed in gr26-gr23.
803 First 4 32-bit FP arguments are passed in fr4L-fr7L.
804 First 2 64-bit FP arguments are passed in fr5 and fr7.
805
806 The rest go on the stack, starting at sp-36, towards lower
807 addresses. 8-byte arguments must be aligned to a 8-byte
808 stack boundary. */
79508e1e
AC
809 if (write_pass)
810 {
1797a8f6 811 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
812
813 /* There are some cases when we don't know the type
814 expected by the callee (e.g. for variadic functions), so
815 pass the parameters in both general and fp regs. */
816 if (param_ptr <= 48)
79508e1e 817 {
2a6228ef
RC
818 int grreg = 26 - (param_ptr - 36) / 4;
819 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
820 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
821
b66f5587
SM
822 regcache->cooked_write (grreg, param_val);
823 regcache->cooked_write (fpLreg, param_val);
2a6228ef 824
79508e1e 825 if (param_len > 4)
2a6228ef 826 {
b66f5587 827 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 828
b66f5587
SM
829 regcache->cooked_write (fpreg, param_val);
830 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 831 }
79508e1e
AC
832 }
833 }
834 }
835
836 /* Update the various stack pointers. */
837 if (!write_pass)
838 {
2a6228ef 839 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
840 /* PARAM_PTR already accounts for all the arguments passed
841 by the user. However, the ABI mandates minimum stack
842 space allocations for outgoing arguments. The ABI also
843 mandates minimum stack alignments which we must
844 preserve. */
2a6228ef 845 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
846 }
847 }
848
849 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 850 address. */
cf84fa6b 851 if (return_method == return_method_struct)
9c9acae0 852 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 853
e38c262f 854 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
855
856 if (gp != 0)
9c9acae0 857 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 858
79508e1e 859 /* Set the return address. */
77d18ded
RC
860 if (!gdbarch_push_dummy_code_p (gdbarch))
861 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 862
c4557624 863 /* Update the Stack Pointer. */
34f75cc1 864 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 865
2a6228ef 866 return param_end;
79508e1e
AC
867}
868
38ca4e0c
MK
869/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
870 Runtime Architecture for PA-RISC 2.0", which is distributed as part
871 as of the HP-UX Software Transition Kit (STK). This implementation
872 is based on version 3.3, dated October 6, 1997. */
2f690297 873
38ca4e0c 874/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 875
38ca4e0c
MK
876static int
877hppa64_integral_or_pointer_p (const struct type *type)
878{
78134374 879 switch (type->code ())
38ca4e0c
MK
880 {
881 case TYPE_CODE_INT:
882 case TYPE_CODE_BOOL:
883 case TYPE_CODE_CHAR:
884 case TYPE_CODE_ENUM:
885 case TYPE_CODE_RANGE:
886 {
887 int len = TYPE_LENGTH (type);
888 return (len == 1 || len == 2 || len == 4 || len == 8);
889 }
890 case TYPE_CODE_PTR:
891 case TYPE_CODE_REF:
aa006118 892 case TYPE_CODE_RVALUE_REF:
38ca4e0c
MK
893 return (TYPE_LENGTH (type) == 8);
894 default:
895 break;
896 }
897
898 return 0;
899}
900
901/* Check whether TYPE is a "Floating Scalar Type". */
902
903static int
904hppa64_floating_p (const struct type *type)
905{
78134374 906 switch (type->code ())
38ca4e0c
MK
907 {
908 case TYPE_CODE_FLT:
909 {
910 int len = TYPE_LENGTH (type);
911 return (len == 4 || len == 8 || len == 16);
912 }
913 default:
914 break;
915 }
916
917 return 0;
918}
2f690297 919
1218e655
RC
920/* If CODE points to a function entry address, try to look up the corresponding
921 function descriptor and return its address instead. If CODE is not a
922 function entry address, then just return it unchanged. */
923static CORE_ADDR
e17a4113 924hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 925{
e17a4113 926 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
927 struct obj_section *sec, *opd;
928
929 sec = find_pc_section (code);
930
931 if (!sec)
932 return code;
933
934 /* If CODE is in a data section, assume it's already a fptr. */
935 if (!(sec->the_bfd_section->flags & SEC_CODE))
936 return code;
937
938 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
939 {
940 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 941 break;
1218e655
RC
942 }
943
944 if (opd < sec->objfile->sections_end)
945 {
0c1bcd23 946 for (CORE_ADDR addr = opd->addr (); addr < opd->endaddr (); addr += 2 * 8)
aded6f54 947 {
1218e655 948 ULONGEST opdaddr;
948f8e3d 949 gdb_byte tmp[8];
1218e655
RC
950
951 if (target_read_memory (addr, tmp, sizeof (tmp)))
952 break;
e17a4113 953 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 954
aded6f54 955 if (opdaddr == code)
1218e655
RC
956 return addr - 16;
957 }
958 }
959
960 return code;
961}
962
4a302917 963static CORE_ADDR
7d9b040b 964hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
965 struct regcache *regcache, CORE_ADDR bp_addr,
966 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
967 function_call_return_method return_method,
968 CORE_ADDR struct_addr)
2f690297 969{
38ca4e0c 970 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 971 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
972 int i, offset = 0;
973 CORE_ADDR gp;
2f690297 974
38ca4e0c
MK
975 /* "The outgoing parameter area [...] must be aligned at a 16-byte
976 boundary." */
977 sp = align_up (sp, 16);
2f690297 978
38ca4e0c
MK
979 for (i = 0; i < nargs; i++)
980 {
981 struct value *arg = args[i];
982 struct type *type = value_type (arg);
983 int len = TYPE_LENGTH (type);
0fd88904 984 const bfd_byte *valbuf;
1218e655 985 bfd_byte fptrbuf[8];
38ca4e0c 986 int regnum;
2f690297 987
38ca4e0c
MK
988 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
989 offset = align_up (offset, 8);
77d18ded 990
38ca4e0c 991 if (hppa64_integral_or_pointer_p (type))
2f690297 992 {
38ca4e0c 993 /* "Integral scalar parameters smaller than 64 bits are
dda83cd7
SM
994 padded on the left (i.e., the value is in the
995 least-significant bits of the 64-bit storage unit, and
996 the high-order bits are undefined)." Therefore we can
997 safely sign-extend them. */
38ca4e0c 998 if (len < 8)
449e1137 999 {
df4df182 1000 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1001 len = 8;
1002 }
1003 }
1004 else if (hppa64_floating_p (type))
1005 {
1006 if (len > 8)
1007 {
1008 /* "Quad-precision (128-bit) floating-point scalar
1009 parameters are aligned on a 16-byte boundary." */
1010 offset = align_up (offset, 16);
1011
1012 /* "Double-extended- and quad-precision floating-point
dda83cd7
SM
1013 parameters within the first 64 bytes of the parameter
1014 list are always passed in general registers." */
449e1137
AC
1015 }
1016 else
1017 {
38ca4e0c 1018 if (len == 4)
449e1137 1019 {
38ca4e0c
MK
1020 /* "Single-precision (32-bit) floating-point scalar
1021 parameters are padded on the left with 32 bits of
1022 garbage (i.e., the floating-point value is in the
1023 least-significant 32 bits of a 64-bit storage
1024 unit)." */
1025 offset += 4;
449e1137 1026 }
38ca4e0c
MK
1027
1028 /* "Single- and double-precision floating-point
dda83cd7
SM
1029 parameters in this area are passed according to the
1030 available formal parameter information in a function
1031 prototype. [...] If no prototype is in scope,
1032 floating-point parameters must be passed both in the
1033 corresponding general registers and in the
1034 corresponding floating-point registers." */
38ca4e0c
MK
1035 regnum = HPPA64_FP4_REGNUM + offset / 8;
1036
1037 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1038 {
38ca4e0c
MK
1039 /* "Single-precision floating-point parameters, when
1040 passed in floating-point registers, are passed in
1041 the right halves of the floating point registers;
1042 the left halves are unused." */
e4c4a59b
SM
1043 regcache->cooked_write_part (regnum, offset % 8, len,
1044 value_contents (arg));
449e1137
AC
1045 }
1046 }
2f690297 1047 }
38ca4e0c 1048 else
2f690297 1049 {
38ca4e0c
MK
1050 if (len > 8)
1051 {
1052 /* "Aggregates larger than 8 bytes are aligned on a
1053 16-byte boundary, possibly leaving an unused argument
1777feb0 1054 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1055 they are padded on the right (with garbage), to a
1056 multiple of 8 bytes." */
1057 offset = align_up (offset, 16);
1058 }
1059 }
1060
1218e655 1061 /* If we are passing a function pointer, make sure we pass a function
dda83cd7 1062 descriptor instead of the function entry address. */
78134374 1063 if (type->code () == TYPE_CODE_PTR
dda83cd7
SM
1064 && TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC)
1065 {
1218e655
RC
1066 ULONGEST codeptr, fptr;
1067
1068 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1069 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1070 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1071 fptr);
1218e655
RC
1072 valbuf = fptrbuf;
1073 }
1074 else
dda83cd7
SM
1075 {
1076 valbuf = value_contents (arg);
1218e655
RC
1077 }
1078
38ca4e0c 1079 /* Always store the argument in memory. */
1218e655 1080 write_memory (sp + offset, valbuf, len);
38ca4e0c 1081
38ca4e0c
MK
1082 regnum = HPPA_ARG0_REGNUM - offset / 8;
1083 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1084 {
e4c4a59b
SM
1085 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1086 valbuf);
325fac50
PA
1087 offset += std::min (len, 8);
1088 valbuf += std::min (len, 8);
1089 len -= std::min (len, 8);
38ca4e0c 1090 regnum--;
2f690297 1091 }
38ca4e0c
MK
1092
1093 offset += len;
2f690297
AC
1094 }
1095
38ca4e0c
MK
1096 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1097 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1098
1099 /* Allocate the outgoing parameter area. Make sure the outgoing
1100 parameter area is multiple of 16 bytes in length. */
325fac50 1101 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1102
1103 /* Allocate 32-bytes of scratch space. The documentation doesn't
1104 mention this, but it seems to be needed. */
1105 sp += 32;
1106
1107 /* Allocate the frame marker area. */
1108 sp += 16;
1109
1110 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1111 its address. */
cf84fa6b 1112 if (return_method == return_method_struct)
38ca4e0c 1113 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1114
38ca4e0c 1115 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1116 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1117 if (gp != 0)
38ca4e0c 1118 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1119
38ca4e0c 1120 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1121 if (!gdbarch_push_dummy_code_p (gdbarch))
1122 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1123
38ca4e0c
MK
1124 /* Set up GR30 to hold the stack pointer (sp). */
1125 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1126
38ca4e0c 1127 return sp;
2f690297 1128}
38ca4e0c 1129\f
2f690297 1130
08a27113
MK
1131/* Handle 32/64-bit struct return conventions. */
1132
1133static enum return_value_convention
6a3a010b 1134hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1135 struct type *type, struct regcache *regcache,
e127f0db 1136 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1137{
1138 if (TYPE_LENGTH (type) <= 2 * 4)
1139 {
1140 /* The value always lives in the right hand end of the register
1141 (or register pair)? */
1142 int b;
78134374 1143 int reg = type->code () == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
08a27113
MK
1144 int part = TYPE_LENGTH (type) % 4;
1145 /* The left hand register contains only part of the value,
1146 transfer that first so that the rest can be xfered as entire
1147 4-byte registers. */
1148 if (part > 0)
1149 {
1150 if (readbuf != NULL)
73bb0000 1151 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1152 if (writebuf != NULL)
e4c4a59b 1153 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1154 reg++;
1155 }
1156 /* Now transfer the remaining register values. */
1157 for (b = part; b < TYPE_LENGTH (type); b += 4)
1158 {
1159 if (readbuf != NULL)
dca08e1f 1160 regcache->cooked_read (reg, readbuf + b);
08a27113 1161 if (writebuf != NULL)
b66f5587 1162 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1163 reg++;
1164 }
1165 return RETURN_VALUE_REGISTER_CONVENTION;
1166 }
1167 else
1168 return RETURN_VALUE_STRUCT_CONVENTION;
1169}
1170
1171static enum return_value_convention
6a3a010b 1172hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1173 struct type *type, struct regcache *regcache,
e127f0db 1174 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1175{
1176 int len = TYPE_LENGTH (type);
1177 int regnum, offset;
1178
bad43aa5 1179 if (len > 16)
08a27113 1180 {
85102364 1181 /* All return values larger than 128 bits must be aggregate
dda83cd7 1182 return values. */
9738b034
MK
1183 gdb_assert (!hppa64_integral_or_pointer_p (type));
1184 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1185
1186 /* "Aggregate return values larger than 128 bits are returned in
1187 a buffer allocated by the caller. The address of the buffer
1188 must be passed in GR 28." */
1189 return RETURN_VALUE_STRUCT_CONVENTION;
1190 }
1191
1192 if (hppa64_integral_or_pointer_p (type))
1193 {
1194 /* "Integral return values are returned in GR 28. Values
dda83cd7 1195 smaller than 64 bits are padded on the left (with garbage)." */
08a27113
MK
1196 regnum = HPPA_RET0_REGNUM;
1197 offset = 8 - len;
1198 }
1199 else if (hppa64_floating_p (type))
1200 {
1201 if (len > 8)
1202 {
1203 /* "Double-extended- and quad-precision floating-point
1204 values are returned in GRs 28 and 29. The sign,
1205 exponent, and most-significant bits of the mantissa are
1206 returned in GR 28; the least-significant bits of the
1207 mantissa are passed in GR 29. For double-extended
1208 precision values, GR 29 is padded on the right with 48
1209 bits of garbage." */
1210 regnum = HPPA_RET0_REGNUM;
1211 offset = 0;
1212 }
1213 else
1214 {
1215 /* "Single-precision and double-precision floating-point
1216 return values are returned in FR 4R (single precision) or
1217 FR 4 (double-precision)." */
1218 regnum = HPPA64_FP4_REGNUM;
1219 offset = 8 - len;
1220 }
1221 }
1222 else
1223 {
1224 /* "Aggregate return values up to 64 bits in size are returned
dda83cd7
SM
1225 in GR 28. Aggregates smaller than 64 bits are left aligned
1226 in the register; the pad bits on the right are undefined."
08a27113
MK
1227
1228 "Aggregate return values between 65 and 128 bits are returned
1229 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1230 the remaining bits are placed, left aligned, in GR 29. The
1231 pad bits on the right of GR 29 (if any) are undefined." */
1232 regnum = HPPA_RET0_REGNUM;
1233 offset = 0;
1234 }
1235
1236 if (readbuf)
1237 {
08a27113
MK
1238 while (len > 0)
1239 {
73bb0000
SM
1240 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1241 readbuf);
325fac50
PA
1242 readbuf += std::min (len, 8);
1243 len -= std::min (len, 8);
08a27113
MK
1244 regnum++;
1245 }
1246 }
1247
1248 if (writebuf)
1249 {
08a27113
MK
1250 while (len > 0)
1251 {
e4c4a59b
SM
1252 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1253 writebuf);
325fac50
PA
1254 writebuf += std::min (len, 8);
1255 len -= std::min (len, 8);
08a27113
MK
1256 regnum++;
1257 }
1258 }
1259
1260 return RETURN_VALUE_REGISTER_CONVENTION;
1261}
1262\f
1263
d49771ef 1264static CORE_ADDR
a7aad9aa 1265hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1266 struct target_ops *targ)
1267{
1268 if (addr & 2)
1269 {
0dfff4cb 1270 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1271 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1272 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1273 }
1274
1275 return addr;
1276}
1277
1797a8f6
AC
1278static CORE_ADDR
1279hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1280{
1281 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1282 and not _bit_)! */
1283 return align_up (addr, 64);
1284}
1285
2f690297
AC
1286/* Force all frames to 16-byte alignment. Better safe than sorry. */
1287
1288static CORE_ADDR
1797a8f6 1289hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1290{
1291 /* Just always 16-byte align. */
1292 return align_up (addr, 16);
1293}
1294
cb8c24b6 1295static CORE_ADDR
c113ed0c 1296hppa_read_pc (readable_regcache *regcache)
c906108c 1297{
cc72850f 1298 ULONGEST ipsw;
61a1198a 1299 ULONGEST pc;
c906108c 1300
c113ed0c
YQ
1301 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1302 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1303
1304 /* If the current instruction is nullified, then we are effectively
1305 still executing the previous instruction. Pretend we are still
cc72850f
MK
1306 there. This is needed when single stepping; if the nullified
1307 instruction is on a different line, we don't want GDB to think
1308 we've stepped onto that line. */
fe46cd3a
RC
1309 if (ipsw & 0x00200000)
1310 pc -= 4;
1311
cc72850f 1312 return pc & ~0x3;
c906108c
SS
1313}
1314
cc72850f 1315void
61a1198a 1316hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1317{
61a1198a
UW
1318 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1319 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1320}
1321
c906108c 1322/* For the given instruction (INST), return any adjustment it makes
1777feb0 1323 to the stack pointer or zero for no adjustment.
c906108c
SS
1324
1325 This only handles instructions commonly found in prologues. */
1326
1327static int
fba45db2 1328prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1329{
1330 /* This must persist across calls. */
1331 static int save_high21;
1332
1333 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1334 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1335 return hppa_extract_14 (inst);
c906108c
SS
1336
1337 /* stwm X,D(sp) */
1338 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1339 return hppa_extract_14 (inst);
c906108c 1340
104c1213
JM
1341 /* std,ma X,D(sp) */
1342 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1343 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1344
e22b26cb 1345 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1346 save high bits in save_high21 for later use. */
e22b26cb 1347 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1348 {
abc485a1 1349 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1350 return 0;
1351 }
1352
1353 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1354 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1355
1356 /* fstws as used by the HP compilers. */
1357 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1358 return hppa_extract_5_load (inst);
c906108c
SS
1359
1360 /* No adjustment. */
1361 return 0;
1362}
1363
1364/* Return nonzero if INST is a branch of some kind, else return zero. */
1365
1366static int
fba45db2 1367is_branch (unsigned long inst)
c906108c
SS
1368{
1369 switch (inst >> 26)
1370 {
1371 case 0x20:
1372 case 0x21:
1373 case 0x22:
1374 case 0x23:
7be570e7 1375 case 0x27:
c906108c
SS
1376 case 0x28:
1377 case 0x29:
1378 case 0x2a:
1379 case 0x2b:
7be570e7 1380 case 0x2f:
c906108c
SS
1381 case 0x30:
1382 case 0x31:
1383 case 0x32:
1384 case 0x33:
1385 case 0x38:
1386 case 0x39:
1387 case 0x3a:
7be570e7 1388 case 0x3b:
c906108c
SS
1389 return 1;
1390
1391 default:
1392 return 0;
1393 }
1394}
1395
1396/* Return the register number for a GR which is saved by INST or
b35018fd 1397 zero if INST does not save a GR.
c906108c 1398
b35018fd 1399 Referenced from:
7be570e7 1400
b35018fd
CG
1401 parisc 1.1:
1402 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1403
b35018fd
CG
1404 parisc 2.0:
1405 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1406
b35018fd
CG
1407 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1408 on page 106 in parisc 2.0, all instructions for storing values from
1409 the general registers are:
c5aa993b 1410
b35018fd 1411 Store: stb, sth, stw, std (according to Chapter 7, they
dda83cd7 1412 are only in both "inst >> 26" and "inst >> 6".
b35018fd 1413 Store Absolute: stwa, stda (according to Chapter 7, they are only
dda83cd7 1414 in "inst >> 6".
b35018fd 1415 Store Bytes: stby, stdby (according to Chapter 7, they are
dda83cd7 1416 only in "inst >> 6").
b35018fd
CG
1417
1418 For (inst >> 26), according to Chapter 7:
1419
1420 The effective memory reference address is formed by the addition
1421 of an immediate displacement to a base value.
1422
1423 - stb: 0x18, store a byte from a general register.
1424
1425 - sth: 0x19, store a halfword from a general register.
1426
1427 - stw: 0x1a, store a word from a general register.
1428
1429 - stwm: 0x1b, store a word from a general register and perform base
85102364 1430 register modification (2.0 will still treat it as stw).
b35018fd
CG
1431
1432 - std: 0x1c, store a doubleword from a general register (2.0 only).
1433
1434 - stw: 0x1f, store a word from a general register (2.0 only).
1435
1436 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1437
1438 The effective memory reference address is formed by the addition
1439 of an index value to a base value specified in the instruction.
1440
1441 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1442
1443 - sth: 0x09, store a halfword from a general register (1.1 calls
1444 sths).
1445
1446 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1447
1448 - std: 0x0b: store a doubleword from a general register (2.0 only)
1449
1450 Implement fast byte moves (stores) to unaligned word or doubleword
1451 destination.
1452
1453 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1454
1455 - stdby: 0x0d for unaligned doubleword (2.0 only).
1456
1457 Store a word or doubleword using an absolute memory address formed
1458 using short or long displacement or indexed
1459
1460 - stwa: 0x0e, store a word from a general register to an absolute
1461 address (1.0 calls stwas).
1462
1463 - stda: 0x0f, store a doubleword from a general register to an
1464 absolute address (2.0 only). */
1465
1466static int
1467inst_saves_gr (unsigned long inst)
1468{
1469 switch ((inst >> 26) & 0x0f)
1470 {
1471 case 0x03:
1472 switch ((inst >> 6) & 0x0f)
1473 {
1474 case 0x08:
1475 case 0x09:
1476 case 0x0a:
1477 case 0x0b:
1478 case 0x0c:
1479 case 0x0d:
1480 case 0x0e:
1481 case 0x0f:
1482 return hppa_extract_5R_store (inst);
1483 default:
1484 return 0;
1485 }
1486 case 0x18:
1487 case 0x19:
1488 case 0x1a:
1489 case 0x1b:
1490 case 0x1c:
1491 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1492 case 0x1f:
1493 return hppa_extract_5R_store (inst);
1494 default:
1495 return 0;
1496 }
c906108c
SS
1497}
1498
1499/* Return the register number for a FR which is saved by INST or
1500 zero it INST does not save a FR.
1501
1502 Note we only care about full 64bit register stores (that's the only
1503 kind of stores the prologue will use).
1504
1505 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1506
1507static int
fba45db2 1508inst_saves_fr (unsigned long inst)
c906108c 1509{
1777feb0 1510 /* Is this an FSTD? */
c906108c 1511 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1512 return hppa_extract_5r_store (inst);
7be570e7 1513 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1514 return hppa_extract_5R_store (inst);
1777feb0 1515 /* Is this an FSTW? */
c906108c 1516 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1517 return hppa_extract_5r_store (inst);
7be570e7 1518 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1519 return hppa_extract_5R_store (inst);
c906108c
SS
1520 return 0;
1521}
1522
1523/* Advance PC across any function entry prologue instructions
1777feb0 1524 to reach some "real" code.
c906108c
SS
1525
1526 Use information in the unwind table to determine what exactly should
1527 be in the prologue. */
1528
1529
a71f8c30 1530static CORE_ADDR
be8626e0
MD
1531skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1532 int stop_before_branch)
c906108c 1533{
e17a4113 1534 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1535 gdb_byte buf[4];
c906108c
SS
1536 CORE_ADDR orig_pc = pc;
1537 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1538 unsigned long args_stored, status, i, restart_gr, restart_fr;
1539 struct unwind_table_entry *u;
a71f8c30 1540 int final_iteration;
c906108c
SS
1541
1542 restart_gr = 0;
1543 restart_fr = 0;
1544
1545restart:
1546 u = find_unwind_entry (pc);
1547 if (!u)
1548 return pc;
1549
1777feb0 1550 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1551 if ((pc & ~0x3) != u->region_start)
1552 return pc;
1553
1554 /* This is how much of a frame adjustment we need to account for. */
1555 stack_remaining = u->Total_frame_size << 3;
1556
1557 /* Magic register saves we want to know about. */
1558 save_rp = u->Save_RP;
1559 save_sp = u->Save_SP;
1560
1561 /* An indication that args may be stored into the stack. Unfortunately
1562 the HPUX compilers tend to set this in cases where no args were
1563 stored too!. */
1564 args_stored = 1;
1565
1566 /* Turn the Entry_GR field into a bitmask. */
1567 save_gr = 0;
1568 for (i = 3; i < u->Entry_GR + 3; i++)
1569 {
1570 /* Frame pointer gets saved into a special location. */
eded0a31 1571 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1572 continue;
1573
1574 save_gr |= (1 << i);
1575 }
1576 save_gr &= ~restart_gr;
1577
1578 /* Turn the Entry_FR field into a bitmask too. */
1579 save_fr = 0;
1580 for (i = 12; i < u->Entry_FR + 12; i++)
1581 save_fr |= (1 << i);
1582 save_fr &= ~restart_fr;
1583
a71f8c30
RC
1584 final_iteration = 0;
1585
c906108c
SS
1586 /* Loop until we find everything of interest or hit a branch.
1587
1588 For unoptimized GCC code and for any HP CC code this will never ever
1589 examine any user instructions.
1590
85102364 1591 For optimized GCC code we're faced with problems. GCC will schedule
c906108c
SS
1592 its prologue and make prologue instructions available for delay slot
1593 filling. The end result is user code gets mixed in with the prologue
1594 and a prologue instruction may be in the delay slot of the first branch
1595 or call.
1596
1597 Some unexpected things are expected with debugging optimized code, so
1598 we allow this routine to walk past user instructions in optimized
1599 GCC code. */
1600 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1601 || args_stored)
1602 {
1603 unsigned int reg_num;
1604 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1605 unsigned long old_save_rp, old_save_sp, next_inst;
1606
1607 /* Save copies of all the triggers so we can compare them later
dda83cd7 1608 (only for HPC). */
c906108c
SS
1609 old_save_gr = save_gr;
1610 old_save_fr = save_fr;
1611 old_save_rp = save_rp;
1612 old_save_sp = save_sp;
1613 old_stack_remaining = stack_remaining;
1614
8defab1a 1615 status = target_read_memory (pc, buf, 4);
e17a4113 1616 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1617
c906108c
SS
1618 /* Yow! */
1619 if (status != 0)
1620 return pc;
1621
1622 /* Note the interesting effects of this instruction. */
1623 stack_remaining -= prologue_inst_adjust_sp (inst);
1624
7be570e7
JM
1625 /* There are limited ways to store the return pointer into the
1626 stack. */
c4c79048 1627 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1628 save_rp = 0;
1629
104c1213 1630 /* These are the only ways we save SP into the stack. At this time
dda83cd7 1631 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1632 if ((inst & 0xffffc000) == 0x6fc10000
1633 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1634 save_sp = 0;
1635
6426a772 1636 /* Are we loading some register with an offset from the argument
dda83cd7 1637 pointer? */
6426a772
JM
1638 if ((inst & 0xffe00000) == 0x37a00000
1639 || (inst & 0xffffffe0) == 0x081d0240)
1640 {
1641 pc += 4;
1642 continue;
1643 }
1644
c906108c
SS
1645 /* Account for general and floating-point register saves. */
1646 reg_num = inst_saves_gr (inst);
1647 save_gr &= ~(1 << reg_num);
1648
1649 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1650 Unfortunately args_stored only tells us that some arguments
1651 where stored into the stack. Not how many or what kind!
c906108c 1652
dda83cd7
SM
1653 This is a kludge as on the HP compiler sets this bit and it
1654 never does prologue scheduling. So once we see one, skip past
1655 all of them. We have similar code for the fp arg stores below.
c906108c 1656
dda83cd7
SM
1657 FIXME. Can still die if we have a mix of GR and FR argument
1658 stores! */
be8626e0 1659 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1660 && reg_num <= 26)
c906108c 1661 {
be8626e0 1662 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1663 && reg_num <= 26)
c906108c
SS
1664 {
1665 pc += 4;
8defab1a 1666 status = target_read_memory (pc, buf, 4);
e17a4113 1667 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1668 if (status != 0)
1669 return pc;
1670 reg_num = inst_saves_gr (inst);
1671 }
1672 args_stored = 0;
1673 continue;
1674 }
1675
1676 reg_num = inst_saves_fr (inst);
1677 save_fr &= ~(1 << reg_num);
1678
8defab1a 1679 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1680 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1681
c906108c
SS
1682 /* Yow! */
1683 if (status != 0)
1684 return pc;
1685
1686 /* We've got to be read to handle the ldo before the fp register
dda83cd7 1687 save. */
c906108c
SS
1688 if ((inst & 0xfc000000) == 0x34000000
1689 && inst_saves_fr (next_inst) >= 4
819844ad 1690 && inst_saves_fr (next_inst)
be8626e0 1691 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1692 {
1693 /* So we drop into the code below in a reasonable state. */
1694 reg_num = inst_saves_fr (next_inst);
1695 pc -= 4;
1696 }
1697
1698 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1699 This is a kludge as on the HP compiler sets this bit and it
1700 never does prologue scheduling. So once we see one, skip past
1701 all of them. */
819844ad 1702 if (reg_num >= 4
be8626e0 1703 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1704 {
819844ad
UW
1705 while (reg_num >= 4
1706 && reg_num
be8626e0 1707 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1708 {
1709 pc += 8;
8defab1a 1710 status = target_read_memory (pc, buf, 4);
e17a4113 1711 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1712 if (status != 0)
1713 return pc;
1714 if ((inst & 0xfc000000) != 0x34000000)
1715 break;
8defab1a 1716 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1717 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1718 if (status != 0)
1719 return pc;
1720 reg_num = inst_saves_fr (next_inst);
1721 }
1722 args_stored = 0;
1723 continue;
1724 }
1725
1726 /* Quit if we hit any kind of branch. This can happen if a prologue
dda83cd7 1727 instruction is in the delay slot of the first call/branch. */
a71f8c30 1728 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1729 break;
1730
1731 /* What a crock. The HP compilers set args_stored even if no
dda83cd7
SM
1732 arguments were stored into the stack (boo hiss). This could
1733 cause this code to then skip a bunch of user insns (up to the
1734 first branch).
1735
1736 To combat this we try to identify when args_stored was bogusly
1737 set and clear it. We only do this when args_stored is nonzero,
1738 all other resources are accounted for, and nothing changed on
1739 this pass. */
c906108c 1740 if (args_stored
c5aa993b 1741 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1742 && old_save_gr == save_gr && old_save_fr == save_fr
1743 && old_save_rp == save_rp && old_save_sp == save_sp
1744 && old_stack_remaining == stack_remaining)
1745 break;
c5aa993b 1746
c906108c
SS
1747 /* Bump the PC. */
1748 pc += 4;
a71f8c30
RC
1749
1750 /* !stop_before_branch, so also look at the insn in the delay slot
dda83cd7 1751 of the branch. */
a71f8c30
RC
1752 if (final_iteration)
1753 break;
1754 if (is_branch (inst))
1755 final_iteration = 1;
c906108c
SS
1756 }
1757
85102364 1758 /* We've got a tentative location for the end of the prologue. However
c906108c
SS
1759 because of limitations in the unwind descriptor mechanism we may
1760 have went too far into user code looking for the save of a register
1761 that does not exist. So, if there registers we expected to be saved
1762 but never were, mask them out and restart.
1763
1764 This should only happen in optimized code, and should be very rare. */
c5aa993b 1765 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1766 {
1767 pc = orig_pc;
1768 restart_gr = save_gr;
1769 restart_fr = save_fr;
1770 goto restart;
1771 }
1772
1773 return pc;
1774}
1775
1776
7be570e7
JM
1777/* Return the address of the PC after the last prologue instruction if
1778 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1779
1780static CORE_ADDR
fba45db2 1781after_prologue (CORE_ADDR pc)
c906108c
SS
1782{
1783 struct symtab_and_line sal;
1784 CORE_ADDR func_addr, func_end;
c906108c 1785
7be570e7
JM
1786 /* If we can not find the symbol in the partial symbol table, then
1787 there is no hope we can determine the function's start address
1788 with this code. */
c906108c 1789 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1790 return 0;
c906108c 1791
7be570e7 1792 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1793 sal = find_pc_line (func_addr, 0);
1794
7be570e7
JM
1795 /* There are only two cases to consider. First, the end of the source line
1796 is within the function bounds. In that case we return the end of the
1797 source line. Second is the end of the source line extends beyond the
1798 bounds of the current function. We need to use the slow code to
1777feb0 1799 examine instructions in that case.
c906108c 1800
7be570e7
JM
1801 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1802 the wrong thing to do. In fact, it should be entirely possible for this
1803 function to always return zero since the slow instruction scanning code
1804 is supposed to *always* work. If it does not, then it is a bug. */
1805 if (sal.end < func_end)
1806 return sal.end;
c5aa993b 1807 else
7be570e7 1808 return 0;
c906108c
SS
1809}
1810
1811/* To skip prologues, I use this predicate. Returns either PC itself
1812 if the code at PC does not look like a function prologue; otherwise
1777feb0 1813 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1814
1815 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1816 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1817 we might not want to skip all the insns because a prologue insn may
1818 appear in the delay slot of the first branch, and we don't want to
1819 skip over the branch in that case. */
c906108c 1820
8d153463 1821static CORE_ADDR
6093d2eb 1822hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1823{
c5aa993b 1824 CORE_ADDR post_prologue_pc;
c906108c 1825
c5aa993b
JM
1826 /* See if we can determine the end of the prologue via the symbol table.
1827 If so, then return either PC, or the PC after the prologue, whichever
1828 is greater. */
c906108c 1829
c5aa993b 1830 post_prologue_pc = after_prologue (pc);
c906108c 1831
7be570e7
JM
1832 /* If after_prologue returned a useful address, then use it. Else
1833 fall back on the instruction skipping code.
1834
1835 Some folks have claimed this causes problems because the breakpoint
1836 may be the first instruction of the prologue. If that happens, then
1837 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1838 if (post_prologue_pc != 0)
325fac50 1839 return std::max (pc, post_prologue_pc);
c5aa993b 1840 else
be8626e0 1841 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1842}
1843
29d375ac 1844/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1845
29d375ac 1846static struct unwind_table_entry *
227e86ad 1847hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1848{
227e86ad 1849 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1850
1851 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1852 result of get_frame_address_in_block implies a problem.
93d42b30 1853 The bits should have been removed earlier, before the return
c7ce8faa 1854 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1855 if it isn't, it should be fixed. Then this call can be
1856 removed. */
227e86ad 1857 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1858 return find_unwind_entry (pc);
1859}
1860
26d08f08
AC
1861struct hppa_frame_cache
1862{
1863 CORE_ADDR base;
098caef4 1864 trad_frame_saved_reg *saved_regs;
26d08f08
AC
1865};
1866
1867static struct hppa_frame_cache *
227e86ad 1868hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1869{
227e86ad 1870 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1871 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1872 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1873 struct hppa_frame_cache *cache;
1874 long saved_gr_mask;
1875 long saved_fr_mask;
26d08f08
AC
1876 long frame_size;
1877 struct unwind_table_entry *u;
9f7194c3 1878 CORE_ADDR prologue_end;
50b2f48a 1879 int fp_in_r1 = 0;
26d08f08
AC
1880 int i;
1881
369aa520
RC
1882 if (hppa_debug)
1883 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1884 frame_relative_level(this_frame));
369aa520 1885
26d08f08 1886 if ((*this_cache) != NULL)
369aa520
RC
1887 {
1888 if (hppa_debug)
dda83cd7
SM
1889 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1890 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1891 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1892 }
26d08f08
AC
1893 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1894 (*this_cache) = cache;
227e86ad 1895 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1896
1897 /* Yow! */
227e86ad 1898 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1899 if (!u)
369aa520
RC
1900 {
1901 if (hppa_debug)
dda83cd7 1902 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1903 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1904 }
26d08f08
AC
1905
1906 /* Turn the Entry_GR field into a bitmask. */
1907 saved_gr_mask = 0;
1908 for (i = 3; i < u->Entry_GR + 3; i++)
1909 {
1910 /* Frame pointer gets saved into a special location. */
eded0a31 1911 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1912 continue;
1913
1914 saved_gr_mask |= (1 << i);
1915 }
1916
1917 /* Turn the Entry_FR field into a bitmask too. */
1918 saved_fr_mask = 0;
1919 for (i = 12; i < u->Entry_FR + 12; i++)
1920 saved_fr_mask |= (1 << i);
1921
1922 /* Loop until we find everything of interest or hit a branch.
1923
1924 For unoptimized GCC code and for any HP CC code this will never ever
1925 examine any user instructions.
1926
1927 For optimized GCC code we're faced with problems. GCC will schedule
1928 its prologue and make prologue instructions available for delay slot
1929 filling. The end result is user code gets mixed in with the prologue
1930 and a prologue instruction may be in the delay slot of the first branch
1931 or call.
1932
1933 Some unexpected things are expected with debugging optimized code, so
1934 we allow this routine to walk past user instructions in optimized
1935 GCC code. */
1936 {
1937 int final_iteration = 0;
46acf081 1938 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1939 int looking_for_sp = u->Save_SP;
1940 int looking_for_rp = u->Save_RP;
1941 int fp_loc = -1;
9f7194c3 1942
a71f8c30 1943 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1944 skip_prologue_using_sal, in case we stepped into a function without
1945 symbol information. hppa_skip_prologue also bounds the returned
1946 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1947 function.
a71f8c30
RC
1948
1949 We used to call hppa_skip_prologue to find the end of the prologue,
1950 but if some non-prologue instructions get scheduled into the prologue,
1951 and the program is compiled with debug information, the "easy" way
1952 in hppa_skip_prologue will return a prologue end that is too early
1953 for us to notice any potential frame adjustments. */
d5c27f81 1954
ef02daa9
DJ
1955 /* We used to use get_frame_func to locate the beginning of the
1956 function to pass to skip_prologue. However, when objects are
1957 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1958 function (or 0). We can do better than that by using unwind records.
46acf081 1959 This only works if the Region_description of the unwind record
1777feb0 1960 indicates that it includes the entry point of the function.
46acf081
RC
1961 HP compilers sometimes generate unwind records for regions that
1962 do not include the entry or exit point of a function. GNU tools
1963 do not do this. */
1964
1965 if ((u->Region_description & 0x2) == 0)
1966 start_pc = u->region_start;
1967 else
227e86ad 1968 start_pc = get_frame_func (this_frame);
d5c27f81 1969
be8626e0 1970 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1971 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1972
1973 if (prologue_end != 0 && end_pc > prologue_end)
1974 end_pc = prologue_end;
1975
26d08f08 1976 frame_size = 0;
9f7194c3 1977
46acf081 1978 for (pc = start_pc;
26d08f08
AC
1979 ((saved_gr_mask || saved_fr_mask
1980 || looking_for_sp || looking_for_rp
1981 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1982 && pc < end_pc);
26d08f08
AC
1983 pc += 4)
1984 {
1985 int reg;
e362b510 1986 gdb_byte buf4[4];
4a302917
RC
1987 long inst;
1988
bdec2917 1989 if (!safe_frame_unwind_memory (this_frame, pc, buf4))
4a302917 1990 {
5af949e3
UW
1991 error (_("Cannot read instruction at %s."),
1992 paddress (gdbarch, pc));
9a3c8263 1993 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
1994 }
1995
e17a4113 1996 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1997
26d08f08
AC
1998 /* Note the interesting effects of this instruction. */
1999 frame_size += prologue_inst_adjust_sp (inst);
2000
2001 /* There are limited ways to store the return pointer into the
2002 stack. */
2003 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2004 {
2005 looking_for_rp = 0;
098caef4 2006 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
26d08f08 2007 }
dfaf8edb
MK
2008 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2009 {
2010 looking_for_rp = 0;
098caef4 2011 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24);
dfaf8edb 2012 }
c4c79048 2013 else if (inst == 0x0fc212c1
dda83cd7 2014 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2015 {
2016 looking_for_rp = 0;
098caef4 2017 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
26d08f08
AC
2018 }
2019
2020 /* Check to see if we saved SP into the stack. This also
2021 happens to indicate the location of the saved frame
2022 pointer. */
2023 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2024 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2025 {
2026 looking_for_sp = 0;
098caef4 2027 cache->saved_regs[HPPA_FP_REGNUM].set_addr (0);
26d08f08 2028 }
50b2f48a
RC
2029 else if (inst == 0x08030241) /* copy %r3, %r1 */
2030 {
2031 fp_in_r1 = 1;
2032 }
26d08f08
AC
2033
2034 /* Account for general and floating-point register saves. */
2035 reg = inst_saves_gr (inst);
2036 if (reg >= 3 && reg <= 18
eded0a31 2037 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2038 {
2039 saved_gr_mask &= ~(1 << reg);
abc485a1 2040 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2041 /* stwm with a positive displacement is a _post_
2042 _modify_. */
098caef4 2043 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2044 else if ((inst & 0xfc00000c) == 0x70000008)
2045 /* A std has explicit post_modify forms. */
098caef4 2046 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2047 else
2048 {
2049 CORE_ADDR offset;
2050
2051 if ((inst >> 26) == 0x1c)
66c6502d 2052 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2053 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2054 else if ((inst >> 26) == 0x03)
abc485a1 2055 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2056 else
abc485a1 2057 offset = hppa_extract_14 (inst);
26d08f08
AC
2058
2059 /* Handle code with and without frame pointers. */
2060 if (u->Save_SP)
098caef4 2061 cache->saved_regs[reg].set_addr (offset);
26d08f08 2062 else
098caef4
LM
2063 cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3)
2064 + offset);
26d08f08
AC
2065 }
2066 }
2067
2068 /* GCC handles callee saved FP regs a little differently.
2069
2070 It emits an instruction to put the value of the start of
2071 the FP store area into %r1. It then uses fstds,ma with a
2072 basereg of %r1 for the stores.
2073
2074 HP CC emits them at the current stack pointer modifying the
2075 stack pointer as it stores each register. */
2076
2077 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2078 if ((inst & 0xffffc000) == 0x34610000
2079 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2080 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2081
2082 reg = inst_saves_fr (inst);
2083 if (reg >= 12 && reg <= 21)
2084 {
2085 /* Note +4 braindamage below is necessary because the FP
2086 status registers are internally 8 registers rather than
2087 the expected 4 registers. */
2088 saved_fr_mask &= ~(1 << reg);
2089 if (fp_loc == -1)
2090 {
2091 /* 1st HP CC FP register store. After this
2092 instruction we've set enough state that the GCC and
2093 HPCC code are both handled in the same manner. */
098caef4 2094 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0);
26d08f08
AC
2095 fp_loc = 8;
2096 }
2097 else
2098 {
098caef4 2099 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc);
26d08f08
AC
2100 fp_loc += 8;
2101 }
2102 }
2103
1777feb0 2104 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2105 if (final_iteration)
2106 break;
2107 /* We want to look precisely one instruction beyond the branch
2108 if we have not found everything yet. */
2109 if (is_branch (inst))
2110 final_iteration = 1;
2111 }
2112 }
2113
2114 {
2115 /* The frame base always represents the value of %sp at entry to
2116 the current function (and is thus equivalent to the "saved"
2117 stack pointer. */
227e86ad 2118 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
dda83cd7 2119 HPPA_SP_REGNUM);
ed70ba00 2120 CORE_ADDR fp;
9f7194c3
RC
2121
2122 if (hppa_debug)
5af949e3 2123 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
dda83cd7
SM
2124 "prologue_end=%s) ",
2125 paddress (gdbarch, this_sp),
5af949e3
UW
2126 paddress (gdbarch, get_frame_pc (this_frame)),
2127 paddress (gdbarch, prologue_end));
9f7194c3 2128
ed70ba00 2129 /* Check to see if a frame pointer is available, and use it for
dda83cd7 2130 frame unwinding if it is.
ed70ba00 2131
dda83cd7
SM
2132 There are some situations where we need to rely on the frame
2133 pointer to do stack unwinding. For example, if a function calls
2134 alloca (), the stack pointer can get adjusted inside the body of
2135 the function. In this case, the ABI requires that the compiler
2136 maintain a frame pointer for the function.
ed70ba00 2137
dda83cd7
SM
2138 The unwind record has a flag (alloca_frame) that indicates that
2139 a function has a variable frame; unfortunately, gcc/binutils
2140 does not set this flag. Instead, whenever a frame pointer is used
2141 and saved on the stack, the Save_SP flag is set. We use this to
2142 decide whether to use the frame pointer for unwinding.
ed70ba00 2143
dda83cd7 2144 TODO: For the HP compiler, maybe we should use the alloca_frame flag
ed70ba00
RC
2145 instead of Save_SP. */
2146
227e86ad 2147 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2148
6fcecea0 2149 if (u->alloca_frame)
46acf081 2150 fp -= u->Total_frame_size << 3;
ed70ba00 2151
227e86ad 2152 if (get_frame_pc (this_frame) >= prologue_end
dda83cd7 2153 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00 2154 {
24b21115 2155 cache->base = fp;
ed70ba00 2156
24b21115 2157 if (hppa_debug)
5af949e3
UW
2158 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2159 paddress (gdbarch, cache->base));
ed70ba00 2160 }
1658da49 2161 else if (u->Save_SP
a9a87d35 2162 && cache->saved_regs[HPPA_SP_REGNUM].is_addr ())
9f7194c3 2163 {
dda83cd7 2164 /* Both we're expecting the SP to be saved and the SP has been
9f7194c3
RC
2165 saved. The entry SP value is saved at this frame's SP
2166 address. */
dda83cd7 2167 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2168
2169 if (hppa_debug)
5af949e3 2170 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
dda83cd7 2171 paddress (gdbarch, cache->base));
9f7194c3 2172 }
26d08f08 2173 else
9f7194c3 2174 {
dda83cd7 2175 /* The prologue has been slowly allocating stack space. Adjust
1658da49 2176 the SP back. */
dda83cd7 2177 cache->base = this_sp - frame_size;
9f7194c3 2178 if (hppa_debug)
5af949e3
UW
2179 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2180 paddress (gdbarch, cache->base));
9f7194c3
RC
2181
2182 }
a9a87d35 2183 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
26d08f08
AC
2184 }
2185
412275d5
AC
2186 /* The PC is found in the "return register", "Millicode" uses "r31"
2187 as the return register while normal code uses "rp". */
26d08f08 2188 if (u->Millicode)
9f7194c3 2189 {
a9a87d35 2190 if (cache->saved_regs[31].is_addr ())
dda83cd7
SM
2191 {
2192 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
9ed5ba24
RC
2193 if (hppa_debug)
2194 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
dda83cd7 2195 }
9f7194c3
RC
2196 else
2197 {
227e86ad 2198 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
a9a87d35 2199 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (r31);
9ed5ba24
RC
2200 if (hppa_debug)
2201 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
dda83cd7 2202 }
9f7194c3 2203 }
26d08f08 2204 else
9f7194c3 2205 {
a9a87d35 2206 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
dda83cd7
SM
2207 {
2208 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
9ed5ba24
RC
2209 cache->saved_regs[HPPA_RP_REGNUM];
2210 if (hppa_debug)
2211 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
dda83cd7 2212 }
9f7194c3
RC
2213 else
2214 {
227e86ad 2215 ULONGEST rp = get_frame_register_unsigned (this_frame,
dda83cd7 2216 HPPA_RP_REGNUM);
a9a87d35 2217 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
9ed5ba24
RC
2218 if (hppa_debug)
2219 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2220 }
2221 }
26d08f08 2222
50b2f48a
RC
2223 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2224 frame. However, there is a one-insn window where we haven't saved it
2225 yet, but we've already clobbered it. Detect this case and fix it up.
2226
2227 The prologue sequence for frame-pointer functions is:
2228 0: stw %rp, -20(%sp)
2229 4: copy %r3, %r1
2230 8: copy %sp, %r3
2231 c: stw,ma %r1, XX(%sp)
2232
2233 So if we are at offset c, the r3 value that we want is not yet saved
2234 on the stack, but it's been overwritten. The prologue analyzer will
2235 set fp_in_r1 when it sees the copy insn so we know to get the value
2236 from r1 instead. */
a9a87d35 2237 if (u->Save_SP && !cache->saved_regs[HPPA_FP_REGNUM].is_addr ()
50b2f48a
RC
2238 && fp_in_r1)
2239 {
227e86ad 2240 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
a9a87d35 2241 cache->saved_regs[HPPA_FP_REGNUM].set_value (r1);
50b2f48a 2242 }
1658da49 2243
26d08f08
AC
2244 {
2245 /* Convert all the offsets into addresses. */
2246 int reg;
65c5db89 2247 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08 2248 {
a9a87d35 2249 if (cache->saved_regs[reg].is_addr ())
098caef4
LM
2250 cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
2251 + cache->base);
26d08f08
AC
2252 }
2253 }
2254
f77a2124 2255 {
f77a2124
RC
2256 struct gdbarch_tdep *tdep;
2257
f77a2124
RC
2258 tdep = gdbarch_tdep (gdbarch);
2259
2260 if (tdep->unwind_adjust_stub)
227e86ad 2261 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2262 }
2263
369aa520 2264 if (hppa_debug)
5af949e3
UW
2265 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2266 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2267 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2268}
2269
2270static void
227e86ad
JB
2271hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2272 struct frame_id *this_id)
26d08f08 2273{
d5c27f81 2274 struct hppa_frame_cache *info;
d5c27f81
RC
2275 struct unwind_table_entry *u;
2276
227e86ad
JB
2277 info = hppa_frame_cache (this_frame, this_cache);
2278 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2279
2280 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2281}
2282
227e86ad
JB
2283static struct value *
2284hppa_frame_prev_register (struct frame_info *this_frame,
2285 void **this_cache, int regnum)
26d08f08 2286{
227e86ad
JB
2287 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2288
1777feb0
MS
2289 return hppa_frame_prev_register_helper (this_frame,
2290 info->saved_regs, regnum);
227e86ad
JB
2291}
2292
2293static int
2294hppa_frame_unwind_sniffer (const struct frame_unwind *self,
dda83cd7 2295 struct frame_info *this_frame, void **this_cache)
227e86ad
JB
2296{
2297 if (hppa_find_unwind_entry_in_block (this_frame))
2298 return 1;
2299
2300 return 0;
0da28f8a
RC
2301}
2302
2303static const struct frame_unwind hppa_frame_unwind =
2304{
a154d838 2305 "hppa unwind table",
0da28f8a 2306 NORMAL_FRAME,
8fbca658 2307 default_frame_unwind_stop_reason,
0da28f8a 2308 hppa_frame_this_id,
227e86ad
JB
2309 hppa_frame_prev_register,
2310 NULL,
2311 hppa_frame_unwind_sniffer
0da28f8a
RC
2312};
2313
0da28f8a
RC
2314/* This is a generic fallback frame unwinder that kicks in if we fail all
2315 the other ones. Normally we would expect the stub and regular unwinder
2316 to work, but in some cases we might hit a function that just doesn't
2317 have any unwind information available. In this case we try to do
2318 unwinding solely based on code reading. This is obviously going to be
2319 slow, so only use this as a last resort. Currently this will only
2320 identify the stack and pc for the frame. */
2321
2322static struct hppa_frame_cache *
227e86ad 2323hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2324{
e17a4113
UW
2325 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2326 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2327 struct hppa_frame_cache *cache;
4ba6a975
MK
2328 unsigned int frame_size = 0;
2329 int found_rp = 0;
2330 CORE_ADDR start_pc;
0da28f8a 2331
d5c27f81 2332 if (hppa_debug)
4ba6a975
MK
2333 fprintf_unfiltered (gdb_stdlog,
2334 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2335 frame_relative_level (this_frame));
d5c27f81 2336
0da28f8a
RC
2337 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2338 (*this_cache) = cache;
227e86ad 2339 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2340
227e86ad 2341 start_pc = get_frame_func (this_frame);
4ba6a975 2342 if (start_pc)
0da28f8a 2343 {
227e86ad 2344 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2345 CORE_ADDR pc;
0da28f8a 2346
4ba6a975
MK
2347 for (pc = start_pc; pc < cur_pc; pc += 4)
2348 {
2349 unsigned int insn;
0da28f8a 2350
e17a4113 2351 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2352 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2353
4ba6a975
MK
2354 /* There are limited ways to store the return pointer into the
2355 stack. */
2356 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2357 {
098caef4 2358 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
4ba6a975
MK
2359 found_rp = 1;
2360 }
c4c79048 2361 else if (insn == 0x0fc212c1
dda83cd7 2362 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975 2363 {
098caef4 2364 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
4ba6a975
MK
2365 found_rp = 1;
2366 }
2367 }
412275d5 2368 }
0da28f8a 2369
d5c27f81 2370 if (hppa_debug)
4ba6a975
MK
2371 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2372 frame_size, found_rp);
d5c27f81 2373
227e86ad 2374 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2375 cache->base -= frame_size;
a9a87d35 2376 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
0da28f8a 2377
a9a87d35 2378 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
0da28f8a 2379 {
098caef4
LM
2380 cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr ()
2381 + cache->base);
4ba6a975
MK
2382 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2383 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2384 }
412275d5
AC
2385 else
2386 {
4ba6a975 2387 ULONGEST rp;
227e86ad 2388 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
a9a87d35 2389 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
412275d5 2390 }
0da28f8a
RC
2391
2392 return cache;
26d08f08
AC
2393}
2394
0da28f8a 2395static void
227e86ad 2396hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2397 struct frame_id *this_id)
2398{
2399 struct hppa_frame_cache *info =
227e86ad
JB
2400 hppa_fallback_frame_cache (this_frame, this_cache);
2401
2402 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2403}
2404
227e86ad
JB
2405static struct value *
2406hppa_fallback_frame_prev_register (struct frame_info *this_frame,
dda83cd7 2407 void **this_cache, int regnum)
0da28f8a 2408{
1777feb0
MS
2409 struct hppa_frame_cache *info
2410 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2411
1777feb0
MS
2412 return hppa_frame_prev_register_helper (this_frame,
2413 info->saved_regs, regnum);
0da28f8a
RC
2414}
2415
2416static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08 2417{
a154d838 2418 "hppa prologue",
26d08f08 2419 NORMAL_FRAME,
8fbca658 2420 default_frame_unwind_stop_reason,
0da28f8a 2421 hppa_fallback_frame_this_id,
227e86ad
JB
2422 hppa_fallback_frame_prev_register,
2423 NULL,
2424 default_frame_sniffer
26d08f08
AC
2425};
2426
7f07c5b6
RC
2427/* Stub frames, used for all kinds of call stubs. */
2428struct hppa_stub_unwind_cache
2429{
2430 CORE_ADDR base;
098caef4 2431 trad_frame_saved_reg *saved_regs;
7f07c5b6
RC
2432};
2433
2434static struct hppa_stub_unwind_cache *
227e86ad 2435hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2436 void **this_cache)
2437{
7f07c5b6
RC
2438 struct hppa_stub_unwind_cache *info;
2439
2440 if (*this_cache)
9a3c8263 2441 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2442
2443 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2444 *this_cache = info;
227e86ad 2445 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2446
227e86ad 2447 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2448
22b0923d 2449 /* By default we assume that stubs do not change the rp. */
098caef4 2450 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM);
22b0923d 2451
7f07c5b6
RC
2452 return info;
2453}
2454
2455static void
227e86ad 2456hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2457 void **this_prologue_cache,
2458 struct frame_id *this_id)
2459{
2460 struct hppa_stub_unwind_cache *info
227e86ad 2461 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2462
2463 if (info)
227e86ad 2464 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2465}
2466
227e86ad
JB
2467static struct value *
2468hppa_stub_frame_prev_register (struct frame_info *this_frame,
2469 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2470{
2471 struct hppa_stub_unwind_cache *info
227e86ad 2472 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2473
227e86ad 2474 if (info == NULL)
8a3fe4f8 2475 error (_("Requesting registers from null frame."));
7f07c5b6 2476
1777feb0
MS
2477 return hppa_frame_prev_register_helper (this_frame,
2478 info->saved_regs, regnum);
227e86ad 2479}
7f07c5b6 2480
227e86ad
JB
2481static int
2482hppa_stub_unwind_sniffer (const struct frame_unwind *self,
dda83cd7
SM
2483 struct frame_info *this_frame,
2484 void **this_cache)
7f07c5b6 2485{
227e86ad
JB
2486 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2487 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2488 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2489
6d1be3f1 2490 if (pc == 0
84674fe1 2491 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2492 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2493 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2494 return 1;
2495 return 0;
7f07c5b6
RC
2496}
2497
227e86ad 2498static const struct frame_unwind hppa_stub_frame_unwind = {
a154d838 2499 "hppa stub",
227e86ad 2500 NORMAL_FRAME,
8fbca658 2501 default_frame_unwind_stop_reason,
227e86ad
JB
2502 hppa_stub_frame_this_id,
2503 hppa_stub_frame_prev_register,
2504 NULL,
2505 hppa_stub_unwind_sniffer
2506};
2507
cc72850f 2508CORE_ADDR
26d08f08
AC
2509hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2510{
fe46cd3a
RC
2511 ULONGEST ipsw;
2512 CORE_ADDR pc;
2513
cc72850f
MK
2514 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2515 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2516
2517 /* If the current instruction is nullified, then we are effectively
2518 still executing the previous instruction. Pretend we are still
cc72850f
MK
2519 there. This is needed when single stepping; if the nullified
2520 instruction is on a different line, we don't want GDB to think
2521 we've stepped onto that line. */
fe46cd3a
RC
2522 if (ipsw & 0x00200000)
2523 pc -= 4;
2524
cc72850f 2525 return pc & ~0x3;
26d08f08
AC
2526}
2527
ff644745
JB
2528/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2529 Return NULL if no such symbol was found. */
2530
3b7344d5 2531struct bound_minimal_symbol
ff644745 2532hppa_lookup_stub_minimal_symbol (const char *name,
dda83cd7 2533 enum unwind_stub_types stub_type)
ff644745 2534{
3b7344d5 2535 struct bound_minimal_symbol result = { NULL, NULL };
ff644745 2536
2030c079 2537 for (objfile *objfile : current_program_space->objfiles ())
ff644745 2538 {
7932255d 2539 for (minimal_symbol *msym : objfile->msymbols ())
5325b9bf 2540 {
c9d95fa3 2541 if (strcmp (msym->linkage_name (), name) == 0)
3b7344d5 2542 {
5325b9bf
TT
2543 struct unwind_table_entry *u;
2544
2545 u = find_unwind_entry (MSYMBOL_VALUE (msym));
2546 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2547 {
2548 result.objfile = objfile;
2549 result.minsym = msym;
2550 return result;
2551 }
3b7344d5 2552 }
5325b9bf 2553 }
ff644745
JB
2554 }
2555
3b7344d5 2556 return result;
ff644745
JB
2557}
2558
c906108c 2559static void
c482f52c 2560unwind_command (const char *exp, int from_tty)
c906108c
SS
2561{
2562 CORE_ADDR address;
2563 struct unwind_table_entry *u;
2564
2565 /* If we have an expression, evaluate it and use it as the address. */
2566
2567 if (exp != 0 && *exp != 0)
2568 address = parse_and_eval_address (exp);
2569 else
2570 return;
2571
2572 u = find_unwind_entry (address);
2573
2574 if (!u)
2575 {
2576 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2577 return;
2578 }
2579
3329c4b5 2580 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2581
5af949e3 2582 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
c906108c 2583
5af949e3 2584 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
c906108c 2585
c906108c 2586#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2587
2588 printf_unfiltered ("\n\tflags =");
2589 pif (Cannot_unwind);
2590 pif (Millicode);
2591 pif (Millicode_save_sr0);
2592 pif (Entry_SR);
2593 pif (Args_stored);
2594 pif (Variable_Frame);
2595 pif (Separate_Package_Body);
2596 pif (Frame_Extension_Millicode);
2597 pif (Stack_Overflow_Check);
2598 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2599 pif (sr4export);
2600 pif (cxx_info);
2601 pif (cxx_try_catch);
2602 pif (sched_entry_seq);
c906108c
SS
2603 pif (Save_SP);
2604 pif (Save_RP);
2605 pif (Save_MRP_in_frame);
6fcecea0 2606 pif (save_r19);
c906108c
SS
2607 pif (Cleanup_defined);
2608 pif (MPE_XL_interrupt_marker);
2609 pif (HP_UX_interrupt_marker);
2610 pif (Large_frame);
6fcecea0 2611 pif (alloca_frame);
c906108c
SS
2612
2613 putchar_unfiltered ('\n');
2614
c906108c 2615#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2616
2617 pin (Region_description);
2618 pin (Entry_FR);
2619 pin (Entry_GR);
2620 pin (Total_frame_size);
57dac9e1
RC
2621
2622 if (u->stub_unwind.stub_type)
2623 {
2624 printf_unfiltered ("\tstub type = ");
2625 switch (u->stub_unwind.stub_type)
dda83cd7 2626 {
57dac9e1
RC
2627 case LONG_BRANCH:
2628 printf_unfiltered ("long branch\n");
2629 break;
2630 case PARAMETER_RELOCATION:
2631 printf_unfiltered ("parameter relocation\n");
2632 break;
2633 case EXPORT:
2634 printf_unfiltered ("export\n");
2635 break;
2636 case IMPORT:
2637 printf_unfiltered ("import\n");
2638 break;
2639 case IMPORT_SHLIB:
2640 printf_unfiltered ("import shlib\n");
2641 break;
2642 default:
2643 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2644 }
2645 }
c906108c 2646}
c906108c 2647
38ca4e0c
MK
2648/* Return the GDB type object for the "standard" data type of data in
2649 register REGNUM. */
d709c020 2650
eded0a31 2651static struct type *
38ca4e0c 2652hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2653{
38ca4e0c 2654 if (regnum < HPPA_FP4_REGNUM)
df4df182 2655 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2656 else
27067745 2657 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2658}
2659
eded0a31 2660static struct type *
38ca4e0c 2661hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2662{
38ca4e0c 2663 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2664 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2665 else
27067745 2666 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2667}
2668
38ca4e0c
MK
2669/* Return non-zero if REGNUM is not a register available to the user
2670 through ptrace/ttrace. */
d709c020 2671
8d153463 2672static int
64a3914f 2673hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2674{
2675 return (regnum == 0
dda83cd7
SM
2676 || regnum == HPPA_PCSQ_HEAD_REGNUM
2677 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2678 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2679}
d709c020 2680
d037d088 2681static int
64a3914f 2682hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2683{
2684 /* cr26 and cr27 are readable (but not writable) from userspace. */
2685 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2686 return 0;
2687 else
64a3914f 2688 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2689}
2690
38ca4e0c 2691static int
64a3914f 2692hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2693{
2694 return (regnum == 0
dda83cd7
SM
2695 || regnum == HPPA_PCSQ_HEAD_REGNUM
2696 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2697 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2698}
2699
d037d088 2700static int
64a3914f 2701hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2702{
2703 /* cr26 and cr27 are readable (but not writable) from userspace. */
2704 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2705 return 0;
2706 else
64a3914f 2707 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2708}
2709
8d153463 2710static CORE_ADDR
85ddcc70 2711hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2712{
2713 /* The low two bits of the PC on the PA contain the privilege level.
2714 Some genius implementing a (non-GCC) compiler apparently decided
2715 this means that "addresses" in a text section therefore include a
2716 privilege level, and thus symbol tables should contain these bits.
2717 This seems like a bonehead thing to do--anyway, it seems to work
2718 for our purposes to just ignore those bits. */
2719
2720 return (addr &= ~0x3);
2721}
2722
e127f0db
MK
2723/* Get the ARGIth function argument for the current function. */
2724
4a302917 2725static CORE_ADDR
143985b7
AF
2726hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2727 struct type *type)
2728{
e127f0db 2729 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2730}
2731
05d1431c 2732static enum register_status
849d0ba8 2733hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2734 int regnum, gdb_byte *buf)
0f8d9d59 2735{
05d1431c
PA
2736 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2737 ULONGEST tmp;
2738 enum register_status status;
0f8d9d59 2739
03f50fc8 2740 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2741 if (status == REG_VALID)
2742 {
2743 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2744 tmp &= ~0x3;
2745 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2746 }
2747 return status;
0f8d9d59
RC
2748}
2749
d49771ef 2750static CORE_ADDR
e38c262f 2751hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2752{
2753 return 0;
2754}
2755
227e86ad
JB
2756struct value *
2757hppa_frame_prev_register_helper (struct frame_info *this_frame,
098caef4 2758 trad_frame_saved_reg saved_regs[],
227e86ad 2759 int regnum)
0da28f8a 2760{
227e86ad 2761 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2762 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2763
8693c419
MK
2764 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2765 {
227e86ad
JB
2766 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2767 CORE_ADDR pc;
2768 struct value *pcoq_val =
dda83cd7
SM
2769 trad_frame_get_prev_register (this_frame, saved_regs,
2770 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2771
e17a4113
UW
2772 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2773 size, byte_order);
227e86ad 2774 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2775 }
0da28f8a 2776
227e86ad 2777 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2778}
8693c419 2779\f
0da28f8a 2780
34f55018
MK
2781/* An instruction to match. */
2782struct insn_pattern
2783{
2784 unsigned int data; /* See if it matches this.... */
2785 unsigned int mask; /* ... with this mask. */
2786};
2787
2788/* See bfd/elf32-hppa.c */
2789static struct insn_pattern hppa_long_branch_stub[] = {
2790 /* ldil LR'xxx,%r1 */
2791 { 0x20200000, 0xffe00000 },
2792 /* be,n RR'xxx(%sr4,%r1) */
2793 { 0xe0202002, 0xffe02002 },
2794 { 0, 0 }
2795};
2796
2797static struct insn_pattern hppa_long_branch_pic_stub[] = {
2798 /* b,l .+8, %r1 */
2799 { 0xe8200000, 0xffe00000 },
2800 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2801 { 0x28200000, 0xffe00000 },
2802 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2803 { 0xe0202002, 0xffe02002 },
2804 { 0, 0 }
2805};
2806
2807static struct insn_pattern hppa_import_stub[] = {
2808 /* addil LR'xxx, %dp */
2809 { 0x2b600000, 0xffe00000 },
2810 /* ldw RR'xxx(%r1), %r21 */
2811 { 0x48350000, 0xffffb000 },
2812 /* bv %r0(%r21) */
2813 { 0xeaa0c000, 0xffffffff },
2814 /* ldw RR'xxx+4(%r1), %r19 */
2815 { 0x48330000, 0xffffb000 },
2816 { 0, 0 }
2817};
2818
2819static struct insn_pattern hppa_import_pic_stub[] = {
2820 /* addil LR'xxx,%r19 */
2821 { 0x2a600000, 0xffe00000 },
2822 /* ldw RR'xxx(%r1),%r21 */
2823 { 0x48350000, 0xffffb000 },
2824 /* bv %r0(%r21) */
2825 { 0xeaa0c000, 0xffffffff },
2826 /* ldw RR'xxx+4(%r1),%r19 */
2827 { 0x48330000, 0xffffb000 },
2828 { 0, 0 },
2829};
2830
2831static struct insn_pattern hppa_plt_stub[] = {
2832 /* b,l 1b, %r20 - 1b is 3 insns before here */
2833 { 0xea9f1fdd, 0xffffffff },
2834 /* depi 0,31,2,%r20 */
2835 { 0xd6801c1e, 0xffffffff },
2836 { 0, 0 }
34f55018
MK
2837};
2838
2839/* Maximum number of instructions on the patterns above. */
2840#define HPPA_MAX_INSN_PATTERN_LEN 4
2841
2842/* Return non-zero if the instructions at PC match the series
2843 described in PATTERN, or zero otherwise. PATTERN is an array of
2844 'struct insn_pattern' objects, terminated by an entry whose mask is
2845 zero.
2846
2847 When the match is successful, fill INSN[i] with what PATTERN[i]
2848 matched. */
2849
2850static int
e17a4113
UW
2851hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2852 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2853{
e17a4113 2854 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2855 CORE_ADDR npc = pc;
2856 int i;
2857
2858 for (i = 0; pattern[i].mask; i++)
2859 {
2860 gdb_byte buf[HPPA_INSN_SIZE];
2861
8defab1a 2862 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2863 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018 2864 if ((insn[i] & pattern[i].mask) == pattern[i].data)
dda83cd7 2865 npc += 4;
34f55018 2866 else
dda83cd7 2867 return 0;
34f55018
MK
2868 }
2869
2870 return 1;
2871}
2872
85102364 2873/* This relaxed version of the instruction matcher allows us to match
34f55018
MK
2874 from somewhere inside the pattern, by looking backwards in the
2875 instruction scheme. */
2876
2877static int
e17a4113
UW
2878hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2879 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2880{
2881 int offset, len = 0;
2882
2883 while (pattern[len].mask)
2884 len++;
2885
2886 for (offset = 0; offset < len; offset++)
e17a4113
UW
2887 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2888 pattern, insn))
34f55018
MK
2889 return 1;
2890
2891 return 0;
2892}
2893
2894static int
2895hppa_in_dyncall (CORE_ADDR pc)
2896{
2897 struct unwind_table_entry *u;
2898
2899 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2900 if (!u)
2901 return 0;
2902
2903 return (pc >= u->region_start && pc <= u->region_end);
2904}
2905
2906int
3e5d3a5a 2907hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2908{
2909 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2910 struct unwind_table_entry *u;
2911
3e5d3a5a 2912 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2913 return 1;
2914
2915 /* The GNU toolchain produces linker stubs without unwind
2916 information. Since the pattern matching for linker stubs can be
2917 quite slow, so bail out if we do have an unwind entry. */
2918
2919 u = find_unwind_entry (pc);
806e23c0 2920 if (u != NULL)
34f55018
MK
2921 return 0;
2922
e17a4113
UW
2923 return
2924 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2925 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2926 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2927 || hppa_match_insns_relaxed (gdbarch, pc,
2928 hppa_long_branch_pic_stub, insn));
34f55018
MK
2929}
2930
2931/* This code skips several kind of "trampolines" used on PA-RISC
2932 systems: $$dyncall, import stubs and PLT stubs. */
2933
2934CORE_ADDR
52f729a7 2935hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2936{
0dfff4cb
UW
2937 struct gdbarch *gdbarch = get_frame_arch (frame);
2938 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2939
34f55018
MK
2940 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2941 int dp_rel;
2942
2943 /* $$dyncall handles both PLABELs and direct addresses. */
2944 if (hppa_in_dyncall (pc))
2945 {
52f729a7 2946 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2947
2948 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2949 if (pc & 0x2)
0dfff4cb 2950 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2951
2952 return pc;
2953 }
2954
e17a4113
UW
2955 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2956 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2957 {
2958 /* Extract the target address from the addil/ldw sequence. */
2959 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2960
2961 if (dp_rel)
dda83cd7 2962 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2963 else
dda83cd7 2964 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2965
2966 /* fallthrough */
2967 }
2968
3e5d3a5a 2969 if (in_plt_section (pc))
34f55018 2970 {
0dfff4cb 2971 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2972
2973 /* If the PLT slot has not yet been resolved, the target will be
dda83cd7 2974 the PLT stub. */
3e5d3a5a 2975 if (in_plt_section (pc))
34f55018
MK
2976 {
2977 /* Sanity check: are we pointing to the PLT stub? */
24b21115 2978 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2979 {
5af949e3
UW
2980 warning (_("Cannot resolve PLT stub at %s."),
2981 paddress (gdbarch, pc));
34f55018
MK
2982 return 0;
2983 }
2984
2985 /* This should point to the fixup routine. */
0dfff4cb 2986 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2987 }
2988 }
2989
2990 return pc;
2991}
2992\f
2993
8e8b2dba
MC
2994/* Here is a table of C type sizes on hppa with various compiles
2995 and options. I measured this on PA 9000/800 with HP-UX 11.11
2996 and these compilers:
2997
2998 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2999 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3000 /opt/aCC/bin/aCC B3910B A.03.45
3001 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3002
3003 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3004 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3005 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3006 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3007 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3008 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3009 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3010 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3011
3012 Each line is:
3013
3014 compiler and options
3015 char, short, int, long, long long
3016 float, double, long double
3017 char *, void (*)()
3018
3019 So all these compilers use either ILP32 or LP64 model.
3020 TODO: gcc has more options so it needs more investigation.
3021
a2379359
MC
3022 For floating point types, see:
3023
3024 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3025 HP-UX floating-point guide, hpux 11.00
3026
8e8b2dba
MC
3027 -- chastain 2003-12-18 */
3028
e6e68f1f
JB
3029static struct gdbarch *
3030hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3031{
3ff7cf9e 3032 struct gdbarch_tdep *tdep;
e6e68f1f
JB
3033 struct gdbarch *gdbarch;
3034
3035 /* find a candidate among the list of pre-declared architectures. */
3036 arches = gdbarch_list_lookup_by_info (arches, &info);
3037 if (arches != NULL)
3038 return (arches->gdbarch);
3039
3040 /* If none found, then allocate and initialize one. */
41bf6aca 3041 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3042 gdbarch = gdbarch_alloc (&info, tdep);
3043
3044 /* Determine from the bfd_arch_info structure if we are dealing with
3045 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3046 then default to a 32bit machine. */
3047 if (info.bfd_arch_info != NULL)
3048 tdep->bytes_per_address =
3049 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3050 else
3051 tdep->bytes_per_address = 4;
3052
d49771ef
RC
3053 tdep->find_global_pointer = hppa_find_global_pointer;
3054
3ff7cf9e
JB
3055 /* Some parts of the gdbarch vector depend on whether we are running
3056 on a 32 bits or 64 bits target. */
3057 switch (tdep->bytes_per_address)
3058 {
3059 case 4:
dda83cd7
SM
3060 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3061 set_gdbarch_register_name (gdbarch, hppa32_register_name);
3062 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3063 set_gdbarch_cannot_store_register (gdbarch,
3064 hppa32_cannot_store_register);
3065 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3066 hppa32_cannot_fetch_register);
dda83cd7 3067 break;
3ff7cf9e 3068 case 8:
dda83cd7
SM
3069 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3070 set_gdbarch_register_name (gdbarch, hppa64_register_name);
3071 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3072 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3073 set_gdbarch_cannot_store_register (gdbarch,
3074 hppa64_cannot_store_register);
3075 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3076 hppa64_cannot_fetch_register);
dda83cd7 3077 break;
3ff7cf9e 3078 default:
dda83cd7
SM
3079 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3080 tdep->bytes_per_address);
3ff7cf9e
JB
3081 }
3082
3ff7cf9e 3083 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3084 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3085
8e8b2dba
MC
3086 /* The following gdbarch vector elements are the same in both ILP32
3087 and LP64, but might show differences some day. */
3088 set_gdbarch_long_long_bit (gdbarch, 64);
3089 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3090 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3091
3ff7cf9e
JB
3092 /* The following gdbarch vector elements do not depend on the address
3093 size, or in any other gdbarch element previously set. */
60383d10 3094 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3095 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3096 hppa_stack_frame_destroyed_p);
a2a84a72 3097 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3098 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3099 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3100 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3101 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3102 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3103 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3104
143985b7
AF
3105 /* Helper for function argument information. */
3106 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3107
3a3bc038
AC
3108 /* When a hardware watchpoint triggers, we'll move the inferior past
3109 it by removing all eventpoints; stepping past the instruction
3110 that caused the trigger; reinserting eventpoints; and checking
3111 whether any watched location changed. */
3112 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3113
5979bc46 3114 /* Inferior function call methods. */
fca7aa43 3115 switch (tdep->bytes_per_address)
5979bc46 3116 {
fca7aa43
AC
3117 case 4:
3118 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3119 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef 3120 set_gdbarch_convert_from_func_ptr_addr
dda83cd7 3121 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3122 break;
3123 case 8:
782eae8b
AC
3124 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3125 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3126 break;
782eae8b 3127 default:
e2e0b3e5 3128 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3129 }
3130
3131 /* Struct return methods. */
fca7aa43 3132 switch (tdep->bytes_per_address)
fad850b2 3133 {
fca7aa43
AC
3134 case 4:
3135 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3136 break;
3137 case 8:
782eae8b 3138 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3139 break;
fca7aa43 3140 default:
e2e0b3e5 3141 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3142 }
7f07c5b6 3143
04180708
YQ
3144 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3145 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3146 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3147
5979bc46 3148 /* Frame unwind methods. */
782eae8b 3149 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3150
50306a9d
RC
3151 /* Hook in ABI-specific overrides, if they have been registered. */
3152 gdbarch_init_osabi (info, gdbarch);
3153
7f07c5b6 3154 /* Hook in the default unwinders. */
227e86ad
JB
3155 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3156 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3157 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3158
e6e68f1f
JB
3159 return gdbarch;
3160}
3161
3162static void
464963c9 3163hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3164{
464963c9 3165 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3166
3167 fprintf_unfiltered (file, "bytes_per_address = %d\n",
dda83cd7 3168 tdep->bytes_per_address);
fdd72f95 3169 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3170}
3171
6c265988 3172void _initialize_hppa_tdep ();
4facf7e8 3173void
6c265988 3174_initialize_hppa_tdep ()
4facf7e8 3175{
e6e68f1f 3176 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8
JB
3177
3178 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3179 _("Print unwind table entry at given address."),
4facf7e8
JB
3180 &maintenanceprintlist);
3181
1777feb0 3182 /* Debug this files internals. */
7915a72c
AC
3183 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3184Set whether hppa target specific debugging information should be displayed."),
3185 _("\
3186Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3187This flag controls whether hppa target specific debugging information is\n\
3188displayed. This information is particularly useful for debugging frame\n\
7915a72c 3189unwinding problems."),
2c5b56ce 3190 NULL,
7915a72c 3191 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3192 &setdebuglist, &showdebuglist);
4facf7e8 3193}
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