* hppa-tdep.c (internalize_unwinds): Use objfile architecture
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
6aba47ca 3 Copyright (C) 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
9b254dd1 4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
a7aad9aa 5 Free Software Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
a9762ec7 14 the Free Software Foundation; either version 3 of the License, or
c5aa993b 15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b 22 You should have received a copy of the GNU General Public License
a9762ec7 23 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
24
25#include "defs.h"
c906108c
SS
26#include "bfd.h"
27#include "inferior.h"
4e052eda 28#include "regcache.h"
e5d66720 29#include "completer.h"
59623e27 30#include "osabi.h"
a7ff40e7 31#include "gdb_assert.h"
343af405 32#include "arch-utils.h"
c906108c
SS
33/* For argument passing to the inferior */
34#include "symtab.h"
fde2cceb 35#include "dis-asm.h"
26d08f08
AC
36#include "trad-frame.h"
37#include "frame-unwind.h"
38#include "frame-base.h"
c906108c 39
c906108c
SS
40#include "gdbcore.h"
41#include "gdbcmd.h"
e6bb342a 42#include "gdbtypes.h"
c906108c 43#include "objfiles.h"
3ff7cf9e 44#include "hppa-tdep.h"
c906108c 45
369aa520
RC
46static int hppa_debug = 0;
47
60383d10 48/* Some local constants. */
3ff7cf9e
JB
49static const int hppa32_num_regs = 128;
50static const int hppa64_num_regs = 96;
51
7c46b9fb
RC
52/* hppa-specific object data -- unwind and solib info.
53 TODO/maybe: think about splitting this into two parts; the unwind data is
54 common to all hppa targets, but is only used in this file; we can register
55 that separately and make this static. The solib data is probably hpux-
56 specific, so we can create a separate extern objfile_data that is registered
57 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
58const struct objfile_data *hppa_objfile_priv_data = NULL;
59
e2ac8128
JB
60/* Get at various relevent fields of an instruction word. */
61#define MASK_5 0x1f
62#define MASK_11 0x7ff
63#define MASK_14 0x3fff
64#define MASK_21 0x1fffff
65
e2ac8128
JB
66/* Sizes (in bytes) of the native unwind entries. */
67#define UNWIND_ENTRY_SIZE 16
68#define STUB_UNWIND_ENTRY_SIZE 8
69
c906108c
SS
70/* Routines to extract various sized constants out of hppa
71 instructions. */
72
73/* This assumes that no garbage lies outside of the lower bits of
74 value. */
75
abc485a1
RC
76int
77hppa_sign_extend (unsigned val, unsigned bits)
c906108c 78{
c5aa993b 79 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
80}
81
82/* For many immediate values the sign bit is the low bit! */
83
abc485a1
RC
84int
85hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 86{
c5aa993b 87 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
88}
89
e2ac8128
JB
90/* Extract the bits at positions between FROM and TO, using HP's numbering
91 (MSB = 0). */
92
abc485a1
RC
93int
94hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
95{
96 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
97}
98
c906108c
SS
99/* extract the immediate field from a ld{bhw}s instruction */
100
abc485a1
RC
101int
102hppa_extract_5_load (unsigned word)
c906108c 103{
abc485a1 104 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
105}
106
c906108c
SS
107/* extract the immediate field from a break instruction */
108
abc485a1
RC
109unsigned
110hppa_extract_5r_store (unsigned word)
c906108c
SS
111{
112 return (word & MASK_5);
113}
114
115/* extract the immediate field from a {sr}sm instruction */
116
abc485a1
RC
117unsigned
118hppa_extract_5R_store (unsigned word)
c906108c
SS
119{
120 return (word >> 16 & MASK_5);
121}
122
c906108c
SS
123/* extract a 14 bit immediate field */
124
abc485a1
RC
125int
126hppa_extract_14 (unsigned word)
c906108c 127{
abc485a1 128 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
129}
130
c906108c
SS
131/* extract a 21 bit constant */
132
abc485a1
RC
133int
134hppa_extract_21 (unsigned word)
c906108c
SS
135{
136 int val;
137
138 word &= MASK_21;
139 word <<= 11;
abc485a1 140 val = hppa_get_field (word, 20, 20);
c906108c 141 val <<= 11;
abc485a1 142 val |= hppa_get_field (word, 9, 19);
c906108c 143 val <<= 2;
abc485a1 144 val |= hppa_get_field (word, 5, 6);
c906108c 145 val <<= 5;
abc485a1 146 val |= hppa_get_field (word, 0, 4);
c906108c 147 val <<= 2;
abc485a1
RC
148 val |= hppa_get_field (word, 7, 8);
149 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
150}
151
c906108c
SS
152/* extract a 17 bit constant from branch instructions, returning the
153 19 bit signed value. */
154
abc485a1
RC
155int
156hppa_extract_17 (unsigned word)
c906108c 157{
abc485a1
RC
158 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
159 hppa_get_field (word, 29, 29) << 10 |
160 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
161 (word & 0x1) << 16, 17) << 2;
162}
3388d7ff
RC
163
164CORE_ADDR
165hppa_symbol_address(const char *sym)
166{
167 struct minimal_symbol *minsym;
168
169 minsym = lookup_minimal_symbol (sym, NULL, NULL);
170 if (minsym)
171 return SYMBOL_VALUE_ADDRESS (minsym);
172 else
173 return (CORE_ADDR)-1;
174}
77d18ded
RC
175
176struct hppa_objfile_private *
177hppa_init_objfile_priv_data (struct objfile *objfile)
178{
179 struct hppa_objfile_private *priv;
180
181 priv = (struct hppa_objfile_private *)
182 obstack_alloc (&objfile->objfile_obstack,
183 sizeof (struct hppa_objfile_private));
184 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
185 memset (priv, 0, sizeof (*priv));
186
187 return priv;
188}
c906108c
SS
189\f
190
191/* Compare the start address for two unwind entries returning 1 if
192 the first address is larger than the second, -1 if the second is
193 larger than the first, and zero if they are equal. */
194
195static int
fba45db2 196compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
197{
198 const struct unwind_table_entry *a = arg1;
199 const struct unwind_table_entry *b = arg2;
200
201 if (a->region_start > b->region_start)
202 return 1;
203 else if (a->region_start < b->region_start)
204 return -1;
205 else
206 return 0;
207}
208
53a5351d 209static void
fdd72f95 210record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 211{
fdd72f95 212 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 213 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
214 {
215 bfd_vma value = section->vma - section->filepos;
216 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
217
218 if (value < *low_text_segment_address)
219 *low_text_segment_address = value;
220 }
53a5351d
JM
221}
222
c906108c 223static void
fba45db2
KB
224internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
225 asection *section, unsigned int entries, unsigned int size,
226 CORE_ADDR text_offset)
c906108c
SS
227{
228 /* We will read the unwind entries into temporary memory, then
229 fill in the actual unwind table. */
fdd72f95 230
c906108c
SS
231 if (size > 0)
232 {
5db8bbe5 233 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
234 unsigned long tmp;
235 unsigned i;
236 char *buf = alloca (size);
fdd72f95 237 CORE_ADDR low_text_segment_address;
c906108c 238
fdd72f95 239 /* For ELF targets, then unwinds are supposed to
c2c6d25f
JM
240 be segment relative offsets instead of absolute addresses.
241
242 Note that when loading a shared library (text_offset != 0) the
243 unwinds are already relative to the text_offset that will be
244 passed in. */
5db8bbe5 245 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 246 {
fdd72f95
RC
247 low_text_segment_address = -1;
248
53a5351d 249 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
250 record_text_segment_lowaddr,
251 &low_text_segment_address);
53a5351d 252
fdd72f95 253 text_offset = low_text_segment_address;
53a5351d 254 }
5db8bbe5 255 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 256 {
5db8bbe5 257 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 258 }
53a5351d 259
c906108c
SS
260 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
261
262 /* Now internalize the information being careful to handle host/target
c5aa993b 263 endian issues. */
c906108c
SS
264 for (i = 0; i < entries; i++)
265 {
266 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 267 (bfd_byte *) buf);
c906108c
SS
268 table[i].region_start += text_offset;
269 buf += 4;
c5aa993b 270 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
271 table[i].region_end += text_offset;
272 buf += 4;
c5aa993b 273 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
274 buf += 4;
275 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
276 table[i].Millicode = (tmp >> 30) & 0x1;
277 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
278 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 279 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
280 table[i].Entry_SR = (tmp >> 25) & 0x1;
281 table[i].Entry_FR = (tmp >> 21) & 0xf;
282 table[i].Entry_GR = (tmp >> 16) & 0x1f;
283 table[i].Args_stored = (tmp >> 15) & 0x1;
284 table[i].Variable_Frame = (tmp >> 14) & 0x1;
285 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
286 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
287 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
288 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 289 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
290 table[i].cxx_info = (tmp >> 8) & 0x1;
291 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
292 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 293 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
294 table[i].Save_SP = (tmp >> 4) & 0x1;
295 table[i].Save_RP = (tmp >> 3) & 0x1;
296 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 297 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 298 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 299 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 buf += 4;
301 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
302 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
303 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
304 table[i].alloca_frame = (tmp >> 28) & 0x1;
305 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
306 table[i].Total_frame_size = tmp & 0x7ffffff;
307
c5aa993b 308 /* Stub unwinds are handled elsewhere. */
c906108c
SS
309 table[i].stub_unwind.stub_type = 0;
310 table[i].stub_unwind.padding = 0;
311 }
312 }
313}
314
315/* Read in the backtrace information stored in the `$UNWIND_START$' section of
316 the object file. This info is used mainly by find_unwind_entry() to find
317 out the stack frame size and frame pointer used by procedures. We put
318 everything on the psymbol obstack in the objfile so that it automatically
319 gets freed when the objfile is destroyed. */
320
321static void
fba45db2 322read_unwind_info (struct objfile *objfile)
c906108c 323{
d4f3574e
SS
324 asection *unwind_sec, *stub_unwind_sec;
325 unsigned unwind_size, stub_unwind_size, total_size;
326 unsigned index, unwind_entries;
c906108c
SS
327 unsigned stub_entries, total_entries;
328 CORE_ADDR text_offset;
7c46b9fb
RC
329 struct hppa_unwind_info *ui;
330 struct hppa_objfile_private *obj_private;
c906108c
SS
331
332 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
333 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
334 sizeof (struct hppa_unwind_info));
c906108c
SS
335
336 ui->table = NULL;
337 ui->cache = NULL;
338 ui->last = -1;
339
d4f3574e
SS
340 /* For reasons unknown the HP PA64 tools generate multiple unwinder
341 sections in a single executable. So we just iterate over every
342 section in the BFD looking for unwinder sections intead of trying
343 to do a lookup with bfd_get_section_by_name.
c906108c 344
d4f3574e
SS
345 First determine the total size of the unwind tables so that we
346 can allocate memory in a nice big hunk. */
347 total_entries = 0;
348 for (unwind_sec = objfile->obfd->sections;
349 unwind_sec;
350 unwind_sec = unwind_sec->next)
c906108c 351 {
d4f3574e
SS
352 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
353 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
354 {
355 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
356 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 357
d4f3574e
SS
358 total_entries += unwind_entries;
359 }
c906108c
SS
360 }
361
d4f3574e 362 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 363 use stub unwinds at the current time. */
d4f3574e
SS
364 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
365
c906108c
SS
366 if (stub_unwind_sec)
367 {
368 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
369 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
370 }
371 else
372 {
373 stub_unwind_size = 0;
374 stub_entries = 0;
375 }
376
377 /* Compute total number of unwind entries and their total size. */
d4f3574e 378 total_entries += stub_entries;
c906108c
SS
379 total_size = total_entries * sizeof (struct unwind_table_entry);
380
381 /* Allocate memory for the unwind table. */
382 ui->table = (struct unwind_table_entry *)
8b92e4d5 383 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 384 ui->last = total_entries - 1;
c906108c 385
d4f3574e
SS
386 /* Now read in each unwind section and internalize the standard unwind
387 entries. */
c906108c 388 index = 0;
d4f3574e
SS
389 for (unwind_sec = objfile->obfd->sections;
390 unwind_sec;
391 unwind_sec = unwind_sec->next)
392 {
393 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
394 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
395 {
396 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
397 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
398
399 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
400 unwind_entries, unwind_size, text_offset);
401 index += unwind_entries;
402 }
403 }
404
405 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
406 if (stub_unwind_size > 0)
407 {
408 unsigned int i;
409 char *buf = alloca (stub_unwind_size);
410
411 /* Read in the stub unwind entries. */
412 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
413 0, stub_unwind_size);
414
415 /* Now convert them into regular unwind entries. */
416 for (i = 0; i < stub_entries; i++, index++)
417 {
418 /* Clear out the next unwind entry. */
419 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
420
421 /* Convert offset & size into region_start and region_end.
422 Stuff away the stub type into "reserved" fields. */
423 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
424 (bfd_byte *) buf);
425 ui->table[index].region_start += text_offset;
426 buf += 4;
427 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 428 (bfd_byte *) buf);
c906108c
SS
429 buf += 2;
430 ui->table[index].region_end
c5aa993b
JM
431 = ui->table[index].region_start + 4 *
432 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
433 buf += 2;
434 }
435
436 }
437
438 /* Unwind table needs to be kept sorted. */
439 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
440 compare_unwind_entries);
441
442 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
443 obj_private = (struct hppa_objfile_private *)
444 objfile_data (objfile, hppa_objfile_priv_data);
445 if (obj_private == NULL)
77d18ded
RC
446 obj_private = hppa_init_objfile_priv_data (objfile);
447
c906108c
SS
448 obj_private->unwind_info = ui;
449}
450
451/* Lookup the unwind (stack backtrace) info for the given PC. We search all
452 of the objfiles seeking the unwind table entry for this PC. Each objfile
453 contains a sorted list of struct unwind_table_entry. Since we do a binary
454 search of the unwind tables, we depend upon them to be sorted. */
455
456struct unwind_table_entry *
fba45db2 457find_unwind_entry (CORE_ADDR pc)
c906108c
SS
458{
459 int first, middle, last;
460 struct objfile *objfile;
7c46b9fb 461 struct hppa_objfile_private *priv;
c906108c 462
369aa520
RC
463 if (hppa_debug)
464 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry 0x%s -> ",
465 paddr_nz (pc));
466
c906108c
SS
467 /* A function at address 0? Not in HP-UX! */
468 if (pc == (CORE_ADDR) 0)
369aa520
RC
469 {
470 if (hppa_debug)
471 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
472 return NULL;
473 }
c906108c
SS
474
475 ALL_OBJFILES (objfile)
c5aa993b 476 {
7c46b9fb 477 struct hppa_unwind_info *ui;
c5aa993b 478 ui = NULL;
7c46b9fb
RC
479 priv = objfile_data (objfile, hppa_objfile_priv_data);
480 if (priv)
481 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 482
c5aa993b
JM
483 if (!ui)
484 {
485 read_unwind_info (objfile);
7c46b9fb
RC
486 priv = objfile_data (objfile, hppa_objfile_priv_data);
487 if (priv == NULL)
8a3fe4f8 488 error (_("Internal error reading unwind information."));
7c46b9fb 489 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 490 }
c906108c 491
c5aa993b 492 /* First, check the cache */
c906108c 493
c5aa993b
JM
494 if (ui->cache
495 && pc >= ui->cache->region_start
496 && pc <= ui->cache->region_end)
369aa520
RC
497 {
498 if (hppa_debug)
499 fprintf_unfiltered (gdb_stdlog, "0x%s (cached) }\n",
e7b17823 500 paddr_nz ((uintptr_t) ui->cache));
369aa520
RC
501 return ui->cache;
502 }
c906108c 503
c5aa993b 504 /* Not in the cache, do a binary search */
c906108c 505
c5aa993b
JM
506 first = 0;
507 last = ui->last;
c906108c 508
c5aa993b
JM
509 while (first <= last)
510 {
511 middle = (first + last) / 2;
512 if (pc >= ui->table[middle].region_start
513 && pc <= ui->table[middle].region_end)
514 {
515 ui->cache = &ui->table[middle];
369aa520
RC
516 if (hppa_debug)
517 fprintf_unfiltered (gdb_stdlog, "0x%s }\n",
e7b17823 518 paddr_nz ((uintptr_t) ui->cache));
c5aa993b
JM
519 return &ui->table[middle];
520 }
c906108c 521
c5aa993b
JM
522 if (pc < ui->table[middle].region_start)
523 last = middle - 1;
524 else
525 first = middle + 1;
526 }
527 } /* ALL_OBJFILES() */
369aa520
RC
528
529 if (hppa_debug)
530 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
531
c906108c
SS
532 return NULL;
533}
534
1fb24930
RC
535/* The epilogue is defined here as the area either on the `bv' instruction
536 itself or an instruction which destroys the function's stack frame.
537
538 We do not assume that the epilogue is at the end of a function as we can
539 also have return sequences in the middle of a function. */
540static int
541hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
542{
543 unsigned long status;
544 unsigned int inst;
545 char buf[4];
546 int off;
547
8defab1a 548 status = target_read_memory (pc, buf, 4);
1fb24930
RC
549 if (status != 0)
550 return 0;
551
552 inst = extract_unsigned_integer (buf, 4);
553
554 /* The most common way to perform a stack adjustment ldo X(sp),sp
555 We are destroying a stack frame if the offset is negative. */
556 if ((inst & 0xffffc000) == 0x37de0000
557 && hppa_extract_14 (inst) < 0)
558 return 1;
559
560 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
561 if (((inst & 0x0fc010e0) == 0x0fc010e0
562 || (inst & 0x0fc010e0) == 0x0fc010e0)
563 && hppa_extract_14 (inst) < 0)
564 return 1;
565
566 /* bv %r0(%rp) or bv,n %r0(%rp) */
567 if (inst == 0xe840c000 || inst == 0xe840c002)
568 return 1;
569
570 return 0;
571}
572
85f4f2d8 573static const unsigned char *
67d57894 574hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 575{
56132691 576 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
577 (*len) = sizeof (breakpoint);
578 return breakpoint;
579}
580
e23457df
AC
581/* Return the name of a register. */
582
4a302917 583static const char *
d93859e2 584hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
585{
586 static char *names[] = {
587 "flags", "r1", "rp", "r3",
588 "r4", "r5", "r6", "r7",
589 "r8", "r9", "r10", "r11",
590 "r12", "r13", "r14", "r15",
591 "r16", "r17", "r18", "r19",
592 "r20", "r21", "r22", "r23",
593 "r24", "r25", "r26", "dp",
594 "ret0", "ret1", "sp", "r31",
595 "sar", "pcoqh", "pcsqh", "pcoqt",
596 "pcsqt", "eiem", "iir", "isr",
597 "ior", "ipsw", "goto", "sr4",
598 "sr0", "sr1", "sr2", "sr3",
599 "sr5", "sr6", "sr7", "cr0",
600 "cr8", "cr9", "ccr", "cr12",
601 "cr13", "cr24", "cr25", "cr26",
602 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
603 "fpsr", "fpe1", "fpe2", "fpe3",
604 "fpe4", "fpe5", "fpe6", "fpe7",
605 "fr4", "fr4R", "fr5", "fr5R",
606 "fr6", "fr6R", "fr7", "fr7R",
607 "fr8", "fr8R", "fr9", "fr9R",
608 "fr10", "fr10R", "fr11", "fr11R",
609 "fr12", "fr12R", "fr13", "fr13R",
610 "fr14", "fr14R", "fr15", "fr15R",
611 "fr16", "fr16R", "fr17", "fr17R",
612 "fr18", "fr18R", "fr19", "fr19R",
613 "fr20", "fr20R", "fr21", "fr21R",
614 "fr22", "fr22R", "fr23", "fr23R",
615 "fr24", "fr24R", "fr25", "fr25R",
616 "fr26", "fr26R", "fr27", "fr27R",
617 "fr28", "fr28R", "fr29", "fr29R",
618 "fr30", "fr30R", "fr31", "fr31R"
619 };
620 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
621 return NULL;
622 else
623 return names[i];
624}
625
4a302917 626static const char *
d93859e2 627hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
628{
629 static char *names[] = {
630 "flags", "r1", "rp", "r3",
631 "r4", "r5", "r6", "r7",
632 "r8", "r9", "r10", "r11",
633 "r12", "r13", "r14", "r15",
634 "r16", "r17", "r18", "r19",
635 "r20", "r21", "r22", "r23",
636 "r24", "r25", "r26", "dp",
637 "ret0", "ret1", "sp", "r31",
638 "sar", "pcoqh", "pcsqh", "pcoqt",
639 "pcsqt", "eiem", "iir", "isr",
640 "ior", "ipsw", "goto", "sr4",
641 "sr0", "sr1", "sr2", "sr3",
642 "sr5", "sr6", "sr7", "cr0",
643 "cr8", "cr9", "ccr", "cr12",
644 "cr13", "cr24", "cr25", "cr26",
645 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
646 "fpsr", "fpe1", "fpe2", "fpe3",
647 "fr4", "fr5", "fr6", "fr7",
648 "fr8", "fr9", "fr10", "fr11",
649 "fr12", "fr13", "fr14", "fr15",
650 "fr16", "fr17", "fr18", "fr19",
651 "fr20", "fr21", "fr22", "fr23",
652 "fr24", "fr25", "fr26", "fr27",
653 "fr28", "fr29", "fr30", "fr31"
654 };
655 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
656 return NULL;
657 else
658 return names[i];
659}
660
1ef7fcb5 661static int
d3f73121 662hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5
RC
663{
664 /* r0-r31 and sar map one-to-one. */
665 if (reg <= 32)
666 return reg;
667
668 /* fr4-fr31 are mapped from 72 in steps of 2. */
669 if (reg >= 72 || reg < 72 + 28 * 2)
670 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
671
672 error ("Invalid DWARF register num %d.", reg);
673 return -1;
674}
675
79508e1e
AC
676/* This function pushes a stack frame with arguments as part of the
677 inferior function calling mechanism.
678
679 This is the version of the function for the 32-bit PA machines, in
680 which later arguments appear at lower addresses. (The stack always
681 grows towards higher addresses.)
682
683 We simply allocate the appropriate amount of stack space and put
684 arguments into their proper slots. */
685
4a302917 686static CORE_ADDR
7d9b040b 687hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
688 struct regcache *regcache, CORE_ADDR bp_addr,
689 int nargs, struct value **args, CORE_ADDR sp,
690 int struct_return, CORE_ADDR struct_addr)
691{
79508e1e
AC
692 /* Stack base address at which any pass-by-reference parameters are
693 stored. */
694 CORE_ADDR struct_end = 0;
695 /* Stack base address at which the first parameter is stored. */
696 CORE_ADDR param_end = 0;
697
698 /* The inner most end of the stack after all the parameters have
699 been pushed. */
700 CORE_ADDR new_sp = 0;
701
702 /* Two passes. First pass computes the location of everything,
703 second pass writes the bytes out. */
704 int write_pass;
d49771ef
RC
705
706 /* Global pointer (r19) of the function we are trying to call. */
707 CORE_ADDR gp;
708
709 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
710
79508e1e
AC
711 for (write_pass = 0; write_pass < 2; write_pass++)
712 {
1797a8f6 713 CORE_ADDR struct_ptr = 0;
2a6228ef
RC
714 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
715 struct_ptr is adjusted for each argument below, so the first
716 argument will end up at sp-36. */
717 CORE_ADDR param_ptr = 32;
79508e1e 718 int i;
2a6228ef
RC
719 int small_struct = 0;
720
79508e1e
AC
721 for (i = 0; i < nargs; i++)
722 {
723 struct value *arg = args[i];
4991999e 724 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
725 /* The corresponding parameter that is pushed onto the
726 stack, and [possibly] passed in a register. */
727 char param_val[8];
728 int param_len;
729 memset (param_val, 0, sizeof param_val);
730 if (TYPE_LENGTH (type) > 8)
731 {
732 /* Large parameter, pass by reference. Store the value
733 in "struct" area and then pass its address. */
734 param_len = 4;
1797a8f6 735 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 736 if (write_pass)
0fd88904 737 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 738 TYPE_LENGTH (type));
1797a8f6 739 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
740 }
741 else if (TYPE_CODE (type) == TYPE_CODE_INT
742 || TYPE_CODE (type) == TYPE_CODE_ENUM)
743 {
744 /* Integer value store, right aligned. "unpack_long"
745 takes care of any sign-extension problems. */
746 param_len = align_up (TYPE_LENGTH (type), 4);
747 store_unsigned_integer (param_val, param_len,
748 unpack_long (type,
0fd88904 749 value_contents (arg)));
79508e1e 750 }
2a6228ef
RC
751 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
752 {
753 /* Floating point value store, right aligned. */
754 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 755 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 756 }
79508e1e
AC
757 else
758 {
79508e1e 759 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
760
761 /* Small struct value are stored right-aligned. */
79508e1e 762 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 763 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
764
765 /* Structures of size 5, 6 and 7 bytes are special in that
766 the higher-ordered word is stored in the lower-ordered
767 argument, and even though it is a 8-byte quantity the
768 registers need not be 8-byte aligned. */
1b07b470 769 if (param_len > 4 && param_len < 8)
2a6228ef 770 small_struct = 1;
79508e1e 771 }
2a6228ef 772
1797a8f6 773 param_ptr += param_len;
2a6228ef
RC
774 if (param_len == 8 && !small_struct)
775 param_ptr = align_up (param_ptr, 8);
776
777 /* First 4 non-FP arguments are passed in gr26-gr23.
778 First 4 32-bit FP arguments are passed in fr4L-fr7L.
779 First 2 64-bit FP arguments are passed in fr5 and fr7.
780
781 The rest go on the stack, starting at sp-36, towards lower
782 addresses. 8-byte arguments must be aligned to a 8-byte
783 stack boundary. */
79508e1e
AC
784 if (write_pass)
785 {
1797a8f6 786 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
787
788 /* There are some cases when we don't know the type
789 expected by the callee (e.g. for variadic functions), so
790 pass the parameters in both general and fp regs. */
791 if (param_ptr <= 48)
79508e1e 792 {
2a6228ef
RC
793 int grreg = 26 - (param_ptr - 36) / 4;
794 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
795 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
796
797 regcache_cooked_write (regcache, grreg, param_val);
798 regcache_cooked_write (regcache, fpLreg, param_val);
799
79508e1e 800 if (param_len > 4)
2a6228ef
RC
801 {
802 regcache_cooked_write (regcache, grreg + 1,
803 param_val + 4);
804
805 regcache_cooked_write (regcache, fpreg, param_val);
806 regcache_cooked_write (regcache, fpreg + 1,
807 param_val + 4);
808 }
79508e1e
AC
809 }
810 }
811 }
812
813 /* Update the various stack pointers. */
814 if (!write_pass)
815 {
2a6228ef 816 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
817 /* PARAM_PTR already accounts for all the arguments passed
818 by the user. However, the ABI mandates minimum stack
819 space allocations for outgoing arguments. The ABI also
820 mandates minimum stack alignments which we must
821 preserve. */
2a6228ef 822 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
823 }
824 }
825
826 /* If a structure has to be returned, set up register 28 to hold its
827 address */
828 if (struct_return)
9c9acae0 829 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 830
e38c262f 831 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
832
833 if (gp != 0)
9c9acae0 834 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 835
79508e1e 836 /* Set the return address. */
77d18ded
RC
837 if (!gdbarch_push_dummy_code_p (gdbarch))
838 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 839
c4557624 840 /* Update the Stack Pointer. */
34f75cc1 841 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 842
2a6228ef 843 return param_end;
79508e1e
AC
844}
845
38ca4e0c
MK
846/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
847 Runtime Architecture for PA-RISC 2.0", which is distributed as part
848 as of the HP-UX Software Transition Kit (STK). This implementation
849 is based on version 3.3, dated October 6, 1997. */
2f690297 850
38ca4e0c 851/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 852
38ca4e0c
MK
853static int
854hppa64_integral_or_pointer_p (const struct type *type)
855{
856 switch (TYPE_CODE (type))
857 {
858 case TYPE_CODE_INT:
859 case TYPE_CODE_BOOL:
860 case TYPE_CODE_CHAR:
861 case TYPE_CODE_ENUM:
862 case TYPE_CODE_RANGE:
863 {
864 int len = TYPE_LENGTH (type);
865 return (len == 1 || len == 2 || len == 4 || len == 8);
866 }
867 case TYPE_CODE_PTR:
868 case TYPE_CODE_REF:
869 return (TYPE_LENGTH (type) == 8);
870 default:
871 break;
872 }
873
874 return 0;
875}
876
877/* Check whether TYPE is a "Floating Scalar Type". */
878
879static int
880hppa64_floating_p (const struct type *type)
881{
882 switch (TYPE_CODE (type))
883 {
884 case TYPE_CODE_FLT:
885 {
886 int len = TYPE_LENGTH (type);
887 return (len == 4 || len == 8 || len == 16);
888 }
889 default:
890 break;
891 }
892
893 return 0;
894}
2f690297 895
1218e655
RC
896/* If CODE points to a function entry address, try to look up the corresponding
897 function descriptor and return its address instead. If CODE is not a
898 function entry address, then just return it unchanged. */
899static CORE_ADDR
900hppa64_convert_code_addr_to_fptr (CORE_ADDR code)
901{
902 struct obj_section *sec, *opd;
903
904 sec = find_pc_section (code);
905
906 if (!sec)
907 return code;
908
909 /* If CODE is in a data section, assume it's already a fptr. */
910 if (!(sec->the_bfd_section->flags & SEC_CODE))
911 return code;
912
913 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
914 {
915 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 916 break;
1218e655
RC
917 }
918
919 if (opd < sec->objfile->sections_end)
920 {
921 CORE_ADDR addr;
922
aded6f54
PA
923 for (addr = obj_section_addr (opd);
924 addr < obj_section_endaddr (opd);
925 addr += 2 * 8)
926 {
1218e655
RC
927 ULONGEST opdaddr;
928 char tmp[8];
929
930 if (target_read_memory (addr, tmp, sizeof (tmp)))
931 break;
932 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp));
933
aded6f54 934 if (opdaddr == code)
1218e655
RC
935 return addr - 16;
936 }
937 }
938
939 return code;
940}
941
4a302917 942static CORE_ADDR
7d9b040b 943hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
944 struct regcache *regcache, CORE_ADDR bp_addr,
945 int nargs, struct value **args, CORE_ADDR sp,
946 int struct_return, CORE_ADDR struct_addr)
947{
38ca4e0c
MK
948 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
949 int i, offset = 0;
950 CORE_ADDR gp;
2f690297 951
38ca4e0c
MK
952 /* "The outgoing parameter area [...] must be aligned at a 16-byte
953 boundary." */
954 sp = align_up (sp, 16);
2f690297 955
38ca4e0c
MK
956 for (i = 0; i < nargs; i++)
957 {
958 struct value *arg = args[i];
959 struct type *type = value_type (arg);
960 int len = TYPE_LENGTH (type);
0fd88904 961 const bfd_byte *valbuf;
1218e655 962 bfd_byte fptrbuf[8];
38ca4e0c 963 int regnum;
2f690297 964
38ca4e0c
MK
965 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
966 offset = align_up (offset, 8);
77d18ded 967
38ca4e0c 968 if (hppa64_integral_or_pointer_p (type))
2f690297 969 {
38ca4e0c
MK
970 /* "Integral scalar parameters smaller than 64 bits are
971 padded on the left (i.e., the value is in the
972 least-significant bits of the 64-bit storage unit, and
973 the high-order bits are undefined)." Therefore we can
974 safely sign-extend them. */
975 if (len < 8)
449e1137 976 {
38ca4e0c
MK
977 arg = value_cast (builtin_type_int64, arg);
978 len = 8;
979 }
980 }
981 else if (hppa64_floating_p (type))
982 {
983 if (len > 8)
984 {
985 /* "Quad-precision (128-bit) floating-point scalar
986 parameters are aligned on a 16-byte boundary." */
987 offset = align_up (offset, 16);
988
989 /* "Double-extended- and quad-precision floating-point
990 parameters within the first 64 bytes of the parameter
991 list are always passed in general registers." */
449e1137
AC
992 }
993 else
994 {
38ca4e0c 995 if (len == 4)
449e1137 996 {
38ca4e0c
MK
997 /* "Single-precision (32-bit) floating-point scalar
998 parameters are padded on the left with 32 bits of
999 garbage (i.e., the floating-point value is in the
1000 least-significant 32 bits of a 64-bit storage
1001 unit)." */
1002 offset += 4;
449e1137 1003 }
38ca4e0c
MK
1004
1005 /* "Single- and double-precision floating-point
1006 parameters in this area are passed according to the
1007 available formal parameter information in a function
1008 prototype. [...] If no prototype is in scope,
1009 floating-point parameters must be passed both in the
1010 corresponding general registers and in the
1011 corresponding floating-point registers." */
1012 regnum = HPPA64_FP4_REGNUM + offset / 8;
1013
1014 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1015 {
38ca4e0c
MK
1016 /* "Single-precision floating-point parameters, when
1017 passed in floating-point registers, are passed in
1018 the right halves of the floating point registers;
1019 the left halves are unused." */
1020 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1021 len, value_contents (arg));
449e1137
AC
1022 }
1023 }
2f690297 1024 }
38ca4e0c 1025 else
2f690297 1026 {
38ca4e0c
MK
1027 if (len > 8)
1028 {
1029 /* "Aggregates larger than 8 bytes are aligned on a
1030 16-byte boundary, possibly leaving an unused argument
1031 slot, which is filled with garbage. If necessary,
1032 they are padded on the right (with garbage), to a
1033 multiple of 8 bytes." */
1034 offset = align_up (offset, 16);
1035 }
1036 }
1037
1218e655
RC
1038 /* If we are passing a function pointer, make sure we pass a function
1039 descriptor instead of the function entry address. */
1040 if (TYPE_CODE (type) == TYPE_CODE_PTR
1041 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1042 {
1043 ULONGEST codeptr, fptr;
1044
1045 codeptr = unpack_long (type, value_contents (arg));
1046 fptr = hppa64_convert_code_addr_to_fptr (codeptr);
1047 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), fptr);
1048 valbuf = fptrbuf;
1049 }
1050 else
1051 {
1052 valbuf = value_contents (arg);
1053 }
1054
38ca4e0c 1055 /* Always store the argument in memory. */
1218e655 1056 write_memory (sp + offset, valbuf, len);
38ca4e0c 1057
38ca4e0c
MK
1058 regnum = HPPA_ARG0_REGNUM - offset / 8;
1059 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1060 {
1061 regcache_cooked_write_part (regcache, regnum,
1062 offset % 8, min (len, 8), valbuf);
1063 offset += min (len, 8);
1064 valbuf += min (len, 8);
1065 len -= min (len, 8);
1066 regnum--;
2f690297 1067 }
38ca4e0c
MK
1068
1069 offset += len;
2f690297
AC
1070 }
1071
38ca4e0c
MK
1072 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1073 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1074
1075 /* Allocate the outgoing parameter area. Make sure the outgoing
1076 parameter area is multiple of 16 bytes in length. */
1077 sp += max (align_up (offset, 16), 64);
1078
1079 /* Allocate 32-bytes of scratch space. The documentation doesn't
1080 mention this, but it seems to be needed. */
1081 sp += 32;
1082
1083 /* Allocate the frame marker area. */
1084 sp += 16;
1085
1086 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1087 its address. */
2f690297 1088 if (struct_return)
38ca4e0c 1089 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1090
38ca4e0c 1091 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1092 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1093 if (gp != 0)
38ca4e0c 1094 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1095
38ca4e0c 1096 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1097 if (!gdbarch_push_dummy_code_p (gdbarch))
1098 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1099
38ca4e0c
MK
1100 /* Set up GR30 to hold the stack pointer (sp). */
1101 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1102
38ca4e0c 1103 return sp;
2f690297 1104}
38ca4e0c 1105\f
2f690297 1106
08a27113
MK
1107/* Handle 32/64-bit struct return conventions. */
1108
1109static enum return_value_convention
c055b101 1110hppa32_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1111 struct type *type, struct regcache *regcache,
e127f0db 1112 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1113{
1114 if (TYPE_LENGTH (type) <= 2 * 4)
1115 {
1116 /* The value always lives in the right hand end of the register
1117 (or register pair)? */
1118 int b;
1119 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1120 int part = TYPE_LENGTH (type) % 4;
1121 /* The left hand register contains only part of the value,
1122 transfer that first so that the rest can be xfered as entire
1123 4-byte registers. */
1124 if (part > 0)
1125 {
1126 if (readbuf != NULL)
1127 regcache_cooked_read_part (regcache, reg, 4 - part,
1128 part, readbuf);
1129 if (writebuf != NULL)
1130 regcache_cooked_write_part (regcache, reg, 4 - part,
1131 part, writebuf);
1132 reg++;
1133 }
1134 /* Now transfer the remaining register values. */
1135 for (b = part; b < TYPE_LENGTH (type); b += 4)
1136 {
1137 if (readbuf != NULL)
e127f0db 1138 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1139 if (writebuf != NULL)
e127f0db 1140 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1141 reg++;
1142 }
1143 return RETURN_VALUE_REGISTER_CONVENTION;
1144 }
1145 else
1146 return RETURN_VALUE_STRUCT_CONVENTION;
1147}
1148
1149static enum return_value_convention
c055b101 1150hppa64_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1151 struct type *type, struct regcache *regcache,
e127f0db 1152 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1153{
1154 int len = TYPE_LENGTH (type);
1155 int regnum, offset;
1156
1157 if (len > 16)
1158 {
1159 /* All return values larget than 128 bits must be aggregate
1160 return values. */
9738b034
MK
1161 gdb_assert (!hppa64_integral_or_pointer_p (type));
1162 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1163
1164 /* "Aggregate return values larger than 128 bits are returned in
1165 a buffer allocated by the caller. The address of the buffer
1166 must be passed in GR 28." */
1167 return RETURN_VALUE_STRUCT_CONVENTION;
1168 }
1169
1170 if (hppa64_integral_or_pointer_p (type))
1171 {
1172 /* "Integral return values are returned in GR 28. Values
1173 smaller than 64 bits are padded on the left (with garbage)." */
1174 regnum = HPPA_RET0_REGNUM;
1175 offset = 8 - len;
1176 }
1177 else if (hppa64_floating_p (type))
1178 {
1179 if (len > 8)
1180 {
1181 /* "Double-extended- and quad-precision floating-point
1182 values are returned in GRs 28 and 29. The sign,
1183 exponent, and most-significant bits of the mantissa are
1184 returned in GR 28; the least-significant bits of the
1185 mantissa are passed in GR 29. For double-extended
1186 precision values, GR 29 is padded on the right with 48
1187 bits of garbage." */
1188 regnum = HPPA_RET0_REGNUM;
1189 offset = 0;
1190 }
1191 else
1192 {
1193 /* "Single-precision and double-precision floating-point
1194 return values are returned in FR 4R (single precision) or
1195 FR 4 (double-precision)." */
1196 regnum = HPPA64_FP4_REGNUM;
1197 offset = 8 - len;
1198 }
1199 }
1200 else
1201 {
1202 /* "Aggregate return values up to 64 bits in size are returned
1203 in GR 28. Aggregates smaller than 64 bits are left aligned
1204 in the register; the pad bits on the right are undefined."
1205
1206 "Aggregate return values between 65 and 128 bits are returned
1207 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1208 the remaining bits are placed, left aligned, in GR 29. The
1209 pad bits on the right of GR 29 (if any) are undefined." */
1210 regnum = HPPA_RET0_REGNUM;
1211 offset = 0;
1212 }
1213
1214 if (readbuf)
1215 {
08a27113
MK
1216 while (len > 0)
1217 {
1218 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1219 min (len, 8), readbuf);
1220 readbuf += min (len, 8);
08a27113
MK
1221 len -= min (len, 8);
1222 regnum++;
1223 }
1224 }
1225
1226 if (writebuf)
1227 {
08a27113
MK
1228 while (len > 0)
1229 {
1230 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1231 min (len, 8), writebuf);
1232 writebuf += min (len, 8);
08a27113
MK
1233 len -= min (len, 8);
1234 regnum++;
1235 }
1236 }
1237
1238 return RETURN_VALUE_REGISTER_CONVENTION;
1239}
1240\f
1241
d49771ef 1242static CORE_ADDR
a7aad9aa 1243hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1244 struct target_ops *targ)
1245{
1246 if (addr & 2)
1247 {
a7aad9aa
MK
1248 CORE_ADDR plabel = addr & ~3;
1249 return read_memory_typed_address (plabel, builtin_type_void_func_ptr);
d49771ef
RC
1250 }
1251
1252 return addr;
1253}
1254
1797a8f6
AC
1255static CORE_ADDR
1256hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1257{
1258 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1259 and not _bit_)! */
1260 return align_up (addr, 64);
1261}
1262
2f690297
AC
1263/* Force all frames to 16-byte alignment. Better safe than sorry. */
1264
1265static CORE_ADDR
1797a8f6 1266hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1267{
1268 /* Just always 16-byte align. */
1269 return align_up (addr, 16);
1270}
1271
cc72850f 1272CORE_ADDR
61a1198a 1273hppa_read_pc (struct regcache *regcache)
c906108c 1274{
cc72850f 1275 ULONGEST ipsw;
61a1198a 1276 ULONGEST pc;
c906108c 1277
61a1198a
UW
1278 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1279 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1280
1281 /* If the current instruction is nullified, then we are effectively
1282 still executing the previous instruction. Pretend we are still
cc72850f
MK
1283 there. This is needed when single stepping; if the nullified
1284 instruction is on a different line, we don't want GDB to think
1285 we've stepped onto that line. */
fe46cd3a
RC
1286 if (ipsw & 0x00200000)
1287 pc -= 4;
1288
cc72850f 1289 return pc & ~0x3;
c906108c
SS
1290}
1291
cc72850f 1292void
61a1198a 1293hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1294{
61a1198a
UW
1295 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1296 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1297}
1298
1299/* return the alignment of a type in bytes. Structures have the maximum
1300 alignment required by their fields. */
1301
1302static int
fba45db2 1303hppa_alignof (struct type *type)
c906108c
SS
1304{
1305 int max_align, align, i;
1306 CHECK_TYPEDEF (type);
1307 switch (TYPE_CODE (type))
1308 {
1309 case TYPE_CODE_PTR:
1310 case TYPE_CODE_INT:
1311 case TYPE_CODE_FLT:
1312 return TYPE_LENGTH (type);
1313 case TYPE_CODE_ARRAY:
1314 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1315 case TYPE_CODE_STRUCT:
1316 case TYPE_CODE_UNION:
1317 max_align = 1;
1318 for (i = 0; i < TYPE_NFIELDS (type); i++)
1319 {
1320 /* Bit fields have no real alignment. */
1321 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1322 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1323 {
1324 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1325 max_align = max (max_align, align);
1326 }
1327 }
1328 return max_align;
1329 default:
1330 return 4;
1331 }
1332}
1333
c906108c
SS
1334/* For the given instruction (INST), return any adjustment it makes
1335 to the stack pointer or zero for no adjustment.
1336
1337 This only handles instructions commonly found in prologues. */
1338
1339static int
fba45db2 1340prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1341{
1342 /* This must persist across calls. */
1343 static int save_high21;
1344
1345 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1346 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1347 return hppa_extract_14 (inst);
c906108c
SS
1348
1349 /* stwm X,D(sp) */
1350 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1351 return hppa_extract_14 (inst);
c906108c 1352
104c1213
JM
1353 /* std,ma X,D(sp) */
1354 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1355 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1356
e22b26cb 1357 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1358 save high bits in save_high21 for later use. */
e22b26cb 1359 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1360 {
abc485a1 1361 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1362 return 0;
1363 }
1364
1365 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1366 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1367
1368 /* fstws as used by the HP compilers. */
1369 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1370 return hppa_extract_5_load (inst);
c906108c
SS
1371
1372 /* No adjustment. */
1373 return 0;
1374}
1375
1376/* Return nonzero if INST is a branch of some kind, else return zero. */
1377
1378static int
fba45db2 1379is_branch (unsigned long inst)
c906108c
SS
1380{
1381 switch (inst >> 26)
1382 {
1383 case 0x20:
1384 case 0x21:
1385 case 0x22:
1386 case 0x23:
7be570e7 1387 case 0x27:
c906108c
SS
1388 case 0x28:
1389 case 0x29:
1390 case 0x2a:
1391 case 0x2b:
7be570e7 1392 case 0x2f:
c906108c
SS
1393 case 0x30:
1394 case 0x31:
1395 case 0x32:
1396 case 0x33:
1397 case 0x38:
1398 case 0x39:
1399 case 0x3a:
7be570e7 1400 case 0x3b:
c906108c
SS
1401 return 1;
1402
1403 default:
1404 return 0;
1405 }
1406}
1407
1408/* Return the register number for a GR which is saved by INST or
1409 zero it INST does not save a GR. */
1410
1411static int
fba45db2 1412inst_saves_gr (unsigned long inst)
c906108c
SS
1413{
1414 /* Does it look like a stw? */
7be570e7
JM
1415 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1416 || (inst >> 26) == 0x1f
1417 || ((inst >> 26) == 0x1f
1418 && ((inst >> 6) == 0xa)))
abc485a1 1419 return hppa_extract_5R_store (inst);
7be570e7
JM
1420
1421 /* Does it look like a std? */
1422 if ((inst >> 26) == 0x1c
1423 || ((inst >> 26) == 0x03
1424 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1425 return hppa_extract_5R_store (inst);
c906108c
SS
1426
1427 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1428 if ((inst >> 26) == 0x1b)
abc485a1 1429 return hppa_extract_5R_store (inst);
c906108c
SS
1430
1431 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1432 too. */
7be570e7
JM
1433 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1434 || ((inst >> 26) == 0x3
1435 && (((inst >> 6) & 0xf) == 0x8
1436 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1437 return hppa_extract_5R_store (inst);
c5aa993b 1438
c906108c
SS
1439 return 0;
1440}
1441
1442/* Return the register number for a FR which is saved by INST or
1443 zero it INST does not save a FR.
1444
1445 Note we only care about full 64bit register stores (that's the only
1446 kind of stores the prologue will use).
1447
1448 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1449
1450static int
fba45db2 1451inst_saves_fr (unsigned long inst)
c906108c 1452{
7be570e7 1453 /* is this an FSTD ? */
c906108c 1454 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1455 return hppa_extract_5r_store (inst);
7be570e7 1456 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1457 return hppa_extract_5R_store (inst);
7be570e7 1458 /* is this an FSTW ? */
c906108c 1459 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1460 return hppa_extract_5r_store (inst);
7be570e7 1461 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1462 return hppa_extract_5R_store (inst);
c906108c
SS
1463 return 0;
1464}
1465
1466/* Advance PC across any function entry prologue instructions
1467 to reach some "real" code.
1468
1469 Use information in the unwind table to determine what exactly should
1470 be in the prologue. */
1471
1472
a71f8c30 1473static CORE_ADDR
be8626e0
MD
1474skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1475 int stop_before_branch)
c906108c
SS
1476{
1477 char buf[4];
1478 CORE_ADDR orig_pc = pc;
1479 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1480 unsigned long args_stored, status, i, restart_gr, restart_fr;
1481 struct unwind_table_entry *u;
a71f8c30 1482 int final_iteration;
c906108c
SS
1483
1484 restart_gr = 0;
1485 restart_fr = 0;
1486
1487restart:
1488 u = find_unwind_entry (pc);
1489 if (!u)
1490 return pc;
1491
c5aa993b 1492 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1493 if ((pc & ~0x3) != u->region_start)
1494 return pc;
1495
1496 /* This is how much of a frame adjustment we need to account for. */
1497 stack_remaining = u->Total_frame_size << 3;
1498
1499 /* Magic register saves we want to know about. */
1500 save_rp = u->Save_RP;
1501 save_sp = u->Save_SP;
1502
1503 /* An indication that args may be stored into the stack. Unfortunately
1504 the HPUX compilers tend to set this in cases where no args were
1505 stored too!. */
1506 args_stored = 1;
1507
1508 /* Turn the Entry_GR field into a bitmask. */
1509 save_gr = 0;
1510 for (i = 3; i < u->Entry_GR + 3; i++)
1511 {
1512 /* Frame pointer gets saved into a special location. */
eded0a31 1513 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1514 continue;
1515
1516 save_gr |= (1 << i);
1517 }
1518 save_gr &= ~restart_gr;
1519
1520 /* Turn the Entry_FR field into a bitmask too. */
1521 save_fr = 0;
1522 for (i = 12; i < u->Entry_FR + 12; i++)
1523 save_fr |= (1 << i);
1524 save_fr &= ~restart_fr;
1525
a71f8c30
RC
1526 final_iteration = 0;
1527
c906108c
SS
1528 /* Loop until we find everything of interest or hit a branch.
1529
1530 For unoptimized GCC code and for any HP CC code this will never ever
1531 examine any user instructions.
1532
1533 For optimzied GCC code we're faced with problems. GCC will schedule
1534 its prologue and make prologue instructions available for delay slot
1535 filling. The end result is user code gets mixed in with the prologue
1536 and a prologue instruction may be in the delay slot of the first branch
1537 or call.
1538
1539 Some unexpected things are expected with debugging optimized code, so
1540 we allow this routine to walk past user instructions in optimized
1541 GCC code. */
1542 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1543 || args_stored)
1544 {
1545 unsigned int reg_num;
1546 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1547 unsigned long old_save_rp, old_save_sp, next_inst;
1548
1549 /* Save copies of all the triggers so we can compare them later
c5aa993b 1550 (only for HPC). */
c906108c
SS
1551 old_save_gr = save_gr;
1552 old_save_fr = save_fr;
1553 old_save_rp = save_rp;
1554 old_save_sp = save_sp;
1555 old_stack_remaining = stack_remaining;
1556
8defab1a 1557 status = target_read_memory (pc, buf, 4);
c906108c 1558 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1559
c906108c
SS
1560 /* Yow! */
1561 if (status != 0)
1562 return pc;
1563
1564 /* Note the interesting effects of this instruction. */
1565 stack_remaining -= prologue_inst_adjust_sp (inst);
1566
7be570e7
JM
1567 /* There are limited ways to store the return pointer into the
1568 stack. */
c4c79048 1569 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1570 save_rp = 0;
1571
104c1213 1572 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1573 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1574 if ((inst & 0xffffc000) == 0x6fc10000
1575 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1576 save_sp = 0;
1577
6426a772
JM
1578 /* Are we loading some register with an offset from the argument
1579 pointer? */
1580 if ((inst & 0xffe00000) == 0x37a00000
1581 || (inst & 0xffffffe0) == 0x081d0240)
1582 {
1583 pc += 4;
1584 continue;
1585 }
1586
c906108c
SS
1587 /* Account for general and floating-point register saves. */
1588 reg_num = inst_saves_gr (inst);
1589 save_gr &= ~(1 << reg_num);
1590
1591 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1592 Unfortunately args_stored only tells us that some arguments
1593 where stored into the stack. Not how many or what kind!
c906108c 1594
c5aa993b
JM
1595 This is a kludge as on the HP compiler sets this bit and it
1596 never does prologue scheduling. So once we see one, skip past
1597 all of them. We have similar code for the fp arg stores below.
c906108c 1598
c5aa993b
JM
1599 FIXME. Can still die if we have a mix of GR and FR argument
1600 stores! */
be8626e0 1601 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1602 && reg_num <= 26)
c906108c 1603 {
be8626e0 1604 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1605 && reg_num <= 26)
c906108c
SS
1606 {
1607 pc += 4;
8defab1a 1608 status = target_read_memory (pc, buf, 4);
c906108c
SS
1609 inst = extract_unsigned_integer (buf, 4);
1610 if (status != 0)
1611 return pc;
1612 reg_num = inst_saves_gr (inst);
1613 }
1614 args_stored = 0;
1615 continue;
1616 }
1617
1618 reg_num = inst_saves_fr (inst);
1619 save_fr &= ~(1 << reg_num);
1620
8defab1a 1621 status = target_read_memory (pc + 4, buf, 4);
c906108c 1622 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1623
c906108c
SS
1624 /* Yow! */
1625 if (status != 0)
1626 return pc;
1627
1628 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1629 save. */
c906108c
SS
1630 if ((inst & 0xfc000000) == 0x34000000
1631 && inst_saves_fr (next_inst) >= 4
819844ad 1632 && inst_saves_fr (next_inst)
be8626e0 1633 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1634 {
1635 /* So we drop into the code below in a reasonable state. */
1636 reg_num = inst_saves_fr (next_inst);
1637 pc -= 4;
1638 }
1639
1640 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1641 This is a kludge as on the HP compiler sets this bit and it
1642 never does prologue scheduling. So once we see one, skip past
1643 all of them. */
819844ad 1644 if (reg_num >= 4
be8626e0 1645 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1646 {
819844ad
UW
1647 while (reg_num >= 4
1648 && reg_num
be8626e0 1649 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1650 {
1651 pc += 8;
8defab1a 1652 status = target_read_memory (pc, buf, 4);
c906108c
SS
1653 inst = extract_unsigned_integer (buf, 4);
1654 if (status != 0)
1655 return pc;
1656 if ((inst & 0xfc000000) != 0x34000000)
1657 break;
8defab1a 1658 status = target_read_memory (pc + 4, buf, 4);
c906108c
SS
1659 next_inst = extract_unsigned_integer (buf, 4);
1660 if (status != 0)
1661 return pc;
1662 reg_num = inst_saves_fr (next_inst);
1663 }
1664 args_stored = 0;
1665 continue;
1666 }
1667
1668 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1669 instruction is in the delay slot of the first call/branch. */
a71f8c30 1670 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1671 break;
1672
1673 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1674 arguments were stored into the stack (boo hiss). This could
1675 cause this code to then skip a bunch of user insns (up to the
1676 first branch).
1677
1678 To combat this we try to identify when args_stored was bogusly
1679 set and clear it. We only do this when args_stored is nonzero,
1680 all other resources are accounted for, and nothing changed on
1681 this pass. */
c906108c 1682 if (args_stored
c5aa993b 1683 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1684 && old_save_gr == save_gr && old_save_fr == save_fr
1685 && old_save_rp == save_rp && old_save_sp == save_sp
1686 && old_stack_remaining == stack_remaining)
1687 break;
c5aa993b 1688
c906108c
SS
1689 /* Bump the PC. */
1690 pc += 4;
a71f8c30
RC
1691
1692 /* !stop_before_branch, so also look at the insn in the delay slot
1693 of the branch. */
1694 if (final_iteration)
1695 break;
1696 if (is_branch (inst))
1697 final_iteration = 1;
c906108c
SS
1698 }
1699
1700 /* We've got a tenative location for the end of the prologue. However
1701 because of limitations in the unwind descriptor mechanism we may
1702 have went too far into user code looking for the save of a register
1703 that does not exist. So, if there registers we expected to be saved
1704 but never were, mask them out and restart.
1705
1706 This should only happen in optimized code, and should be very rare. */
c5aa993b 1707 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1708 {
1709 pc = orig_pc;
1710 restart_gr = save_gr;
1711 restart_fr = save_fr;
1712 goto restart;
1713 }
1714
1715 return pc;
1716}
1717
1718
7be570e7
JM
1719/* Return the address of the PC after the last prologue instruction if
1720 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1721
1722static CORE_ADDR
fba45db2 1723after_prologue (CORE_ADDR pc)
c906108c
SS
1724{
1725 struct symtab_and_line sal;
1726 CORE_ADDR func_addr, func_end;
1727 struct symbol *f;
1728
7be570e7
JM
1729 /* If we can not find the symbol in the partial symbol table, then
1730 there is no hope we can determine the function's start address
1731 with this code. */
c906108c 1732 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1733 return 0;
c906108c 1734
7be570e7 1735 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1736 sal = find_pc_line (func_addr, 0);
1737
7be570e7
JM
1738 /* There are only two cases to consider. First, the end of the source line
1739 is within the function bounds. In that case we return the end of the
1740 source line. Second is the end of the source line extends beyond the
1741 bounds of the current function. We need to use the slow code to
1742 examine instructions in that case.
c906108c 1743
7be570e7
JM
1744 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1745 the wrong thing to do. In fact, it should be entirely possible for this
1746 function to always return zero since the slow instruction scanning code
1747 is supposed to *always* work. If it does not, then it is a bug. */
1748 if (sal.end < func_end)
1749 return sal.end;
c5aa993b 1750 else
7be570e7 1751 return 0;
c906108c
SS
1752}
1753
1754/* To skip prologues, I use this predicate. Returns either PC itself
1755 if the code at PC does not look like a function prologue; otherwise
a71f8c30
RC
1756 returns an address that (if we're lucky) follows the prologue.
1757
1758 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1759 It doesn't necessarily skips all the insns in the prologue. In fact
1760 we might not want to skip all the insns because a prologue insn may
1761 appear in the delay slot of the first branch, and we don't want to
1762 skip over the branch in that case. */
c906108c 1763
8d153463 1764static CORE_ADDR
6093d2eb 1765hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1766{
c5aa993b
JM
1767 unsigned long inst;
1768 int offset;
1769 CORE_ADDR post_prologue_pc;
1770 char buf[4];
c906108c 1771
c5aa993b
JM
1772 /* See if we can determine the end of the prologue via the symbol table.
1773 If so, then return either PC, or the PC after the prologue, whichever
1774 is greater. */
c906108c 1775
c5aa993b 1776 post_prologue_pc = after_prologue (pc);
c906108c 1777
7be570e7
JM
1778 /* If after_prologue returned a useful address, then use it. Else
1779 fall back on the instruction skipping code.
1780
1781 Some folks have claimed this causes problems because the breakpoint
1782 may be the first instruction of the prologue. If that happens, then
1783 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1784 if (post_prologue_pc != 0)
1785 return max (pc, post_prologue_pc);
c5aa993b 1786 else
be8626e0 1787 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1788}
1789
29d375ac 1790/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1791
29d375ac 1792static struct unwind_table_entry *
227e86ad 1793hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1794{
227e86ad 1795 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1796
1797 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1798 result of get_frame_address_in_block implies a problem.
93d42b30 1799 The bits should have been removed earlier, before the return
eb2f4a08 1800 value of frame_pc_unwind. That might be happening already;
93d42b30
DJ
1801 if it isn't, it should be fixed. Then this call can be
1802 removed. */
227e86ad 1803 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1804 return find_unwind_entry (pc);
1805}
1806
26d08f08
AC
1807struct hppa_frame_cache
1808{
1809 CORE_ADDR base;
1810 struct trad_frame_saved_reg *saved_regs;
1811};
1812
1813static struct hppa_frame_cache *
227e86ad 1814hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1815{
227e86ad 1816 struct gdbarch *gdbarch = get_frame_arch (this_frame);
26d08f08
AC
1817 struct hppa_frame_cache *cache;
1818 long saved_gr_mask;
1819 long saved_fr_mask;
1820 CORE_ADDR this_sp;
1821 long frame_size;
1822 struct unwind_table_entry *u;
9f7194c3 1823 CORE_ADDR prologue_end;
50b2f48a 1824 int fp_in_r1 = 0;
26d08f08
AC
1825 int i;
1826
369aa520
RC
1827 if (hppa_debug)
1828 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1829 frame_relative_level(this_frame));
369aa520 1830
26d08f08 1831 if ((*this_cache) != NULL)
369aa520
RC
1832 {
1833 if (hppa_debug)
1834 fprintf_unfiltered (gdb_stdlog, "base=0x%s (cached) }",
1835 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
1836 return (*this_cache);
1837 }
26d08f08
AC
1838 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1839 (*this_cache) = cache;
227e86ad 1840 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1841
1842 /* Yow! */
227e86ad 1843 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1844 if (!u)
369aa520
RC
1845 {
1846 if (hppa_debug)
1847 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1848 return (*this_cache);
1849 }
26d08f08
AC
1850
1851 /* Turn the Entry_GR field into a bitmask. */
1852 saved_gr_mask = 0;
1853 for (i = 3; i < u->Entry_GR + 3; i++)
1854 {
1855 /* Frame pointer gets saved into a special location. */
eded0a31 1856 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1857 continue;
1858
1859 saved_gr_mask |= (1 << i);
1860 }
1861
1862 /* Turn the Entry_FR field into a bitmask too. */
1863 saved_fr_mask = 0;
1864 for (i = 12; i < u->Entry_FR + 12; i++)
1865 saved_fr_mask |= (1 << i);
1866
1867 /* Loop until we find everything of interest or hit a branch.
1868
1869 For unoptimized GCC code and for any HP CC code this will never ever
1870 examine any user instructions.
1871
1872 For optimized GCC code we're faced with problems. GCC will schedule
1873 its prologue and make prologue instructions available for delay slot
1874 filling. The end result is user code gets mixed in with the prologue
1875 and a prologue instruction may be in the delay slot of the first branch
1876 or call.
1877
1878 Some unexpected things are expected with debugging optimized code, so
1879 we allow this routine to walk past user instructions in optimized
1880 GCC code. */
1881 {
1882 int final_iteration = 0;
46acf081 1883 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1884 int looking_for_sp = u->Save_SP;
1885 int looking_for_rp = u->Save_RP;
1886 int fp_loc = -1;
9f7194c3 1887
a71f8c30 1888 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1889 skip_prologue_using_sal, in case we stepped into a function without
1890 symbol information. hppa_skip_prologue also bounds the returned
1891 pc by the passed in pc, so it will not return a pc in the next
a71f8c30
RC
1892 function.
1893
1894 We used to call hppa_skip_prologue to find the end of the prologue,
1895 but if some non-prologue instructions get scheduled into the prologue,
1896 and the program is compiled with debug information, the "easy" way
1897 in hppa_skip_prologue will return a prologue end that is too early
1898 for us to notice any potential frame adjustments. */
d5c27f81 1899
ef02daa9
DJ
1900 /* We used to use get_frame_func to locate the beginning of the
1901 function to pass to skip_prologue. However, when objects are
1902 compiled without debug symbols, get_frame_func can return the wrong
46acf081
RC
1903 function (or 0). We can do better than that by using unwind records.
1904 This only works if the Region_description of the unwind record
1905 indicates that it includes the entry point of the function.
1906 HP compilers sometimes generate unwind records for regions that
1907 do not include the entry or exit point of a function. GNU tools
1908 do not do this. */
1909
1910 if ((u->Region_description & 0x2) == 0)
1911 start_pc = u->region_start;
1912 else
227e86ad 1913 start_pc = get_frame_func (this_frame);
d5c27f81 1914
be8626e0 1915 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1916 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1917
1918 if (prologue_end != 0 && end_pc > prologue_end)
1919 end_pc = prologue_end;
1920
26d08f08 1921 frame_size = 0;
9f7194c3 1922
46acf081 1923 for (pc = start_pc;
26d08f08
AC
1924 ((saved_gr_mask || saved_fr_mask
1925 || looking_for_sp || looking_for_rp
1926 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1927 && pc < end_pc);
26d08f08
AC
1928 pc += 4)
1929 {
1930 int reg;
1931 char buf4[4];
4a302917
RC
1932 long inst;
1933
227e86ad 1934 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1935 {
8a3fe4f8 1936 error (_("Cannot read instruction at 0x%s."), paddr_nz (pc));
4a302917
RC
1937 return (*this_cache);
1938 }
1939
1940 inst = extract_unsigned_integer (buf4, sizeof buf4);
9f7194c3 1941
26d08f08
AC
1942 /* Note the interesting effects of this instruction. */
1943 frame_size += prologue_inst_adjust_sp (inst);
1944
1945 /* There are limited ways to store the return pointer into the
1946 stack. */
1947 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1948 {
1949 looking_for_rp = 0;
34f75cc1 1950 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1951 }
dfaf8edb
MK
1952 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1953 {
1954 looking_for_rp = 0;
1955 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1956 }
c4c79048
RC
1957 else if (inst == 0x0fc212c1
1958 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1959 {
1960 looking_for_rp = 0;
34f75cc1 1961 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1962 }
1963
1964 /* Check to see if we saved SP into the stack. This also
1965 happens to indicate the location of the saved frame
1966 pointer. */
1967 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1968 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1969 {
1970 looking_for_sp = 0;
eded0a31 1971 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1972 }
50b2f48a
RC
1973 else if (inst == 0x08030241) /* copy %r3, %r1 */
1974 {
1975 fp_in_r1 = 1;
1976 }
26d08f08
AC
1977
1978 /* Account for general and floating-point register saves. */
1979 reg = inst_saves_gr (inst);
1980 if (reg >= 3 && reg <= 18
eded0a31 1981 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1982 {
1983 saved_gr_mask &= ~(1 << reg);
abc485a1 1984 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1985 /* stwm with a positive displacement is a _post_
1986 _modify_. */
1987 cache->saved_regs[reg].addr = 0;
1988 else if ((inst & 0xfc00000c) == 0x70000008)
1989 /* A std has explicit post_modify forms. */
1990 cache->saved_regs[reg].addr = 0;
1991 else
1992 {
1993 CORE_ADDR offset;
1994
1995 if ((inst >> 26) == 0x1c)
1996 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1997 else if ((inst >> 26) == 0x03)
abc485a1 1998 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1999 else
abc485a1 2000 offset = hppa_extract_14 (inst);
26d08f08
AC
2001
2002 /* Handle code with and without frame pointers. */
2003 if (u->Save_SP)
2004 cache->saved_regs[reg].addr = offset;
2005 else
2006 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
2007 }
2008 }
2009
2010 /* GCC handles callee saved FP regs a little differently.
2011
2012 It emits an instruction to put the value of the start of
2013 the FP store area into %r1. It then uses fstds,ma with a
2014 basereg of %r1 for the stores.
2015
2016 HP CC emits them at the current stack pointer modifying the
2017 stack pointer as it stores each register. */
2018
2019 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2020 if ((inst & 0xffffc000) == 0x34610000
2021 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2022 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2023
2024 reg = inst_saves_fr (inst);
2025 if (reg >= 12 && reg <= 21)
2026 {
2027 /* Note +4 braindamage below is necessary because the FP
2028 status registers are internally 8 registers rather than
2029 the expected 4 registers. */
2030 saved_fr_mask &= ~(1 << reg);
2031 if (fp_loc == -1)
2032 {
2033 /* 1st HP CC FP register store. After this
2034 instruction we've set enough state that the GCC and
2035 HPCC code are both handled in the same manner. */
34f75cc1 2036 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2037 fp_loc = 8;
2038 }
2039 else
2040 {
eded0a31 2041 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2042 fp_loc += 8;
2043 }
2044 }
2045
2046 /* Quit if we hit any kind of branch the previous iteration. */
2047 if (final_iteration)
2048 break;
2049 /* We want to look precisely one instruction beyond the branch
2050 if we have not found everything yet. */
2051 if (is_branch (inst))
2052 final_iteration = 1;
2053 }
2054 }
2055
2056 {
2057 /* The frame base always represents the value of %sp at entry to
2058 the current function (and is thus equivalent to the "saved"
2059 stack pointer. */
227e86ad
JB
2060 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2061 HPPA_SP_REGNUM);
ed70ba00 2062 CORE_ADDR fp;
9f7194c3
RC
2063
2064 if (hppa_debug)
2065 fprintf_unfiltered (gdb_stdlog, " (this_sp=0x%s, pc=0x%s, "
2066 "prologue_end=0x%s) ",
2067 paddr_nz (this_sp),
227e86ad 2068 paddr_nz (get_frame_pc (this_frame)),
9f7194c3
RC
2069 paddr_nz (prologue_end));
2070
ed70ba00
RC
2071 /* Check to see if a frame pointer is available, and use it for
2072 frame unwinding if it is.
2073
2074 There are some situations where we need to rely on the frame
2075 pointer to do stack unwinding. For example, if a function calls
2076 alloca (), the stack pointer can get adjusted inside the body of
2077 the function. In this case, the ABI requires that the compiler
2078 maintain a frame pointer for the function.
2079
2080 The unwind record has a flag (alloca_frame) that indicates that
2081 a function has a variable frame; unfortunately, gcc/binutils
2082 does not set this flag. Instead, whenever a frame pointer is used
2083 and saved on the stack, the Save_SP flag is set. We use this to
2084 decide whether to use the frame pointer for unwinding.
2085
ed70ba00
RC
2086 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2087 instead of Save_SP. */
2088
227e86ad 2089 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2090
6fcecea0 2091 if (u->alloca_frame)
46acf081 2092 fp -= u->Total_frame_size << 3;
ed70ba00 2093
227e86ad 2094 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2095 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2096 {
2097 cache->base = fp;
2098
2099 if (hppa_debug)
9ed5ba24 2100 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [frame pointer]",
ed70ba00
RC
2101 paddr_nz (cache->base));
2102 }
1658da49
RC
2103 else if (u->Save_SP
2104 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2105 {
9f7194c3
RC
2106 /* Both we're expecting the SP to be saved and the SP has been
2107 saved. The entry SP value is saved at this frame's SP
2108 address. */
819844ad 2109 cache->base = read_memory_integer
65c5db89 2110 (this_sp, gdbarch_ptr_bit (gdbarch) / 8);
9f7194c3
RC
2111
2112 if (hppa_debug)
9ed5ba24 2113 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [saved]",
9f7194c3 2114 paddr_nz (cache->base));
9f7194c3 2115 }
26d08f08 2116 else
9f7194c3 2117 {
1658da49
RC
2118 /* The prologue has been slowly allocating stack space. Adjust
2119 the SP back. */
2120 cache->base = this_sp - frame_size;
9f7194c3 2121 if (hppa_debug)
9ed5ba24 2122 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [unwind adjust]",
9f7194c3
RC
2123 paddr_nz (cache->base));
2124
2125 }
eded0a31 2126 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2127 }
2128
412275d5
AC
2129 /* The PC is found in the "return register", "Millicode" uses "r31"
2130 as the return register while normal code uses "rp". */
26d08f08 2131 if (u->Millicode)
9f7194c3 2132 {
5859efe5 2133 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2134 {
2135 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2136 if (hppa_debug)
2137 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2138 }
9f7194c3
RC
2139 else
2140 {
227e86ad 2141 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2142 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2143 if (hppa_debug)
2144 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2145 }
2146 }
26d08f08 2147 else
9f7194c3 2148 {
34f75cc1 2149 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2150 {
2151 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2152 cache->saved_regs[HPPA_RP_REGNUM];
2153 if (hppa_debug)
2154 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2155 }
9f7194c3
RC
2156 else
2157 {
227e86ad
JB
2158 ULONGEST rp = get_frame_register_unsigned (this_frame,
2159 HPPA_RP_REGNUM);
34f75cc1 2160 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2161 if (hppa_debug)
2162 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2163 }
2164 }
26d08f08 2165
50b2f48a
RC
2166 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2167 frame. However, there is a one-insn window where we haven't saved it
2168 yet, but we've already clobbered it. Detect this case and fix it up.
2169
2170 The prologue sequence for frame-pointer functions is:
2171 0: stw %rp, -20(%sp)
2172 4: copy %r3, %r1
2173 8: copy %sp, %r3
2174 c: stw,ma %r1, XX(%sp)
2175
2176 So if we are at offset c, the r3 value that we want is not yet saved
2177 on the stack, but it's been overwritten. The prologue analyzer will
2178 set fp_in_r1 when it sees the copy insn so we know to get the value
2179 from r1 instead. */
2180 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2181 && fp_in_r1)
2182 {
227e86ad 2183 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2184 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2185 }
1658da49 2186
26d08f08
AC
2187 {
2188 /* Convert all the offsets into addresses. */
2189 int reg;
65c5db89 2190 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2191 {
2192 if (trad_frame_addr_p (cache->saved_regs, reg))
2193 cache->saved_regs[reg].addr += cache->base;
2194 }
2195 }
2196
f77a2124 2197 {
f77a2124
RC
2198 struct gdbarch_tdep *tdep;
2199
f77a2124
RC
2200 tdep = gdbarch_tdep (gdbarch);
2201
2202 if (tdep->unwind_adjust_stub)
227e86ad 2203 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2204 }
2205
369aa520
RC
2206 if (hppa_debug)
2207 fprintf_unfiltered (gdb_stdlog, "base=0x%s }",
2208 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2209 return (*this_cache);
2210}
2211
2212static void
227e86ad
JB
2213hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2214 struct frame_id *this_id)
26d08f08 2215{
d5c27f81 2216 struct hppa_frame_cache *info;
227e86ad 2217 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2218 struct unwind_table_entry *u;
2219
227e86ad
JB
2220 info = hppa_frame_cache (this_frame, this_cache);
2221 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2222
2223 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2224}
2225
227e86ad
JB
2226static struct value *
2227hppa_frame_prev_register (struct frame_info *this_frame,
2228 void **this_cache, int regnum)
26d08f08 2229{
227e86ad
JB
2230 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2231
2232 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
2233}
2234
2235static int
2236hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2237 struct frame_info *this_frame, void **this_cache)
2238{
2239 if (hppa_find_unwind_entry_in_block (this_frame))
2240 return 1;
2241
2242 return 0;
0da28f8a
RC
2243}
2244
2245static const struct frame_unwind hppa_frame_unwind =
2246{
2247 NORMAL_FRAME,
2248 hppa_frame_this_id,
227e86ad
JB
2249 hppa_frame_prev_register,
2250 NULL,
2251 hppa_frame_unwind_sniffer
0da28f8a
RC
2252};
2253
0da28f8a
RC
2254/* This is a generic fallback frame unwinder that kicks in if we fail all
2255 the other ones. Normally we would expect the stub and regular unwinder
2256 to work, but in some cases we might hit a function that just doesn't
2257 have any unwind information available. In this case we try to do
2258 unwinding solely based on code reading. This is obviously going to be
2259 slow, so only use this as a last resort. Currently this will only
2260 identify the stack and pc for the frame. */
2261
2262static struct hppa_frame_cache *
227e86ad 2263hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a
RC
2264{
2265 struct hppa_frame_cache *cache;
4ba6a975
MK
2266 unsigned int frame_size = 0;
2267 int found_rp = 0;
2268 CORE_ADDR start_pc;
0da28f8a 2269
d5c27f81 2270 if (hppa_debug)
4ba6a975
MK
2271 fprintf_unfiltered (gdb_stdlog,
2272 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2273 frame_relative_level (this_frame));
d5c27f81 2274
0da28f8a
RC
2275 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2276 (*this_cache) = cache;
227e86ad 2277 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2278
227e86ad 2279 start_pc = get_frame_func (this_frame);
4ba6a975 2280 if (start_pc)
0da28f8a 2281 {
227e86ad 2282 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2283 CORE_ADDR pc;
0da28f8a 2284
4ba6a975
MK
2285 for (pc = start_pc; pc < cur_pc; pc += 4)
2286 {
2287 unsigned int insn;
0da28f8a 2288
4ba6a975
MK
2289 insn = read_memory_unsigned_integer (pc, 4);
2290 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2291
4ba6a975
MK
2292 /* There are limited ways to store the return pointer into the
2293 stack. */
2294 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2295 {
2296 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2297 found_rp = 1;
2298 }
c4c79048
RC
2299 else if (insn == 0x0fc212c1
2300 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2301 {
2302 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2303 found_rp = 1;
2304 }
2305 }
412275d5 2306 }
0da28f8a 2307
d5c27f81 2308 if (hppa_debug)
4ba6a975
MK
2309 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2310 frame_size, found_rp);
d5c27f81 2311
227e86ad 2312 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2313 cache->base -= frame_size;
6d1be3f1 2314 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2315
2316 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2317 {
2318 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2319 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2320 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2321 }
412275d5
AC
2322 else
2323 {
4ba6a975 2324 ULONGEST rp;
227e86ad 2325 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2326 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2327 }
0da28f8a
RC
2328
2329 return cache;
26d08f08
AC
2330}
2331
0da28f8a 2332static void
227e86ad 2333hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2334 struct frame_id *this_id)
2335{
2336 struct hppa_frame_cache *info =
227e86ad
JB
2337 hppa_fallback_frame_cache (this_frame, this_cache);
2338
2339 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2340}
2341
227e86ad
JB
2342static struct value *
2343hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2344 void **this_cache, int regnum)
0da28f8a
RC
2345{
2346 struct hppa_frame_cache *info =
227e86ad
JB
2347 hppa_fallback_frame_cache (this_frame, this_cache);
2348
2349 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
0da28f8a
RC
2350}
2351
2352static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2353{
2354 NORMAL_FRAME,
0da28f8a 2355 hppa_fallback_frame_this_id,
227e86ad
JB
2356 hppa_fallback_frame_prev_register,
2357 NULL,
2358 default_frame_sniffer
26d08f08
AC
2359};
2360
7f07c5b6
RC
2361/* Stub frames, used for all kinds of call stubs. */
2362struct hppa_stub_unwind_cache
2363{
2364 CORE_ADDR base;
2365 struct trad_frame_saved_reg *saved_regs;
2366};
2367
2368static struct hppa_stub_unwind_cache *
227e86ad 2369hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2370 void **this_cache)
2371{
227e86ad 2372 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2373 struct hppa_stub_unwind_cache *info;
22b0923d 2374 struct unwind_table_entry *u;
7f07c5b6
RC
2375
2376 if (*this_cache)
2377 return *this_cache;
2378
2379 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2380 *this_cache = info;
227e86ad 2381 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2382
227e86ad 2383 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2384
090ccbb7 2385 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2386 {
2387 /* HPUX uses export stubs in function calls; the export stub clobbers
2388 the return value of the caller, and, later restores it from the
2389 stack. */
227e86ad 2390 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2391
2392 if (u && u->stub_unwind.stub_type == EXPORT)
2393 {
2394 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2395
2396 return info;
2397 }
2398 }
2399
2400 /* By default we assume that stubs do not change the rp. */
2401 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2402
7f07c5b6
RC
2403 return info;
2404}
2405
2406static void
227e86ad 2407hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2408 void **this_prologue_cache,
2409 struct frame_id *this_id)
2410{
2411 struct hppa_stub_unwind_cache *info
227e86ad 2412 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2413
2414 if (info)
227e86ad 2415 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
f1b38a57
RC
2416 else
2417 *this_id = null_frame_id;
7f07c5b6
RC
2418}
2419
227e86ad
JB
2420static struct value *
2421hppa_stub_frame_prev_register (struct frame_info *this_frame,
2422 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2423{
2424 struct hppa_stub_unwind_cache *info
227e86ad 2425 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2426
227e86ad 2427 if (info == NULL)
8a3fe4f8 2428 error (_("Requesting registers from null frame."));
7f07c5b6 2429
227e86ad
JB
2430 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
2431}
7f07c5b6 2432
227e86ad
JB
2433static int
2434hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2435 struct frame_info *this_frame,
2436 void **this_cache)
7f07c5b6 2437{
227e86ad
JB
2438 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2439 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2440 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2441
6d1be3f1 2442 if (pc == 0
84674fe1
AC
2443 || (tdep->in_solib_call_trampoline != NULL
2444 && tdep->in_solib_call_trampoline (pc, NULL))
464963c9 2445 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2446 return 1;
2447 return 0;
7f07c5b6
RC
2448}
2449
227e86ad
JB
2450static const struct frame_unwind hppa_stub_frame_unwind = {
2451 NORMAL_FRAME,
2452 hppa_stub_frame_this_id,
2453 hppa_stub_frame_prev_register,
2454 NULL,
2455 hppa_stub_unwind_sniffer
2456};
2457
26d08f08 2458static struct frame_id
227e86ad 2459hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2460{
227e86ad
JB
2461 return frame_id_build (get_frame_register_unsigned (this_frame,
2462 HPPA_SP_REGNUM),
2463 get_frame_pc (this_frame));
26d08f08
AC
2464}
2465
cc72850f 2466CORE_ADDR
26d08f08
AC
2467hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2468{
fe46cd3a
RC
2469 ULONGEST ipsw;
2470 CORE_ADDR pc;
2471
cc72850f
MK
2472 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2473 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2474
2475 /* If the current instruction is nullified, then we are effectively
2476 still executing the previous instruction. Pretend we are still
cc72850f
MK
2477 there. This is needed when single stepping; if the nullified
2478 instruction is on a different line, we don't want GDB to think
2479 we've stepped onto that line. */
fe46cd3a
RC
2480 if (ipsw & 0x00200000)
2481 pc -= 4;
2482
cc72850f 2483 return pc & ~0x3;
26d08f08
AC
2484}
2485
ff644745
JB
2486/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2487 Return NULL if no such symbol was found. */
2488
2489struct minimal_symbol *
2490hppa_lookup_stub_minimal_symbol (const char *name,
2491 enum unwind_stub_types stub_type)
2492{
2493 struct objfile *objfile;
2494 struct minimal_symbol *msym;
2495
2496 ALL_MSYMBOLS (objfile, msym)
2497 {
2498 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2499 {
2500 struct unwind_table_entry *u;
2501
2502 u = find_unwind_entry (SYMBOL_VALUE (msym));
2503 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2504 return msym;
2505 }
2506 }
2507
2508 return NULL;
2509}
2510
c906108c 2511static void
fba45db2 2512unwind_command (char *exp, int from_tty)
c906108c
SS
2513{
2514 CORE_ADDR address;
2515 struct unwind_table_entry *u;
2516
2517 /* If we have an expression, evaluate it and use it as the address. */
2518
2519 if (exp != 0 && *exp != 0)
2520 address = parse_and_eval_address (exp);
2521 else
2522 return;
2523
2524 u = find_unwind_entry (address);
2525
2526 if (!u)
2527 {
2528 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2529 return;
2530 }
2531
99d64d77 2532 printf_unfiltered ("unwind_table_entry (0x%lx):\n", (unsigned long)u);
c906108c
SS
2533
2534 printf_unfiltered ("\tregion_start = ");
2535 print_address (u->region_start, gdb_stdout);
d5c27f81 2536 gdb_flush (gdb_stdout);
c906108c
SS
2537
2538 printf_unfiltered ("\n\tregion_end = ");
2539 print_address (u->region_end, gdb_stdout);
d5c27f81 2540 gdb_flush (gdb_stdout);
c906108c 2541
c906108c 2542#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2543
2544 printf_unfiltered ("\n\tflags =");
2545 pif (Cannot_unwind);
2546 pif (Millicode);
2547 pif (Millicode_save_sr0);
2548 pif (Entry_SR);
2549 pif (Args_stored);
2550 pif (Variable_Frame);
2551 pif (Separate_Package_Body);
2552 pif (Frame_Extension_Millicode);
2553 pif (Stack_Overflow_Check);
2554 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2555 pif (sr4export);
2556 pif (cxx_info);
2557 pif (cxx_try_catch);
2558 pif (sched_entry_seq);
c906108c
SS
2559 pif (Save_SP);
2560 pif (Save_RP);
2561 pif (Save_MRP_in_frame);
6fcecea0 2562 pif (save_r19);
c906108c
SS
2563 pif (Cleanup_defined);
2564 pif (MPE_XL_interrupt_marker);
2565 pif (HP_UX_interrupt_marker);
2566 pif (Large_frame);
6fcecea0 2567 pif (alloca_frame);
c906108c
SS
2568
2569 putchar_unfiltered ('\n');
2570
c906108c 2571#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2572
2573 pin (Region_description);
2574 pin (Entry_FR);
2575 pin (Entry_GR);
2576 pin (Total_frame_size);
57dac9e1
RC
2577
2578 if (u->stub_unwind.stub_type)
2579 {
2580 printf_unfiltered ("\tstub type = ");
2581 switch (u->stub_unwind.stub_type)
2582 {
2583 case LONG_BRANCH:
2584 printf_unfiltered ("long branch\n");
2585 break;
2586 case PARAMETER_RELOCATION:
2587 printf_unfiltered ("parameter relocation\n");
2588 break;
2589 case EXPORT:
2590 printf_unfiltered ("export\n");
2591 break;
2592 case IMPORT:
2593 printf_unfiltered ("import\n");
2594 break;
2595 case IMPORT_SHLIB:
2596 printf_unfiltered ("import shlib\n");
2597 break;
2598 default:
2599 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2600 }
2601 }
c906108c 2602}
c906108c 2603
38ca4e0c
MK
2604/* Return the GDB type object for the "standard" data type of data in
2605 register REGNUM. */
d709c020 2606
eded0a31 2607static struct type *
38ca4e0c 2608hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2609{
38ca4e0c 2610 if (regnum < HPPA_FP4_REGNUM)
eded0a31 2611 return builtin_type_uint32;
d709c020 2612 else
8da61cc4 2613 return builtin_type_ieee_single;
d709c020
JB
2614}
2615
eded0a31 2616static struct type *
38ca4e0c 2617hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2618{
38ca4e0c 2619 if (regnum < HPPA64_FP4_REGNUM)
eded0a31 2620 return builtin_type_uint64;
3ff7cf9e 2621 else
8da61cc4 2622 return builtin_type_ieee_double;
3ff7cf9e
JB
2623}
2624
38ca4e0c
MK
2625/* Return non-zero if REGNUM is not a register available to the user
2626 through ptrace/ttrace. */
d709c020 2627
8d153463 2628static int
64a3914f 2629hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2630{
2631 return (regnum == 0
34f75cc1
RC
2632 || regnum == HPPA_PCSQ_HEAD_REGNUM
2633 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2634 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2635}
d709c020 2636
d037d088 2637static int
64a3914f 2638hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2639{
2640 /* cr26 and cr27 are readable (but not writable) from userspace. */
2641 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2642 return 0;
2643 else
64a3914f 2644 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2645}
2646
38ca4e0c 2647static int
64a3914f 2648hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2649{
2650 return (regnum == 0
2651 || regnum == HPPA_PCSQ_HEAD_REGNUM
2652 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2653 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2654}
2655
d037d088 2656static int
64a3914f 2657hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2658{
2659 /* cr26 and cr27 are readable (but not writable) from userspace. */
2660 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2661 return 0;
2662 else
64a3914f 2663 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2664}
2665
8d153463 2666static CORE_ADDR
24568a2c 2667hppa_smash_text_address (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2668{
2669 /* The low two bits of the PC on the PA contain the privilege level.
2670 Some genius implementing a (non-GCC) compiler apparently decided
2671 this means that "addresses" in a text section therefore include a
2672 privilege level, and thus symbol tables should contain these bits.
2673 This seems like a bonehead thing to do--anyway, it seems to work
2674 for our purposes to just ignore those bits. */
2675
2676 return (addr &= ~0x3);
2677}
2678
e127f0db
MK
2679/* Get the ARGIth function argument for the current function. */
2680
4a302917 2681static CORE_ADDR
143985b7
AF
2682hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2683 struct type *type)
2684{
e127f0db 2685 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2686}
2687
0f8d9d59
RC
2688static void
2689hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2690 int regnum, gdb_byte *buf)
0f8d9d59
RC
2691{
2692 ULONGEST tmp;
2693
2694 regcache_raw_read_unsigned (regcache, regnum, &tmp);
34f75cc1 2695 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
0f8d9d59 2696 tmp &= ~0x3;
e127f0db 2697 store_unsigned_integer (buf, sizeof tmp, tmp);
0f8d9d59
RC
2698}
2699
d49771ef 2700static CORE_ADDR
e38c262f 2701hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2702{
2703 return 0;
2704}
2705
227e86ad
JB
2706struct value *
2707hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2708 struct trad_frame_saved_reg saved_regs[],
227e86ad 2709 int regnum)
0da28f8a 2710{
227e86ad 2711 struct gdbarch *arch = get_frame_arch (this_frame);
8f4e467c 2712
8693c419
MK
2713 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2714 {
227e86ad
JB
2715 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2716 CORE_ADDR pc;
2717 struct value *pcoq_val =
2718 trad_frame_get_prev_register (this_frame, saved_regs,
2719 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2720
227e86ad
JB
2721 pc = extract_unsigned_integer (value_contents_all (pcoq_val), size);
2722 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2723 }
0da28f8a 2724
cc72850f
MK
2725 /* Make sure the "flags" register is zero in all unwound frames.
2726 The "flags" registers is a HP-UX specific wart, and only the code
2727 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2728 with it here. This shouldn't affect other systems since those
2729 should provide zero for the "flags" register anyway. */
2730 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2731 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2732
227e86ad 2733 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2734}
8693c419 2735\f
0da28f8a 2736
34f55018
MK
2737/* An instruction to match. */
2738struct insn_pattern
2739{
2740 unsigned int data; /* See if it matches this.... */
2741 unsigned int mask; /* ... with this mask. */
2742};
2743
2744/* See bfd/elf32-hppa.c */
2745static struct insn_pattern hppa_long_branch_stub[] = {
2746 /* ldil LR'xxx,%r1 */
2747 { 0x20200000, 0xffe00000 },
2748 /* be,n RR'xxx(%sr4,%r1) */
2749 { 0xe0202002, 0xffe02002 },
2750 { 0, 0 }
2751};
2752
2753static struct insn_pattern hppa_long_branch_pic_stub[] = {
2754 /* b,l .+8, %r1 */
2755 { 0xe8200000, 0xffe00000 },
2756 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2757 { 0x28200000, 0xffe00000 },
2758 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2759 { 0xe0202002, 0xffe02002 },
2760 { 0, 0 }
2761};
2762
2763static struct insn_pattern hppa_import_stub[] = {
2764 /* addil LR'xxx, %dp */
2765 { 0x2b600000, 0xffe00000 },
2766 /* ldw RR'xxx(%r1), %r21 */
2767 { 0x48350000, 0xffffb000 },
2768 /* bv %r0(%r21) */
2769 { 0xeaa0c000, 0xffffffff },
2770 /* ldw RR'xxx+4(%r1), %r19 */
2771 { 0x48330000, 0xffffb000 },
2772 { 0, 0 }
2773};
2774
2775static struct insn_pattern hppa_import_pic_stub[] = {
2776 /* addil LR'xxx,%r19 */
2777 { 0x2a600000, 0xffe00000 },
2778 /* ldw RR'xxx(%r1),%r21 */
2779 { 0x48350000, 0xffffb000 },
2780 /* bv %r0(%r21) */
2781 { 0xeaa0c000, 0xffffffff },
2782 /* ldw RR'xxx+4(%r1),%r19 */
2783 { 0x48330000, 0xffffb000 },
2784 { 0, 0 },
2785};
2786
2787static struct insn_pattern hppa_plt_stub[] = {
2788 /* b,l 1b, %r20 - 1b is 3 insns before here */
2789 { 0xea9f1fdd, 0xffffffff },
2790 /* depi 0,31,2,%r20 */
2791 { 0xd6801c1e, 0xffffffff },
2792 { 0, 0 }
2793};
2794
2795static struct insn_pattern hppa_sigtramp[] = {
2796 /* ldi 0, %r25 or ldi 1, %r25 */
2797 { 0x34190000, 0xfffffffd },
2798 /* ldi __NR_rt_sigreturn, %r20 */
2799 { 0x3414015a, 0xffffffff },
2800 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2801 { 0xe4008200, 0xffffffff },
2802 /* nop */
2803 { 0x08000240, 0xffffffff },
2804 { 0, 0 }
2805};
2806
2807/* Maximum number of instructions on the patterns above. */
2808#define HPPA_MAX_INSN_PATTERN_LEN 4
2809
2810/* Return non-zero if the instructions at PC match the series
2811 described in PATTERN, or zero otherwise. PATTERN is an array of
2812 'struct insn_pattern' objects, terminated by an entry whose mask is
2813 zero.
2814
2815 When the match is successful, fill INSN[i] with what PATTERN[i]
2816 matched. */
2817
2818static int
2819hppa_match_insns (CORE_ADDR pc, struct insn_pattern *pattern,
2820 unsigned int *insn)
2821{
2822 CORE_ADDR npc = pc;
2823 int i;
2824
2825 for (i = 0; pattern[i].mask; i++)
2826 {
2827 gdb_byte buf[HPPA_INSN_SIZE];
2828
8defab1a 2829 target_read_memory (npc, buf, HPPA_INSN_SIZE);
34f55018
MK
2830 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE);
2831 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2832 npc += 4;
2833 else
2834 return 0;
2835 }
2836
2837 return 1;
2838}
2839
2840/* This relaxed version of the insstruction matcher allows us to match
2841 from somewhere inside the pattern, by looking backwards in the
2842 instruction scheme. */
2843
2844static int
2845hppa_match_insns_relaxed (CORE_ADDR pc, struct insn_pattern *pattern,
2846 unsigned int *insn)
2847{
2848 int offset, len = 0;
2849
2850 while (pattern[len].mask)
2851 len++;
2852
2853 for (offset = 0; offset < len; offset++)
2854 if (hppa_match_insns (pc - offset * HPPA_INSN_SIZE, pattern, insn))
2855 return 1;
2856
2857 return 0;
2858}
2859
2860static int
2861hppa_in_dyncall (CORE_ADDR pc)
2862{
2863 struct unwind_table_entry *u;
2864
2865 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2866 if (!u)
2867 return 0;
2868
2869 return (pc >= u->region_start && pc <= u->region_end);
2870}
2871
2872int
2873hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name)
2874{
2875 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2876 struct unwind_table_entry *u;
2877
2878 if (in_plt_section (pc, name) || hppa_in_dyncall (pc))
2879 return 1;
2880
2881 /* The GNU toolchain produces linker stubs without unwind
2882 information. Since the pattern matching for linker stubs can be
2883 quite slow, so bail out if we do have an unwind entry. */
2884
2885 u = find_unwind_entry (pc);
806e23c0 2886 if (u != NULL)
34f55018
MK
2887 return 0;
2888
2889 return (hppa_match_insns_relaxed (pc, hppa_import_stub, insn)
2890 || hppa_match_insns_relaxed (pc, hppa_import_pic_stub, insn)
2891 || hppa_match_insns_relaxed (pc, hppa_long_branch_stub, insn)
2892 || hppa_match_insns_relaxed (pc, hppa_long_branch_pic_stub, insn));
2893}
2894
2895/* This code skips several kind of "trampolines" used on PA-RISC
2896 systems: $$dyncall, import stubs and PLT stubs. */
2897
2898CORE_ADDR
52f729a7 2899hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018
MK
2900{
2901 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2902 int dp_rel;
2903
2904 /* $$dyncall handles both PLABELs and direct addresses. */
2905 if (hppa_in_dyncall (pc))
2906 {
52f729a7 2907 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2908
2909 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2910 if (pc & 0x2)
2911 pc = read_memory_typed_address (pc & ~0x3, builtin_type_void_func_ptr);
2912
2913 return pc;
2914 }
2915
2916 dp_rel = hppa_match_insns (pc, hppa_import_stub, insn);
2917 if (dp_rel || hppa_match_insns (pc, hppa_import_pic_stub, insn))
2918 {
2919 /* Extract the target address from the addil/ldw sequence. */
2920 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2921
2922 if (dp_rel)
52f729a7 2923 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2924 else
52f729a7 2925 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2926
2927 /* fallthrough */
2928 }
2929
2930 if (in_plt_section (pc, NULL))
2931 {
2932 pc = read_memory_typed_address (pc, builtin_type_void_func_ptr);
2933
2934 /* If the PLT slot has not yet been resolved, the target will be
2935 the PLT stub. */
2936 if (in_plt_section (pc, NULL))
2937 {
2938 /* Sanity check: are we pointing to the PLT stub? */
2939 if (!hppa_match_insns (pc, hppa_plt_stub, insn))
2940 {
2941 warning (_("Cannot resolve PLT stub at 0x%s."), paddr_nz (pc));
2942 return 0;
2943 }
2944
2945 /* This should point to the fixup routine. */
2946 pc = read_memory_typed_address (pc + 8, builtin_type_void_func_ptr);
2947 }
2948 }
2949
2950 return pc;
2951}
2952\f
2953
8e8b2dba
MC
2954/* Here is a table of C type sizes on hppa with various compiles
2955 and options. I measured this on PA 9000/800 with HP-UX 11.11
2956 and these compilers:
2957
2958 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2959 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2960 /opt/aCC/bin/aCC B3910B A.03.45
2961 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2962
2963 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2964 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2965 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2966 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2967 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2968 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2969 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2970 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2971
2972 Each line is:
2973
2974 compiler and options
2975 char, short, int, long, long long
2976 float, double, long double
2977 char *, void (*)()
2978
2979 So all these compilers use either ILP32 or LP64 model.
2980 TODO: gcc has more options so it needs more investigation.
2981
a2379359
MC
2982 For floating point types, see:
2983
2984 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2985 HP-UX floating-point guide, hpux 11.00
2986
8e8b2dba
MC
2987 -- chastain 2003-12-18 */
2988
e6e68f1f
JB
2989static struct gdbarch *
2990hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2991{
3ff7cf9e 2992 struct gdbarch_tdep *tdep;
e6e68f1f 2993 struct gdbarch *gdbarch;
59623e27
JB
2994
2995 /* Try to determine the ABI of the object we are loading. */
4be87837 2996 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2997 {
4be87837
DJ
2998 /* If it's a SOM file, assume it's HP/UX SOM. */
2999 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3000 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3001 }
e6e68f1f
JB
3002
3003 /* find a candidate among the list of pre-declared architectures. */
3004 arches = gdbarch_list_lookup_by_info (arches, &info);
3005 if (arches != NULL)
3006 return (arches->gdbarch);
3007
3008 /* If none found, then allocate and initialize one. */
fdd72f95 3009 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
3010 gdbarch = gdbarch_alloc (&info, tdep);
3011
3012 /* Determine from the bfd_arch_info structure if we are dealing with
3013 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3014 then default to a 32bit machine. */
3015 if (info.bfd_arch_info != NULL)
3016 tdep->bytes_per_address =
3017 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3018 else
3019 tdep->bytes_per_address = 4;
3020
d49771ef
RC
3021 tdep->find_global_pointer = hppa_find_global_pointer;
3022
3ff7cf9e
JB
3023 /* Some parts of the gdbarch vector depend on whether we are running
3024 on a 32 bits or 64 bits target. */
3025 switch (tdep->bytes_per_address)
3026 {
3027 case 4:
3028 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3029 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3030 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3031 set_gdbarch_cannot_store_register (gdbarch,
3032 hppa32_cannot_store_register);
3033 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3034 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3035 break;
3036 case 8:
3037 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3038 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3039 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3040 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3041 set_gdbarch_cannot_store_register (gdbarch,
3042 hppa64_cannot_store_register);
3043 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3044 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3045 break;
3046 default:
e2e0b3e5 3047 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3048 tdep->bytes_per_address);
3049 }
3050
3ff7cf9e 3051 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3052 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3053
8e8b2dba
MC
3054 /* The following gdbarch vector elements are the same in both ILP32
3055 and LP64, but might show differences some day. */
3056 set_gdbarch_long_long_bit (gdbarch, 64);
3057 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3058 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3059
3ff7cf9e
JB
3060 /* The following gdbarch vector elements do not depend on the address
3061 size, or in any other gdbarch element previously set. */
60383d10 3062 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3063 set_gdbarch_in_function_epilogue_p (gdbarch,
3064 hppa_in_function_epilogue_p);
a2a84a72 3065 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3066 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3067 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
b6fbdd1d 3068 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
3069 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
3070 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3071 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3072 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3073
143985b7
AF
3074 /* Helper for function argument information. */
3075 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3076
36482093
AC
3077 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3078
3a3bc038
AC
3079 /* When a hardware watchpoint triggers, we'll move the inferior past
3080 it by removing all eventpoints; stepping past the instruction
3081 that caused the trigger; reinserting eventpoints; and checking
3082 whether any watched location changed. */
3083 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3084
5979bc46 3085 /* Inferior function call methods. */
fca7aa43 3086 switch (tdep->bytes_per_address)
5979bc46 3087 {
fca7aa43
AC
3088 case 4:
3089 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3090 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3091 set_gdbarch_convert_from_func_ptr_addr
3092 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3093 break;
3094 case 8:
782eae8b
AC
3095 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3096 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3097 break;
782eae8b 3098 default:
e2e0b3e5 3099 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3100 }
3101
3102 /* Struct return methods. */
fca7aa43 3103 switch (tdep->bytes_per_address)
fad850b2 3104 {
fca7aa43
AC
3105 case 4:
3106 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3107 break;
3108 case 8:
782eae8b 3109 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3110 break;
fca7aa43 3111 default:
e2e0b3e5 3112 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3113 }
7f07c5b6 3114
85f4f2d8 3115 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3116 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3117
5979bc46 3118 /* Frame unwind methods. */
227e86ad 3119 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3120 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3121
50306a9d
RC
3122 /* Hook in ABI-specific overrides, if they have been registered. */
3123 gdbarch_init_osabi (info, gdbarch);
3124
7f07c5b6 3125 /* Hook in the default unwinders. */
227e86ad
JB
3126 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3127 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3128 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3129
e6e68f1f
JB
3130 return gdbarch;
3131}
3132
3133static void
464963c9 3134hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3135{
464963c9 3136 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3137
3138 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3139 tdep->bytes_per_address);
3140 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3141}
3142
4facf7e8
JB
3143void
3144_initialize_hppa_tdep (void)
3145{
3146 struct cmd_list_element *c;
4facf7e8 3147
e6e68f1f 3148 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3149
7c46b9fb
RC
3150 hppa_objfile_priv_data = register_objfile_data ();
3151
4facf7e8 3152 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3153 _("Print unwind table entry at given address."),
4facf7e8
JB
3154 &maintenanceprintlist);
3155
369aa520 3156 /* Debug this files internals. */
7915a72c
AC
3157 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3158Set whether hppa target specific debugging information should be displayed."),
3159 _("\
3160Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3161This flag controls whether hppa target specific debugging information is\n\
3162displayed. This information is particularly useful for debugging frame\n\
7915a72c 3163unwinding problems."),
2c5b56ce 3164 NULL,
7915a72c 3165 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3166 &setdebuglist, &showdebuglist);
4facf7e8 3167}
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