2004-04-06 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the HP PA architecture, for GDB.
cda5a58a
AC
2
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
adc11376
AC
4 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
5 Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b
JM
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
c906108c
SS
26
27#include "defs.h"
28#include "frame.h"
29#include "bfd.h"
30#include "inferior.h"
31#include "value.h"
4e052eda 32#include "regcache.h"
e5d66720 33#include "completer.h"
d709c020 34#include "language.h"
59623e27 35#include "osabi.h"
a7ff40e7 36#include "gdb_assert.h"
65e82032 37#include "infttrace.h"
343af405 38#include "arch-utils.h"
c906108c
SS
39/* For argument passing to the inferior */
40#include "symtab.h"
04714b91 41#include "infcall.h"
fde2cceb 42#include "dis-asm.h"
26d08f08
AC
43#include "trad-frame.h"
44#include "frame-unwind.h"
45#include "frame-base.h"
c906108c 46
c906108c 47#include "gdb_stat.h"
03f2053f 48#include "gdb_wait.h"
c906108c
SS
49
50#include "gdbcore.h"
51#include "gdbcmd.h"
52#include "target.h"
53#include "symfile.h"
54#include "objfiles.h"
3ff7cf9e 55#include "hppa-tdep.h"
c906108c 56
60383d10 57/* Some local constants. */
3ff7cf9e
JB
58static const int hppa32_num_regs = 128;
59static const int hppa64_num_regs = 96;
60
e2ac8128
JB
61/* Get at various relevent fields of an instruction word. */
62#define MASK_5 0x1f
63#define MASK_11 0x7ff
64#define MASK_14 0x3fff
65#define MASK_21 0x1fffff
66
e2ac8128
JB
67/* Define offsets into the call dummy for the _sr4export address.
68 See comments related to CALL_DUMMY for more info. */
69#define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
70#define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
71
c906108c
SS
72/* To support detection of the pseudo-initial frame
73 that threads have. */
74#define THREAD_INITIAL_FRAME_SYMBOL "__pthread_exit"
75#define THREAD_INITIAL_FRAME_SYM_LEN sizeof(THREAD_INITIAL_FRAME_SYMBOL)
c5aa993b 76
e2ac8128
JB
77/* Sizes (in bytes) of the native unwind entries. */
78#define UNWIND_ENTRY_SIZE 16
79#define STUB_UNWIND_ENTRY_SIZE 8
80
81static int get_field (unsigned word, int from, int to);
82
a14ed312 83static int extract_5_load (unsigned int);
c906108c 84
a14ed312 85static unsigned extract_5R_store (unsigned int);
c906108c 86
a14ed312 87static unsigned extract_5r_store (unsigned int);
c906108c 88
a14ed312 89struct unwind_table_entry *find_unwind_entry (CORE_ADDR);
c906108c 90
a14ed312 91static int extract_17 (unsigned int);
c906108c 92
a14ed312 93static int extract_21 (unsigned);
c906108c 94
a14ed312 95static int extract_14 (unsigned);
c906108c 96
a14ed312 97static void unwind_command (char *, int);
c906108c 98
a14ed312 99static int low_sign_extend (unsigned int, unsigned int);
c906108c 100
a14ed312 101static int sign_extend (unsigned int, unsigned int);
c906108c 102
a14ed312 103static int hppa_alignof (struct type *);
c906108c 104
a14ed312 105static int prologue_inst_adjust_sp (unsigned long);
c906108c 106
a14ed312 107static int is_branch (unsigned long);
c906108c 108
a14ed312 109static int inst_saves_gr (unsigned long);
c906108c 110
a14ed312 111static int inst_saves_fr (unsigned long);
c906108c 112
a14ed312 113static int compare_unwind_entries (const void *, const void *);
c906108c 114
a14ed312 115static void read_unwind_info (struct objfile *);
c906108c 116
a14ed312
KB
117static void internalize_unwinds (struct objfile *,
118 struct unwind_table_entry *,
119 asection *, unsigned int,
120 unsigned int, CORE_ADDR);
a14ed312 121static void record_text_segment_lowaddr (bfd *, asection *, void *);
d709c020
JB
122/* FIXME: brobecker 2002-11-07: We will likely be able to make the
123 following functions static, once we hppa is partially multiarched. */
124int hppa_reg_struct_has_addr (int gcc_p, struct type *type);
60383d10
JB
125CORE_ADDR hppa_skip_prologue (CORE_ADDR pc);
126CORE_ADDR hppa_skip_trampoline_code (CORE_ADDR pc);
127int hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name);
128int hppa_in_solib_return_trampoline (CORE_ADDR pc, char *name);
d709c020 129int hppa_inner_than (CORE_ADDR lhs, CORE_ADDR rhs);
d709c020
JB
130int hppa_pc_requires_run_before_use (CORE_ADDR pc);
131int hppa_instruction_nullified (void);
d709c020 132int hppa_cannot_store_register (int regnum);
d709c020 133CORE_ADDR hppa_smash_text_address (CORE_ADDR addr);
60383d10
JB
134CORE_ADDR hppa_target_read_pc (ptid_t ptid);
135void hppa_target_write_pc (CORE_ADDR v, ptid_t ptid);
c906108c 136
c5aa993b 137static int is_pa_2 = 0; /* False */
c906108c 138
537987fc
AC
139/* Handle 32/64-bit struct return conventions. */
140
141static enum return_value_convention
142hppa32_return_value (struct gdbarch *gdbarch,
143 struct type *type, struct regcache *regcache,
144 void *readbuf, const void *writebuf)
145{
146 if (TYPE_CODE (type) == TYPE_CODE_FLT)
147 {
148 if (readbuf != NULL)
149 regcache_cooked_read_part (regcache, FP4_REGNUM, 0,
150 TYPE_LENGTH (type), readbuf);
151 if (writebuf != NULL)
152 regcache_cooked_write_part (regcache, FP4_REGNUM, 0,
153 TYPE_LENGTH (type), writebuf);
154 return RETURN_VALUE_REGISTER_CONVENTION;
155 }
156 if (TYPE_LENGTH (type) <= 2 * 4)
157 {
158 /* The value always lives in the right hand end of the register
159 (or register pair)? */
160 int b;
161 int reg = 28;
162 int part = TYPE_LENGTH (type) % 4;
163 /* The left hand register contains only part of the value,
164 transfer that first so that the rest can be xfered as entire
165 4-byte registers. */
166 if (part > 0)
167 {
168 if (readbuf != NULL)
169 regcache_cooked_read_part (regcache, reg, 4 - part,
170 part, readbuf);
171 if (writebuf != NULL)
172 regcache_cooked_write_part (regcache, reg, 4 - part,
173 part, writebuf);
174 reg++;
175 }
176 /* Now transfer the remaining register values. */
177 for (b = part; b < TYPE_LENGTH (type); b += 4)
178 {
179 if (readbuf != NULL)
180 regcache_cooked_read (regcache, reg, (char *) readbuf + b);
181 if (writebuf != NULL)
182 regcache_cooked_write (regcache, reg, (const char *) writebuf + b);
183 reg++;
184 }
185 return RETURN_VALUE_REGISTER_CONVENTION;
186 }
187 else
188 return RETURN_VALUE_STRUCT_CONVENTION;
189}
190
191static enum return_value_convention
192hppa64_return_value (struct gdbarch *gdbarch,
193 struct type *type, struct regcache *regcache,
194 void *readbuf, const void *writebuf)
195{
196 /* RM: Floats are returned in FR4R, doubles in FR4. Integral values
197 are in r28, padded on the left. Aggregates less that 65 bits are
198 in r28, right padded. Aggregates upto 128 bits are in r28 and
199 r29, right padded. */
449e1137
AC
200 if (TYPE_CODE (type) == TYPE_CODE_FLT
201 && TYPE_LENGTH (type) <= 8)
537987fc
AC
202 {
203 /* Floats are right aligned? */
204 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
205 if (readbuf != NULL)
206 regcache_cooked_read_part (regcache, FP4_REGNUM, offset,
207 TYPE_LENGTH (type), readbuf);
208 if (writebuf != NULL)
209 regcache_cooked_write_part (regcache, FP4_REGNUM, offset,
210 TYPE_LENGTH (type), writebuf);
211 return RETURN_VALUE_REGISTER_CONVENTION;
212 }
213 else if (TYPE_LENGTH (type) <= 8 && is_integral_type (type))
214 {
215 /* Integrals are right aligned. */
216 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
217 if (readbuf != NULL)
218 regcache_cooked_read_part (regcache, 28, offset,
219 TYPE_LENGTH (type), readbuf);
220 if (writebuf != NULL)
221 regcache_cooked_write_part (regcache, 28, offset,
222 TYPE_LENGTH (type), writebuf);
223 return RETURN_VALUE_REGISTER_CONVENTION;
224 }
225 else if (TYPE_LENGTH (type) <= 2 * 8)
226 {
227 /* Composite values are left aligned. */
228 int b;
229 for (b = 0; b < TYPE_LENGTH (type); b += 8)
230 {
449e1137 231 int part = min (8, TYPE_LENGTH (type) - b);
537987fc 232 if (readbuf != NULL)
449e1137 233 regcache_cooked_read_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
234 (char *) readbuf + b);
235 if (writebuf != NULL)
449e1137 236 regcache_cooked_write_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
237 (const char *) writebuf + b);
238 }
449e1137 239 return RETURN_VALUE_REGISTER_CONVENTION;
537987fc
AC
240 }
241 else
242 return RETURN_VALUE_STRUCT_CONVENTION;
243}
244
c906108c
SS
245/* Routines to extract various sized constants out of hppa
246 instructions. */
247
248/* This assumes that no garbage lies outside of the lower bits of
249 value. */
250
251static int
fba45db2 252sign_extend (unsigned val, unsigned bits)
c906108c 253{
c5aa993b 254 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
255}
256
257/* For many immediate values the sign bit is the low bit! */
258
259static int
fba45db2 260low_sign_extend (unsigned val, unsigned bits)
c906108c 261{
c5aa993b 262 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
263}
264
e2ac8128
JB
265/* Extract the bits at positions between FROM and TO, using HP's numbering
266 (MSB = 0). */
267
268static int
269get_field (unsigned word, int from, int to)
270{
271 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
272}
273
c906108c
SS
274/* extract the immediate field from a ld{bhw}s instruction */
275
c906108c 276static int
fba45db2 277extract_5_load (unsigned word)
c906108c
SS
278{
279 return low_sign_extend (word >> 16 & MASK_5, 5);
280}
281
c906108c
SS
282/* extract the immediate field from a break instruction */
283
284static unsigned
fba45db2 285extract_5r_store (unsigned word)
c906108c
SS
286{
287 return (word & MASK_5);
288}
289
290/* extract the immediate field from a {sr}sm instruction */
291
292static unsigned
fba45db2 293extract_5R_store (unsigned word)
c906108c
SS
294{
295 return (word >> 16 & MASK_5);
296}
297
c906108c
SS
298/* extract a 14 bit immediate field */
299
300static int
fba45db2 301extract_14 (unsigned word)
c906108c
SS
302{
303 return low_sign_extend (word & MASK_14, 14);
304}
305
c906108c
SS
306/* extract a 21 bit constant */
307
308static int
fba45db2 309extract_21 (unsigned word)
c906108c
SS
310{
311 int val;
312
313 word &= MASK_21;
314 word <<= 11;
e2ac8128 315 val = get_field (word, 20, 20);
c906108c 316 val <<= 11;
e2ac8128 317 val |= get_field (word, 9, 19);
c906108c 318 val <<= 2;
e2ac8128 319 val |= get_field (word, 5, 6);
c906108c 320 val <<= 5;
e2ac8128 321 val |= get_field (word, 0, 4);
c906108c 322 val <<= 2;
e2ac8128 323 val |= get_field (word, 7, 8);
c906108c
SS
324 return sign_extend (val, 21) << 11;
325}
326
c906108c
SS
327/* extract a 17 bit constant from branch instructions, returning the
328 19 bit signed value. */
329
330static int
fba45db2 331extract_17 (unsigned word)
c906108c 332{
e2ac8128
JB
333 return sign_extend (get_field (word, 19, 28) |
334 get_field (word, 29, 29) << 10 |
335 get_field (word, 11, 15) << 11 |
c906108c
SS
336 (word & 0x1) << 16, 17) << 2;
337}
338\f
339
340/* Compare the start address for two unwind entries returning 1 if
341 the first address is larger than the second, -1 if the second is
342 larger than the first, and zero if they are equal. */
343
344static int
fba45db2 345compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
346{
347 const struct unwind_table_entry *a = arg1;
348 const struct unwind_table_entry *b = arg2;
349
350 if (a->region_start > b->region_start)
351 return 1;
352 else if (a->region_start < b->region_start)
353 return -1;
354 else
355 return 0;
356}
357
53a5351d
JM
358static CORE_ADDR low_text_segment_address;
359
360static void
8fef05cc 361record_text_segment_lowaddr (bfd *abfd, asection *section, void *ignored)
53a5351d 362{
bf9c25dc 363 if (((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d
JM
364 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
365 && section->vma < low_text_segment_address)
366 low_text_segment_address = section->vma;
367}
368
c906108c 369static void
fba45db2
KB
370internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
371 asection *section, unsigned int entries, unsigned int size,
372 CORE_ADDR text_offset)
c906108c
SS
373{
374 /* We will read the unwind entries into temporary memory, then
375 fill in the actual unwind table. */
376 if (size > 0)
377 {
378 unsigned long tmp;
379 unsigned i;
380 char *buf = alloca (size);
381
53a5351d
JM
382 low_text_segment_address = -1;
383
384 /* If addresses are 64 bits wide, then unwinds are supposed to
c2c6d25f
JM
385 be segment relative offsets instead of absolute addresses.
386
387 Note that when loading a shared library (text_offset != 0) the
388 unwinds are already relative to the text_offset that will be
389 passed in. */
390 if (TARGET_PTR_BIT == 64 && text_offset == 0)
53a5351d
JM
391 {
392 bfd_map_over_sections (objfile->obfd,
4efb68b1 393 record_text_segment_lowaddr, NULL);
53a5351d
JM
394
395 /* ?!? Mask off some low bits. Should this instead subtract
396 out the lowest section's filepos or something like that?
397 This looks very hokey to me. */
398 low_text_segment_address &= ~0xfff;
399 text_offset += low_text_segment_address;
400 }
401
c906108c
SS
402 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
403
404 /* Now internalize the information being careful to handle host/target
c5aa993b 405 endian issues. */
c906108c
SS
406 for (i = 0; i < entries; i++)
407 {
408 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 409 (bfd_byte *) buf);
c906108c
SS
410 table[i].region_start += text_offset;
411 buf += 4;
c5aa993b 412 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
413 table[i].region_end += text_offset;
414 buf += 4;
c5aa993b 415 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
416 buf += 4;
417 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
418 table[i].Millicode = (tmp >> 30) & 0x1;
419 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
420 table[i].Region_description = (tmp >> 27) & 0x3;
421 table[i].reserved1 = (tmp >> 26) & 0x1;
422 table[i].Entry_SR = (tmp >> 25) & 0x1;
423 table[i].Entry_FR = (tmp >> 21) & 0xf;
424 table[i].Entry_GR = (tmp >> 16) & 0x1f;
425 table[i].Args_stored = (tmp >> 15) & 0x1;
426 table[i].Variable_Frame = (tmp >> 14) & 0x1;
427 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
428 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
429 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
430 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
431 table[i].Ada_Region = (tmp >> 9) & 0x1;
432 table[i].cxx_info = (tmp >> 8) & 0x1;
433 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
434 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
435 table[i].reserved2 = (tmp >> 5) & 0x1;
436 table[i].Save_SP = (tmp >> 4) & 0x1;
437 table[i].Save_RP = (tmp >> 3) & 0x1;
438 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
439 table[i].extn_ptr_defined = (tmp >> 1) & 0x1;
440 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 441 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
442 buf += 4;
443 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
444 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
445 table[i].Large_frame = (tmp >> 29) & 0x1;
446 table[i].Pseudo_SP_Set = (tmp >> 28) & 0x1;
447 table[i].reserved4 = (tmp >> 27) & 0x1;
448 table[i].Total_frame_size = tmp & 0x7ffffff;
449
c5aa993b 450 /* Stub unwinds are handled elsewhere. */
c906108c
SS
451 table[i].stub_unwind.stub_type = 0;
452 table[i].stub_unwind.padding = 0;
453 }
454 }
455}
456
457/* Read in the backtrace information stored in the `$UNWIND_START$' section of
458 the object file. This info is used mainly by find_unwind_entry() to find
459 out the stack frame size and frame pointer used by procedures. We put
460 everything on the psymbol obstack in the objfile so that it automatically
461 gets freed when the objfile is destroyed. */
462
463static void
fba45db2 464read_unwind_info (struct objfile *objfile)
c906108c 465{
d4f3574e
SS
466 asection *unwind_sec, *stub_unwind_sec;
467 unsigned unwind_size, stub_unwind_size, total_size;
468 unsigned index, unwind_entries;
c906108c
SS
469 unsigned stub_entries, total_entries;
470 CORE_ADDR text_offset;
471 struct obj_unwind_info *ui;
472 obj_private_data_t *obj_private;
473
474 text_offset = ANOFFSET (objfile->section_offsets, 0);
8b92e4d5 475 ui = (struct obj_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
c5aa993b 476 sizeof (struct obj_unwind_info));
c906108c
SS
477
478 ui->table = NULL;
479 ui->cache = NULL;
480 ui->last = -1;
481
d4f3574e
SS
482 /* For reasons unknown the HP PA64 tools generate multiple unwinder
483 sections in a single executable. So we just iterate over every
484 section in the BFD looking for unwinder sections intead of trying
485 to do a lookup with bfd_get_section_by_name.
c906108c 486
d4f3574e
SS
487 First determine the total size of the unwind tables so that we
488 can allocate memory in a nice big hunk. */
489 total_entries = 0;
490 for (unwind_sec = objfile->obfd->sections;
491 unwind_sec;
492 unwind_sec = unwind_sec->next)
c906108c 493 {
d4f3574e
SS
494 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
495 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
496 {
497 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
498 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 499
d4f3574e
SS
500 total_entries += unwind_entries;
501 }
c906108c
SS
502 }
503
d4f3574e
SS
504 /* Now compute the size of the stub unwinds. Note the ELF tools do not
505 use stub unwinds at the curren time. */
506 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
507
c906108c
SS
508 if (stub_unwind_sec)
509 {
510 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
511 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
512 }
513 else
514 {
515 stub_unwind_size = 0;
516 stub_entries = 0;
517 }
518
519 /* Compute total number of unwind entries and their total size. */
d4f3574e 520 total_entries += stub_entries;
c906108c
SS
521 total_size = total_entries * sizeof (struct unwind_table_entry);
522
523 /* Allocate memory for the unwind table. */
524 ui->table = (struct unwind_table_entry *)
8b92e4d5 525 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 526 ui->last = total_entries - 1;
c906108c 527
d4f3574e
SS
528 /* Now read in each unwind section and internalize the standard unwind
529 entries. */
c906108c 530 index = 0;
d4f3574e
SS
531 for (unwind_sec = objfile->obfd->sections;
532 unwind_sec;
533 unwind_sec = unwind_sec->next)
534 {
535 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
536 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
537 {
538 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
539 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
540
541 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
542 unwind_entries, unwind_size, text_offset);
543 index += unwind_entries;
544 }
545 }
546
547 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
548 if (stub_unwind_size > 0)
549 {
550 unsigned int i;
551 char *buf = alloca (stub_unwind_size);
552
553 /* Read in the stub unwind entries. */
554 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
555 0, stub_unwind_size);
556
557 /* Now convert them into regular unwind entries. */
558 for (i = 0; i < stub_entries; i++, index++)
559 {
560 /* Clear out the next unwind entry. */
561 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
562
563 /* Convert offset & size into region_start and region_end.
564 Stuff away the stub type into "reserved" fields. */
565 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
566 (bfd_byte *) buf);
567 ui->table[index].region_start += text_offset;
568 buf += 4;
569 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 570 (bfd_byte *) buf);
c906108c
SS
571 buf += 2;
572 ui->table[index].region_end
c5aa993b
JM
573 = ui->table[index].region_start + 4 *
574 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
575 buf += 2;
576 }
577
578 }
579
580 /* Unwind table needs to be kept sorted. */
581 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
582 compare_unwind_entries);
583
584 /* Keep a pointer to the unwind information. */
c5aa993b 585 if (objfile->obj_private == NULL)
c906108c
SS
586 {
587 obj_private = (obj_private_data_t *)
8b92e4d5 588 obstack_alloc (&objfile->objfile_obstack,
c5aa993b 589 sizeof (obj_private_data_t));
c906108c 590 obj_private->unwind_info = NULL;
c5aa993b 591 obj_private->so_info = NULL;
53a5351d 592 obj_private->dp = 0;
c5aa993b 593
4efb68b1 594 objfile->obj_private = obj_private;
c906108c 595 }
c5aa993b 596 obj_private = (obj_private_data_t *) objfile->obj_private;
c906108c
SS
597 obj_private->unwind_info = ui;
598}
599
600/* Lookup the unwind (stack backtrace) info for the given PC. We search all
601 of the objfiles seeking the unwind table entry for this PC. Each objfile
602 contains a sorted list of struct unwind_table_entry. Since we do a binary
603 search of the unwind tables, we depend upon them to be sorted. */
604
605struct unwind_table_entry *
fba45db2 606find_unwind_entry (CORE_ADDR pc)
c906108c
SS
607{
608 int first, middle, last;
609 struct objfile *objfile;
610
611 /* A function at address 0? Not in HP-UX! */
612 if (pc == (CORE_ADDR) 0)
613 return NULL;
614
615 ALL_OBJFILES (objfile)
c5aa993b
JM
616 {
617 struct obj_unwind_info *ui;
618 ui = NULL;
619 if (objfile->obj_private)
620 ui = ((obj_private_data_t *) (objfile->obj_private))->unwind_info;
c906108c 621
c5aa993b
JM
622 if (!ui)
623 {
624 read_unwind_info (objfile);
625 if (objfile->obj_private == NULL)
104c1213 626 error ("Internal error reading unwind information.");
c5aa993b
JM
627 ui = ((obj_private_data_t *) (objfile->obj_private))->unwind_info;
628 }
c906108c 629
c5aa993b 630 /* First, check the cache */
c906108c 631
c5aa993b
JM
632 if (ui->cache
633 && pc >= ui->cache->region_start
634 && pc <= ui->cache->region_end)
635 return ui->cache;
c906108c 636
c5aa993b 637 /* Not in the cache, do a binary search */
c906108c 638
c5aa993b
JM
639 first = 0;
640 last = ui->last;
c906108c 641
c5aa993b
JM
642 while (first <= last)
643 {
644 middle = (first + last) / 2;
645 if (pc >= ui->table[middle].region_start
646 && pc <= ui->table[middle].region_end)
647 {
648 ui->cache = &ui->table[middle];
649 return &ui->table[middle];
650 }
c906108c 651
c5aa993b
JM
652 if (pc < ui->table[middle].region_start)
653 last = middle - 1;
654 else
655 first = middle + 1;
656 }
657 } /* ALL_OBJFILES() */
c906108c
SS
658 return NULL;
659}
660
aaab4dba
AC
661const unsigned char *
662hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
663{
56132691 664 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
665 (*len) = sizeof (breakpoint);
666 return breakpoint;
667}
668
e23457df
AC
669/* Return the name of a register. */
670
671const char *
3ff7cf9e 672hppa32_register_name (int i)
e23457df
AC
673{
674 static char *names[] = {
675 "flags", "r1", "rp", "r3",
676 "r4", "r5", "r6", "r7",
677 "r8", "r9", "r10", "r11",
678 "r12", "r13", "r14", "r15",
679 "r16", "r17", "r18", "r19",
680 "r20", "r21", "r22", "r23",
681 "r24", "r25", "r26", "dp",
682 "ret0", "ret1", "sp", "r31",
683 "sar", "pcoqh", "pcsqh", "pcoqt",
684 "pcsqt", "eiem", "iir", "isr",
685 "ior", "ipsw", "goto", "sr4",
686 "sr0", "sr1", "sr2", "sr3",
687 "sr5", "sr6", "sr7", "cr0",
688 "cr8", "cr9", "ccr", "cr12",
689 "cr13", "cr24", "cr25", "cr26",
690 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
691 "fpsr", "fpe1", "fpe2", "fpe3",
692 "fpe4", "fpe5", "fpe6", "fpe7",
693 "fr4", "fr4R", "fr5", "fr5R",
694 "fr6", "fr6R", "fr7", "fr7R",
695 "fr8", "fr8R", "fr9", "fr9R",
696 "fr10", "fr10R", "fr11", "fr11R",
697 "fr12", "fr12R", "fr13", "fr13R",
698 "fr14", "fr14R", "fr15", "fr15R",
699 "fr16", "fr16R", "fr17", "fr17R",
700 "fr18", "fr18R", "fr19", "fr19R",
701 "fr20", "fr20R", "fr21", "fr21R",
702 "fr22", "fr22R", "fr23", "fr23R",
703 "fr24", "fr24R", "fr25", "fr25R",
704 "fr26", "fr26R", "fr27", "fr27R",
705 "fr28", "fr28R", "fr29", "fr29R",
706 "fr30", "fr30R", "fr31", "fr31R"
707 };
708 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
709 return NULL;
710 else
711 return names[i];
712}
713
714const char *
715hppa64_register_name (int i)
716{
717 static char *names[] = {
718 "flags", "r1", "rp", "r3",
719 "r4", "r5", "r6", "r7",
720 "r8", "r9", "r10", "r11",
721 "r12", "r13", "r14", "r15",
722 "r16", "r17", "r18", "r19",
723 "r20", "r21", "r22", "r23",
724 "r24", "r25", "r26", "dp",
725 "ret0", "ret1", "sp", "r31",
726 "sar", "pcoqh", "pcsqh", "pcoqt",
727 "pcsqt", "eiem", "iir", "isr",
728 "ior", "ipsw", "goto", "sr4",
729 "sr0", "sr1", "sr2", "sr3",
730 "sr5", "sr6", "sr7", "cr0",
731 "cr8", "cr9", "ccr", "cr12",
732 "cr13", "cr24", "cr25", "cr26",
733 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
734 "fpsr", "fpe1", "fpe2", "fpe3",
735 "fr4", "fr5", "fr6", "fr7",
736 "fr8", "fr9", "fr10", "fr11",
737 "fr12", "fr13", "fr14", "fr15",
738 "fr16", "fr17", "fr18", "fr19",
739 "fr20", "fr21", "fr22", "fr23",
740 "fr24", "fr25", "fr26", "fr27",
741 "fr28", "fr29", "fr30", "fr31"
742 };
743 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
744 return NULL;
745 else
746 return names[i];
747}
748
749
750
c906108c
SS
751/* Return the adjustment necessary to make for addresses on the stack
752 as presented by hpread.c.
753
754 This is necessary because of the stack direction on the PA and the
78161e48
AC
755 bizarre way in which someone (?) decided they wanted to handle
756 frame pointerless code in GDB. */
757int
758hpread_adjust_stack_address (CORE_ADDR func_addr)
759{
760 struct unwind_table_entry *u;
c906108c 761
78161e48
AC
762 u = find_unwind_entry (func_addr);
763 if (!u)
764 return 0;
765 else
766 return u->Total_frame_size << 3;
c906108c
SS
767}
768
79508e1e
AC
769/* This function pushes a stack frame with arguments as part of the
770 inferior function calling mechanism.
771
772 This is the version of the function for the 32-bit PA machines, in
773 which later arguments appear at lower addresses. (The stack always
774 grows towards higher addresses.)
775
776 We simply allocate the appropriate amount of stack space and put
777 arguments into their proper slots. */
778
779CORE_ADDR
780hppa32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
781 struct regcache *regcache, CORE_ADDR bp_addr,
782 int nargs, struct value **args, CORE_ADDR sp,
783 int struct_return, CORE_ADDR struct_addr)
784{
785 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
786 reverse engineering testsuite failures. */
787
788 /* Stack base address at which any pass-by-reference parameters are
789 stored. */
790 CORE_ADDR struct_end = 0;
791 /* Stack base address at which the first parameter is stored. */
792 CORE_ADDR param_end = 0;
793
794 /* The inner most end of the stack after all the parameters have
795 been pushed. */
796 CORE_ADDR new_sp = 0;
797
798 /* Two passes. First pass computes the location of everything,
799 second pass writes the bytes out. */
800 int write_pass;
801 for (write_pass = 0; write_pass < 2; write_pass++)
802 {
1797a8f6
AC
803 CORE_ADDR struct_ptr = 0;
804 CORE_ADDR param_ptr = 0;
79508e1e
AC
805 int reg = 27; /* NOTE: Registers go down. */
806 int i;
807 for (i = 0; i < nargs; i++)
808 {
809 struct value *arg = args[i];
810 struct type *type = check_typedef (VALUE_TYPE (arg));
811 /* The corresponding parameter that is pushed onto the
812 stack, and [possibly] passed in a register. */
813 char param_val[8];
814 int param_len;
815 memset (param_val, 0, sizeof param_val);
816 if (TYPE_LENGTH (type) > 8)
817 {
818 /* Large parameter, pass by reference. Store the value
819 in "struct" area and then pass its address. */
820 param_len = 4;
1797a8f6 821 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 822 if (write_pass)
1797a8f6 823 write_memory (struct_end - struct_ptr, VALUE_CONTENTS (arg),
79508e1e 824 TYPE_LENGTH (type));
1797a8f6 825 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
826 }
827 else if (TYPE_CODE (type) == TYPE_CODE_INT
828 || TYPE_CODE (type) == TYPE_CODE_ENUM)
829 {
830 /* Integer value store, right aligned. "unpack_long"
831 takes care of any sign-extension problems. */
832 param_len = align_up (TYPE_LENGTH (type), 4);
833 store_unsigned_integer (param_val, param_len,
834 unpack_long (type,
835 VALUE_CONTENTS (arg)));
836 }
837 else
838 {
839 /* Small struct value, store right aligned? */
840 param_len = align_up (TYPE_LENGTH (type), 4);
841 memcpy (param_val + param_len - TYPE_LENGTH (type),
842 VALUE_CONTENTS (arg), TYPE_LENGTH (type));
843 }
1797a8f6 844 param_ptr += param_len;
79508e1e
AC
845 reg -= param_len / 4;
846 if (write_pass)
847 {
1797a8f6 848 write_memory (param_end - param_ptr, param_val, param_len);
79508e1e
AC
849 if (reg >= 23)
850 {
851 regcache_cooked_write (regcache, reg, param_val);
852 if (param_len > 4)
853 regcache_cooked_write (regcache, reg + 1, param_val + 4);
854 }
855 }
856 }
857
858 /* Update the various stack pointers. */
859 if (!write_pass)
860 {
861 struct_end = sp + struct_ptr;
862 /* PARAM_PTR already accounts for all the arguments passed
863 by the user. However, the ABI mandates minimum stack
864 space allocations for outgoing arguments. The ABI also
865 mandates minimum stack alignments which we must
866 preserve. */
d0bd2d18 867 param_end = struct_end + max (align_up (param_ptr, 8), 16);
79508e1e
AC
868 }
869 }
870
871 /* If a structure has to be returned, set up register 28 to hold its
872 address */
873 if (struct_return)
874 write_register (28, struct_addr);
875
876 /* Set the return address. */
877 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
878
c4557624
JB
879 /* Update the Stack Pointer. */
880 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 32);
881
79508e1e
AC
882 /* The stack will have 32 bytes of additional space for a frame marker. */
883 return param_end + 32;
884}
885
2f690297
AC
886/* This function pushes a stack frame with arguments as part of the
887 inferior function calling mechanism.
888
889 This is the version for the PA64, in which later arguments appear
890 at higher addresses. (The stack always grows towards higher
891 addresses.)
892
893 We simply allocate the appropriate amount of stack space and put
894 arguments into their proper slots.
895
896 This ABI also requires that the caller provide an argument pointer
897 to the callee, so we do that too. */
898
899CORE_ADDR
900hppa64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
901 struct regcache *regcache, CORE_ADDR bp_addr,
902 int nargs, struct value **args, CORE_ADDR sp,
903 int struct_return, CORE_ADDR struct_addr)
904{
449e1137
AC
905 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
906 reverse engineering testsuite failures. */
2f690297 907
449e1137
AC
908 /* Stack base address at which any pass-by-reference parameters are
909 stored. */
910 CORE_ADDR struct_end = 0;
911 /* Stack base address at which the first parameter is stored. */
912 CORE_ADDR param_end = 0;
2f690297 913
449e1137
AC
914 /* The inner most end of the stack after all the parameters have
915 been pushed. */
916 CORE_ADDR new_sp = 0;
2f690297 917
449e1137
AC
918 /* Two passes. First pass computes the location of everything,
919 second pass writes the bytes out. */
920 int write_pass;
921 for (write_pass = 0; write_pass < 2; write_pass++)
2f690297 922 {
449e1137
AC
923 CORE_ADDR struct_ptr = 0;
924 CORE_ADDR param_ptr = 0;
925 int i;
926 for (i = 0; i < nargs; i++)
2f690297 927 {
449e1137
AC
928 struct value *arg = args[i];
929 struct type *type = check_typedef (VALUE_TYPE (arg));
930 if ((TYPE_CODE (type) == TYPE_CODE_INT
931 || TYPE_CODE (type) == TYPE_CODE_ENUM)
932 && TYPE_LENGTH (type) <= 8)
933 {
934 /* Integer value store, right aligned. "unpack_long"
935 takes care of any sign-extension problems. */
936 param_ptr += 8;
937 if (write_pass)
938 {
939 ULONGEST val = unpack_long (type, VALUE_CONTENTS (arg));
940 int reg = 27 - param_ptr / 8;
941 write_memory_unsigned_integer (param_end - param_ptr,
942 val, 8);
943 if (reg >= 19)
944 regcache_cooked_write_unsigned (regcache, reg, val);
945 }
946 }
947 else
948 {
949 /* Small struct value, store left aligned? */
950 int reg;
951 if (TYPE_LENGTH (type) > 8)
952 {
953 param_ptr = align_up (param_ptr, 16);
954 reg = 26 - param_ptr / 8;
955 param_ptr += align_up (TYPE_LENGTH (type), 16);
956 }
957 else
958 {
959 param_ptr = align_up (param_ptr, 8);
960 reg = 26 - param_ptr / 8;
961 param_ptr += align_up (TYPE_LENGTH (type), 8);
962 }
963 if (write_pass)
964 {
965 int byte;
966 write_memory (param_end - param_ptr, VALUE_CONTENTS (arg),
967 TYPE_LENGTH (type));
968 for (byte = 0; byte < TYPE_LENGTH (type); byte += 8)
969 {
970 if (reg >= 19)
971 {
972 int len = min (8, TYPE_LENGTH (type) - byte);
973 regcache_cooked_write_part (regcache, reg, 0, len,
974 VALUE_CONTENTS (arg) + byte);
975 }
976 reg--;
977 }
978 }
979 }
2f690297 980 }
449e1137
AC
981 /* Update the various stack pointers. */
982 if (!write_pass)
2f690297 983 {
449e1137
AC
984 struct_end = sp + struct_ptr;
985 /* PARAM_PTR already accounts for all the arguments passed
986 by the user. However, the ABI mandates minimum stack
987 space allocations for outgoing arguments. The ABI also
988 mandates minimum stack alignments which we must
989 preserve. */
d0bd2d18 990 param_end = struct_end + max (align_up (param_ptr, 16), 64);
2f690297 991 }
2f690297
AC
992 }
993
2f690297
AC
994 /* If a structure has to be returned, set up register 28 to hold its
995 address */
996 if (struct_return)
997 write_register (28, struct_addr);
998
2f690297
AC
999 /* Set the return address. */
1000 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
1001
c4557624
JB
1002 /* Update the Stack Pointer. */
1003 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 64);
1004
449e1137
AC
1005 /* The stack will have 32 bytes of additional space for a frame marker. */
1006 return param_end + 64;
2f690297
AC
1007}
1008
1797a8f6
AC
1009static CORE_ADDR
1010hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1011{
1012 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1013 and not _bit_)! */
1014 return align_up (addr, 64);
1015}
1016
2f690297
AC
1017/* Force all frames to 16-byte alignment. Better safe than sorry. */
1018
1019static CORE_ADDR
1797a8f6 1020hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1021{
1022 /* Just always 16-byte align. */
1023 return align_up (addr, 16);
1024}
1025
1026
c906108c
SS
1027/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1028 bits. */
1029
1030CORE_ADDR
60383d10 1031hppa_target_read_pc (ptid_t ptid)
c906108c 1032{
39f77062 1033 int flags = read_register_pid (FLAGS_REGNUM, ptid);
c906108c
SS
1034
1035 /* The following test does not belong here. It is OS-specific, and belongs
1036 in native code. */
1037 /* Test SS_INSYSCALL */
1038 if (flags & 2)
39f77062 1039 return read_register_pid (31, ptid) & ~0x3;
c906108c 1040
449e1137 1041 return read_register_pid (PCOQ_HEAD_REGNUM, ptid) & ~0x3;
c906108c
SS
1042}
1043
1044/* Write out the PC. If currently in a syscall, then also write the new
1045 PC value into %r31. */
1046
1047void
60383d10 1048hppa_target_write_pc (CORE_ADDR v, ptid_t ptid)
c906108c 1049{
39f77062 1050 int flags = read_register_pid (FLAGS_REGNUM, ptid);
c906108c
SS
1051
1052 /* The following test does not belong here. It is OS-specific, and belongs
1053 in native code. */
1054 /* If in a syscall, then set %r31. Also make sure to get the
1055 privilege bits set correctly. */
1056 /* Test SS_INSYSCALL */
1057 if (flags & 2)
39f77062 1058 write_register_pid (31, v | 0x3, ptid);
c906108c 1059
449e1137 1060 write_register_pid (PCOQ_HEAD_REGNUM, v, ptid);
adc11376 1061 write_register_pid (PCOQ_TAIL_REGNUM, v + 4, ptid);
c906108c
SS
1062}
1063
1064/* return the alignment of a type in bytes. Structures have the maximum
1065 alignment required by their fields. */
1066
1067static int
fba45db2 1068hppa_alignof (struct type *type)
c906108c
SS
1069{
1070 int max_align, align, i;
1071 CHECK_TYPEDEF (type);
1072 switch (TYPE_CODE (type))
1073 {
1074 case TYPE_CODE_PTR:
1075 case TYPE_CODE_INT:
1076 case TYPE_CODE_FLT:
1077 return TYPE_LENGTH (type);
1078 case TYPE_CODE_ARRAY:
1079 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1080 case TYPE_CODE_STRUCT:
1081 case TYPE_CODE_UNION:
1082 max_align = 1;
1083 for (i = 0; i < TYPE_NFIELDS (type); i++)
1084 {
1085 /* Bit fields have no real alignment. */
1086 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1087 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1088 {
1089 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1090 max_align = max (max_align, align);
1091 }
1092 }
1093 return max_align;
1094 default:
1095 return 4;
1096 }
1097}
1098
c906108c
SS
1099/* Return one if PC is in the call path of a trampoline, else return zero.
1100
1101 Note we return one for *any* call trampoline (long-call, arg-reloc), not
1102 just shared library trampolines (import, export). */
1103
1104int
60383d10 1105hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name)
c906108c
SS
1106{
1107 struct minimal_symbol *minsym;
1108 struct unwind_table_entry *u;
1109 static CORE_ADDR dyncall = 0;
1110 static CORE_ADDR sr4export = 0;
1111
c2c6d25f
JM
1112#ifdef GDB_TARGET_IS_HPPA_20W
1113 /* PA64 has a completely different stub/trampoline scheme. Is it
1114 better? Maybe. It's certainly harder to determine with any
1115 certainty that we are in a stub because we can not refer to the
1116 unwinders to help.
1117
1118 The heuristic is simple. Try to lookup the current PC value in th
1119 minimal symbol table. If that fails, then assume we are not in a
1120 stub and return.
1121
1122 Then see if the PC value falls within the section bounds for the
1123 section containing the minimal symbol we found in the first
1124 step. If it does, then assume we are not in a stub and return.
1125
1126 Finally peek at the instructions to see if they look like a stub. */
1127 {
1128 struct minimal_symbol *minsym;
1129 asection *sec;
1130 CORE_ADDR addr;
1131 int insn, i;
1132
1133 minsym = lookup_minimal_symbol_by_pc (pc);
1134 if (! minsym)
1135 return 0;
1136
1137 sec = SYMBOL_BFD_SECTION (minsym);
1138
b98ed7be
AM
1139 if (bfd_get_section_vma (sec->owner, sec) <= pc
1140 && pc < (bfd_get_section_vma (sec->owner, sec)
1141 + bfd_section_size (sec->owner, sec)))
c2c6d25f
JM
1142 return 0;
1143
1144 /* We might be in a stub. Peek at the instructions. Stubs are 3
1145 instructions long. */
1146 insn = read_memory_integer (pc, 4);
1147
b84a8afe 1148 /* Find out where we think we are within the stub. */
c2c6d25f
JM
1149 if ((insn & 0xffffc00e) == 0x53610000)
1150 addr = pc;
1151 else if ((insn & 0xffffffff) == 0xe820d000)
1152 addr = pc - 4;
1153 else if ((insn & 0xffffc00e) == 0x537b0000)
1154 addr = pc - 8;
1155 else
1156 return 0;
1157
1158 /* Now verify each insn in the range looks like a stub instruction. */
1159 insn = read_memory_integer (addr, 4);
1160 if ((insn & 0xffffc00e) != 0x53610000)
1161 return 0;
1162
1163 /* Now verify each insn in the range looks like a stub instruction. */
1164 insn = read_memory_integer (addr + 4, 4);
1165 if ((insn & 0xffffffff) != 0xe820d000)
1166 return 0;
1167
1168 /* Now verify each insn in the range looks like a stub instruction. */
1169 insn = read_memory_integer (addr + 8, 4);
1170 if ((insn & 0xffffc00e) != 0x537b0000)
1171 return 0;
1172
1173 /* Looks like a stub. */
1174 return 1;
1175 }
1176#endif
1177
1178 /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1179 new exec file */
c906108c
SS
1180
1181 /* First see if PC is in one of the two C-library trampolines. */
1182 if (!dyncall)
1183 {
1184 minsym = lookup_minimal_symbol ("$$dyncall", NULL, NULL);
1185 if (minsym)
1186 dyncall = SYMBOL_VALUE_ADDRESS (minsym);
1187 else
1188 dyncall = -1;
1189 }
1190
1191 if (!sr4export)
1192 {
1193 minsym = lookup_minimal_symbol ("_sr4export", NULL, NULL);
1194 if (minsym)
1195 sr4export = SYMBOL_VALUE_ADDRESS (minsym);
1196 else
1197 sr4export = -1;
1198 }
1199
1200 if (pc == dyncall || pc == sr4export)
1201 return 1;
1202
104c1213 1203 minsym = lookup_minimal_symbol_by_pc (pc);
22abf04a 1204 if (minsym && strcmp (DEPRECATED_SYMBOL_NAME (minsym), ".stub") == 0)
104c1213
JM
1205 return 1;
1206
c906108c
SS
1207 /* Get the unwind descriptor corresponding to PC, return zero
1208 if no unwind was found. */
1209 u = find_unwind_entry (pc);
1210 if (!u)
1211 return 0;
1212
1213 /* If this isn't a linker stub, then return now. */
1214 if (u->stub_unwind.stub_type == 0)
1215 return 0;
1216
1217 /* By definition a long-branch stub is a call stub. */
1218 if (u->stub_unwind.stub_type == LONG_BRANCH)
1219 return 1;
1220
1221 /* The call and return path execute the same instructions within
1222 an IMPORT stub! So an IMPORT stub is both a call and return
1223 trampoline. */
1224 if (u->stub_unwind.stub_type == IMPORT)
1225 return 1;
1226
1227 /* Parameter relocation stubs always have a call path and may have a
1228 return path. */
1229 if (u->stub_unwind.stub_type == PARAMETER_RELOCATION
1230 || u->stub_unwind.stub_type == EXPORT)
1231 {
1232 CORE_ADDR addr;
1233
1234 /* Search forward from the current PC until we hit a branch
c5aa993b 1235 or the end of the stub. */
c906108c
SS
1236 for (addr = pc; addr <= u->region_end; addr += 4)
1237 {
1238 unsigned long insn;
1239
1240 insn = read_memory_integer (addr, 4);
1241
1242 /* Does it look like a bl? If so then it's the call path, if
1243 we find a bv or be first, then we're on the return path. */
1244 if ((insn & 0xfc00e000) == 0xe8000000)
1245 return 1;
1246 else if ((insn & 0xfc00e001) == 0xe800c000
1247 || (insn & 0xfc000000) == 0xe0000000)
1248 return 0;
1249 }
1250
1251 /* Should never happen. */
104c1213
JM
1252 warning ("Unable to find branch in parameter relocation stub.\n");
1253 return 0;
c906108c
SS
1254 }
1255
1256 /* Unknown stub type. For now, just return zero. */
104c1213 1257 return 0;
c906108c
SS
1258}
1259
1260/* Return one if PC is in the return path of a trampoline, else return zero.
1261
1262 Note we return one for *any* call trampoline (long-call, arg-reloc), not
1263 just shared library trampolines (import, export). */
1264
1265int
60383d10 1266hppa_in_solib_return_trampoline (CORE_ADDR pc, char *name)
c906108c
SS
1267{
1268 struct unwind_table_entry *u;
1269
1270 /* Get the unwind descriptor corresponding to PC, return zero
1271 if no unwind was found. */
1272 u = find_unwind_entry (pc);
1273 if (!u)
1274 return 0;
1275
1276 /* If this isn't a linker stub or it's just a long branch stub, then
1277 return zero. */
1278 if (u->stub_unwind.stub_type == 0 || u->stub_unwind.stub_type == LONG_BRANCH)
1279 return 0;
1280
1281 /* The call and return path execute the same instructions within
1282 an IMPORT stub! So an IMPORT stub is both a call and return
1283 trampoline. */
1284 if (u->stub_unwind.stub_type == IMPORT)
1285 return 1;
1286
1287 /* Parameter relocation stubs always have a call path and may have a
1288 return path. */
1289 if (u->stub_unwind.stub_type == PARAMETER_RELOCATION
1290 || u->stub_unwind.stub_type == EXPORT)
1291 {
1292 CORE_ADDR addr;
1293
1294 /* Search forward from the current PC until we hit a branch
c5aa993b 1295 or the end of the stub. */
c906108c
SS
1296 for (addr = pc; addr <= u->region_end; addr += 4)
1297 {
1298 unsigned long insn;
1299
1300 insn = read_memory_integer (addr, 4);
1301
1302 /* Does it look like a bl? If so then it's the call path, if
1303 we find a bv or be first, then we're on the return path. */
1304 if ((insn & 0xfc00e000) == 0xe8000000)
1305 return 0;
1306 else if ((insn & 0xfc00e001) == 0xe800c000
1307 || (insn & 0xfc000000) == 0xe0000000)
1308 return 1;
1309 }
1310
1311 /* Should never happen. */
104c1213
JM
1312 warning ("Unable to find branch in parameter relocation stub.\n");
1313 return 0;
c906108c
SS
1314 }
1315
1316 /* Unknown stub type. For now, just return zero. */
104c1213 1317 return 0;
c906108c
SS
1318
1319}
1320
1321/* Figure out if PC is in a trampoline, and if so find out where
1322 the trampoline will jump to. If not in a trampoline, return zero.
1323
1324 Simple code examination probably is not a good idea since the code
1325 sequences in trampolines can also appear in user code.
1326
1327 We use unwinds and information from the minimal symbol table to
1328 determine when we're in a trampoline. This won't work for ELF
1329 (yet) since it doesn't create stub unwind entries. Whether or
1330 not ELF will create stub unwinds or normal unwinds for linker
1331 stubs is still being debated.
1332
1333 This should handle simple calls through dyncall or sr4export,
1334 long calls, argument relocation stubs, and dyncall/sr4export
1335 calling an argument relocation stub. It even handles some stubs
1336 used in dynamic executables. */
1337
c906108c 1338CORE_ADDR
60383d10 1339hppa_skip_trampoline_code (CORE_ADDR pc)
c906108c
SS
1340{
1341 long orig_pc = pc;
1342 long prev_inst, curr_inst, loc;
1343 static CORE_ADDR dyncall = 0;
1344 static CORE_ADDR dyncall_external = 0;
1345 static CORE_ADDR sr4export = 0;
1346 struct minimal_symbol *msym;
1347 struct unwind_table_entry *u;
1348
c2c6d25f
JM
1349 /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1350 new exec file */
c906108c
SS
1351
1352 if (!dyncall)
1353 {
1354 msym = lookup_minimal_symbol ("$$dyncall", NULL, NULL);
1355 if (msym)
1356 dyncall = SYMBOL_VALUE_ADDRESS (msym);
1357 else
1358 dyncall = -1;
1359 }
1360
1361 if (!dyncall_external)
1362 {
1363 msym = lookup_minimal_symbol ("$$dyncall_external", NULL, NULL);
1364 if (msym)
1365 dyncall_external = SYMBOL_VALUE_ADDRESS (msym);
1366 else
1367 dyncall_external = -1;
1368 }
1369
1370 if (!sr4export)
1371 {
1372 msym = lookup_minimal_symbol ("_sr4export", NULL, NULL);
1373 if (msym)
1374 sr4export = SYMBOL_VALUE_ADDRESS (msym);
1375 else
1376 sr4export = -1;
1377 }
1378
1379 /* Addresses passed to dyncall may *NOT* be the actual address
1380 of the function. So we may have to do something special. */
1381 if (pc == dyncall)
1382 {
1383 pc = (CORE_ADDR) read_register (22);
1384
1385 /* If bit 30 (counting from the left) is on, then pc is the address of
c5aa993b
JM
1386 the PLT entry for this function, not the address of the function
1387 itself. Bit 31 has meaning too, but only for MPE. */
c906108c 1388 if (pc & 0x2)
53a5351d 1389 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
c906108c
SS
1390 }
1391 if (pc == dyncall_external)
1392 {
1393 pc = (CORE_ADDR) read_register (22);
53a5351d 1394 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
c906108c
SS
1395 }
1396 else if (pc == sr4export)
1397 pc = (CORE_ADDR) (read_register (22));
1398
1399 /* Get the unwind descriptor corresponding to PC, return zero
1400 if no unwind was found. */
1401 u = find_unwind_entry (pc);
1402 if (!u)
1403 return 0;
1404
1405 /* If this isn't a linker stub, then return now. */
1406 /* elz: attention here! (FIXME) because of a compiler/linker
1407 error, some stubs which should have a non zero stub_unwind.stub_type
1408 have unfortunately a value of zero. So this function would return here
1409 as if we were not in a trampoline. To fix this, we go look at the partial
1410 symbol information, which reports this guy as a stub.
1411 (FIXME): Unfortunately, we are not that lucky: it turns out that the
1412 partial symbol information is also wrong sometimes. This is because
1413 when it is entered (somread.c::som_symtab_read()) it can happen that
1414 if the type of the symbol (from the som) is Entry, and the symbol is
1415 in a shared library, then it can also be a trampoline. This would
1416 be OK, except that I believe the way they decide if we are ina shared library
1417 does not work. SOOOO..., even if we have a regular function w/o trampolines
1418 its minimal symbol can be assigned type mst_solib_trampoline.
1419 Also, if we find that the symbol is a real stub, then we fix the unwind
1420 descriptor, and define the stub type to be EXPORT.
c5aa993b 1421 Hopefully this is correct most of the times. */
c906108c 1422 if (u->stub_unwind.stub_type == 0)
c5aa993b 1423 {
c906108c
SS
1424
1425/* elz: NOTE (FIXME!) once the problem with the unwind information is fixed
1426 we can delete all the code which appears between the lines */
1427/*--------------------------------------------------------------------------*/
c5aa993b 1428 msym = lookup_minimal_symbol_by_pc (pc);
c906108c 1429
c5aa993b
JM
1430 if (msym == NULL || MSYMBOL_TYPE (msym) != mst_solib_trampoline)
1431 return orig_pc == pc ? 0 : pc & ~0x3;
1432
1433 else if (msym != NULL && MSYMBOL_TYPE (msym) == mst_solib_trampoline)
1434 {
1435 struct objfile *objfile;
1436 struct minimal_symbol *msymbol;
1437 int function_found = 0;
1438
1439 /* go look if there is another minimal symbol with the same name as
1440 this one, but with type mst_text. This would happen if the msym
1441 is an actual trampoline, in which case there would be another
1442 symbol with the same name corresponding to the real function */
1443
1444 ALL_MSYMBOLS (objfile, msymbol)
1445 {
1446 if (MSYMBOL_TYPE (msymbol) == mst_text
cb137aa5 1447 && DEPRECATED_STREQ (DEPRECATED_SYMBOL_NAME (msymbol), DEPRECATED_SYMBOL_NAME (msym)))
c5aa993b
JM
1448 {
1449 function_found = 1;
1450 break;
1451 }
1452 }
1453
1454 if (function_found)
1455 /* the type of msym is correct (mst_solib_trampoline), but
1456 the unwind info is wrong, so set it to the correct value */
1457 u->stub_unwind.stub_type = EXPORT;
1458 else
1459 /* the stub type info in the unwind is correct (this is not a
1460 trampoline), but the msym type information is wrong, it
1461 should be mst_text. So we need to fix the msym, and also
1462 get out of this function */
1463 {
1464 MSYMBOL_TYPE (msym) = mst_text;
1465 return orig_pc == pc ? 0 : pc & ~0x3;
1466 }
1467 }
c906108c 1468
c906108c 1469/*--------------------------------------------------------------------------*/
c5aa993b 1470 }
c906108c
SS
1471
1472 /* It's a stub. Search for a branch and figure out where it goes.
1473 Note we have to handle multi insn branch sequences like ldil;ble.
1474 Most (all?) other branches can be determined by examining the contents
1475 of certain registers and the stack. */
1476
1477 loc = pc;
1478 curr_inst = 0;
1479 prev_inst = 0;
1480 while (1)
1481 {
1482 /* Make sure we haven't walked outside the range of this stub. */
1483 if (u != find_unwind_entry (loc))
1484 {
1485 warning ("Unable to find branch in linker stub");
1486 return orig_pc == pc ? 0 : pc & ~0x3;
1487 }
1488
1489 prev_inst = curr_inst;
1490 curr_inst = read_memory_integer (loc, 4);
1491
1492 /* Does it look like a branch external using %r1? Then it's the
c5aa993b 1493 branch from the stub to the actual function. */
c906108c
SS
1494 if ((curr_inst & 0xffe0e000) == 0xe0202000)
1495 {
1496 /* Yup. See if the previous instruction loaded
1497 a value into %r1. If so compute and return the jump address. */
1498 if ((prev_inst & 0xffe00000) == 0x20200000)
1499 return (extract_21 (prev_inst) + extract_17 (curr_inst)) & ~0x3;
1500 else
1501 {
1502 warning ("Unable to find ldil X,%%r1 before ble Y(%%sr4,%%r1).");
1503 return orig_pc == pc ? 0 : pc & ~0x3;
1504 }
1505 }
1506
1507 /* Does it look like a be 0(sr0,%r21)? OR
1508 Does it look like a be, n 0(sr0,%r21)? OR
1509 Does it look like a bve (r21)? (this is on PA2.0)
1510 Does it look like a bve, n(r21)? (this is also on PA2.0)
1511 That's the branch from an
c5aa993b 1512 import stub to an export stub.
c906108c 1513
c5aa993b
JM
1514 It is impossible to determine the target of the branch via
1515 simple examination of instructions and/or data (consider
1516 that the address in the plabel may be the address of the
1517 bind-on-reference routine in the dynamic loader).
c906108c 1518
c5aa993b 1519 So we have try an alternative approach.
c906108c 1520
c5aa993b
JM
1521 Get the name of the symbol at our current location; it should
1522 be a stub symbol with the same name as the symbol in the
1523 shared library.
c906108c 1524
c5aa993b
JM
1525 Then lookup a minimal symbol with the same name; we should
1526 get the minimal symbol for the target routine in the shared
1527 library as those take precedence of import/export stubs. */
c906108c 1528 if ((curr_inst == 0xe2a00000) ||
c5aa993b
JM
1529 (curr_inst == 0xe2a00002) ||
1530 (curr_inst == 0xeaa0d000) ||
1531 (curr_inst == 0xeaa0d002))
c906108c
SS
1532 {
1533 struct minimal_symbol *stubsym, *libsym;
1534
1535 stubsym = lookup_minimal_symbol_by_pc (loc);
1536 if (stubsym == NULL)
1537 {
ce414844 1538 warning ("Unable to find symbol for 0x%lx", loc);
c906108c
SS
1539 return orig_pc == pc ? 0 : pc & ~0x3;
1540 }
1541
22abf04a 1542 libsym = lookup_minimal_symbol (DEPRECATED_SYMBOL_NAME (stubsym), NULL, NULL);
c906108c
SS
1543 if (libsym == NULL)
1544 {
1545 warning ("Unable to find library symbol for %s\n",
22abf04a 1546 DEPRECATED_SYMBOL_NAME (stubsym));
c906108c
SS
1547 return orig_pc == pc ? 0 : pc & ~0x3;
1548 }
1549
1550 return SYMBOL_VALUE (libsym);
1551 }
1552
1553 /* Does it look like bl X,%rp or bl X,%r0? Another way to do a
c5aa993b
JM
1554 branch from the stub to the actual function. */
1555 /*elz */
c906108c
SS
1556 else if ((curr_inst & 0xffe0e000) == 0xe8400000
1557 || (curr_inst & 0xffe0e000) == 0xe8000000
c5aa993b 1558 || (curr_inst & 0xffe0e000) == 0xe800A000)
c906108c
SS
1559 return (loc + extract_17 (curr_inst) + 8) & ~0x3;
1560
1561 /* Does it look like bv (rp)? Note this depends on the
c5aa993b
JM
1562 current stack pointer being the same as the stack
1563 pointer in the stub itself! This is a branch on from the
1564 stub back to the original caller. */
1565 /*else if ((curr_inst & 0xffe0e000) == 0xe840c000) */
c906108c
SS
1566 else if ((curr_inst & 0xffe0f000) == 0xe840c000)
1567 {
1568 /* Yup. See if the previous instruction loaded
1569 rp from sp - 8. */
1570 if (prev_inst == 0x4bc23ff1)
1571 return (read_memory_integer
eded0a31 1572 (read_register (HPPA_SP_REGNUM) - 8, 4)) & ~0x3;
c906108c
SS
1573 else
1574 {
1575 warning ("Unable to find restore of %%rp before bv (%%rp).");
1576 return orig_pc == pc ? 0 : pc & ~0x3;
1577 }
1578 }
1579
1580 /* elz: added this case to capture the new instruction
1581 at the end of the return part of an export stub used by
1582 the PA2.0: BVE, n (rp) */
1583 else if ((curr_inst & 0xffe0f000) == 0xe840d000)
1584 {
c5aa993b 1585 return (read_memory_integer
eded0a31 1586 (read_register (HPPA_SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
c906108c
SS
1587 }
1588
1589 /* What about be,n 0(sr0,%rp)? It's just another way we return to
c5aa993b 1590 the original caller from the stub. Used in dynamic executables. */
c906108c
SS
1591 else if (curr_inst == 0xe0400002)
1592 {
1593 /* The value we jump to is sitting in sp - 24. But that's
1594 loaded several instructions before the be instruction.
1595 I guess we could check for the previous instruction being
1596 mtsp %r1,%sr0 if we want to do sanity checking. */
c5aa993b 1597 return (read_memory_integer
eded0a31 1598 (read_register (HPPA_SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
c906108c
SS
1599 }
1600
1601 /* Haven't found the branch yet, but we're still in the stub.
c5aa993b 1602 Keep looking. */
c906108c
SS
1603 loc += 4;
1604 }
1605}
1606
1607
1608/* For the given instruction (INST), return any adjustment it makes
1609 to the stack pointer or zero for no adjustment.
1610
1611 This only handles instructions commonly found in prologues. */
1612
1613static int
fba45db2 1614prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1615{
1616 /* This must persist across calls. */
1617 static int save_high21;
1618
1619 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1620 if ((inst & 0xffffc000) == 0x37de0000)
1621 return extract_14 (inst);
1622
1623 /* stwm X,D(sp) */
1624 if ((inst & 0xffe00000) == 0x6fc00000)
1625 return extract_14 (inst);
1626
104c1213
JM
1627 /* std,ma X,D(sp) */
1628 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1629 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1630
c906108c
SS
1631 /* addil high21,%r1; ldo low11,(%r1),%r30)
1632 save high bits in save_high21 for later use. */
1633 if ((inst & 0xffe00000) == 0x28200000)
1634 {
1635 save_high21 = extract_21 (inst);
1636 return 0;
1637 }
1638
1639 if ((inst & 0xffff0000) == 0x343e0000)
1640 return save_high21 + extract_14 (inst);
1641
1642 /* fstws as used by the HP compilers. */
1643 if ((inst & 0xffffffe0) == 0x2fd01220)
1644 return extract_5_load (inst);
1645
1646 /* No adjustment. */
1647 return 0;
1648}
1649
1650/* Return nonzero if INST is a branch of some kind, else return zero. */
1651
1652static int
fba45db2 1653is_branch (unsigned long inst)
c906108c
SS
1654{
1655 switch (inst >> 26)
1656 {
1657 case 0x20:
1658 case 0x21:
1659 case 0x22:
1660 case 0x23:
7be570e7 1661 case 0x27:
c906108c
SS
1662 case 0x28:
1663 case 0x29:
1664 case 0x2a:
1665 case 0x2b:
7be570e7 1666 case 0x2f:
c906108c
SS
1667 case 0x30:
1668 case 0x31:
1669 case 0x32:
1670 case 0x33:
1671 case 0x38:
1672 case 0x39:
1673 case 0x3a:
7be570e7 1674 case 0x3b:
c906108c
SS
1675 return 1;
1676
1677 default:
1678 return 0;
1679 }
1680}
1681
1682/* Return the register number for a GR which is saved by INST or
1683 zero it INST does not save a GR. */
1684
1685static int
fba45db2 1686inst_saves_gr (unsigned long inst)
c906108c
SS
1687{
1688 /* Does it look like a stw? */
7be570e7
JM
1689 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1690 || (inst >> 26) == 0x1f
1691 || ((inst >> 26) == 0x1f
1692 && ((inst >> 6) == 0xa)))
1693 return extract_5R_store (inst);
1694
1695 /* Does it look like a std? */
1696 if ((inst >> 26) == 0x1c
1697 || ((inst >> 26) == 0x03
1698 && ((inst >> 6) & 0xf) == 0xb))
c906108c
SS
1699 return extract_5R_store (inst);
1700
1701 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1702 if ((inst >> 26) == 0x1b)
1703 return extract_5R_store (inst);
1704
1705 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1706 too. */
7be570e7
JM
1707 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1708 || ((inst >> 26) == 0x3
1709 && (((inst >> 6) & 0xf) == 0x8
1710 || (inst >> 6) & 0xf) == 0x9))
c906108c 1711 return extract_5R_store (inst);
c5aa993b 1712
c906108c
SS
1713 return 0;
1714}
1715
1716/* Return the register number for a FR which is saved by INST or
1717 zero it INST does not save a FR.
1718
1719 Note we only care about full 64bit register stores (that's the only
1720 kind of stores the prologue will use).
1721
1722 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1723
1724static int
fba45db2 1725inst_saves_fr (unsigned long inst)
c906108c 1726{
7be570e7 1727 /* is this an FSTD ? */
c906108c
SS
1728 if ((inst & 0xfc00dfc0) == 0x2c001200)
1729 return extract_5r_store (inst);
7be570e7
JM
1730 if ((inst & 0xfc000002) == 0x70000002)
1731 return extract_5R_store (inst);
1732 /* is this an FSTW ? */
c906108c
SS
1733 if ((inst & 0xfc00df80) == 0x24001200)
1734 return extract_5r_store (inst);
7be570e7
JM
1735 if ((inst & 0xfc000002) == 0x7c000000)
1736 return extract_5R_store (inst);
c906108c
SS
1737 return 0;
1738}
1739
1740/* Advance PC across any function entry prologue instructions
1741 to reach some "real" code.
1742
1743 Use information in the unwind table to determine what exactly should
1744 be in the prologue. */
1745
1746
1747CORE_ADDR
fba45db2 1748skip_prologue_hard_way (CORE_ADDR pc)
c906108c
SS
1749{
1750 char buf[4];
1751 CORE_ADDR orig_pc = pc;
1752 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1753 unsigned long args_stored, status, i, restart_gr, restart_fr;
1754 struct unwind_table_entry *u;
1755
1756 restart_gr = 0;
1757 restart_fr = 0;
1758
1759restart:
1760 u = find_unwind_entry (pc);
1761 if (!u)
1762 return pc;
1763
c5aa993b 1764 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1765 if ((pc & ~0x3) != u->region_start)
1766 return pc;
1767
1768 /* This is how much of a frame adjustment we need to account for. */
1769 stack_remaining = u->Total_frame_size << 3;
1770
1771 /* Magic register saves we want to know about. */
1772 save_rp = u->Save_RP;
1773 save_sp = u->Save_SP;
1774
1775 /* An indication that args may be stored into the stack. Unfortunately
1776 the HPUX compilers tend to set this in cases where no args were
1777 stored too!. */
1778 args_stored = 1;
1779
1780 /* Turn the Entry_GR field into a bitmask. */
1781 save_gr = 0;
1782 for (i = 3; i < u->Entry_GR + 3; i++)
1783 {
1784 /* Frame pointer gets saved into a special location. */
eded0a31 1785 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1786 continue;
1787
1788 save_gr |= (1 << i);
1789 }
1790 save_gr &= ~restart_gr;
1791
1792 /* Turn the Entry_FR field into a bitmask too. */
1793 save_fr = 0;
1794 for (i = 12; i < u->Entry_FR + 12; i++)
1795 save_fr |= (1 << i);
1796 save_fr &= ~restart_fr;
1797
1798 /* Loop until we find everything of interest or hit a branch.
1799
1800 For unoptimized GCC code and for any HP CC code this will never ever
1801 examine any user instructions.
1802
1803 For optimzied GCC code we're faced with problems. GCC will schedule
1804 its prologue and make prologue instructions available for delay slot
1805 filling. The end result is user code gets mixed in with the prologue
1806 and a prologue instruction may be in the delay slot of the first branch
1807 or call.
1808
1809 Some unexpected things are expected with debugging optimized code, so
1810 we allow this routine to walk past user instructions in optimized
1811 GCC code. */
1812 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1813 || args_stored)
1814 {
1815 unsigned int reg_num;
1816 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1817 unsigned long old_save_rp, old_save_sp, next_inst;
1818
1819 /* Save copies of all the triggers so we can compare them later
c5aa993b 1820 (only for HPC). */
c906108c
SS
1821 old_save_gr = save_gr;
1822 old_save_fr = save_fr;
1823 old_save_rp = save_rp;
1824 old_save_sp = save_sp;
1825 old_stack_remaining = stack_remaining;
1826
1827 status = target_read_memory (pc, buf, 4);
1828 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1829
c906108c
SS
1830 /* Yow! */
1831 if (status != 0)
1832 return pc;
1833
1834 /* Note the interesting effects of this instruction. */
1835 stack_remaining -= prologue_inst_adjust_sp (inst);
1836
7be570e7
JM
1837 /* There are limited ways to store the return pointer into the
1838 stack. */
1839 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1)
c906108c
SS
1840 save_rp = 0;
1841
104c1213 1842 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1843 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1844 if ((inst & 0xffffc000) == 0x6fc10000
1845 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1846 save_sp = 0;
1847
6426a772
JM
1848 /* Are we loading some register with an offset from the argument
1849 pointer? */
1850 if ((inst & 0xffe00000) == 0x37a00000
1851 || (inst & 0xffffffe0) == 0x081d0240)
1852 {
1853 pc += 4;
1854 continue;
1855 }
1856
c906108c
SS
1857 /* Account for general and floating-point register saves. */
1858 reg_num = inst_saves_gr (inst);
1859 save_gr &= ~(1 << reg_num);
1860
1861 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1862 Unfortunately args_stored only tells us that some arguments
1863 where stored into the stack. Not how many or what kind!
c906108c 1864
c5aa993b
JM
1865 This is a kludge as on the HP compiler sets this bit and it
1866 never does prologue scheduling. So once we see one, skip past
1867 all of them. We have similar code for the fp arg stores below.
c906108c 1868
c5aa993b
JM
1869 FIXME. Can still die if we have a mix of GR and FR argument
1870 stores! */
6426a772 1871 if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c 1872 {
6426a772 1873 while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c
SS
1874 {
1875 pc += 4;
1876 status = target_read_memory (pc, buf, 4);
1877 inst = extract_unsigned_integer (buf, 4);
1878 if (status != 0)
1879 return pc;
1880 reg_num = inst_saves_gr (inst);
1881 }
1882 args_stored = 0;
1883 continue;
1884 }
1885
1886 reg_num = inst_saves_fr (inst);
1887 save_fr &= ~(1 << reg_num);
1888
1889 status = target_read_memory (pc + 4, buf, 4);
1890 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1891
c906108c
SS
1892 /* Yow! */
1893 if (status != 0)
1894 return pc;
1895
1896 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1897 save. */
c906108c
SS
1898 if ((inst & 0xfc000000) == 0x34000000
1899 && inst_saves_fr (next_inst) >= 4
6426a772 1900 && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1901 {
1902 /* So we drop into the code below in a reasonable state. */
1903 reg_num = inst_saves_fr (next_inst);
1904 pc -= 4;
1905 }
1906
1907 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1908 This is a kludge as on the HP compiler sets this bit and it
1909 never does prologue scheduling. So once we see one, skip past
1910 all of them. */
6426a772 1911 if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c 1912 {
6426a772 1913 while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1914 {
1915 pc += 8;
1916 status = target_read_memory (pc, buf, 4);
1917 inst = extract_unsigned_integer (buf, 4);
1918 if (status != 0)
1919 return pc;
1920 if ((inst & 0xfc000000) != 0x34000000)
1921 break;
1922 status = target_read_memory (pc + 4, buf, 4);
1923 next_inst = extract_unsigned_integer (buf, 4);
1924 if (status != 0)
1925 return pc;
1926 reg_num = inst_saves_fr (next_inst);
1927 }
1928 args_stored = 0;
1929 continue;
1930 }
1931
1932 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1933 instruction is in the delay slot of the first call/branch. */
c906108c
SS
1934 if (is_branch (inst))
1935 break;
1936
1937 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1938 arguments were stored into the stack (boo hiss). This could
1939 cause this code to then skip a bunch of user insns (up to the
1940 first branch).
1941
1942 To combat this we try to identify when args_stored was bogusly
1943 set and clear it. We only do this when args_stored is nonzero,
1944 all other resources are accounted for, and nothing changed on
1945 this pass. */
c906108c 1946 if (args_stored
c5aa993b 1947 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1948 && old_save_gr == save_gr && old_save_fr == save_fr
1949 && old_save_rp == save_rp && old_save_sp == save_sp
1950 && old_stack_remaining == stack_remaining)
1951 break;
c5aa993b 1952
c906108c
SS
1953 /* Bump the PC. */
1954 pc += 4;
1955 }
1956
1957 /* We've got a tenative location for the end of the prologue. However
1958 because of limitations in the unwind descriptor mechanism we may
1959 have went too far into user code looking for the save of a register
1960 that does not exist. So, if there registers we expected to be saved
1961 but never were, mask them out and restart.
1962
1963 This should only happen in optimized code, and should be very rare. */
c5aa993b 1964 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1965 {
1966 pc = orig_pc;
1967 restart_gr = save_gr;
1968 restart_fr = save_fr;
1969 goto restart;
1970 }
1971
1972 return pc;
1973}
1974
1975
7be570e7
JM
1976/* Return the address of the PC after the last prologue instruction if
1977 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1978
1979static CORE_ADDR
fba45db2 1980after_prologue (CORE_ADDR pc)
c906108c
SS
1981{
1982 struct symtab_and_line sal;
1983 CORE_ADDR func_addr, func_end;
1984 struct symbol *f;
1985
7be570e7
JM
1986 /* If we can not find the symbol in the partial symbol table, then
1987 there is no hope we can determine the function's start address
1988 with this code. */
c906108c 1989 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1990 return 0;
c906108c 1991
7be570e7 1992 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1993 sal = find_pc_line (func_addr, 0);
1994
7be570e7
JM
1995 /* There are only two cases to consider. First, the end of the source line
1996 is within the function bounds. In that case we return the end of the
1997 source line. Second is the end of the source line extends beyond the
1998 bounds of the current function. We need to use the slow code to
1999 examine instructions in that case.
c906108c 2000
7be570e7
JM
2001 Anything else is simply a bug elsewhere. Fixing it here is absolutely
2002 the wrong thing to do. In fact, it should be entirely possible for this
2003 function to always return zero since the slow instruction scanning code
2004 is supposed to *always* work. If it does not, then it is a bug. */
2005 if (sal.end < func_end)
2006 return sal.end;
c5aa993b 2007 else
7be570e7 2008 return 0;
c906108c
SS
2009}
2010
2011/* To skip prologues, I use this predicate. Returns either PC itself
2012 if the code at PC does not look like a function prologue; otherwise
2013 returns an address that (if we're lucky) follows the prologue. If
2014 LENIENT, then we must skip everything which is involved in setting
2015 up the frame (it's OK to skip more, just so long as we don't skip
2016 anything which might clobber the registers which are being saved.
2017 Currently we must not skip more on the alpha, but we might the lenient
2018 stuff some day. */
2019
2020CORE_ADDR
fba45db2 2021hppa_skip_prologue (CORE_ADDR pc)
c906108c 2022{
c5aa993b
JM
2023 unsigned long inst;
2024 int offset;
2025 CORE_ADDR post_prologue_pc;
2026 char buf[4];
c906108c 2027
c5aa993b
JM
2028 /* See if we can determine the end of the prologue via the symbol table.
2029 If so, then return either PC, or the PC after the prologue, whichever
2030 is greater. */
c906108c 2031
c5aa993b 2032 post_prologue_pc = after_prologue (pc);
c906108c 2033
7be570e7
JM
2034 /* If after_prologue returned a useful address, then use it. Else
2035 fall back on the instruction skipping code.
2036
2037 Some folks have claimed this causes problems because the breakpoint
2038 may be the first instruction of the prologue. If that happens, then
2039 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
2040 if (post_prologue_pc != 0)
2041 return max (pc, post_prologue_pc);
c5aa993b
JM
2042 else
2043 return (skip_prologue_hard_way (pc));
c906108c
SS
2044}
2045
26d08f08
AC
2046struct hppa_frame_cache
2047{
2048 CORE_ADDR base;
2049 struct trad_frame_saved_reg *saved_regs;
2050};
2051
2052static struct hppa_frame_cache *
2053hppa_frame_cache (struct frame_info *next_frame, void **this_cache)
2054{
2055 struct hppa_frame_cache *cache;
2056 long saved_gr_mask;
2057 long saved_fr_mask;
2058 CORE_ADDR this_sp;
2059 long frame_size;
2060 struct unwind_table_entry *u;
2061 int i;
2062
2063 if ((*this_cache) != NULL)
2064 return (*this_cache);
2065 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2066 (*this_cache) = cache;
2067 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2068
2069 /* Yow! */
2070 u = find_unwind_entry (frame_func_unwind (next_frame));
2071 if (!u)
52b5e991 2072 return (*this_cache);
26d08f08
AC
2073
2074 /* Turn the Entry_GR field into a bitmask. */
2075 saved_gr_mask = 0;
2076 for (i = 3; i < u->Entry_GR + 3; i++)
2077 {
2078 /* Frame pointer gets saved into a special location. */
eded0a31 2079 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
2080 continue;
2081
2082 saved_gr_mask |= (1 << i);
2083 }
2084
2085 /* Turn the Entry_FR field into a bitmask too. */
2086 saved_fr_mask = 0;
2087 for (i = 12; i < u->Entry_FR + 12; i++)
2088 saved_fr_mask |= (1 << i);
2089
2090 /* Loop until we find everything of interest or hit a branch.
2091
2092 For unoptimized GCC code and for any HP CC code this will never ever
2093 examine any user instructions.
2094
2095 For optimized GCC code we're faced with problems. GCC will schedule
2096 its prologue and make prologue instructions available for delay slot
2097 filling. The end result is user code gets mixed in with the prologue
2098 and a prologue instruction may be in the delay slot of the first branch
2099 or call.
2100
2101 Some unexpected things are expected with debugging optimized code, so
2102 we allow this routine to walk past user instructions in optimized
2103 GCC code. */
2104 {
2105 int final_iteration = 0;
2106 CORE_ADDR pc;
3a515653 2107 CORE_ADDR end_pc;
26d08f08
AC
2108 int looking_for_sp = u->Save_SP;
2109 int looking_for_rp = u->Save_RP;
2110 int fp_loc = -1;
3a515653 2111 end_pc = skip_prologue_using_sal (frame_func_unwind (next_frame));
26d08f08
AC
2112 if (end_pc == 0)
2113 end_pc = frame_pc_unwind (next_frame);
2114 frame_size = 0;
2115 for (pc = frame_func_unwind (next_frame);
2116 ((saved_gr_mask || saved_fr_mask
2117 || looking_for_sp || looking_for_rp
2118 || frame_size < (u->Total_frame_size << 3))
2119 && pc <= end_pc);
2120 pc += 4)
2121 {
2122 int reg;
2123 char buf4[4];
2124 long status = target_read_memory (pc, buf4, sizeof buf4);
2125 long inst = extract_unsigned_integer (buf4, sizeof buf4);
2126
2127 /* Note the interesting effects of this instruction. */
2128 frame_size += prologue_inst_adjust_sp (inst);
2129
2130 /* There are limited ways to store the return pointer into the
2131 stack. */
2132 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2133 {
2134 looking_for_rp = 0;
2135 cache->saved_regs[RP_REGNUM].addr = -20;
2136 }
2137 else if (inst == 0x0fc212c1) /* std rp,-0x10(sr0,sp) */
2138 {
2139 looking_for_rp = 0;
2140 cache->saved_regs[RP_REGNUM].addr = -16;
2141 }
2142
2143 /* Check to see if we saved SP into the stack. This also
2144 happens to indicate the location of the saved frame
2145 pointer. */
2146 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2147 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2148 {
2149 looking_for_sp = 0;
eded0a31 2150 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08
AC
2151 }
2152
2153 /* Account for general and floating-point register saves. */
2154 reg = inst_saves_gr (inst);
2155 if (reg >= 3 && reg <= 18
eded0a31 2156 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2157 {
2158 saved_gr_mask &= ~(1 << reg);
2159 if ((inst >> 26) == 0x1b && extract_14 (inst) >= 0)
2160 /* stwm with a positive displacement is a _post_
2161 _modify_. */
2162 cache->saved_regs[reg].addr = 0;
2163 else if ((inst & 0xfc00000c) == 0x70000008)
2164 /* A std has explicit post_modify forms. */
2165 cache->saved_regs[reg].addr = 0;
2166 else
2167 {
2168 CORE_ADDR offset;
2169
2170 if ((inst >> 26) == 0x1c)
2171 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
2172 else if ((inst >> 26) == 0x03)
2173 offset = low_sign_extend (inst & 0x1f, 5);
2174 else
2175 offset = extract_14 (inst);
2176
2177 /* Handle code with and without frame pointers. */
2178 if (u->Save_SP)
2179 cache->saved_regs[reg].addr = offset;
2180 else
2181 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
2182 }
2183 }
2184
2185 /* GCC handles callee saved FP regs a little differently.
2186
2187 It emits an instruction to put the value of the start of
2188 the FP store area into %r1. It then uses fstds,ma with a
2189 basereg of %r1 for the stores.
2190
2191 HP CC emits them at the current stack pointer modifying the
2192 stack pointer as it stores each register. */
2193
2194 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2195 if ((inst & 0xffffc000) == 0x34610000
2196 || (inst & 0xffffc000) == 0x37c10000)
2197 fp_loc = extract_14 (inst);
2198
2199 reg = inst_saves_fr (inst);
2200 if (reg >= 12 && reg <= 21)
2201 {
2202 /* Note +4 braindamage below is necessary because the FP
2203 status registers are internally 8 registers rather than
2204 the expected 4 registers. */
2205 saved_fr_mask &= ~(1 << reg);
2206 if (fp_loc == -1)
2207 {
2208 /* 1st HP CC FP register store. After this
2209 instruction we've set enough state that the GCC and
2210 HPCC code are both handled in the same manner. */
2211 cache->saved_regs[reg + FP4_REGNUM + 4].addr = 0;
2212 fp_loc = 8;
2213 }
2214 else
2215 {
eded0a31 2216 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2217 fp_loc += 8;
2218 }
2219 }
2220
2221 /* Quit if we hit any kind of branch the previous iteration. */
2222 if (final_iteration)
2223 break;
2224 /* We want to look precisely one instruction beyond the branch
2225 if we have not found everything yet. */
2226 if (is_branch (inst))
2227 final_iteration = 1;
2228 }
2229 }
2230
2231 {
2232 /* The frame base always represents the value of %sp at entry to
2233 the current function (and is thus equivalent to the "saved"
2234 stack pointer. */
eded0a31 2235 CORE_ADDR this_sp = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
26d08f08
AC
2236 /* FIXME: cagney/2004-02-22: This assumes that the frame has been
2237 created. If it hasn't everything will be out-of-wack. */
eded0a31 2238 if (u->Save_SP && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
26d08f08
AC
2239 /* Both we're expecting the SP to be saved and the SP has been
2240 saved. The entry SP value is saved at this frame's SP
2241 address. */
2242 cache->base = read_memory_integer (this_sp, TARGET_PTR_BIT / 8);
2243 else
2244 /* The prologue has been slowly allocating stack space. Adjust
2245 the SP back. */
2246 cache->base = this_sp - frame_size;
eded0a31 2247 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2248 }
2249
412275d5
AC
2250 /* The PC is found in the "return register", "Millicode" uses "r31"
2251 as the return register while normal code uses "rp". */
26d08f08 2252 if (u->Millicode)
412275d5 2253 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
26d08f08 2254 else
412275d5 2255 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[RP_REGNUM];
26d08f08
AC
2256
2257 {
2258 /* Convert all the offsets into addresses. */
2259 int reg;
2260 for (reg = 0; reg < NUM_REGS; reg++)
2261 {
2262 if (trad_frame_addr_p (cache->saved_regs, reg))
2263 cache->saved_regs[reg].addr += cache->base;
2264 }
2265 }
2266
2267 return (*this_cache);
2268}
2269
2270static void
2271hppa_frame_this_id (struct frame_info *next_frame, void **this_cache,
2272 struct frame_id *this_id)
2273{
2274 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
2275 (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame));
2276}
2277
2278static void
2279hppa_frame_prev_register (struct frame_info *next_frame,
2280 void **this_cache,
2281 int regnum, int *optimizedp,
2282 enum lval_type *lvalp, CORE_ADDR *addrp,
2283 int *realnump, void *valuep)
2284{
2285 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
412275d5
AC
2286 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2287 if (regnum == PCOQ_TAIL_REGNUM)
2288 {
2289 /* The PCOQ TAIL, or NPC, needs to be computed from the unwound
2290 PC register. */
2291 *optimizedp = 0;
2292 *lvalp = not_lval;
2293 *addrp = 0;
2294 *realnump = 0;
2295 if (valuep)
2296 {
2297 int regsize = register_size (gdbarch, PCOQ_HEAD_REGNUM);
2298 CORE_ADDR pc;
2299 int optimized;
2300 enum lval_type lval;
2301 CORE_ADDR addr;
2302 int realnum;
2303 bfd_byte value[MAX_REGISTER_SIZE];
2304 trad_frame_prev_register (next_frame, info->saved_regs,
2305 PCOQ_HEAD_REGNUM, &optimized, &lval, &addr,
2306 &realnum, &value);
2307 pc = extract_unsigned_integer (&value, regsize);
2308 store_unsigned_integer (valuep, regsize, pc + 4);
2309 }
2310 }
2311 else
2312 {
2313 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2314 optimizedp, lvalp, addrp, realnump, valuep);
2315 }
26d08f08
AC
2316}
2317
2318static const struct frame_unwind hppa_frame_unwind =
2319{
2320 NORMAL_FRAME,
2321 hppa_frame_this_id,
2322 hppa_frame_prev_register
2323};
2324
2325static const struct frame_unwind *
2326hppa_frame_unwind_sniffer (struct frame_info *next_frame)
2327{
2328 return &hppa_frame_unwind;
2329}
2330
2331static CORE_ADDR
2332hppa_frame_base_address (struct frame_info *next_frame,
2333 void **this_cache)
2334{
2335 struct hppa_frame_cache *info = hppa_frame_cache (next_frame,
2336 this_cache);
2337 return info->base;
2338}
2339
2340static const struct frame_base hppa_frame_base = {
2341 &hppa_frame_unwind,
2342 hppa_frame_base_address,
2343 hppa_frame_base_address,
2344 hppa_frame_base_address
2345};
2346
2347static const struct frame_base *
2348hppa_frame_base_sniffer (struct frame_info *next_frame)
2349{
2350 return &hppa_frame_base;
2351}
2352
2353static struct frame_id
2354hppa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2355{
2356 return frame_id_build (frame_unwind_register_unsigned (next_frame,
eded0a31 2357 HPPA_SP_REGNUM),
26d08f08
AC
2358 frame_pc_unwind (next_frame));
2359}
2360
2361static CORE_ADDR
2362hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2363{
449e1137 2364 return frame_unwind_register_signed (next_frame, PCOQ_HEAD_REGNUM) & ~3;
26d08f08
AC
2365}
2366
9a043c1d
AC
2367/* Instead of this nasty cast, add a method pvoid() that prints out a
2368 host VOID data type (remember %p isn't portable). */
2369
2370static CORE_ADDR
2371hppa_pointer_to_address_hack (void *ptr)
2372{
2373 gdb_assert (sizeof (ptr) == TYPE_LENGTH (builtin_type_void_data_ptr));
2374 return POINTER_TO_ADDRESS (builtin_type_void_data_ptr, &ptr);
2375}
2376
c906108c 2377static void
fba45db2 2378unwind_command (char *exp, int from_tty)
c906108c
SS
2379{
2380 CORE_ADDR address;
2381 struct unwind_table_entry *u;
2382
2383 /* If we have an expression, evaluate it and use it as the address. */
2384
2385 if (exp != 0 && *exp != 0)
2386 address = parse_and_eval_address (exp);
2387 else
2388 return;
2389
2390 u = find_unwind_entry (address);
2391
2392 if (!u)
2393 {
2394 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2395 return;
2396 }
2397
ce414844 2398 printf_unfiltered ("unwind_table_entry (0x%s):\n",
9a043c1d 2399 paddr_nz (hppa_pointer_to_address_hack (u)));
c906108c
SS
2400
2401 printf_unfiltered ("\tregion_start = ");
2402 print_address (u->region_start, gdb_stdout);
2403
2404 printf_unfiltered ("\n\tregion_end = ");
2405 print_address (u->region_end, gdb_stdout);
2406
c906108c 2407#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2408
2409 printf_unfiltered ("\n\tflags =");
2410 pif (Cannot_unwind);
2411 pif (Millicode);
2412 pif (Millicode_save_sr0);
2413 pif (Entry_SR);
2414 pif (Args_stored);
2415 pif (Variable_Frame);
2416 pif (Separate_Package_Body);
2417 pif (Frame_Extension_Millicode);
2418 pif (Stack_Overflow_Check);
2419 pif (Two_Instruction_SP_Increment);
2420 pif (Ada_Region);
2421 pif (Save_SP);
2422 pif (Save_RP);
2423 pif (Save_MRP_in_frame);
2424 pif (extn_ptr_defined);
2425 pif (Cleanup_defined);
2426 pif (MPE_XL_interrupt_marker);
2427 pif (HP_UX_interrupt_marker);
2428 pif (Large_frame);
2429
2430 putchar_unfiltered ('\n');
2431
c906108c 2432#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2433
2434 pin (Region_description);
2435 pin (Entry_FR);
2436 pin (Entry_GR);
2437 pin (Total_frame_size);
2438}
c906108c 2439
c2c6d25f 2440void
fba45db2 2441hppa_skip_permanent_breakpoint (void)
c2c6d25f
JM
2442{
2443 /* To step over a breakpoint instruction on the PA takes some
2444 fiddling with the instruction address queue.
2445
2446 When we stop at a breakpoint, the IA queue front (the instruction
2447 we're executing now) points at the breakpoint instruction, and
2448 the IA queue back (the next instruction to execute) points to
2449 whatever instruction we would execute after the breakpoint, if it
2450 were an ordinary instruction. This is the case even if the
2451 breakpoint is in the delay slot of a branch instruction.
2452
2453 Clearly, to step past the breakpoint, we need to set the queue
2454 front to the back. But what do we put in the back? What
2455 instruction comes after that one? Because of the branch delay
2456 slot, the next insn is always at the back + 4. */
2457 write_register (PCOQ_HEAD_REGNUM, read_register (PCOQ_TAIL_REGNUM));
2458 write_register (PCSQ_HEAD_REGNUM, read_register (PCSQ_TAIL_REGNUM));
2459
2460 write_register (PCOQ_TAIL_REGNUM, read_register (PCOQ_TAIL_REGNUM) + 4);
2461 /* We can leave the tail's space the same, since there's no jump. */
2462}
2463
d709c020
JB
2464int
2465hppa_reg_struct_has_addr (int gcc_p, struct type *type)
2466{
2467 /* On the PA, any pass-by-value structure > 8 bytes is actually passed
2468 via a pointer regardless of its type or the compiler used. */
2469 return (TYPE_LENGTH (type) > 8);
2470}
2471
2472int
2473hppa_inner_than (CORE_ADDR lhs, CORE_ADDR rhs)
2474{
2475 /* Stack grows upward */
2476 return (lhs > rhs);
2477}
2478
d709c020
JB
2479int
2480hppa_pc_requires_run_before_use (CORE_ADDR pc)
2481{
2482 /* Sometimes we may pluck out a minimal symbol that has a negative address.
2483
2484 An example of this occurs when an a.out is linked against a foo.sl.
2485 The foo.sl defines a global bar(), and the a.out declares a signature
2486 for bar(). However, the a.out doesn't directly call bar(), but passes
2487 its address in another call.
2488
2489 If you have this scenario and attempt to "break bar" before running,
2490 gdb will find a minimal symbol for bar() in the a.out. But that
2491 symbol's address will be negative. What this appears to denote is
2492 an index backwards from the base of the procedure linkage table (PLT)
2493 into the data linkage table (DLT), the end of which is contiguous
2494 with the start of the PLT. This is clearly not a valid address for
2495 us to set a breakpoint on.
2496
2497 Note that one must be careful in how one checks for a negative address.
2498 0xc0000000 is a legitimate address of something in a shared text
2499 segment, for example. Since I don't know what the possible range
2500 is of these "really, truly negative" addresses that come from the
2501 minimal symbols, I'm resorting to the gross hack of checking the
2502 top byte of the address for all 1's. Sigh. */
2503
2504 return (!target_has_stack && (pc & 0xFF000000));
2505}
2506
2507int
2508hppa_instruction_nullified (void)
2509{
2510 /* brobecker 2002/11/07: Couldn't we use a ULONGEST here? It would
2511 avoid the type cast. I'm leaving it as is for now as I'm doing
2512 semi-mechanical multiarching-related changes. */
2513 const int ipsw = (int) read_register (IPSW_REGNUM);
2514 const int flags = (int) read_register (FLAGS_REGNUM);
2515
2516 return ((ipsw & 0x00200000) && !(flags & 0x2));
2517}
2518
d709c020
JB
2519/* Return the GDB type object for the "standard" data type of data
2520 in register N. */
2521
eded0a31
AC
2522static struct type *
2523hppa32_register_type (struct gdbarch *gdbarch, int reg_nr)
d709c020
JB
2524{
2525 if (reg_nr < FP4_REGNUM)
eded0a31 2526 return builtin_type_uint32;
d709c020 2527 else
eded0a31 2528 return builtin_type_ieee_single_big;
d709c020
JB
2529}
2530
3ff7cf9e
JB
2531/* Return the GDB type object for the "standard" data type of data
2532 in register N. hppa64 version. */
2533
eded0a31
AC
2534static struct type *
2535hppa64_register_type (struct gdbarch *gdbarch, int reg_nr)
3ff7cf9e
JB
2536{
2537 if (reg_nr < FP4_REGNUM)
eded0a31 2538 return builtin_type_uint64;
3ff7cf9e 2539 else
eded0a31 2540 return builtin_type_ieee_double_big;
3ff7cf9e
JB
2541}
2542
d709c020
JB
2543/* Return True if REGNUM is not a register available to the user
2544 through ptrace(). */
2545
2546int
2547hppa_cannot_store_register (int regnum)
2548{
2549 return (regnum == 0
2550 || regnum == PCSQ_HEAD_REGNUM
2551 || (regnum >= PCSQ_TAIL_REGNUM && regnum < IPSW_REGNUM)
2552 || (regnum > IPSW_REGNUM && regnum < FP4_REGNUM));
2553
2554}
2555
d709c020
JB
2556CORE_ADDR
2557hppa_smash_text_address (CORE_ADDR addr)
2558{
2559 /* The low two bits of the PC on the PA contain the privilege level.
2560 Some genius implementing a (non-GCC) compiler apparently decided
2561 this means that "addresses" in a text section therefore include a
2562 privilege level, and thus symbol tables should contain these bits.
2563 This seems like a bonehead thing to do--anyway, it seems to work
2564 for our purposes to just ignore those bits. */
2565
2566 return (addr &= ~0x3);
2567}
2568
143985b7
AF
2569/* Get the ith function argument for the current function. */
2570CORE_ADDR
2571hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2572 struct type *type)
2573{
2574 CORE_ADDR addr;
7f5f525d 2575 get_frame_register (frame, R0_REGNUM + 26 - argi, &addr);
143985b7
AF
2576 return addr;
2577}
2578
8e8b2dba
MC
2579/* Here is a table of C type sizes on hppa with various compiles
2580 and options. I measured this on PA 9000/800 with HP-UX 11.11
2581 and these compilers:
2582
2583 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2584 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2585 /opt/aCC/bin/aCC B3910B A.03.45
2586 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2587
2588 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2589 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2590 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2591 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2592 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2593 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2594 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2595 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2596
2597 Each line is:
2598
2599 compiler and options
2600 char, short, int, long, long long
2601 float, double, long double
2602 char *, void (*)()
2603
2604 So all these compilers use either ILP32 or LP64 model.
2605 TODO: gcc has more options so it needs more investigation.
2606
a2379359
MC
2607 For floating point types, see:
2608
2609 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2610 HP-UX floating-point guide, hpux 11.00
2611
8e8b2dba
MC
2612 -- chastain 2003-12-18 */
2613
e6e68f1f
JB
2614static struct gdbarch *
2615hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2616{
3ff7cf9e 2617 struct gdbarch_tdep *tdep;
e6e68f1f 2618 struct gdbarch *gdbarch;
59623e27
JB
2619
2620 /* Try to determine the ABI of the object we are loading. */
4be87837 2621 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2622 {
4be87837
DJ
2623 /* If it's a SOM file, assume it's HP/UX SOM. */
2624 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2625 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2626 }
e6e68f1f
JB
2627
2628 /* find a candidate among the list of pre-declared architectures. */
2629 arches = gdbarch_list_lookup_by_info (arches, &info);
2630 if (arches != NULL)
2631 return (arches->gdbarch);
2632
2633 /* If none found, then allocate and initialize one. */
3ff7cf9e
JB
2634 tdep = XMALLOC (struct gdbarch_tdep);
2635 gdbarch = gdbarch_alloc (&info, tdep);
2636
2637 /* Determine from the bfd_arch_info structure if we are dealing with
2638 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
2639 then default to a 32bit machine. */
2640 if (info.bfd_arch_info != NULL)
2641 tdep->bytes_per_address =
2642 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
2643 else
2644 tdep->bytes_per_address = 4;
2645
2646 /* Some parts of the gdbarch vector depend on whether we are running
2647 on a 32 bits or 64 bits target. */
2648 switch (tdep->bytes_per_address)
2649 {
2650 case 4:
2651 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
2652 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 2653 set_gdbarch_register_type (gdbarch, hppa32_register_type);
3ff7cf9e
JB
2654 break;
2655 case 8:
2656 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
2657 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 2658 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3ff7cf9e
JB
2659 break;
2660 default:
2661 internal_error (__FILE__, __LINE__, "Unsupported address size: %d",
2662 tdep->bytes_per_address);
2663 }
2664
3ff7cf9e 2665 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 2666 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 2667
8e8b2dba
MC
2668 /* The following gdbarch vector elements are the same in both ILP32
2669 and LP64, but might show differences some day. */
2670 set_gdbarch_long_long_bit (gdbarch, 64);
2671 set_gdbarch_long_double_bit (gdbarch, 128);
a2379359 2672 set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
8e8b2dba 2673
3ff7cf9e
JB
2674 /* The following gdbarch vector elements do not depend on the address
2675 size, or in any other gdbarch element previously set. */
60383d10
JB
2676 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
2677 set_gdbarch_skip_trampoline_code (gdbarch, hppa_skip_trampoline_code);
2678 set_gdbarch_in_solib_call_trampoline (gdbarch, hppa_in_solib_call_trampoline);
2679 set_gdbarch_in_solib_return_trampoline (gdbarch,
2680 hppa_in_solib_return_trampoline);
60383d10 2681 set_gdbarch_inner_than (gdbarch, hppa_inner_than);
eded0a31
AC
2682 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
2683 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
60383d10 2684 set_gdbarch_cannot_store_register (gdbarch, hppa_cannot_store_register);
b6fbdd1d 2685 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
2686 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
2687 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2688 set_gdbarch_read_pc (gdbarch, hppa_target_read_pc);
2689 set_gdbarch_write_pc (gdbarch, hppa_target_write_pc);
60383d10 2690
143985b7
AF
2691 /* Helper for function argument information. */
2692 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
2693
36482093
AC
2694 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
2695
3a3bc038
AC
2696 /* When a hardware watchpoint triggers, we'll move the inferior past
2697 it by removing all eventpoints; stepping past the instruction
2698 that caused the trigger; reinserting eventpoints; and checking
2699 whether any watched location changed. */
2700 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
2701
5979bc46 2702 /* Inferior function call methods. */
fca7aa43 2703 switch (tdep->bytes_per_address)
5979bc46 2704 {
fca7aa43
AC
2705 case 4:
2706 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
2707 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
2708 break;
2709 case 8:
782eae8b
AC
2710 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
2711 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 2712 break;
782eae8b
AC
2713 default:
2714 internal_error (__FILE__, __LINE__, "bad switch");
fad850b2
AC
2715 }
2716
2717 /* Struct return methods. */
fca7aa43 2718 switch (tdep->bytes_per_address)
fad850b2 2719 {
fca7aa43
AC
2720 case 4:
2721 set_gdbarch_return_value (gdbarch, hppa32_return_value);
2722 break;
2723 case 8:
782eae8b 2724 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 2725 break;
fca7aa43
AC
2726 default:
2727 internal_error (__FILE__, __LINE__, "bad switch");
e963316f
AC
2728 }
2729
5979bc46 2730 /* Frame unwind methods. */
782eae8b
AC
2731 set_gdbarch_unwind_dummy_id (gdbarch, hppa_unwind_dummy_id);
2732 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
2733 frame_unwind_append_sniffer (gdbarch, hppa_frame_unwind_sniffer);
2734 frame_base_append_sniffer (gdbarch, hppa_frame_base_sniffer);
5979bc46 2735
752d4ac1
JB
2736 /* Hook in ABI-specific overrides, if they have been registered. */
2737 gdbarch_init_osabi (info, gdbarch);
2738
e6e68f1f
JB
2739 return gdbarch;
2740}
2741
2742static void
2743hppa_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2744{
2745 /* Nothing to print for the moment. */
2746}
2747
4facf7e8
JB
2748void
2749_initialize_hppa_tdep (void)
2750{
2751 struct cmd_list_element *c;
2752 void break_at_finish_command (char *arg, int from_tty);
2753 void tbreak_at_finish_command (char *arg, int from_tty);
2754 void break_at_finish_at_depth_command (char *arg, int from_tty);
2755
e6e68f1f 2756 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8
JB
2757
2758 add_cmd ("unwind", class_maintenance, unwind_command,
2759 "Print unwind table entry at given address.",
2760 &maintenanceprintlist);
2761
2762 deprecate_cmd (add_com ("xbreak", class_breakpoint,
2763 break_at_finish_command,
2764 concat ("Set breakpoint at procedure exit. \n\
2765Argument may be function name, or \"*\" and an address.\n\
2766If function is specified, break at end of code for that function.\n\
2767If an address is specified, break at the end of the function that contains \n\
2768that exact address.\n",
2769 "With no arg, uses current execution address of selected stack frame.\n\
2770This is useful for breaking on return to a stack frame.\n\
2771\n\
2772Multiple breakpoints at one place are permitted, and useful if conditional.\n\
2773\n\
2774Do \"help breakpoints\" for info on other commands dealing with breakpoints.", NULL)), NULL);
2775 deprecate_cmd (add_com_alias ("xb", "xbreak", class_breakpoint, 1), NULL);
2776 deprecate_cmd (add_com_alias ("xbr", "xbreak", class_breakpoint, 1), NULL);
2777 deprecate_cmd (add_com_alias ("xbre", "xbreak", class_breakpoint, 1), NULL);
2778 deprecate_cmd (add_com_alias ("xbrea", "xbreak", class_breakpoint, 1), NULL);
2779
2780 deprecate_cmd (c = add_com ("txbreak", class_breakpoint,
2781 tbreak_at_finish_command,
2782"Set temporary breakpoint at procedure exit. Either there should\n\
2783be no argument or the argument must be a depth.\n"), NULL);
2784 set_cmd_completer (c, location_completer);
2785
2786 if (xdb_commands)
2787 deprecate_cmd (add_com ("bx", class_breakpoint,
2788 break_at_finish_at_depth_command,
2789"Set breakpoint at procedure exit. Either there should\n\
2790be no argument or the argument must be a depth.\n"), NULL);
2791}
2792
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