[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c

/* Darwin support for GDB, the GNU debugger.
   Copyright (C) 1997-2018 Free Software Foundation, Inc.

   Contributed by Apple Computer, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "target.h"
#include "symfile.h"
#include "symtab.h"
#include "objfiles.h"
#include "gdbcmd.h"
#include "regcache.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "gdbarch.h"
#include "arch-utils.h"
#include "gdbcore.h"

#include "x86-nat.h"
#include "darwin-nat.h"
#include "i386-darwin-tdep.h"

#ifdef BFD64
#include "amd64-nat.h"
#include "amd64-tdep.h"
#include "amd64-darwin-tdep.h"
#endif

struct i386_darwin_nat_target final : public x86_nat_target<darwin_nat_target>
{
  /* Add our register access methods.  */
  void fetch_registers (struct regcache *, int) override;
  void store_registers (struct regcache *, int) override;
};

static struct i386_darwin_nat_target darwin_target;

/* Read register values from the inferior process.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
i386_darwin_nat_target::fetch_registers (struct regcache *regcache, int regno)
{
  thread_t current_thread = ptid_get_tid (regcache->ptid ());
  int fetched = 0;
  struct gdbarch *gdbarch = regcache->arch ();

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

	  amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
          fetched++;
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
          fetched++;
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
          kern_return_t ret;
	  int i;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
	  for (i = 0; i < I386_NUM_GREGS; i++)
	    regcache->raw_supply
	      (i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);

          fetched++;
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
          fetched++;
        }
    }

  if (! fetched)
    {
      warning (_("unknown register %d"), regno);
      regcache->raw_supply (regno, NULL);
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
i386_darwin_nat_target::store_registers (struct regcache *regcache,
					 int regno)
{
  thread_t current_thread = ptid_get_tid (regcache->ptid ());
  struct gdbarch *gdbarch = regcache->arch ();

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          kern_return_t ret;
	  unsigned int gp_count = x86_THREAD_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	     &gp_count);
          MACH_CHECK_ERROR (ret);
	  gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
          gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);

	  amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

          ret = thread_set_state (current_thread, x86_THREAD_STATE,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          kern_return_t ret;
	  unsigned int fp_count = x86_FLOAT_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	     &fp_count);
          MACH_CHECK_ERROR (ret);
          gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
          gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);

	  amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE,
				  (thread_state_t) & fp_regs,
				  x86_FLOAT_STATE_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          kern_return_t ret;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
	  int i;

          ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  MACH_CHECK_ERROR (ret);

	  for (i = 0; i < I386_NUM_GREGS; i++)
	    if (regno == -1 || regno == i)
	      regcache->raw_collect
		(i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);

          ret = thread_set_state (current_thread, x86_THREAD_STATE32,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE32_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
             &fp_count);
	  MACH_CHECK_ERROR (ret);

	  i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
				  (thread_state_t) &fp_regs,
				  x86_FLOAT_STATE32_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
}

/* Support for debug registers, boosted mostly from i386-linux-nat.c.  */

static void
i386_darwin_dr_set (int regnum, CORE_ADDR value)
{
  int current_pid;
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = ptid_get_tid (inferior_ptid);

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds32.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds32.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds32.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds32.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds32.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds32.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds32.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds32.__dr7 = value;
	  break;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds64.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds64.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds64.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds64.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds64.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds64.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds64.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds64.__dr7 = value;
	  break;
	}
      break;
#endif
    }

  ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
                          (thread_state_t) &dr_regs.uds, dr_count);

  MACH_CHECK_ERROR (ret);
}

static CORE_ADDR
i386_darwin_dr_get (int regnum)
{
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = ptid_get_tid (inferior_ptid);

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds32.__dr0;
	case 1:
	  return dr_regs.uds.ds32.__dr1;
	case 2:
	  return dr_regs.uds.ds32.__dr2;
	case 3:
	  return dr_regs.uds.ds32.__dr3;
	case 4:
	  return dr_regs.uds.ds32.__dr4;
	case 5:
	  return dr_regs.uds.ds32.__dr5;
	case 6:
	  return dr_regs.uds.ds32.__dr6;
	case 7:
	  return dr_regs.uds.ds32.__dr7;
	default:
	  return -1;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds64.__dr0;
	case 1:
	  return dr_regs.uds.ds64.__dr1;
	case 2:
	  return dr_regs.uds.ds64.__dr2;
	case 3:
	  return dr_regs.uds.ds64.__dr3;
	case 4:
	  return dr_regs.uds.ds64.__dr4;
	case 5:
	  return dr_regs.uds.ds64.__dr5;
	case 6:
	  return dr_regs.uds.ds64.__dr6;
	case 7:
	  return dr_regs.uds.ds64.__dr7;
	default:
	  return -1;
	}
      break;
#endif
    default:
      return -1;
    }
}

static void
i386_darwin_dr_set_control (unsigned long control)
{
  i386_darwin_dr_set (DR_CONTROL, control);
}

static void
i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
{
  gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);

  i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
}

static CORE_ADDR
i386_darwin_dr_get_addr (int regnum)
{
  return i386_darwin_dr_get (regnum);
}

static unsigned long
i386_darwin_dr_get_status (void)
{
  return i386_darwin_dr_get (DR_STATUS);
}

static unsigned long
i386_darwin_dr_get_control (void)
{
  return i386_darwin_dr_get (DR_CONTROL);
}

void
darwin_check_osabi (darwin_inferior *inf, thread_t thread)
{
  if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
    {
      /* Attaching to a process.  Let's figure out what kind it is.  */
      x86_thread_state_t gp_regs;
      struct gdbarch_info info;
      unsigned int gp_count = x86_THREAD_STATE_COUNT;
      kern_return_t ret;

      ret = thread_get_state (thread, x86_THREAD_STATE,
			      (thread_state_t) &gp_regs, &gp_count);
      if (ret != KERN_SUCCESS)
	{
	  MACH_CHECK_ERROR (ret);
	  return;
	}

      gdbarch_info_init (&info);
      gdbarch_info_fill (&info);
      info.byte_order = gdbarch_byte_order (target_gdbarch ());
      info.osabi = GDB_OSABI_DARWIN;
      if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_x86_64);
      else
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_i386_i386);
      gdbarch_update_p (info);
    }
}

#define X86_EFLAGS_T 0x100UL

/* Returning from a signal trampoline is done by calling a
   special system call (sigreturn).  This system call
   restores the registers that were saved when the signal was
   raised, including %eflags/%rflags.  That means that single-stepping
   won't work.  Instead, we'll have to modify the signal context
   that's about to be restored, and set the trace flag there.  */

static int
i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
    {
      ULONGEST uctx_addr;
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int eflags;

      uctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts32.__esp + 4, 4, byte_order);
      mctx_addr = read_memory_unsigned_integer
		    (uctx_addr + 28, 4, byte_order);

      flags_addr = mctx_addr + 12 + 9 * 4;
      read_memory (flags_addr, (gdb_byte *) &eflags, 4);
      eflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &eflags, 4);

      return 1;
    }
  return 0;
}

#ifdef BFD64
static int
amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
    {
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int rflags;

      mctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts64.__rdi + 48, 8, byte_order);
      flags_addr = mctx_addr + 16 + 17 * 8;

      /* AMD64 is little endian.  */
      read_memory (flags_addr, (gdb_byte *) &rflags, 4);
      rflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &rflags, 4);

      return 1;
    }
  return 0;
}
#endif

void
darwin_set_sstep (thread_t thread, int enable)
{
  x86_thread_state_t regs;
  unsigned int count = x86_THREAD_STATE_COUNT;
  kern_return_t kret;

  kret = thread_get_state (thread, x86_THREAD_STATE,
			   (thread_state_t) &regs, &count);
  if (kret != KERN_SUCCESS)
    {
      printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
			 kret, thread);
      return;
    }

  switch (regs.tsh.flavor)
    {
    case x86_THREAD_STATE32:
      {
	__uint32_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts32.__eflags
	  = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#ifdef BFD64
    case x86_THREAD_STATE64:
      {
	__uint64_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts64.__rflags
	  = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#endif
    default:
      error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
    }
}

void
_initialize_i386_darwin_nat (void)
{
#ifdef BFD64
  amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
  amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
  amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
  amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
#endif

  x86_dr_low.set_control = i386_darwin_dr_set_control;
  x86_dr_low.set_addr = i386_darwin_dr_set_addr;
  x86_dr_low.get_addr = i386_darwin_dr_get_addr;
  x86_dr_low.get_status = i386_darwin_dr_get_status;
  x86_dr_low.get_control = i386_darwin_dr_get_control;

  /* Let's assume that the kernel is 64 bits iff the executable is.  */
#ifdef __x86_64__
  x86_set_debug_register_length (8);
#else
  x86_set_debug_register_length (4);
#endif

  add_inf_child_target (&darwin_target);
}
Commit	Line	Data
a80b95ba	1	/* Darwin support for GDB, the GNU debugger.
e2882c85	2	Copyright (C) 1997-2018 Free Software Foundation, Inc.
a80b95ba TG	3
	4	Contributed by Apple Computer, Inc.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 3 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	20
	21	#include "defs.h"
	22	#include "frame.h"
	23	#include "inferior.h"
	24	#include "target.h"
	25	#include "symfile.h"
	26	#include "symtab.h"
	27	#include "objfiles.h"
	28	#include "gdbcmd.h"
	29	#include "regcache.h"
a80b95ba	30	#include "i386-tdep.h"
a80b95ba TG	31	#include "i387-tdep.h"
	32	#include "gdbarch.h"
	33	#include "arch-utils.h"
acdb24a9	34	#include "gdbcore.h"
a80b95ba	35
df7e5265	36	#include "x86-nat.h"
a80b95ba TG	37	#include "darwin-nat.h"
	38	#include "i386-darwin-tdep.h"
	39
5cd226f2 TG	40	#ifdef BFD64
5cd226f2 TG	41	#include "amd64-nat.h"
46187dff	42	#include "amd64-tdep.h"
5cd226f2 TG	43	#include "amd64-darwin-tdep.h"
	44	#endif
	45
f6ac5f3d PA	46	struct i386_darwin_nat_target final : public x86_nat_target<darwin_nat_target>
	47	{
	48	/* Add our register access methods. */
	49	void fetch_registers (struct regcache *, int) override;
	50	void store_registers (struct regcache *, int) override;
	51	};
	52
	53	static struct i386_darwin_nat_target darwin_target;
	54
a80b95ba TG	55	/* Read register values from the inferior process.
	56	If REGNO is -1, do this for all registers.
	57	Otherwise, REGNO specifies which register (so we can save time). */
f6ac5f3d PA	58
	59	void
	60	i386_darwin_nat_target::fetch_registers (struct regcache *regcache, int regno)
a80b95ba	61	{
222312d3	62	thread_t current_thread = ptid_get_tid (regcache->ptid ());
a80b95ba	63	int fetched = 0;
ac7936df	64	struct gdbarch *gdbarch = regcache->arch ();
a80b95ba	65
5cd226f2	66	#ifdef BFD64
a80b95ba TG	67	if (gdbarch_ptr_bit (gdbarch) == 64)
	68	{
	69	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	70	{
	71	x86_thread_state_t gp_regs;
	72	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	73	kern_return_t ret;
	74
	75	ret = thread_get_state
	76	(current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
	77	&gp_count);
	78	if (ret != KERN_SUCCESS)
	79	{
1777feb0	80	printf_unfiltered (_("Error calling thread_get_state for "
17092398	81	"GP registers for thread 0x%lx\n"),
016b7430	82	(unsigned long) current_thread);
a80b95ba TG	83	MACH_CHECK_ERROR (ret);
a80b95ba TG	84	}
89c7137f TG	85
	86	/* Some kernels don't sanitize the values. */
	87	gp_regs.uts.ts64.__fs &= 0xffff;
	88	gp_regs.uts.ts64.__gs &= 0xffff;
	89
a80b95ba TG	90	amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
	91	fetched++;
	92	}
	93
	94	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	95	{
	96	x86_float_state_t fp_regs;
	97	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	98	kern_return_t ret;
	99
	100	ret = thread_get_state
	101	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	102	&fp_count);
	103	if (ret != KERN_SUCCESS)
	104	{
1777feb0	105	printf_unfiltered (_("Error calling thread_get_state for "
17092398	106	"float registers for thread 0x%lx\n"),
016b7430	107	(unsigned long) current_thread);
a80b95ba TG	108	MACH_CHECK_ERROR (ret);
a80b95ba TG	109	}
46187dff	110	amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	111	fetched++;
	112	}
	113	}
	114	else
5cd226f2	115	#endif
a80b95ba TG	116	{
	117	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	118	{
cf9bb588 TG	119	x86_thread_state32_t gp_regs;
cf9bb588 TG	120	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	121	kern_return_t ret;
	122	int i;
	123
	124	ret = thread_get_state
cf9bb588	125	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	126	&gp_count);
	127	if (ret != KERN_SUCCESS)
	128	{
1777feb0	129	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	130	"GP registers for thread 0x%lx\n"),
17092398 TG	131	(unsigned long) current_thread);
a80b95ba TG	132	MACH_CHECK_ERROR (ret);
	133	}
	134	for (i = 0; i < I386_NUM_GREGS; i++)
73e1c03f SM	135	regcache->raw_supply
73e1c03f SM	136	(i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);
a80b95ba TG	137
	138	fetched++;
	139	}
	140
	141	if (regno == -1
	142	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	143	{
cf9bb588 TG	144	x86_float_state32_t fp_regs;
cf9bb588 TG	145	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	146	kern_return_t ret;
	147
	148	ret = thread_get_state
cf9bb588	149	(current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba TG	150	&fp_count);
	151	if (ret != KERN_SUCCESS)
	152	{
1777feb0	153	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	154	"float registers for thread 0x%lx\n"),
17092398 TG	155	(unsigned long) current_thread);
a80b95ba TG	156	MACH_CHECK_ERROR (ret);
	157	}
	158	i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
	159	fetched++;
	160	}
	161	}
	162
	163	if (! fetched)
	164	{
	165	warning (_("unknown register %d"), regno);
73e1c03f	166	regcache->raw_supply (regno, NULL);
a80b95ba TG	167	}
	168	}
	169
	170	/* Store our register values back into the inferior.
	171	If REGNO is -1, do this for all registers.
	172	Otherwise, REGNO specifies which register (so we can save time). */
	173
f6ac5f3d PA	174	void
	175	i386_darwin_nat_target::store_registers (struct regcache *regcache,
	176	int regno)
a80b95ba	177	{
222312d3	178	thread_t current_thread = ptid_get_tid (regcache->ptid ());
ac7936df	179	struct gdbarch *gdbarch = regcache->arch ();
a80b95ba	180
5cd226f2	181	#ifdef BFD64
a80b95ba TG	182	if (gdbarch_ptr_bit (gdbarch) == 64)
	183	{
	184	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	185	{
	186	x86_thread_state_t gp_regs;
	187	kern_return_t ret;
	188	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	189
	190	ret = thread_get_state
	191	(current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	192	&gp_count);
	193	MACH_CHECK_ERROR (ret);
	194	gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
	195	gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
	196
	197	amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
	198
89c7137f TG	199	/* Some kernels don't sanitize the values. */
	200	gp_regs.uts.ts64.__fs &= 0xffff;
	201	gp_regs.uts.ts64.__gs &= 0xffff;
	202
a80b95ba TG	203	ret = thread_set_state (current_thread, x86_THREAD_STATE,
	204	(thread_state_t) &gp_regs,
	205	x86_THREAD_STATE_COUNT);
	206	MACH_CHECK_ERROR (ret);
	207	}
	208
	209	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	210	{
	211	x86_float_state_t fp_regs;
	212	kern_return_t ret;
	213	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	214
	215	ret = thread_get_state
	216	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	217	&fp_count);
	218	MACH_CHECK_ERROR (ret);
	219	gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
	220	gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
	221
46187dff	222	amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	223
	224	ret = thread_set_state (current_thread, x86_FLOAT_STATE,
	225	(thread_state_t) & fp_regs,
	226	x86_FLOAT_STATE_COUNT);
	227	MACH_CHECK_ERROR (ret);
	228	}
	229	}
	230	else
5cd226f2	231	#endif
a80b95ba TG	232	{
	233	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	234	{
cf9bb588	235	x86_thread_state32_t gp_regs;
a80b95ba	236	kern_return_t ret;
cf9bb588	237	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	238	int i;
	239
	240	ret = thread_get_state
cf9bb588	241	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	242	&gp_count);
	243	MACH_CHECK_ERROR (ret);
	244
	245	for (i = 0; i < I386_NUM_GREGS; i++)
	246	if (regno == -1 \|\| regno == i)
34a79281 SM	247	regcache->raw_collect
34a79281 SM	248	(i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);
a80b95ba	249
cf9bb588 TG	250	ret = thread_set_state (current_thread, x86_THREAD_STATE32,
	251	(thread_state_t) &gp_regs,
	252	x86_THREAD_STATE32_COUNT);
a80b95ba TG	253	MACH_CHECK_ERROR (ret);
	254	}
	255
	256	if (regno == -1
	257	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	258	{
cf9bb588 TG	259	x86_float_state32_t fp_regs;
cf9bb588 TG	260	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	261	kern_return_t ret;
	262
	263	ret = thread_get_state
cf9bb588	264	(current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba TG	265	&fp_count);
	266	MACH_CHECK_ERROR (ret);
	267
	268	i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
	269
cf9bb588 TG	270	ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
	271	(thread_state_t) &fp_regs,
	272	x86_FLOAT_STATE32_COUNT);
a80b95ba TG	273	MACH_CHECK_ERROR (ret);
	274	}
	275	}
	276	}
	277
a80b95ba TG	278	/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
a80b95ba TG	279
a80b95ba	280	static void
b1328b1b	281	i386_darwin_dr_set (int regnum, CORE_ADDR value)
a80b95ba TG	282	{
	283	int current_pid;
	284	thread_t current_thread;
	285	x86_debug_state_t dr_regs;
	286	kern_return_t ret;
61d82a0d	287	unsigned int dr_count;
a80b95ba TG	288
	289	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	290
	291	current_thread = ptid_get_tid (inferior_ptid);
	292
61d82a0d TG	293	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	294	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	295	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	296	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	297	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	298	MACH_CHECK_ERROR (ret);
a80b95ba	299
61d82a0d	300	switch (dr_regs.dsh.flavor)
a80b95ba	301	{
61d82a0d TG	302	case x86_DEBUG_STATE32:
	303	switch (regnum)
	304	{
	305	case 0:
	306	dr_regs.uds.ds32.__dr0 = value;
	307	break;
	308	case 1:
	309	dr_regs.uds.ds32.__dr1 = value;
	310	break;
	311	case 2:
	312	dr_regs.uds.ds32.__dr2 = value;
	313	break;
	314	case 3:
	315	dr_regs.uds.ds32.__dr3 = value;
	316	break;
	317	case 4:
	318	dr_regs.uds.ds32.__dr4 = value;
	319	break;
	320	case 5:
	321	dr_regs.uds.ds32.__dr5 = value;
	322	break;
	323	case 6:
	324	dr_regs.uds.ds32.__dr6 = value;
	325	break;
	326	case 7:
	327	dr_regs.uds.ds32.__dr7 = value;
	328	break;
	329	}
	330	break;
	331	#ifdef BFD64
	332	case x86_DEBUG_STATE64:
	333	switch (regnum)
	334	{
	335	case 0:
	336	dr_regs.uds.ds64.__dr0 = value;
	337	break;
	338	case 1:
	339	dr_regs.uds.ds64.__dr1 = value;
	340	break;
	341	case 2:
	342	dr_regs.uds.ds64.__dr2 = value;
	343	break;
	344	case 3:
	345	dr_regs.uds.ds64.__dr3 = value;
	346	break;
	347	case 4:
	348	dr_regs.uds.ds64.__dr4 = value;
	349	break;
	350	case 5:
	351	dr_regs.uds.ds64.__dr5 = value;
	352	break;
	353	case 6:
	354	dr_regs.uds.ds64.__dr6 = value;
	355	break;
	356	case 7:
	357	dr_regs.uds.ds64.__dr7 = value;
	358	break;
	359	}
	360	break;
	361	#endif
a80b95ba TG	362	}
a80b95ba TG	363
b1328b1b TG	364	ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
b1328b1b TG	365	(thread_state_t) &dr_regs.uds, dr_count);
a80b95ba	366
b1328b1b	367	MACH_CHECK_ERROR (ret);
a80b95ba TG	368	}
a80b95ba TG	369
b1328b1b	370	static CORE_ADDR
a80b95ba TG	371	i386_darwin_dr_get (int regnum)
	372	{
	373	thread_t current_thread;
	374	x86_debug_state_t dr_regs;
	375	kern_return_t ret;
61d82a0d	376	unsigned int dr_count;
a80b95ba TG	377
	378	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	379
	380	current_thread = ptid_get_tid (inferior_ptid);
	381
61d82a0d TG	382	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	383	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	384	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	385	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	386	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	387	MACH_CHECK_ERROR (ret);
a80b95ba	388
61d82a0d	389	switch (dr_regs.dsh.flavor)
a80b95ba	390	{
61d82a0d TG	391	case x86_DEBUG_STATE32:
	392	switch (regnum)
	393	{
	394	case 0:
	395	return dr_regs.uds.ds32.__dr0;
	396	case 1:
	397	return dr_regs.uds.ds32.__dr1;
	398	case 2:
	399	return dr_regs.uds.ds32.__dr2;
	400	case 3:
	401	return dr_regs.uds.ds32.__dr3;
	402	case 4:
	403	return dr_regs.uds.ds32.__dr4;
	404	case 5:
	405	return dr_regs.uds.ds32.__dr5;
	406	case 6:
	407	return dr_regs.uds.ds32.__dr6;
	408	case 7:
	409	return dr_regs.uds.ds32.__dr7;
	410	default:
	411	return -1;
	412	}
	413	break;
	414	#ifdef BFD64
	415	case x86_DEBUG_STATE64:
	416	switch (regnum)
	417	{
	418	case 0:
	419	return dr_regs.uds.ds64.__dr0;
	420	case 1:
	421	return dr_regs.uds.ds64.__dr1;
	422	case 2:
	423	return dr_regs.uds.ds64.__dr2;
	424	case 3:
	425	return dr_regs.uds.ds64.__dr3;
	426	case 4:
	427	return dr_regs.uds.ds64.__dr4;
	428	case 5:
	429	return dr_regs.uds.ds64.__dr5;
	430	case 6:
	431	return dr_regs.uds.ds64.__dr6;
	432	case 7:
	433	return dr_regs.uds.ds64.__dr7;
	434	default:
	435	return -1;
	436	}
	437	break;
	438	#endif
	439	default:
	440	return -1;
a80b95ba TG	441	}
	442	}
	443
61d82a0d	444	static void
a80b95ba TG	445	i386_darwin_dr_set_control (unsigned long control)
	446	{
	447	i386_darwin_dr_set (DR_CONTROL, control);
	448	}
	449
61d82a0d	450	static void
a80b95ba TG	451	i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
	452	{
	453	gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
	454
	455	i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
	456	}
	457
61d82a0d	458	static CORE_ADDR
7b50312a	459	i386_darwin_dr_get_addr (int regnum)
a80b95ba	460	{
7b50312a	461	return i386_darwin_dr_get (regnum);
a80b95ba TG	462	}
a80b95ba TG	463
61d82a0d	464	static unsigned long
a80b95ba TG	465	i386_darwin_dr_get_status (void)
	466	{
	467	return i386_darwin_dr_get (DR_STATUS);
	468	}
	469
61d82a0d	470	static unsigned long
7b50312a PA	471	i386_darwin_dr_get_control (void)
	472	{
	473	return i386_darwin_dr_get (DR_CONTROL);
	474	}
	475
a80b95ba TG	476	void
	477	darwin_check_osabi (darwin_inferior *inf, thread_t thread)
	478	{
f5656ead	479	if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba TG	480	{
	481	/* Attaching to a process. Let's figure out what kind it is. */
	482	x86_thread_state_t gp_regs;
	483	struct gdbarch_info info;
	484	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	485	kern_return_t ret;
	486
	487	ret = thread_get_state (thread, x86_THREAD_STATE,
	488	(thread_state_t) &gp_regs, &gp_count);
	489	if (ret != KERN_SUCCESS)
	490	{
	491	MACH_CHECK_ERROR (ret);
	492	return;
	493	}
	494
	495	gdbarch_info_init (&info);
	496	gdbarch_info_fill (&info);
f5656ead	497	info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba TG	498	info.osabi = GDB_OSABI_DARWIN;
	499	if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	500	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
	501	bfd_mach_x86_64);
	502	else
61d82a0d	503	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
a80b95ba TG	504	bfd_mach_i386_i386);
	505	gdbarch_update_p (info);
	506	}
	507	}
	508
	509	#define X86_EFLAGS_T 0x100UL
	510
acdb24a9 TG	511	/* Returning from a signal trampoline is done by calling a
	512	special system call (sigreturn). This system call
	513	restores the registers that were saved when the signal was
	514	raised, including %eflags/%rflags. That means that single-stepping
	515	won't work. Instead, we'll have to modify the signal context
	516	that's about to be restored, and set the trace flag there. */
	517
	518	static int
	519	i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	520	{
f5656ead	521	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	522	static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
	523	gdb_byte buf[sizeof (darwin_syscall)];
	524
	525	/* Check if PC is at a sigreturn system call. */
	526	if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
	527	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	528	&& regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
	529	{
	530	ULONGEST uctx_addr;
	531	ULONGEST mctx_addr;
	532	ULONGEST flags_addr;
	533	unsigned int eflags;
	534
e17a4113 UW	535	uctx_addr = read_memory_unsigned_integer
	536	(regs->uts.ts32.__esp + 4, 4, byte_order);
	537	mctx_addr = read_memory_unsigned_integer
	538	(uctx_addr + 28, 4, byte_order);
acdb24a9 TG	539
	540	flags_addr = mctx_addr + 12 + 9 * 4;
	541	read_memory (flags_addr, (gdb_byte *) &eflags, 4);
	542	eflags \|= X86_EFLAGS_T;
	543	write_memory (flags_addr, (gdb_byte *) &eflags, 4);
	544
	545	return 1;
	546	}
	547	return 0;
	548	}
	549
5cd226f2	550	#ifdef BFD64
acdb24a9 TG	551	static int
	552	amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	553	{
f5656ead	554	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	555	static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
	556	gdb_byte buf[sizeof (darwin_syscall)];
	557
	558	/* Check if PC is at a sigreturn system call. */
	559	if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
	560	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	561	&& (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
	562	{
	563	ULONGEST mctx_addr;
	564	ULONGEST flags_addr;
	565	unsigned int rflags;
	566
e17a4113 UW	567	mctx_addr = read_memory_unsigned_integer
e17a4113 UW	568	(regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9 TG	569	flags_addr = mctx_addr + 16 + 17 * 8;
	570
	571	/* AMD64 is little endian. */
	572	read_memory (flags_addr, (gdb_byte *) &rflags, 4);
	573	rflags \|= X86_EFLAGS_T;
	574	write_memory (flags_addr, (gdb_byte *) &rflags, 4);
	575
	576	return 1;
	577	}
	578	return 0;
	579	}
5cd226f2	580	#endif
acdb24a9	581
a80b95ba TG	582	void
	583	darwin_set_sstep (thread_t thread, int enable)
	584	{
	585	x86_thread_state_t regs;
	586	unsigned int count = x86_THREAD_STATE_COUNT;
	587	kern_return_t kret;
	588
	589	kret = thread_get_state (thread, x86_THREAD_STATE,
	590	(thread_state_t) &regs, &count);
	591	if (kret != KERN_SUCCESS)
	592	{
	593	printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
	594	kret, thread);
	595	return;
	596	}
acdb24a9	597
a80b95ba TG	598	switch (regs.tsh.flavor)
	599	{
	600	case x86_THREAD_STATE32:
	601	{
	602	__uint32_t bit = enable ? X86_EFLAGS_T : 0;
b1328b1b	603
acdb24a9 TG	604	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	605	return;
a80b95ba TG	606	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
a80b95ba TG	607	return;
1777feb0 MS	608	regs.uts.ts32.__eflags
1777feb0 MS	609	= (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	610	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	611	(thread_state_t) &regs, count);
	612	MACH_CHECK_ERROR (kret);
	613	}
	614	break;
5cd226f2	615	#ifdef BFD64
a80b95ba TG	616	case x86_THREAD_STATE64:
	617	{
	618	__uint64_t bit = enable ? X86_EFLAGS_T : 0;
	619
acdb24a9 TG	620	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	621	return;
a80b95ba TG	622	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
a80b95ba TG	623	return;
1777feb0 MS	624	regs.uts.ts64.__rflags
1777feb0 MS	625	= (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	626	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	627	(thread_state_t) &regs, count);
	628	MACH_CHECK_ERROR (kret);
	629	}
	630	break;
5cd226f2	631	#endif
a80b95ba	632	default:
b37520b6	633	error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
a80b95ba TG	634	}
	635	}
	636
	637	void
f6ac5f3d	638	_initialize_i386_darwin_nat (void)
a80b95ba	639	{
5cd226f2	640	#ifdef BFD64
a80b95ba TG	641	amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
	642	amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
	643	amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
	644	amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2	645	#endif
a80b95ba	646
df7e5265 GB	647	x86_dr_low.set_control = i386_darwin_dr_set_control;
	648	x86_dr_low.set_addr = i386_darwin_dr_set_addr;
	649	x86_dr_low.get_addr = i386_darwin_dr_get_addr;
	650	x86_dr_low.get_status = i386_darwin_dr_get_status;
	651	x86_dr_low.get_control = i386_darwin_dr_get_control;
61d82a0d TG	652
	653	/* Let's assume that the kernel is 64 bits iff the executable is. */
	654	#ifdef __x86_64__
df7e5265	655	x86_set_debug_register_length (8);
61d82a0d	656	#else
df7e5265	657	x86_set_debug_register_length (4);
61d82a0d TG	658	#endif
61d82a0d TG	659
d9f719f1	660	add_inf_child_target (&darwin_target);
a80b95ba	661	}