[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c

/* Darwin support for GDB, the GNU debugger.
   Copyright (C) 1997-2018 Free Software Foundation, Inc.

   Contributed by Apple Computer, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "target.h"
#include "symfile.h"
#include "symtab.h"
#include "objfiles.h"
#include "gdbcmd.h"
#include "regcache.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "gdbarch.h"
#include "arch-utils.h"
#include "gdbcore.h"

#include "x86-nat.h"
#include "darwin-nat.h"
#include "i386-darwin-tdep.h"

#ifdef BFD64
#include "amd64-nat.h"
#include "amd64-tdep.h"
#include "amd64-darwin-tdep.h"
#endif

struct i386_darwin_nat_target final : public x86_nat_target<darwin_nat_target>
{
  /* Add our register access methods.  */
  void fetch_registers (struct regcache *, int) override;
  void store_registers (struct regcache *, int) override;
};

static struct i386_darwin_nat_target darwin_target;

/* Read register values from the inferior process.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
i386_darwin_nat_target::fetch_registers (struct regcache *regcache, int regno)
{
  thread_t current_thread = ptid_get_tid (regcache->ptid ());
  int fetched = 0;
  struct gdbarch *gdbarch = regcache->arch ();

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

	  amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
          fetched++;
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
          fetched++;
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
          kern_return_t ret;
	  int i;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
	  for (i = 0; i < I386_NUM_GREGS; i++)
	    regcache_raw_supply
	      (regcache, i,
	       (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);

          fetched++;
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
          fetched++;
        }
    }

  if (! fetched)
    {
      warning (_("unknown register %d"), regno);
      regcache_raw_supply (regcache, regno, NULL);
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
i386_darwin_nat_target::store_registers (struct regcache *regcache,
					 int regno)
{
  thread_t current_thread = ptid_get_tid (regcache->ptid ());
  struct gdbarch *gdbarch = regcache->arch ();

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          kern_return_t ret;
	  unsigned int gp_count = x86_THREAD_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	     &gp_count);
          MACH_CHECK_ERROR (ret);
	  gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
          gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);

	  amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

          ret = thread_set_state (current_thread, x86_THREAD_STATE,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          kern_return_t ret;
	  unsigned int fp_count = x86_FLOAT_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	     &fp_count);
          MACH_CHECK_ERROR (ret);
          gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
          gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);

	  amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE,
				  (thread_state_t) & fp_regs,
				  x86_FLOAT_STATE_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          kern_return_t ret;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
	  int i;

          ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  MACH_CHECK_ERROR (ret);

	  for (i = 0; i < I386_NUM_GREGS; i++)
	    if (regno == -1 || regno == i)
	      regcache_raw_collect
		(regcache, i,
		 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);

          ret = thread_set_state (current_thread, x86_THREAD_STATE32,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE32_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
             &fp_count);
	  MACH_CHECK_ERROR (ret);

	  i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
				  (thread_state_t) &fp_regs,
				  x86_FLOAT_STATE32_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
}

/* Support for debug registers, boosted mostly from i386-linux-nat.c.  */

static void
i386_darwin_dr_set (int regnum, CORE_ADDR value)
{
  int current_pid;
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = ptid_get_tid (inferior_ptid);

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds32.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds32.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds32.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds32.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds32.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds32.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds32.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds32.__dr7 = value;
	  break;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds64.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds64.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds64.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds64.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds64.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds64.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds64.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds64.__dr7 = value;
	  break;
	}
      break;
#endif
    }

  ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
                          (thread_state_t) &dr_regs.uds, dr_count);

  MACH_CHECK_ERROR (ret);
}

static CORE_ADDR
i386_darwin_dr_get (int regnum)
{
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = ptid_get_tid (inferior_ptid);

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds32.__dr0;
	case 1:
	  return dr_regs.uds.ds32.__dr1;
	case 2:
	  return dr_regs.uds.ds32.__dr2;
	case 3:
	  return dr_regs.uds.ds32.__dr3;
	case 4:
	  return dr_regs.uds.ds32.__dr4;
	case 5:
	  return dr_regs.uds.ds32.__dr5;
	case 6:
	  return dr_regs.uds.ds32.__dr6;
	case 7:
	  return dr_regs.uds.ds32.__dr7;
	default:
	  return -1;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds64.__dr0;
	case 1:
	  return dr_regs.uds.ds64.__dr1;
	case 2:
	  return dr_regs.uds.ds64.__dr2;
	case 3:
	  return dr_regs.uds.ds64.__dr3;
	case 4:
	  return dr_regs.uds.ds64.__dr4;
	case 5:
	  return dr_regs.uds.ds64.__dr5;
	case 6:
	  return dr_regs.uds.ds64.__dr6;
	case 7:
	  return dr_regs.uds.ds64.__dr7;
	default:
	  return -1;
	}
      break;
#endif
    default:
      return -1;
    }
}

static void
i386_darwin_dr_set_control (unsigned long control)
{
  i386_darwin_dr_set (DR_CONTROL, control);
}

static void
i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
{
  gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);

  i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
}

static CORE_ADDR
i386_darwin_dr_get_addr (int regnum)
{
  return i386_darwin_dr_get (regnum);
}

static unsigned long
i386_darwin_dr_get_status (void)
{
  return i386_darwin_dr_get (DR_STATUS);
}

static unsigned long
i386_darwin_dr_get_control (void)
{
  return i386_darwin_dr_get (DR_CONTROL);
}

void
darwin_check_osabi (darwin_inferior *inf, thread_t thread)
{
  if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
    {
      /* Attaching to a process.  Let's figure out what kind it is.  */
      x86_thread_state_t gp_regs;
      struct gdbarch_info info;
      unsigned int gp_count = x86_THREAD_STATE_COUNT;
      kern_return_t ret;

      ret = thread_get_state (thread, x86_THREAD_STATE,
			      (thread_state_t) &gp_regs, &gp_count);
      if (ret != KERN_SUCCESS)
	{
	  MACH_CHECK_ERROR (ret);
	  return;
	}

      gdbarch_info_init (&info);
      gdbarch_info_fill (&info);
      info.byte_order = gdbarch_byte_order (target_gdbarch ());
      info.osabi = GDB_OSABI_DARWIN;
      if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_x86_64);
      else
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_i386_i386);
      gdbarch_update_p (info);
    }
}

#define X86_EFLAGS_T 0x100UL

/* Returning from a signal trampoline is done by calling a
   special system call (sigreturn).  This system call
   restores the registers that were saved when the signal was
   raised, including %eflags/%rflags.  That means that single-stepping
   won't work.  Instead, we'll have to modify the signal context
   that's about to be restored, and set the trace flag there.  */

static int
i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
    {
      ULONGEST uctx_addr;
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int eflags;

      uctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts32.__esp + 4, 4, byte_order);
      mctx_addr = read_memory_unsigned_integer
		    (uctx_addr + 28, 4, byte_order);

      flags_addr = mctx_addr + 12 + 9 * 4;
      read_memory (flags_addr, (gdb_byte *) &eflags, 4);
      eflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &eflags, 4);

      return 1;
    }
  return 0;
}

#ifdef BFD64
static int
amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
    {
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int rflags;

      mctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts64.__rdi + 48, 8, byte_order);
      flags_addr = mctx_addr + 16 + 17 * 8;

      /* AMD64 is little endian.  */
      read_memory (flags_addr, (gdb_byte *) &rflags, 4);
      rflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &rflags, 4);

      return 1;
    }
  return 0;
}
#endif

void
darwin_set_sstep (thread_t thread, int enable)
{
  x86_thread_state_t regs;
  unsigned int count = x86_THREAD_STATE_COUNT;
  kern_return_t kret;

  kret = thread_get_state (thread, x86_THREAD_STATE,
			   (thread_state_t) &regs, &count);
  if (kret != KERN_SUCCESS)
    {
      printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
			 kret, thread);
      return;
    }

  switch (regs.tsh.flavor)
    {
    case x86_THREAD_STATE32:
      {
	__uint32_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts32.__eflags
	  = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#ifdef BFD64
    case x86_THREAD_STATE64:
      {
	__uint64_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts64.__rflags
	  = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#endif
    default:
      error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
    }
}

void
_initialize_i386_darwin_nat (void)
{
#ifdef BFD64
  amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
  amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
  amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
  amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
#endif

  x86_dr_low.set_control = i386_darwin_dr_set_control;
  x86_dr_low.set_addr = i386_darwin_dr_set_addr;
  x86_dr_low.get_addr = i386_darwin_dr_get_addr;
  x86_dr_low.get_status = i386_darwin_dr_get_status;
  x86_dr_low.get_control = i386_darwin_dr_get_control;

  /* Let's assume that the kernel is 64 bits iff the executable is.  */
#ifdef __x86_64__
  x86_set_debug_register_length (8);
#else
  x86_set_debug_register_length (4);
#endif

  add_inf_child_target (&darwin_target);
}
Commit	Line	Data
a80b95ba	1	/* Darwin support for GDB, the GNU debugger.
e2882c85	2	Copyright (C) 1997-2018 Free Software Foundation, Inc.
a80b95ba TG	3
	4	Contributed by Apple Computer, Inc.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 3 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	20
	21	#include "defs.h"
	22	#include "frame.h"
	23	#include "inferior.h"
	24	#include "target.h"
	25	#include "symfile.h"
	26	#include "symtab.h"
	27	#include "objfiles.h"
	28	#include "gdbcmd.h"
	29	#include "regcache.h"
a80b95ba	30	#include "i386-tdep.h"
a80b95ba TG	31	#include "i387-tdep.h"
	32	#include "gdbarch.h"
	33	#include "arch-utils.h"
acdb24a9	34	#include "gdbcore.h"
a80b95ba	35
df7e5265	36	#include "x86-nat.h"
a80b95ba TG	37	#include "darwin-nat.h"
	38	#include "i386-darwin-tdep.h"
	39
5cd226f2 TG	40	#ifdef BFD64
5cd226f2 TG	41	#include "amd64-nat.h"
46187dff	42	#include "amd64-tdep.h"
5cd226f2 TG	43	#include "amd64-darwin-tdep.h"
	44	#endif
	45
f6ac5f3d PA	46	struct i386_darwin_nat_target final : public x86_nat_target<darwin_nat_target>
	47	{
	48	/* Add our register access methods. */
	49	void fetch_registers (struct regcache *, int) override;
	50	void store_registers (struct regcache *, int) override;
	51	};
	52
	53	static struct i386_darwin_nat_target darwin_target;
	54
a80b95ba TG	55	/* Read register values from the inferior process.
	56	If REGNO is -1, do this for all registers.
	57	Otherwise, REGNO specifies which register (so we can save time). */
f6ac5f3d PA	58
	59	void
	60	i386_darwin_nat_target::fetch_registers (struct regcache *regcache, int regno)
a80b95ba	61	{
222312d3	62	thread_t current_thread = ptid_get_tid (regcache->ptid ());
a80b95ba	63	int fetched = 0;
ac7936df	64	struct gdbarch *gdbarch = regcache->arch ();
a80b95ba	65
5cd226f2	66	#ifdef BFD64
a80b95ba TG	67	if (gdbarch_ptr_bit (gdbarch) == 64)
	68	{
	69	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	70	{
	71	x86_thread_state_t gp_regs;
	72	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	73	kern_return_t ret;
	74
	75	ret = thread_get_state
	76	(current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
	77	&gp_count);
	78	if (ret != KERN_SUCCESS)
	79	{
1777feb0	80	printf_unfiltered (_("Error calling thread_get_state for "
17092398	81	"GP registers for thread 0x%lx\n"),
016b7430	82	(unsigned long) current_thread);
a80b95ba TG	83	MACH_CHECK_ERROR (ret);
a80b95ba TG	84	}
89c7137f TG	85
	86	/* Some kernels don't sanitize the values. */
	87	gp_regs.uts.ts64.__fs &= 0xffff;
	88	gp_regs.uts.ts64.__gs &= 0xffff;
	89
a80b95ba TG	90	amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
	91	fetched++;
	92	}
	93
	94	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	95	{
	96	x86_float_state_t fp_regs;
	97	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	98	kern_return_t ret;
	99
	100	ret = thread_get_state
	101	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	102	&fp_count);
	103	if (ret != KERN_SUCCESS)
	104	{
1777feb0	105	printf_unfiltered (_("Error calling thread_get_state for "
17092398	106	"float registers for thread 0x%lx\n"),
016b7430	107	(unsigned long) current_thread);
a80b95ba TG	108	MACH_CHECK_ERROR (ret);
a80b95ba TG	109	}
46187dff	110	amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	111	fetched++;
	112	}
	113	}
	114	else
5cd226f2	115	#endif
a80b95ba TG	116	{
	117	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	118	{
cf9bb588 TG	119	x86_thread_state32_t gp_regs;
cf9bb588 TG	120	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	121	kern_return_t ret;
	122	int i;
	123
	124	ret = thread_get_state
cf9bb588	125	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	126	&gp_count);
	127	if (ret != KERN_SUCCESS)
	128	{
1777feb0	129	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	130	"GP registers for thread 0x%lx\n"),
17092398 TG	131	(unsigned long) current_thread);
a80b95ba TG	132	MACH_CHECK_ERROR (ret);
	133	}
	134	for (i = 0; i < I386_NUM_GREGS; i++)
	135	regcache_raw_supply
	136	(regcache, i,
	137	(char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
	138
	139	fetched++;
	140	}
	141
	142	if (regno == -1
	143	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	144	{
cf9bb588 TG	145	x86_float_state32_t fp_regs;
cf9bb588 TG	146	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	147	kern_return_t ret;
	148
	149	ret = thread_get_state
cf9bb588	150	(current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba TG	151	&fp_count);
	152	if (ret != KERN_SUCCESS)
	153	{
1777feb0	154	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	155	"float registers for thread 0x%lx\n"),
17092398 TG	156	(unsigned long) current_thread);
a80b95ba TG	157	MACH_CHECK_ERROR (ret);
	158	}
	159	i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
	160	fetched++;
	161	}
	162	}
	163
	164	if (! fetched)
	165	{
	166	warning (_("unknown register %d"), regno);
	167	regcache_raw_supply (regcache, regno, NULL);
	168	}
	169	}
	170
	171	/* Store our register values back into the inferior.
	172	If REGNO is -1, do this for all registers.
	173	Otherwise, REGNO specifies which register (so we can save time). */
	174
f6ac5f3d PA	175	void
	176	i386_darwin_nat_target::store_registers (struct regcache *regcache,
	177	int regno)
a80b95ba	178	{
222312d3	179	thread_t current_thread = ptid_get_tid (regcache->ptid ());
ac7936df	180	struct gdbarch *gdbarch = regcache->arch ();
a80b95ba	181
5cd226f2	182	#ifdef BFD64
a80b95ba TG	183	if (gdbarch_ptr_bit (gdbarch) == 64)
	184	{
	185	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	186	{
	187	x86_thread_state_t gp_regs;
	188	kern_return_t ret;
	189	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	190
	191	ret = thread_get_state
	192	(current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	193	&gp_count);
	194	MACH_CHECK_ERROR (ret);
	195	gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
	196	gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
	197
	198	amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
	199
89c7137f TG	200	/* Some kernels don't sanitize the values. */
	201	gp_regs.uts.ts64.__fs &= 0xffff;
	202	gp_regs.uts.ts64.__gs &= 0xffff;
	203
a80b95ba TG	204	ret = thread_set_state (current_thread, x86_THREAD_STATE,
	205	(thread_state_t) &gp_regs,
	206	x86_THREAD_STATE_COUNT);
	207	MACH_CHECK_ERROR (ret);
	208	}
	209
	210	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	211	{
	212	x86_float_state_t fp_regs;
	213	kern_return_t ret;
	214	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	215
	216	ret = thread_get_state
	217	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	218	&fp_count);
	219	MACH_CHECK_ERROR (ret);
	220	gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
	221	gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
	222
46187dff	223	amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	224
	225	ret = thread_set_state (current_thread, x86_FLOAT_STATE,
	226	(thread_state_t) & fp_regs,
	227	x86_FLOAT_STATE_COUNT);
	228	MACH_CHECK_ERROR (ret);
	229	}
	230	}
	231	else
5cd226f2	232	#endif
a80b95ba TG	233	{
	234	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	235	{
cf9bb588	236	x86_thread_state32_t gp_regs;
a80b95ba	237	kern_return_t ret;
cf9bb588	238	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	239	int i;
	240
	241	ret = thread_get_state
cf9bb588	242	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	243	&gp_count);
	244	MACH_CHECK_ERROR (ret);
	245
	246	for (i = 0; i < I386_NUM_GREGS; i++)
	247	if (regno == -1 \|\| regno == i)
	248	regcache_raw_collect
	249	(regcache, i,
	250	(char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
	251
cf9bb588 TG	252	ret = thread_set_state (current_thread, x86_THREAD_STATE32,
	253	(thread_state_t) &gp_regs,
	254	x86_THREAD_STATE32_COUNT);
a80b95ba TG	255	MACH_CHECK_ERROR (ret);
	256	}
	257
	258	if (regno == -1
	259	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	260	{
cf9bb588 TG	261	x86_float_state32_t fp_regs;
cf9bb588 TG	262	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	263	kern_return_t ret;
	264
	265	ret = thread_get_state
cf9bb588	266	(current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba TG	267	&fp_count);
	268	MACH_CHECK_ERROR (ret);
	269
	270	i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
	271
cf9bb588 TG	272	ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
	273	(thread_state_t) &fp_regs,
	274	x86_FLOAT_STATE32_COUNT);
a80b95ba TG	275	MACH_CHECK_ERROR (ret);
	276	}
	277	}
	278	}
	279
a80b95ba TG	280	/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
a80b95ba TG	281
a80b95ba	282	static void
b1328b1b	283	i386_darwin_dr_set (int regnum, CORE_ADDR value)
a80b95ba TG	284	{
	285	int current_pid;
	286	thread_t current_thread;
	287	x86_debug_state_t dr_regs;
	288	kern_return_t ret;
61d82a0d	289	unsigned int dr_count;
a80b95ba TG	290
	291	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	292
	293	current_thread = ptid_get_tid (inferior_ptid);
	294
61d82a0d TG	295	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	296	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	297	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	298	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	299	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	300	MACH_CHECK_ERROR (ret);
a80b95ba	301
61d82a0d	302	switch (dr_regs.dsh.flavor)
a80b95ba	303	{
61d82a0d TG	304	case x86_DEBUG_STATE32:
	305	switch (regnum)
	306	{
	307	case 0:
	308	dr_regs.uds.ds32.__dr0 = value;
	309	break;
	310	case 1:
	311	dr_regs.uds.ds32.__dr1 = value;
	312	break;
	313	case 2:
	314	dr_regs.uds.ds32.__dr2 = value;
	315	break;
	316	case 3:
	317	dr_regs.uds.ds32.__dr3 = value;
	318	break;
	319	case 4:
	320	dr_regs.uds.ds32.__dr4 = value;
	321	break;
	322	case 5:
	323	dr_regs.uds.ds32.__dr5 = value;
	324	break;
	325	case 6:
	326	dr_regs.uds.ds32.__dr6 = value;
	327	break;
	328	case 7:
	329	dr_regs.uds.ds32.__dr7 = value;
	330	break;
	331	}
	332	break;
	333	#ifdef BFD64
	334	case x86_DEBUG_STATE64:
	335	switch (regnum)
	336	{
	337	case 0:
	338	dr_regs.uds.ds64.__dr0 = value;
	339	break;
	340	case 1:
	341	dr_regs.uds.ds64.__dr1 = value;
	342	break;
	343	case 2:
	344	dr_regs.uds.ds64.__dr2 = value;
	345	break;
	346	case 3:
	347	dr_regs.uds.ds64.__dr3 = value;
	348	break;
	349	case 4:
	350	dr_regs.uds.ds64.__dr4 = value;
	351	break;
	352	case 5:
	353	dr_regs.uds.ds64.__dr5 = value;
	354	break;
	355	case 6:
	356	dr_regs.uds.ds64.__dr6 = value;
	357	break;
	358	case 7:
	359	dr_regs.uds.ds64.__dr7 = value;
	360	break;
	361	}
	362	break;
	363	#endif
a80b95ba TG	364	}
a80b95ba TG	365
b1328b1b TG	366	ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
b1328b1b TG	367	(thread_state_t) &dr_regs.uds, dr_count);
a80b95ba	368
b1328b1b	369	MACH_CHECK_ERROR (ret);
a80b95ba TG	370	}
a80b95ba TG	371
b1328b1b	372	static CORE_ADDR
a80b95ba TG	373	i386_darwin_dr_get (int regnum)
	374	{
	375	thread_t current_thread;
	376	x86_debug_state_t dr_regs;
	377	kern_return_t ret;
61d82a0d	378	unsigned int dr_count;
a80b95ba TG	379
	380	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	381
	382	current_thread = ptid_get_tid (inferior_ptid);
	383
61d82a0d TG	384	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	385	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	386	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	387	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	388	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	389	MACH_CHECK_ERROR (ret);
a80b95ba	390
61d82a0d	391	switch (dr_regs.dsh.flavor)
a80b95ba	392	{
61d82a0d TG	393	case x86_DEBUG_STATE32:
	394	switch (regnum)
	395	{
	396	case 0:
	397	return dr_regs.uds.ds32.__dr0;
	398	case 1:
	399	return dr_regs.uds.ds32.__dr1;
	400	case 2:
	401	return dr_regs.uds.ds32.__dr2;
	402	case 3:
	403	return dr_regs.uds.ds32.__dr3;
	404	case 4:
	405	return dr_regs.uds.ds32.__dr4;
	406	case 5:
	407	return dr_regs.uds.ds32.__dr5;
	408	case 6:
	409	return dr_regs.uds.ds32.__dr6;
	410	case 7:
	411	return dr_regs.uds.ds32.__dr7;
	412	default:
	413	return -1;
	414	}
	415	break;
	416	#ifdef BFD64
	417	case x86_DEBUG_STATE64:
	418	switch (regnum)
	419	{
	420	case 0:
	421	return dr_regs.uds.ds64.__dr0;
	422	case 1:
	423	return dr_regs.uds.ds64.__dr1;
	424	case 2:
	425	return dr_regs.uds.ds64.__dr2;
	426	case 3:
	427	return dr_regs.uds.ds64.__dr3;
	428	case 4:
	429	return dr_regs.uds.ds64.__dr4;
	430	case 5:
	431	return dr_regs.uds.ds64.__dr5;
	432	case 6:
	433	return dr_regs.uds.ds64.__dr6;
	434	case 7:
	435	return dr_regs.uds.ds64.__dr7;
	436	default:
	437	return -1;
	438	}
	439	break;
	440	#endif
	441	default:
	442	return -1;
a80b95ba TG	443	}
	444	}
	445
61d82a0d	446	static void
a80b95ba TG	447	i386_darwin_dr_set_control (unsigned long control)
	448	{
	449	i386_darwin_dr_set (DR_CONTROL, control);
	450	}
	451
61d82a0d	452	static void
a80b95ba TG	453	i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
	454	{
	455	gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
	456
	457	i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
	458	}
	459
61d82a0d	460	static CORE_ADDR
7b50312a	461	i386_darwin_dr_get_addr (int regnum)
a80b95ba	462	{
7b50312a	463	return i386_darwin_dr_get (regnum);
a80b95ba TG	464	}
a80b95ba TG	465
61d82a0d	466	static unsigned long
a80b95ba TG	467	i386_darwin_dr_get_status (void)
	468	{
	469	return i386_darwin_dr_get (DR_STATUS);
	470	}
	471
61d82a0d	472	static unsigned long
7b50312a PA	473	i386_darwin_dr_get_control (void)
	474	{
	475	return i386_darwin_dr_get (DR_CONTROL);
	476	}
	477
a80b95ba TG	478	void
	479	darwin_check_osabi (darwin_inferior *inf, thread_t thread)
	480	{
f5656ead	481	if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba TG	482	{
	483	/* Attaching to a process. Let's figure out what kind it is. */
	484	x86_thread_state_t gp_regs;
	485	struct gdbarch_info info;
	486	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	487	kern_return_t ret;
	488
	489	ret = thread_get_state (thread, x86_THREAD_STATE,
	490	(thread_state_t) &gp_regs, &gp_count);
	491	if (ret != KERN_SUCCESS)
	492	{
	493	MACH_CHECK_ERROR (ret);
	494	return;
	495	}
	496
	497	gdbarch_info_init (&info);
	498	gdbarch_info_fill (&info);
f5656ead	499	info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba TG	500	info.osabi = GDB_OSABI_DARWIN;
	501	if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	502	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
	503	bfd_mach_x86_64);
	504	else
61d82a0d	505	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
a80b95ba TG	506	bfd_mach_i386_i386);
	507	gdbarch_update_p (info);
	508	}
	509	}
	510
	511	#define X86_EFLAGS_T 0x100UL
	512
acdb24a9 TG	513	/* Returning from a signal trampoline is done by calling a
	514	special system call (sigreturn). This system call
	515	restores the registers that were saved when the signal was
	516	raised, including %eflags/%rflags. That means that single-stepping
	517	won't work. Instead, we'll have to modify the signal context
	518	that's about to be restored, and set the trace flag there. */
	519
	520	static int
	521	i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	522	{
f5656ead	523	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	524	static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
	525	gdb_byte buf[sizeof (darwin_syscall)];
	526
	527	/* Check if PC is at a sigreturn system call. */
	528	if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
	529	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	530	&& regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
	531	{
	532	ULONGEST uctx_addr;
	533	ULONGEST mctx_addr;
	534	ULONGEST flags_addr;
	535	unsigned int eflags;
	536
e17a4113 UW	537	uctx_addr = read_memory_unsigned_integer
	538	(regs->uts.ts32.__esp + 4, 4, byte_order);
	539	mctx_addr = read_memory_unsigned_integer
	540	(uctx_addr + 28, 4, byte_order);
acdb24a9 TG	541
	542	flags_addr = mctx_addr + 12 + 9 * 4;
	543	read_memory (flags_addr, (gdb_byte *) &eflags, 4);
	544	eflags \|= X86_EFLAGS_T;
	545	write_memory (flags_addr, (gdb_byte *) &eflags, 4);
	546
	547	return 1;
	548	}
	549	return 0;
	550	}
	551
5cd226f2	552	#ifdef BFD64
acdb24a9 TG	553	static int
	554	amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	555	{
f5656ead	556	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	557	static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
	558	gdb_byte buf[sizeof (darwin_syscall)];
	559
	560	/* Check if PC is at a sigreturn system call. */
	561	if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
	562	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	563	&& (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
	564	{
	565	ULONGEST mctx_addr;
	566	ULONGEST flags_addr;
	567	unsigned int rflags;
	568
e17a4113 UW	569	mctx_addr = read_memory_unsigned_integer
e17a4113 UW	570	(regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9 TG	571	flags_addr = mctx_addr + 16 + 17 * 8;
	572
	573	/* AMD64 is little endian. */
	574	read_memory (flags_addr, (gdb_byte *) &rflags, 4);
	575	rflags \|= X86_EFLAGS_T;
	576	write_memory (flags_addr, (gdb_byte *) &rflags, 4);
	577
	578	return 1;
	579	}
	580	return 0;
	581	}
5cd226f2	582	#endif
acdb24a9	583
a80b95ba TG	584	void
	585	darwin_set_sstep (thread_t thread, int enable)
	586	{
	587	x86_thread_state_t regs;
	588	unsigned int count = x86_THREAD_STATE_COUNT;
	589	kern_return_t kret;
	590
	591	kret = thread_get_state (thread, x86_THREAD_STATE,
	592	(thread_state_t) &regs, &count);
	593	if (kret != KERN_SUCCESS)
	594	{
	595	printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
	596	kret, thread);
	597	return;
	598	}
acdb24a9	599
a80b95ba TG	600	switch (regs.tsh.flavor)
	601	{
	602	case x86_THREAD_STATE32:
	603	{
	604	__uint32_t bit = enable ? X86_EFLAGS_T : 0;
b1328b1b	605
acdb24a9 TG	606	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	607	return;
a80b95ba TG	608	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
a80b95ba TG	609	return;
1777feb0 MS	610	regs.uts.ts32.__eflags
1777feb0 MS	611	= (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	612	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	613	(thread_state_t) &regs, count);
	614	MACH_CHECK_ERROR (kret);
	615	}
	616	break;
5cd226f2	617	#ifdef BFD64
a80b95ba TG	618	case x86_THREAD_STATE64:
	619	{
	620	__uint64_t bit = enable ? X86_EFLAGS_T : 0;
	621
acdb24a9 TG	622	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	623	return;
a80b95ba TG	624	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
a80b95ba TG	625	return;
1777feb0 MS	626	regs.uts.ts64.__rflags
1777feb0 MS	627	= (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	628	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	629	(thread_state_t) &regs, count);
	630	MACH_CHECK_ERROR (kret);
	631	}
	632	break;
5cd226f2	633	#endif
a80b95ba	634	default:
b37520b6	635	error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
a80b95ba TG	636	}
	637	}
	638
	639	void
f6ac5f3d	640	_initialize_i386_darwin_nat (void)
a80b95ba	641	{
5cd226f2	642	#ifdef BFD64
a80b95ba TG	643	amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
	644	amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
	645	amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
	646	amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2	647	#endif
a80b95ba	648
df7e5265 GB	649	x86_dr_low.set_control = i386_darwin_dr_set_control;
	650	x86_dr_low.set_addr = i386_darwin_dr_set_addr;
	651	x86_dr_low.get_addr = i386_darwin_dr_get_addr;
	652	x86_dr_low.get_status = i386_darwin_dr_get_status;
	653	x86_dr_low.get_control = i386_darwin_dr_get_control;
61d82a0d TG	654
	655	/* Let's assume that the kernel is 64 bits iff the executable is. */
	656	#ifdef __x86_64__
df7e5265	657	x86_set_debug_register_length (8);
61d82a0d	658	#else
df7e5265	659	x86_set_debug_register_length (4);
61d82a0d TG	660	#endif
61d82a0d TG	661
d9f719f1	662	add_inf_child_target (&darwin_target);
a80b95ba	663	}