import gdb-1999-08-16 snapshot
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c
SS
1/* Intel 386 target-dependent stuff.
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "gdb_string.h"
24#include "frame.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "target.h"
28#include "floatformat.h"
29#include "symtab.h"
30#include "gdbcmd.h"
31#include "command.h"
32
33static long i386_get_frame_setup PARAMS ((CORE_ADDR));
34
35static void i386_follow_jump PARAMS ((void));
36
37static void codestream_read PARAMS ((unsigned char *, int));
38
39static void codestream_seek PARAMS ((CORE_ADDR));
40
41static unsigned char codestream_fill PARAMS ((int));
42
43CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
44
45static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
46
47void _initialize_i386_tdep PARAMS ((void));
48
49/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 50 and its legitimate values. */
c906108c
SS
51static char att_flavor[] = "att";
52static char intel_flavor[] = "intel";
c5aa993b
JM
53static char *valid_flavors[] =
54{
c906108c
SS
55 att_flavor,
56 intel_flavor,
57 NULL
58};
59static char *disassembly_flavor = att_flavor;
60
7a292a7a
SS
61/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
62static void set_disassembly_flavor_sfunc PARAMS ((char *, int, struct cmd_list_element *));
63static void set_disassembly_flavor ();
64
c906108c
SS
65/* Stdio style buffering was used to minimize calls to ptrace, but this
66 buffering did not take into account that the code section being accessed
67 may not be an even number of buffers long (even if the buffer is only
68 sizeof(int) long). In cases where the code section size happened to
69 be a non-integral number of buffers long, attempting to read the last
70 buffer would fail. Simply using target_read_memory and ignoring errors,
71 rather than read_memory, is not the correct solution, since legitimate
72 access errors would then be totally ignored. To properly handle this
73 situation and continue to use buffering would require that this code
74 be able to determine the minimum code section size granularity (not the
75 alignment of the section itself, since the actual failing case that
76 pointed out this problem had a section alignment of 4 but was not a
77 multiple of 4 bytes long), on a target by target basis, and then
78 adjust it's buffer size accordingly. This is messy, but potentially
79 feasible. It probably needs the bfd library's help and support. For
80 now, the buffer size is set to 1. (FIXME -fnf) */
81
82#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
83static CORE_ADDR codestream_next_addr;
84static CORE_ADDR codestream_addr;
85static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
86static int codestream_off;
87static int codestream_cnt;
88
89#define codestream_tell() (codestream_addr + codestream_off)
90#define codestream_peek() (codestream_cnt == 0 ? \
91 codestream_fill(1): codestream_buf[codestream_off])
92#define codestream_get() (codestream_cnt-- == 0 ? \
93 codestream_fill(0) : codestream_buf[codestream_off++])
94
c5aa993b 95static unsigned char
c906108c 96codestream_fill (peek_flag)
c5aa993b 97 int peek_flag;
c906108c
SS
98{
99 codestream_addr = codestream_next_addr;
100 codestream_next_addr += CODESTREAM_BUFSIZ;
101 codestream_off = 0;
102 codestream_cnt = CODESTREAM_BUFSIZ;
103 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 104
c906108c 105 if (peek_flag)
c5aa993b 106 return (codestream_peek ());
c906108c 107 else
c5aa993b 108 return (codestream_get ());
c906108c
SS
109}
110
111static void
112codestream_seek (place)
c5aa993b 113 CORE_ADDR place;
c906108c
SS
114{
115 codestream_next_addr = place / CODESTREAM_BUFSIZ;
116 codestream_next_addr *= CODESTREAM_BUFSIZ;
117 codestream_cnt = 0;
118 codestream_fill (1);
c5aa993b 119 while (codestream_tell () != place)
c906108c
SS
120 codestream_get ();
121}
122
123static void
124codestream_read (buf, count)
125 unsigned char *buf;
126 int count;
127{
128 unsigned char *p;
129 int i;
130 p = buf;
131 for (i = 0; i < count; i++)
132 *p++ = codestream_get ();
133}
134
135/* next instruction is a jump, move to target */
136
137static void
138i386_follow_jump ()
139{
140 unsigned char buf[4];
141 long delta;
142
143 int data16;
144 CORE_ADDR pos;
145
146 pos = codestream_tell ();
147
148 data16 = 0;
149 if (codestream_peek () == 0x66)
150 {
151 codestream_get ();
152 data16 = 1;
153 }
154
155 switch (codestream_get ())
156 {
157 case 0xe9:
158 /* relative jump: if data16 == 0, disp32, else disp16 */
159 if (data16)
160 {
161 codestream_read (buf, 2);
162 delta = extract_signed_integer (buf, 2);
163
164 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 165 pos += delta + 4;
c906108c
SS
166 }
167 else
168 {
169 codestream_read (buf, 4);
170 delta = extract_signed_integer (buf, 4);
171
172 pos += delta + 5;
173 }
174 break;
175 case 0xeb:
176 /* relative jump, disp8 (ignore data16) */
177 codestream_read (buf, 1);
178 /* Sign-extend it. */
179 delta = extract_signed_integer (buf, 1);
180
181 pos += delta + 2;
182 break;
183 }
184 codestream_seek (pos);
185}
186
187/*
188 * find & return amound a local space allocated, and advance codestream to
189 * first register push (if any)
190 *
191 * if entry sequence doesn't make sense, return -1, and leave
192 * codestream pointer random
193 */
194
195static long
196i386_get_frame_setup (pc)
197 CORE_ADDR pc;
198{
199 unsigned char op;
200
201 codestream_seek (pc);
202
203 i386_follow_jump ();
204
205 op = codestream_get ();
206
207 if (op == 0x58) /* popl %eax */
208 {
209 /*
210 * this function must start with
211 *
c5aa993b 212 * popl %eax 0x58
c906108c
SS
213 * xchgl %eax, (%esp) 0x87 0x04 0x24
214 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
215 *
216 * (the system 5 compiler puts out the second xchg
217 * inst, and the assembler doesn't try to optimize it,
218 * so the 'sib' form gets generated)
219 *
220 * this sequence is used to get the address of the return
221 * buffer for a function that returns a structure
222 */
223 int pos;
224 unsigned char buf[4];
c5aa993b
JM
225 static unsigned char proto1[3] =
226 {0x87, 0x04, 0x24};
227 static unsigned char proto2[4] =
228 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
229 pos = codestream_tell ();
230 codestream_read (buf, 4);
231 if (memcmp (buf, proto1, 3) == 0)
232 pos += 3;
233 else if (memcmp (buf, proto2, 4) == 0)
234 pos += 4;
235
236 codestream_seek (pos);
c5aa993b 237 op = codestream_get (); /* update next opcode */
c906108c
SS
238 }
239
240 if (op == 0x68 || op == 0x6a)
241 {
242 /*
243 * this function may start with
244 *
245 * pushl constant
246 * call _probe
247 * addl $4, %esp
248 * followed by
249 * pushl %ebp
250 * etc.
251 */
252 int pos;
253 unsigned char buf[8];
254
255 /* Skip past the pushl instruction; it has either a one-byte
256 or a four-byte operand, depending on the opcode. */
257 pos = codestream_tell ();
258 if (op == 0x68)
259 pos += 4;
260 else
261 pos += 1;
262 codestream_seek (pos);
263
264 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
265 followed by "addl $4,%esp" (2 bytes). */
266 codestream_read (buf, sizeof (buf));
267 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
268 pos += sizeof (buf);
269 codestream_seek (pos);
c5aa993b 270 op = codestream_get (); /* update next opcode */
c906108c
SS
271 }
272
273 if (op == 0x55) /* pushl %ebp */
c5aa993b 274 {
c906108c
SS
275 /* check for movl %esp, %ebp - can be written two ways */
276 switch (codestream_get ())
277 {
278 case 0x8b:
279 if (codestream_get () != 0xec)
280 return (-1);
281 break;
282 case 0x89:
283 if (codestream_get () != 0xe5)
284 return (-1);
285 break;
286 default:
287 return (-1);
288 }
289 /* check for stack adjustment
c5aa993b 290
c906108c
SS
291 * subl $XXX, %esp
292 *
293 * note: you can't subtract a 16 bit immediate
294 * from a 32 bit reg, so we don't have to worry
295 * about a data16 prefix
296 */
297 op = codestream_peek ();
298 if (op == 0x83)
299 {
300 /* subl with 8 bit immed */
301 codestream_get ();
302 if (codestream_get () != 0xec)
303 /* Some instruction starting with 0x83 other than subl. */
304 {
305 codestream_seek (codestream_tell () - 2);
306 return 0;
307 }
308 /* subl with signed byte immediate
309 * (though it wouldn't make sense to be negative)
310 */
c5aa993b 311 return (codestream_get ());
c906108c
SS
312 }
313 else if (op == 0x81)
314 {
315 char buf[4];
316 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 317 codestream_get ();
c906108c
SS
318 if (codestream_get () != 0xec)
319 /* Some instruction starting with 0x81 other than subl. */
320 {
321 codestream_seek (codestream_tell () - 2);
322 return 0;
323 }
324 /* It is subl with 32 bit immediate. */
c5aa993b 325 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
326 return extract_signed_integer (buf, 4);
327 }
328 else
329 {
330 return (0);
331 }
332 }
333 else if (op == 0xc8)
334 {
335 char buf[2];
336 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
337 codestream_read ((unsigned char *) buf, 2);
338 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
339 return extract_unsigned_integer (buf, 2);
340 }
341 return (-1);
342}
343
344/* Return number of args passed to a frame.
345 Can return -1, meaning no way to tell. */
346
347int
348i386_frame_num_args (fi)
349 struct frame_info *fi;
350{
351#if 1
352 return -1;
353#else
354 /* This loses because not only might the compiler not be popping the
355 args right after the function call, it might be popping args from both
356 this call and a previous one, and we would say there are more args
357 than there really are. */
358
c5aa993b
JM
359 int retpc;
360 unsigned char op;
c906108c
SS
361 struct frame_info *pfi;
362
363 /* on the 386, the instruction following the call could be:
364 popl %ecx - one arg
365 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
366 anything else - zero args */
367
368 int frameless;
369
392a587b 370 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
371 if (frameless)
372 /* In the absence of a frame pointer, GDB doesn't get correct values
373 for nameless arguments. Return -1, so it doesn't print any
374 nameless arguments. */
375 return -1;
376
c5aa993b 377 pfi = get_prev_frame (fi);
c906108c
SS
378 if (pfi == 0)
379 {
380 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
381 main, because FRAME_CHAIN_VALID won't let us go into
382 start. If we have debugging symbols, that's not really
383 a big deal; it just means it will only show as many arguments
384 to main as are declared. */
c906108c
SS
385 return -1;
386 }
387 else
388 {
c5aa993b
JM
389 retpc = pfi->pc;
390 op = read_memory_integer (retpc, 1);
391 if (op == 0x59)
392 /* pop %ecx */
393 return 1;
c906108c
SS
394 else if (op == 0x83)
395 {
c5aa993b
JM
396 op = read_memory_integer (retpc + 1, 1);
397 if (op == 0xc4)
398 /* addl $<signed imm 8 bits>, %esp */
399 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
400 else
401 return 0;
402 }
403 else if (op == 0x81)
c5aa993b
JM
404 { /* add with 32 bit immediate */
405 op = read_memory_integer (retpc + 1, 1);
406 if (op == 0xc4)
407 /* addl $<imm 32>, %esp */
408 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
409 else
410 return 0;
411 }
412 else
413 {
414 return 0;
415 }
416 }
417#endif
418}
419
420/*
421 * parse the first few instructions of the function to see
422 * what registers were stored.
423 *
424 * We handle these cases:
425 *
426 * The startup sequence can be at the start of the function,
427 * or the function can start with a branch to startup code at the end.
428 *
429 * %ebp can be set up with either the 'enter' instruction, or
430 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
431 * but was once used in the sys5 compiler)
432 *
433 * Local space is allocated just below the saved %ebp by either the
434 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
435 * a 16 bit unsigned argument for space to allocate, and the
436 * 'addl' instruction could have either a signed byte, or
437 * 32 bit immediate.
438 *
439 * Next, the registers used by this function are pushed. In
440 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
441 * (and sometimes a harmless bug causes it to also save but not restore %eax);
442 * however, the code below is willing to see the pushes in any order,
443 * and will handle up to 8 of them.
444 *
445 * If the setup sequence is at the end of the function, then the
446 * next instruction will be a branch back to the start.
447 */
448
449void
450i386_frame_find_saved_regs (fip, fsrp)
451 struct frame_info *fip;
452 struct frame_saved_regs *fsrp;
453{
454 long locals = -1;
455 unsigned char op;
456 CORE_ADDR dummy_bottom;
457 CORE_ADDR adr;
458 CORE_ADDR pc;
459 int i;
c5aa993b 460
c906108c 461 memset (fsrp, 0, sizeof *fsrp);
c5aa993b 462
c906108c
SS
463 /* if frame is the end of a dummy, compute where the
464 * beginning would be
465 */
466 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 467
c906108c 468 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 469 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
470 {
471 /* all regs were saved by push_call_dummy () */
472 adr = fip->frame;
c5aa993b 473 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
474 {
475 adr -= REGISTER_RAW_SIZE (i);
476 fsrp->regs[i] = adr;
477 }
478 return;
479 }
c5aa993b 480
c906108c
SS
481 pc = get_pc_function_start (fip->pc);
482 if (pc != 0)
483 locals = i386_get_frame_setup (pc);
c5aa993b
JM
484
485 if (locals >= 0)
c906108c
SS
486 {
487 adr = fip->frame - 4 - locals;
c5aa993b 488 for (i = 0; i < 8; i++)
c906108c
SS
489 {
490 op = codestream_get ();
491 if (op < 0x50 || op > 0x57)
492 break;
493#ifdef I386_REGNO_TO_SYMMETRY
494 /* Dynix uses different internal numbering. Ick. */
c5aa993b 495 fsrp->regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c
SS
496#else
497 fsrp->regs[op - 0x50] = adr;
498#endif
499 adr -= 4;
500 }
501 }
c5aa993b 502
c906108c
SS
503 fsrp->regs[PC_REGNUM] = fip->frame + 4;
504 fsrp->regs[FP_REGNUM] = fip->frame;
505}
506
507/* return pc of first real instruction */
508
509int
510i386_skip_prologue (pc)
511 int pc;
512{
513 unsigned char op;
514 int i;
c5aa993b
JM
515 static unsigned char pic_pat[6] =
516 {0xe8, 0, 0, 0, 0, /* call 0x0 */
517 0x5b, /* popl %ebx */
518 };
c906108c 519 CORE_ADDR pos;
c5aa993b 520
c906108c
SS
521 if (i386_get_frame_setup (pc) < 0)
522 return (pc);
c5aa993b 523
c906108c
SS
524 /* found valid frame setup - codestream now points to
525 * start of push instructions for saving registers
526 */
c5aa993b 527
c906108c
SS
528 /* skip over register saves */
529 for (i = 0; i < 8; i++)
530 {
531 op = codestream_peek ();
532 /* break if not pushl inst */
c5aa993b 533 if (op < 0x50 || op > 0x57)
c906108c
SS
534 break;
535 codestream_get ();
536 }
537
538 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
539 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
540 call 0x0
541 popl %ebx
542 movl %ebx,x(%ebp) (optional)
543 addl y,%ebx
c906108c
SS
544 This code is with the rest of the prologue (at the end of the
545 function), so we have to skip it to get to the first real
546 instruction at the start of the function. */
c5aa993b 547
c906108c
SS
548 pos = codestream_tell ();
549 for (i = 0; i < 6; i++)
550 {
551 op = codestream_get ();
c5aa993b 552 if (pic_pat[i] != op)
c906108c
SS
553 break;
554 }
555 if (i == 6)
556 {
557 unsigned char buf[4];
558 long delta = 6;
559
560 op = codestream_get ();
c5aa993b 561 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
562 {
563 op = codestream_get ();
c5aa993b 564 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
565 {
566 delta += 3;
567 codestream_read (buf, 1);
568 }
c5aa993b 569 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
570 {
571 delta += 6;
572 codestream_read (buf, 4);
573 }
c5aa993b
JM
574 else /* unexpected instruction */
575 delta = -1;
576 op = codestream_get ();
c906108c 577 }
c5aa993b
JM
578 /* addl y,%ebx */
579 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 580 {
c5aa993b 581 pos += delta + 6;
c906108c
SS
582 }
583 }
584 codestream_seek (pos);
c5aa993b 585
c906108c 586 i386_follow_jump ();
c5aa993b 587
c906108c
SS
588 return (codestream_tell ());
589}
590
591void
592i386_push_dummy_frame ()
593{
594 CORE_ADDR sp = read_register (SP_REGNUM);
595 int regnum;
596 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 597
c906108c
SS
598 sp = push_word (sp, read_register (PC_REGNUM));
599 sp = push_word (sp, read_register (FP_REGNUM));
600 write_register (FP_REGNUM, sp);
601 for (regnum = 0; regnum < NUM_REGS; regnum++)
602 {
603 read_register_gen (regnum, regbuf);
604 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
605 }
606 write_register (SP_REGNUM, sp);
607}
608
609void
610i386_pop_frame ()
611{
612 struct frame_info *frame = get_current_frame ();
613 CORE_ADDR fp;
614 int regnum;
615 struct frame_saved_regs fsr;
616 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 617
c906108c
SS
618 fp = FRAME_FP (frame);
619 get_frame_saved_regs (frame, &fsr);
c5aa993b 620 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
621 {
622 CORE_ADDR adr;
623 adr = fsr.regs[regnum];
624 if (adr)
625 {
626 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
627 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
628 REGISTER_RAW_SIZE (regnum));
629 }
630 }
631 write_register (FP_REGNUM, read_memory_integer (fp, 4));
632 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
633 write_register (SP_REGNUM, fp + 8);
634 flush_cached_frames ();
635}
636
637#ifdef GET_LONGJMP_TARGET
638
639/* Figure out where the longjmp will land. Slurp the args out of the stack.
640 We expect the first arg to be a pointer to the jmp_buf structure from which
641 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
642 This routine returns true on success. */
643
644int
c5aa993b 645get_longjmp_target (pc)
c906108c
SS
646 CORE_ADDR *pc;
647{
648 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
649 CORE_ADDR sp, jb_addr;
650
651 sp = read_register (SP_REGNUM);
652
c5aa993b 653 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
654 buf,
655 TARGET_PTR_BIT / TARGET_CHAR_BIT))
656 return 0;
657
658 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
659
660 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
661 TARGET_PTR_BIT / TARGET_CHAR_BIT))
662 return 0;
663
664 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
665
666 return 1;
667}
668
669#endif /* GET_LONGJMP_TARGET */
670
671void
c5aa993b 672i386_extract_return_value (type, regbuf, valbuf)
c906108c
SS
673 struct type *type;
674 char regbuf[REGISTER_BYTES];
675 char *valbuf;
676{
677/* On AIX, floating point values are returned in floating point registers. */
678#ifdef I386_AIX_TARGET
c5aa993b 679 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c
SS
680 {
681 double d;
682 /* 387 %st(0), gcc uses this */
683 floatformat_to_double (&floatformat_i387_ext,
c5aa993b 684 &regbuf[REGISTER_BYTE (FP0_REGNUM)],
c906108c
SS
685 &d);
686 store_floating (valbuf, TYPE_LENGTH (type), d);
687 }
688 else
689#endif /* I386_AIX_TARGET */
c5aa993b
JM
690 {
691 memcpy (valbuf, regbuf, TYPE_LENGTH (type));
c906108c
SS
692 }
693}
694
695#ifdef I386V4_SIGTRAMP_SAVED_PC
696/* Get saved user PC for sigtramp from the pushed ucontext on the stack
697 for all three variants of SVR4 sigtramps. */
698
699CORE_ADDR
700i386v4_sigtramp_saved_pc (frame)
701 struct frame_info *frame;
702{
703 CORE_ADDR saved_pc_offset = 4;
704 char *name = NULL;
705
706 find_pc_partial_function (frame->pc, &name, NULL, NULL);
707 if (name)
708 {
709 if (STREQ (name, "_sigreturn"))
710 saved_pc_offset = 132 + 14 * 4;
711 else if (STREQ (name, "_sigacthandler"))
712 saved_pc_offset = 80 + 14 * 4;
713 else if (STREQ (name, "sigvechandler"))
714 saved_pc_offset = 120 + 14 * 4;
715 }
716
717 if (frame->next)
718 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
719 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
720}
721#endif /* I386V4_SIGTRAMP_SAVED_PC */
722
a0b3c4fd
JM
723#ifdef I386_LINUX_SIGTRAMP
724
725/* When the i386 Linux kernel calls a signal handler, the return
726 address points to a bit of code on the stack. This function
727 returns whether the PC appears to be within this bit of code.
728
729 The instruction sequence is
730 pop %eax
731 mov $0x77,%eax
732 int $0x80
733 or 0x58 0xb8 0x77 0x00 0x00 0x00 0xcd 0x80.
734
735 Checking for the code sequence should be somewhat reliable, because
736 the effect is to call the system call sigreturn. This is unlikely
737 to occur anywhere other than a signal trampoline.
738
739 It kind of sucks that we have to read memory from the process in
740 order to identify a signal trampoline, but there doesn't seem to be
741 any other way. The IN_SIGTRAMP macro in tm-linux.h arranges to
742 only call us if no function name could be identified, which should
743 be the case since the code is on the stack. */
744
745#define LINUX_SIGTRAMP_INSN0 (0x58) /* pop %eax */
746#define LINUX_SIGTRAMP_OFFSET0 (0)
747#define LINUX_SIGTRAMP_INSN1 (0xb8) /* mov $NNNN,%eax */
748#define LINUX_SIGTRAMP_OFFSET1 (1)
749#define LINUX_SIGTRAMP_INSN2 (0xcd) /* int */
750#define LINUX_SIGTRAMP_OFFSET2 (6)
751
752static const unsigned char linux_sigtramp_code[] =
753{
754 LINUX_SIGTRAMP_INSN0, /* pop %eax */
755 LINUX_SIGTRAMP_INSN1, 0x77, 0x00, 0x00, 0x00, /* mov $0x77,%eax */
756 LINUX_SIGTRAMP_INSN2, 0x80 /* int $0x80 */
757};
758
759#define LINUX_SIGTRAMP_LEN (sizeof linux_sigtramp_code)
760
761/* If PC is in a sigtramp routine, return the address of the start of
762 the routine. Otherwise, return 0. */
763
764static CORE_ADDR
765i386_linux_sigtramp_start (pc)
766 CORE_ADDR pc;
767{
768 unsigned char buf[LINUX_SIGTRAMP_LEN];
769
770 /* We only recognize a signal trampoline if PC is at the start of
771 one of the three instructions. We optimize for finding the PC at
772 the start, as will be the case when the trampoline is not the
773 first frame on the stack. We assume that in the case where the
774 PC is not at the start of the instruction sequence, there will be
775 a few trailing readable bytes on the stack. */
776
777 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
778 return 0;
779
780 if (buf[0] != LINUX_SIGTRAMP_INSN0)
781 {
782 int adjust;
783
784 switch (buf[0])
785 {
786 case LINUX_SIGTRAMP_INSN1:
787 adjust = LINUX_SIGTRAMP_OFFSET1;
788 break;
789 case LINUX_SIGTRAMP_INSN2:
790 adjust = LINUX_SIGTRAMP_OFFSET2;
791 break;
792 default:
793 return 0;
794 }
795
796 pc -= adjust;
797
798 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
799 return 0;
800 }
801
802 if (memcmp (buf, linux_sigtramp_code, LINUX_SIGTRAMP_LEN) != 0)
803 return 0;
804
805 return pc;
806}
807
808/* Return whether PC is in a Linux sigtramp routine. */
809
810int
811i386_linux_sigtramp (pc)
812 CORE_ADDR pc;
813{
814 return i386_linux_sigtramp_start (pc) != 0;
815}
816
817/* Assuming FRAME is for a Linux sigtramp routine, return the saved
818 program counter. The Linux kernel will set up a sigcontext
819 structure immediately before the sigtramp routine on the stack. */
820
821CORE_ADDR
822i386_linux_sigtramp_saved_pc (frame)
823 struct frame_info *frame;
824{
825 CORE_ADDR pc;
826
827 pc = i386_linux_sigtramp_start (frame->pc);
828 if (pc == 0)
829 error ("i386_linux_sigtramp_saved_pc called when no sigtramp");
830 return read_memory_integer ((pc
831 - LINUX_SIGCONTEXT_SIZE
832 + LINUX_SIGCONTEXT_PC_OFFSET),
833 4);
834}
835
836/* Assuming FRAME is for a Linux sigtramp routine, return the saved
837 stack pointer. The Linux kernel will set up a sigcontext structure
838 immediately before the sigtramp routine on the stack. */
839
840CORE_ADDR
841i386_linux_sigtramp_saved_sp (frame)
842 struct frame_info *frame;
843{
844 CORE_ADDR pc;
845
846 pc = i386_linux_sigtramp_start (frame->pc);
847 if (pc == 0)
848 error ("i386_linux_sigtramp_saved_sp called when no sigtramp");
849 return read_memory_integer ((pc
850 - LINUX_SIGCONTEXT_SIZE
851 + LINUX_SIGCONTEXT_SP_OFFSET),
852 4);
853}
854
855#endif /* I386_LINUX_SIGTRAMP */
856
c906108c
SS
857#ifdef STATIC_TRANSFORM_NAME
858/* SunPRO encodes the static variables. This is not related to C++ mangling,
859 it is done for C too. */
860
861char *
862sunpro_static_transform_name (name)
863 char *name;
864{
865 char *p;
866 if (IS_STATIC_TRANSFORM_NAME (name))
867 {
868 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
869 of junk (the contents of which match a string given in the
870 N_OPT), a period and the name. For function-local statics
871 there will be a bunch of junk (which seems to change the
872 second character from 'A' to 'B'), a period, the name of the
873 function, and the name. So just skip everything before the
874 last period. */
c906108c
SS
875 p = strrchr (name, '.');
876 if (p != NULL)
877 name = p + 1;
878 }
879 return name;
880}
881#endif /* STATIC_TRANSFORM_NAME */
882
883
884
885/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
886
887CORE_ADDR
888skip_trampoline_code (pc, name)
889 CORE_ADDR pc;
890 char *name;
891{
c5aa993b 892 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 893 {
c5aa993b 894 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 895 struct minimal_symbol *indsym =
c5aa993b
JM
896 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
897 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 898
c5aa993b 899 if (symname)
c906108c 900 {
c5aa993b
JM
901 if (strncmp (symname, "__imp_", 6) == 0
902 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
903 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
904 }
905 }
906 return 0; /* not a trampoline */
907}
908
909static int
910gdb_print_insn_i386 (memaddr, info)
911 bfd_vma memaddr;
c5aa993b 912 disassemble_info *info;
c906108c
SS
913{
914 if (disassembly_flavor == att_flavor)
915 return print_insn_i386_att (memaddr, info);
916 else if (disassembly_flavor == intel_flavor)
917 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
918 /* Never reached - disassembly_flavour is always either att_flavor
919 or intel_flavor */
920 abort ();
921}
922
923/* If the disassembly mode is intel, we have to also switch the
924 bfd mach_type. This function is run in the set disassembly_flavor
925 command, and does that. */
926
927static void
928set_disassembly_flavor_sfunc (args, from_tty, c)
929 char *args;
930 int from_tty;
931 struct cmd_list_element *c;
932{
933 set_disassembly_flavor ();
7a292a7a
SS
934}
935
936static void
937set_disassembly_flavor ()
938{
939 if (disassembly_flavor == att_flavor)
940 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
941 else if (disassembly_flavor == intel_flavor)
942 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
943}
944
945void
946_initialize_i386_tdep ()
947{
7a292a7a 948 struct cmd_list_element *new_cmd;
c5aa993b 949
c906108c
SS
950 tm_print_insn = gdb_print_insn_i386;
951 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
952
953 /* Add the variable that controls the disassembly flavor */
7a292a7a
SS
954
955 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
c5aa993b
JM
956 valid_flavors,
957 (char *) &disassembly_flavor,
958 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 959and the default value is \"att\".",
c5aa993b 960 &setlist);
7a292a7a 961 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
c5aa993b
JM
962 add_show_from_set (new_cmd, &showlist);
963
7a292a7a
SS
964 /* Finally, initialize the disassembly flavor to the default given
965 in the disassembly_flavor variable */
c906108c 966
7a292a7a 967 set_disassembly_flavor ();
c5aa993b 968
c906108c 969}
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