Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
b6ba6518 KB |
2 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
3 | 1998, 1999, 2000, 2001 | |
c906108c SS |
4 | Free Software Foundation, Inc. |
5 | ||
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "gdb_string.h" | |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
28 | #include "target.h" | |
29 | #include "floatformat.h" | |
30 | #include "symtab.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "command.h" | |
b4a20239 | 33 | #include "arch-utils.h" |
4e052eda | 34 | #include "regcache.h" |
d16aafd8 | 35 | #include "doublest.h" |
fd0407d6 | 36 | #include "value.h" |
c906108c | 37 | |
3d261580 MK |
38 | #include "gdb_assert.h" |
39 | ||
917317f4 JM |
40 | /* i386_register_byte[i] is the offset into the register file of the |
41 | start of register number i. We initialize this from | |
42 | i386_register_raw_size. */ | |
43 | int i386_register_byte[MAX_NUM_REGS]; | |
44 | ||
ceb4951f JB |
45 | /* i386_register_raw_size[i] is the number of bytes of storage in |
46 | GDB's register array occupied by register i. */ | |
917317f4 JM |
47 | int i386_register_raw_size[MAX_NUM_REGS] = { |
48 | 4, 4, 4, 4, | |
49 | 4, 4, 4, 4, | |
50 | 4, 4, 4, 4, | |
51 | 4, 4, 4, 4, | |
52 | 10, 10, 10, 10, | |
53 | 10, 10, 10, 10, | |
54 | 4, 4, 4, 4, | |
55 | 4, 4, 4, 4, | |
56 | 16, 16, 16, 16, | |
57 | 16, 16, 16, 16, | |
58 | 4 | |
59 | }; | |
60 | ||
61 | /* i386_register_virtual_size[i] is the size in bytes of the virtual | |
62 | type of register i. */ | |
63 | int i386_register_virtual_size[MAX_NUM_REGS]; | |
85540d8c MK |
64 | |
65 | /* Convert stabs register number REG to the appropriate register | |
66 | number used by GDB. */ | |
67 | ||
68 | int | |
69 | i386_stab_reg_to_regnum (int reg) | |
70 | { | |
71 | /* This implements what GCC calls the "default" register map. */ | |
72 | if (reg >= 0 && reg <= 7) | |
73 | { | |
74 | /* General registers. */ | |
75 | return reg; | |
76 | } | |
77 | else if (reg >= 12 && reg <= 19) | |
78 | { | |
79 | /* Floating-point registers. */ | |
80 | return reg - 12 + FP0_REGNUM; | |
81 | } | |
82 | else if (reg >= 21 && reg <= 28) | |
83 | { | |
84 | /* SSE registers. */ | |
85 | return reg - 21 + XMM0_REGNUM; | |
86 | } | |
87 | else if (reg >= 29 && reg <= 36) | |
88 | { | |
89 | /* MMX registers. */ | |
90 | /* FIXME: kettenis/2001-07-28: Should we have the MMX registers | |
91 | as pseudo-registers? */ | |
92 | return reg - 29 + FP0_REGNUM; | |
93 | } | |
94 | ||
95 | /* This will hopefully provoke a warning. */ | |
96 | return NUM_REGS + NUM_PSEUDO_REGS; | |
97 | } | |
98 | ||
99 | /* Convert Dwarf register number REG to the appropriate register | |
100 | number used by GDB. */ | |
101 | ||
102 | int | |
103 | i386_dwarf_reg_to_regnum (int reg) | |
104 | { | |
105 | /* The DWARF register numbering includes %eip and %eflags, and | |
106 | numbers the floating point registers differently. */ | |
107 | if (reg >= 0 && reg <= 9) | |
108 | { | |
109 | /* General registers. */ | |
110 | return reg; | |
111 | } | |
112 | else if (reg >= 11 && reg <= 18) | |
113 | { | |
114 | /* Floating-point registers. */ | |
115 | return reg - 11 + FP0_REGNUM; | |
116 | } | |
117 | else if (reg >= 21) | |
118 | { | |
119 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
120 | return i386_stab_reg_to_regnum (reg); | |
121 | } | |
122 | ||
123 | /* This will hopefully provoke a warning. */ | |
124 | return NUM_REGS + NUM_PSEUDO_REGS; | |
125 | } | |
fc338970 | 126 | \f |
917317f4 | 127 | |
fc338970 MK |
128 | /* This is the variable that is set with "set disassembly-flavor", and |
129 | its legitimate values. */ | |
53904c9e AC |
130 | static const char att_flavor[] = "att"; |
131 | static const char intel_flavor[] = "intel"; | |
132 | static const char *valid_flavors[] = | |
c5aa993b | 133 | { |
c906108c SS |
134 | att_flavor, |
135 | intel_flavor, | |
136 | NULL | |
137 | }; | |
53904c9e | 138 | static const char *disassembly_flavor = att_flavor; |
c906108c | 139 | |
fc338970 MK |
140 | /* This is used to keep the bfd arch_info in sync with the disassembly |
141 | flavor. */ | |
a14ed312 KB |
142 | static void set_disassembly_flavor_sfunc (char *, int, |
143 | struct cmd_list_element *); | |
144 | static void set_disassembly_flavor (void); | |
fc338970 MK |
145 | \f |
146 | ||
147 | /* Stdio style buffering was used to minimize calls to ptrace, but | |
148 | this buffering did not take into account that the code section | |
149 | being accessed may not be an even number of buffers long (even if | |
150 | the buffer is only sizeof(int) long). In cases where the code | |
151 | section size happened to be a non-integral number of buffers long, | |
152 | attempting to read the last buffer would fail. Simply using | |
153 | target_read_memory and ignoring errors, rather than read_memory, is | |
154 | not the correct solution, since legitimate access errors would then | |
155 | be totally ignored. To properly handle this situation and continue | |
156 | to use buffering would require that this code be able to determine | |
157 | the minimum code section size granularity (not the alignment of the | |
158 | section itself, since the actual failing case that pointed out this | |
159 | problem had a section alignment of 4 but was not a multiple of 4 | |
160 | bytes long), on a target by target basis, and then adjust it's | |
161 | buffer size accordingly. This is messy, but potentially feasible. | |
162 | It probably needs the bfd library's help and support. For now, the | |
163 | buffer size is set to 1. (FIXME -fnf) */ | |
164 | ||
165 | #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */ | |
c906108c SS |
166 | static CORE_ADDR codestream_next_addr; |
167 | static CORE_ADDR codestream_addr; | |
168 | static unsigned char codestream_buf[CODESTREAM_BUFSIZ]; | |
169 | static int codestream_off; | |
170 | static int codestream_cnt; | |
171 | ||
172 | #define codestream_tell() (codestream_addr + codestream_off) | |
fc338970 MK |
173 | #define codestream_peek() \ |
174 | (codestream_cnt == 0 ? \ | |
175 | codestream_fill(1) : codestream_buf[codestream_off]) | |
176 | #define codestream_get() \ | |
177 | (codestream_cnt-- == 0 ? \ | |
178 | codestream_fill(0) : codestream_buf[codestream_off++]) | |
c906108c | 179 | |
c5aa993b | 180 | static unsigned char |
fba45db2 | 181 | codestream_fill (int peek_flag) |
c906108c SS |
182 | { |
183 | codestream_addr = codestream_next_addr; | |
184 | codestream_next_addr += CODESTREAM_BUFSIZ; | |
185 | codestream_off = 0; | |
186 | codestream_cnt = CODESTREAM_BUFSIZ; | |
187 | read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ); | |
c5aa993b | 188 | |
c906108c | 189 | if (peek_flag) |
c5aa993b | 190 | return (codestream_peek ()); |
c906108c | 191 | else |
c5aa993b | 192 | return (codestream_get ()); |
c906108c SS |
193 | } |
194 | ||
195 | static void | |
fba45db2 | 196 | codestream_seek (CORE_ADDR place) |
c906108c SS |
197 | { |
198 | codestream_next_addr = place / CODESTREAM_BUFSIZ; | |
199 | codestream_next_addr *= CODESTREAM_BUFSIZ; | |
200 | codestream_cnt = 0; | |
201 | codestream_fill (1); | |
c5aa993b | 202 | while (codestream_tell () != place) |
c906108c SS |
203 | codestream_get (); |
204 | } | |
205 | ||
206 | static void | |
fba45db2 | 207 | codestream_read (unsigned char *buf, int count) |
c906108c SS |
208 | { |
209 | unsigned char *p; | |
210 | int i; | |
211 | p = buf; | |
212 | for (i = 0; i < count; i++) | |
213 | *p++ = codestream_get (); | |
214 | } | |
fc338970 | 215 | \f |
c906108c | 216 | |
fc338970 | 217 | /* If the next instruction is a jump, move to its target. */ |
c906108c SS |
218 | |
219 | static void | |
fba45db2 | 220 | i386_follow_jump (void) |
c906108c SS |
221 | { |
222 | unsigned char buf[4]; | |
223 | long delta; | |
224 | ||
225 | int data16; | |
226 | CORE_ADDR pos; | |
227 | ||
228 | pos = codestream_tell (); | |
229 | ||
230 | data16 = 0; | |
231 | if (codestream_peek () == 0x66) | |
232 | { | |
233 | codestream_get (); | |
234 | data16 = 1; | |
235 | } | |
236 | ||
237 | switch (codestream_get ()) | |
238 | { | |
239 | case 0xe9: | |
fc338970 | 240 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
241 | if (data16) |
242 | { | |
243 | codestream_read (buf, 2); | |
244 | delta = extract_signed_integer (buf, 2); | |
245 | ||
fc338970 MK |
246 | /* Include the size of the jmp instruction (including the |
247 | 0x66 prefix). */ | |
c5aa993b | 248 | pos += delta + 4; |
c906108c SS |
249 | } |
250 | else | |
251 | { | |
252 | codestream_read (buf, 4); | |
253 | delta = extract_signed_integer (buf, 4); | |
254 | ||
255 | pos += delta + 5; | |
256 | } | |
257 | break; | |
258 | case 0xeb: | |
fc338970 | 259 | /* Relative jump, disp8 (ignore data16). */ |
c906108c SS |
260 | codestream_read (buf, 1); |
261 | /* Sign-extend it. */ | |
262 | delta = extract_signed_integer (buf, 1); | |
263 | ||
264 | pos += delta + 2; | |
265 | break; | |
266 | } | |
267 | codestream_seek (pos); | |
268 | } | |
269 | ||
fc338970 MK |
270 | /* Find & return the amount a local space allocated, and advance the |
271 | codestream to the first register push (if any). | |
272 | ||
273 | If the entry sequence doesn't make sense, return -1, and leave | |
274 | codestream pointer at a random spot. */ | |
c906108c SS |
275 | |
276 | static long | |
fba45db2 | 277 | i386_get_frame_setup (CORE_ADDR pc) |
c906108c SS |
278 | { |
279 | unsigned char op; | |
280 | ||
281 | codestream_seek (pc); | |
282 | ||
283 | i386_follow_jump (); | |
284 | ||
285 | op = codestream_get (); | |
286 | ||
287 | if (op == 0x58) /* popl %eax */ | |
288 | { | |
fc338970 MK |
289 | /* This function must start with |
290 | ||
291 | popl %eax 0x58 | |
292 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
293 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
294 | ||
295 | (the System V compiler puts out the second `xchg' | |
296 | instruction, and the assembler doesn't try to optimize it, so | |
297 | the 'sib' form gets generated). This sequence is used to get | |
298 | the address of the return buffer for a function that returns | |
299 | a structure. */ | |
c906108c SS |
300 | int pos; |
301 | unsigned char buf[4]; | |
fc338970 MK |
302 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; |
303 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
304 | ||
c906108c SS |
305 | pos = codestream_tell (); |
306 | codestream_read (buf, 4); | |
307 | if (memcmp (buf, proto1, 3) == 0) | |
308 | pos += 3; | |
309 | else if (memcmp (buf, proto2, 4) == 0) | |
310 | pos += 4; | |
311 | ||
312 | codestream_seek (pos); | |
fc338970 | 313 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
314 | } |
315 | ||
316 | if (op == 0x68 || op == 0x6a) | |
317 | { | |
fc338970 MK |
318 | /* This function may start with |
319 | ||
320 | pushl constant | |
321 | call _probe | |
322 | addl $4, %esp | |
323 | ||
324 | followed by | |
325 | ||
326 | pushl %ebp | |
327 | ||
328 | etc. */ | |
c906108c SS |
329 | int pos; |
330 | unsigned char buf[8]; | |
331 | ||
fc338970 | 332 | /* Skip past the `pushl' instruction; it has either a one-byte |
c906108c SS |
333 | or a four-byte operand, depending on the opcode. */ |
334 | pos = codestream_tell (); | |
335 | if (op == 0x68) | |
336 | pos += 4; | |
337 | else | |
338 | pos += 1; | |
339 | codestream_seek (pos); | |
340 | ||
fc338970 MK |
341 | /* Read the following 8 bytes, which should be "call _probe" (6 |
342 | bytes) followed by "addl $4,%esp" (2 bytes). */ | |
c906108c SS |
343 | codestream_read (buf, sizeof (buf)); |
344 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) | |
345 | pos += sizeof (buf); | |
346 | codestream_seek (pos); | |
fc338970 | 347 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
348 | } |
349 | ||
350 | if (op == 0x55) /* pushl %ebp */ | |
c5aa993b | 351 | { |
fc338970 | 352 | /* Check for "movl %esp, %ebp" -- can be written in two ways. */ |
c906108c SS |
353 | switch (codestream_get ()) |
354 | { | |
355 | case 0x8b: | |
356 | if (codestream_get () != 0xec) | |
fc338970 | 357 | return -1; |
c906108c SS |
358 | break; |
359 | case 0x89: | |
360 | if (codestream_get () != 0xe5) | |
fc338970 | 361 | return -1; |
c906108c SS |
362 | break; |
363 | default: | |
fc338970 | 364 | return -1; |
c906108c | 365 | } |
fc338970 MK |
366 | /* Check for stack adjustment |
367 | ||
368 | subl $XXX, %esp | |
369 | ||
370 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
371 | reg, so we don't have to worry about a data16 prefix. */ | |
c906108c SS |
372 | op = codestream_peek (); |
373 | if (op == 0x83) | |
374 | { | |
fc338970 | 375 | /* `subl' with 8 bit immediate. */ |
c906108c SS |
376 | codestream_get (); |
377 | if (codestream_get () != 0xec) | |
fc338970 | 378 | /* Some instruction starting with 0x83 other than `subl'. */ |
c906108c SS |
379 | { |
380 | codestream_seek (codestream_tell () - 2); | |
381 | return 0; | |
382 | } | |
fc338970 MK |
383 | /* `subl' with signed byte immediate (though it wouldn't |
384 | make sense to be negative). */ | |
c5aa993b | 385 | return (codestream_get ()); |
c906108c SS |
386 | } |
387 | else if (op == 0x81) | |
388 | { | |
389 | char buf[4]; | |
fc338970 | 390 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
c5aa993b | 391 | codestream_get (); |
c906108c | 392 | if (codestream_get () != 0xec) |
fc338970 | 393 | /* Some instruction starting with 0x81 other than `subl'. */ |
c906108c SS |
394 | { |
395 | codestream_seek (codestream_tell () - 2); | |
396 | return 0; | |
397 | } | |
fc338970 | 398 | /* It is `subl' with a 32 bit immediate. */ |
c5aa993b | 399 | codestream_read ((unsigned char *) buf, 4); |
c906108c SS |
400 | return extract_signed_integer (buf, 4); |
401 | } | |
402 | else | |
403 | { | |
fc338970 | 404 | return 0; |
c906108c SS |
405 | } |
406 | } | |
407 | else if (op == 0xc8) | |
408 | { | |
409 | char buf[2]; | |
fc338970 | 410 | /* `enter' with 16 bit unsigned immediate. */ |
c5aa993b | 411 | codestream_read ((unsigned char *) buf, 2); |
fc338970 | 412 | codestream_get (); /* Flush final byte of enter instruction. */ |
c906108c SS |
413 | return extract_unsigned_integer (buf, 2); |
414 | } | |
415 | return (-1); | |
416 | } | |
417 | ||
c833a37e MK |
418 | /* Return the chain-pointer for FRAME. In the case of the i386, the |
419 | frame's nominal address is the address of a 4-byte word containing | |
420 | the calling frame's address. */ | |
421 | ||
422 | CORE_ADDR | |
423 | i386_frame_chain (struct frame_info *frame) | |
424 | { | |
425 | if (frame->signal_handler_caller) | |
426 | return frame->frame; | |
427 | ||
428 | if (! inside_entry_file (frame->pc)) | |
429 | return read_memory_unsigned_integer (frame->frame, 4); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
539ffe0b MK |
434 | /* Determine whether the function invocation represented by FRAME does |
435 | not have a from on the stack associated with it. If it does not, | |
436 | return non-zero, otherwise return zero. */ | |
437 | ||
438 | int | |
439 | i386_frameless_function_invocation (struct frame_info *frame) | |
440 | { | |
441 | if (frame->signal_handler_caller) | |
442 | return 0; | |
443 | ||
444 | return frameless_look_for_prologue (frame); | |
445 | } | |
446 | ||
0d17c81d MK |
447 | /* Return the saved program counter for FRAME. */ |
448 | ||
449 | CORE_ADDR | |
450 | i386_frame_saved_pc (struct frame_info *frame) | |
451 | { | |
452 | /* FIXME: kettenis/2001-05-09: Conditionalizing the next bit of code | |
453 | on SIGCONTEXT_PC_OFFSET and I386V4_SIGTRAMP_SAVED_PC should be | |
454 | considered a temporary hack. I plan to come up with something | |
455 | better when we go multi-arch. */ | |
456 | #if defined (SIGCONTEXT_PC_OFFSET) || defined (I386V4_SIGTRAMP_SAVED_PC) | |
457 | if (frame->signal_handler_caller) | |
458 | return sigtramp_saved_pc (frame); | |
459 | #endif | |
460 | ||
461 | return read_memory_unsigned_integer (frame->frame + 4, 4); | |
462 | } | |
463 | ||
ed84f6c1 MK |
464 | /* Immediately after a function call, return the saved pc. */ |
465 | ||
466 | CORE_ADDR | |
467 | i386_saved_pc_after_call (struct frame_info *frame) | |
468 | { | |
469 | return read_memory_unsigned_integer (read_register (SP_REGNUM), 4); | |
470 | } | |
471 | ||
c906108c SS |
472 | /* Return number of args passed to a frame. |
473 | Can return -1, meaning no way to tell. */ | |
474 | ||
475 | int | |
fba45db2 | 476 | i386_frame_num_args (struct frame_info *fi) |
c906108c SS |
477 | { |
478 | #if 1 | |
479 | return -1; | |
480 | #else | |
481 | /* This loses because not only might the compiler not be popping the | |
fc338970 MK |
482 | args right after the function call, it might be popping args from |
483 | both this call and a previous one, and we would say there are | |
484 | more args than there really are. */ | |
c906108c | 485 | |
c5aa993b JM |
486 | int retpc; |
487 | unsigned char op; | |
c906108c SS |
488 | struct frame_info *pfi; |
489 | ||
fc338970 | 490 | /* On the i386, the instruction following the call could be: |
c906108c SS |
491 | popl %ecx - one arg |
492 | addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits | |
fc338970 | 493 | anything else - zero args. */ |
c906108c SS |
494 | |
495 | int frameless; | |
496 | ||
392a587b | 497 | frameless = FRAMELESS_FUNCTION_INVOCATION (fi); |
c906108c | 498 | if (frameless) |
fc338970 MK |
499 | /* In the absence of a frame pointer, GDB doesn't get correct |
500 | values for nameless arguments. Return -1, so it doesn't print | |
501 | any nameless arguments. */ | |
c906108c SS |
502 | return -1; |
503 | ||
c5aa993b | 504 | pfi = get_prev_frame (fi); |
c906108c SS |
505 | if (pfi == 0) |
506 | { | |
fc338970 MK |
507 | /* NOTE: This can happen if we are looking at the frame for |
508 | main, because FRAME_CHAIN_VALID won't let us go into start. | |
509 | If we have debugging symbols, that's not really a big deal; | |
510 | it just means it will only show as many arguments to main as | |
511 | are declared. */ | |
c906108c SS |
512 | return -1; |
513 | } | |
514 | else | |
515 | { | |
c5aa993b JM |
516 | retpc = pfi->pc; |
517 | op = read_memory_integer (retpc, 1); | |
fc338970 | 518 | if (op == 0x59) /* pop %ecx */ |
c5aa993b | 519 | return 1; |
c906108c SS |
520 | else if (op == 0x83) |
521 | { | |
c5aa993b JM |
522 | op = read_memory_integer (retpc + 1, 1); |
523 | if (op == 0xc4) | |
524 | /* addl $<signed imm 8 bits>, %esp */ | |
525 | return (read_memory_integer (retpc + 2, 1) & 0xff) / 4; | |
c906108c SS |
526 | else |
527 | return 0; | |
528 | } | |
fc338970 MK |
529 | else if (op == 0x81) /* `add' with 32 bit immediate. */ |
530 | { | |
c5aa993b JM |
531 | op = read_memory_integer (retpc + 1, 1); |
532 | if (op == 0xc4) | |
533 | /* addl $<imm 32>, %esp */ | |
534 | return read_memory_integer (retpc + 2, 4) / 4; | |
c906108c SS |
535 | else |
536 | return 0; | |
537 | } | |
538 | else | |
539 | { | |
540 | return 0; | |
541 | } | |
542 | } | |
543 | #endif | |
544 | } | |
545 | ||
fc338970 MK |
546 | /* Parse the first few instructions the function to see what registers |
547 | were stored. | |
548 | ||
549 | We handle these cases: | |
550 | ||
551 | The startup sequence can be at the start of the function, or the | |
552 | function can start with a branch to startup code at the end. | |
553 | ||
554 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
555 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
556 | once used in the System V compiler). | |
557 | ||
558 | Local space is allocated just below the saved %ebp by either the | |
559 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
560 | bit unsigned argument for space to allocate, and the 'addl' | |
561 | instruction could have either a signed byte, or 32 bit immediate. | |
562 | ||
563 | Next, the registers used by this function are pushed. With the | |
564 | System V compiler they will always be in the order: %edi, %esi, | |
565 | %ebx (and sometimes a harmless bug causes it to also save but not | |
566 | restore %eax); however, the code below is willing to see the pushes | |
567 | in any order, and will handle up to 8 of them. | |
568 | ||
569 | If the setup sequence is at the end of the function, then the next | |
570 | instruction will be a branch back to the start. */ | |
c906108c SS |
571 | |
572 | void | |
fba45db2 | 573 | i386_frame_init_saved_regs (struct frame_info *fip) |
c906108c SS |
574 | { |
575 | long locals = -1; | |
576 | unsigned char op; | |
577 | CORE_ADDR dummy_bottom; | |
fc338970 | 578 | CORE_ADDR addr; |
c906108c SS |
579 | CORE_ADDR pc; |
580 | int i; | |
c5aa993b | 581 | |
1211c4e4 AC |
582 | if (fip->saved_regs) |
583 | return; | |
584 | ||
585 | frame_saved_regs_zalloc (fip); | |
c5aa993b | 586 | |
fc338970 MK |
587 | /* If the frame is the end of a dummy, compute where the beginning |
588 | would be. */ | |
c906108c | 589 | dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH; |
c5aa993b | 590 | |
fc338970 | 591 | /* Check if the PC points in the stack, in a dummy frame. */ |
c5aa993b | 592 | if (dummy_bottom <= fip->pc && fip->pc <= fip->frame) |
c906108c | 593 | { |
fc338970 MK |
594 | /* All registers were saved by push_call_dummy. */ |
595 | addr = fip->frame; | |
c5aa993b | 596 | for (i = 0; i < NUM_REGS; i++) |
c906108c | 597 | { |
fc338970 MK |
598 | addr -= REGISTER_RAW_SIZE (i); |
599 | fip->saved_regs[i] = addr; | |
c906108c SS |
600 | } |
601 | return; | |
602 | } | |
c5aa993b | 603 | |
c906108c SS |
604 | pc = get_pc_function_start (fip->pc); |
605 | if (pc != 0) | |
606 | locals = i386_get_frame_setup (pc); | |
c5aa993b JM |
607 | |
608 | if (locals >= 0) | |
c906108c | 609 | { |
fc338970 | 610 | addr = fip->frame - 4 - locals; |
c5aa993b | 611 | for (i = 0; i < 8; i++) |
c906108c SS |
612 | { |
613 | op = codestream_get (); | |
614 | if (op < 0x50 || op > 0x57) | |
615 | break; | |
616 | #ifdef I386_REGNO_TO_SYMMETRY | |
617 | /* Dynix uses different internal numbering. Ick. */ | |
fc338970 | 618 | fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr; |
c906108c | 619 | #else |
fc338970 | 620 | fip->saved_regs[op - 0x50] = addr; |
c906108c | 621 | #endif |
fc338970 | 622 | addr -= 4; |
c906108c SS |
623 | } |
624 | } | |
c5aa993b | 625 | |
1211c4e4 AC |
626 | fip->saved_regs[PC_REGNUM] = fip->frame + 4; |
627 | fip->saved_regs[FP_REGNUM] = fip->frame; | |
c906108c SS |
628 | } |
629 | ||
fc338970 | 630 | /* Return PC of first real instruction. */ |
c906108c SS |
631 | |
632 | int | |
fba45db2 | 633 | i386_skip_prologue (int pc) |
c906108c SS |
634 | { |
635 | unsigned char op; | |
636 | int i; | |
c5aa993b | 637 | static unsigned char pic_pat[6] = |
fc338970 MK |
638 | { 0xe8, 0, 0, 0, 0, /* call 0x0 */ |
639 | 0x5b, /* popl %ebx */ | |
c5aa993b | 640 | }; |
c906108c | 641 | CORE_ADDR pos; |
c5aa993b | 642 | |
c906108c SS |
643 | if (i386_get_frame_setup (pc) < 0) |
644 | return (pc); | |
c5aa993b | 645 | |
fc338970 MK |
646 | /* Found valid frame setup -- codestream now points to start of push |
647 | instructions for saving registers. */ | |
c5aa993b | 648 | |
fc338970 | 649 | /* Skip over register saves. */ |
c906108c SS |
650 | for (i = 0; i < 8; i++) |
651 | { | |
652 | op = codestream_peek (); | |
fc338970 | 653 | /* Break if not `pushl' instrunction. */ |
c5aa993b | 654 | if (op < 0x50 || op > 0x57) |
c906108c SS |
655 | break; |
656 | codestream_get (); | |
657 | } | |
658 | ||
fc338970 MK |
659 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
660 | to get the address of the global offset table (GOT) into register | |
661 | %ebx | |
662 | ||
663 | call 0x0 | |
664 | popl %ebx | |
665 | movl %ebx,x(%ebp) (optional) | |
666 | addl y,%ebx | |
667 | ||
c906108c SS |
668 | This code is with the rest of the prologue (at the end of the |
669 | function), so we have to skip it to get to the first real | |
670 | instruction at the start of the function. */ | |
c5aa993b | 671 | |
c906108c SS |
672 | pos = codestream_tell (); |
673 | for (i = 0; i < 6; i++) | |
674 | { | |
675 | op = codestream_get (); | |
c5aa993b | 676 | if (pic_pat[i] != op) |
c906108c SS |
677 | break; |
678 | } | |
679 | if (i == 6) | |
680 | { | |
681 | unsigned char buf[4]; | |
682 | long delta = 6; | |
683 | ||
684 | op = codestream_get (); | |
c5aa993b | 685 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c SS |
686 | { |
687 | op = codestream_get (); | |
fc338970 | 688 | if (op == 0x5d) /* One byte offset from %ebp. */ |
c906108c SS |
689 | { |
690 | delta += 3; | |
691 | codestream_read (buf, 1); | |
692 | } | |
fc338970 | 693 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
c906108c SS |
694 | { |
695 | delta += 6; | |
696 | codestream_read (buf, 4); | |
697 | } | |
fc338970 | 698 | else /* Unexpected instruction. */ |
c5aa993b JM |
699 | delta = -1; |
700 | op = codestream_get (); | |
c906108c | 701 | } |
c5aa993b JM |
702 | /* addl y,%ebx */ |
703 | if (delta > 0 && op == 0x81 && codestream_get () == 0xc3) | |
c906108c | 704 | { |
c5aa993b | 705 | pos += delta + 6; |
c906108c SS |
706 | } |
707 | } | |
708 | codestream_seek (pos); | |
c5aa993b | 709 | |
c906108c | 710 | i386_follow_jump (); |
c5aa993b | 711 | |
c906108c SS |
712 | return (codestream_tell ()); |
713 | } | |
714 | ||
715 | void | |
fba45db2 | 716 | i386_push_dummy_frame (void) |
c906108c SS |
717 | { |
718 | CORE_ADDR sp = read_register (SP_REGNUM); | |
719 | int regnum; | |
720 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
c5aa993b | 721 | |
c906108c SS |
722 | sp = push_word (sp, read_register (PC_REGNUM)); |
723 | sp = push_word (sp, read_register (FP_REGNUM)); | |
724 | write_register (FP_REGNUM, sp); | |
725 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
726 | { | |
727 | read_register_gen (regnum, regbuf); | |
728 | sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum)); | |
729 | } | |
730 | write_register (SP_REGNUM, sp); | |
731 | } | |
732 | ||
a7769679 MK |
733 | /* Insert the (relative) function address into the call sequence |
734 | stored at DYMMY. */ | |
735 | ||
736 | void | |
737 | i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs, | |
ea7c478f | 738 | struct value **args, struct type *type, int gcc_p) |
a7769679 MK |
739 | { |
740 | int from, to, delta, loc; | |
741 | ||
742 | loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); | |
743 | from = loc + 5; | |
744 | to = (int)(fun); | |
745 | delta = to - from; | |
746 | ||
747 | *((char *)(dummy) + 1) = (delta & 0xff); | |
748 | *((char *)(dummy) + 2) = ((delta >> 8) & 0xff); | |
749 | *((char *)(dummy) + 3) = ((delta >> 16) & 0xff); | |
750 | *((char *)(dummy) + 4) = ((delta >> 24) & 0xff); | |
751 | } | |
752 | ||
c906108c | 753 | void |
fba45db2 | 754 | i386_pop_frame (void) |
c906108c SS |
755 | { |
756 | struct frame_info *frame = get_current_frame (); | |
757 | CORE_ADDR fp; | |
758 | int regnum; | |
c906108c | 759 | char regbuf[MAX_REGISTER_RAW_SIZE]; |
c5aa993b | 760 | |
c906108c | 761 | fp = FRAME_FP (frame); |
1211c4e4 AC |
762 | i386_frame_init_saved_regs (frame); |
763 | ||
c5aa993b | 764 | for (regnum = 0; regnum < NUM_REGS; regnum++) |
c906108c | 765 | { |
fc338970 MK |
766 | CORE_ADDR addr; |
767 | addr = frame->saved_regs[regnum]; | |
768 | if (addr) | |
c906108c | 769 | { |
fc338970 | 770 | read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum)); |
c906108c SS |
771 | write_register_bytes (REGISTER_BYTE (regnum), regbuf, |
772 | REGISTER_RAW_SIZE (regnum)); | |
773 | } | |
774 | } | |
775 | write_register (FP_REGNUM, read_memory_integer (fp, 4)); | |
776 | write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); | |
777 | write_register (SP_REGNUM, fp + 8); | |
778 | flush_cached_frames (); | |
779 | } | |
fc338970 | 780 | \f |
c906108c SS |
781 | |
782 | #ifdef GET_LONGJMP_TARGET | |
783 | ||
fc338970 MK |
784 | /* Figure out where the longjmp will land. Slurp the args out of the |
785 | stack. We expect the first arg to be a pointer to the jmp_buf | |
786 | structure from which we extract the pc (JB_PC) that we will land | |
787 | at. The pc is copied into PC. This routine returns true on | |
788 | success. */ | |
c906108c SS |
789 | |
790 | int | |
fba45db2 | 791 | get_longjmp_target (CORE_ADDR *pc) |
c906108c SS |
792 | { |
793 | char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT]; | |
794 | CORE_ADDR sp, jb_addr; | |
795 | ||
796 | sp = read_register (SP_REGNUM); | |
797 | ||
fc338970 | 798 | if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */ |
c906108c SS |
799 | buf, |
800 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) | |
801 | return 0; | |
802 | ||
803 | jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); | |
804 | ||
805 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, | |
806 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) | |
807 | return 0; | |
808 | ||
809 | *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); | |
810 | ||
811 | return 1; | |
812 | } | |
813 | ||
814 | #endif /* GET_LONGJMP_TARGET */ | |
fc338970 | 815 | \f |
c906108c | 816 | |
22f8ba57 | 817 | CORE_ADDR |
ea7c478f | 818 | i386_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
22f8ba57 MK |
819 | int struct_return, CORE_ADDR struct_addr) |
820 | { | |
821 | sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr); | |
822 | ||
823 | if (struct_return) | |
824 | { | |
825 | char buf[4]; | |
826 | ||
827 | sp -= 4; | |
828 | store_address (buf, 4, struct_addr); | |
829 | write_memory (sp, buf, 4); | |
830 | } | |
831 | ||
832 | return sp; | |
833 | } | |
834 | ||
835 | void | |
836 | i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
837 | { | |
838 | /* Do nothing. Everything was already done by i386_push_arguments. */ | |
839 | } | |
840 | ||
1a309862 MK |
841 | /* These registers are used for returning integers (and on some |
842 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 843 | size and alignment match an integer type). */ |
1a309862 MK |
844 | #define LOW_RETURN_REGNUM 0 /* %eax */ |
845 | #define HIGH_RETURN_REGNUM 2 /* %edx */ | |
846 | ||
847 | /* Extract from an array REGBUF containing the (raw) register state, a | |
848 | function return value of TYPE, and copy that, in virtual format, | |
849 | into VALBUF. */ | |
850 | ||
c906108c | 851 | void |
1a309862 | 852 | i386_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
c906108c | 853 | { |
1a309862 MK |
854 | int len = TYPE_LENGTH (type); |
855 | ||
1e8d0a7b MK |
856 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
857 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 MK |
858 | { |
859 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf); | |
860 | return; | |
861 | } | |
1e8d0a7b MK |
862 | |
863 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 864 | { |
1a309862 MK |
865 | if (NUM_FREGS == 0) |
866 | { | |
867 | warning ("Cannot find floating-point return value."); | |
868 | memset (valbuf, 0, len); | |
ef9dff19 | 869 | return; |
1a309862 MK |
870 | } |
871 | ||
c6ba6f0d MK |
872 | /* Floating-point return values can be found in %st(0). Convert |
873 | its contents to the desired type. This is probably not | |
874 | exactly how it would happen on the target itself, but it is | |
875 | the best we can do. */ | |
876 | convert_typed_floating (®buf[REGISTER_BYTE (FP0_REGNUM)], | |
877 | builtin_type_i387_ext, valbuf, type); | |
c906108c SS |
878 | } |
879 | else | |
c5aa993b | 880 | { |
d4f3574e SS |
881 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
882 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
883 | ||
884 | if (len <= low_size) | |
1a309862 | 885 | memcpy (valbuf, ®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len); |
d4f3574e SS |
886 | else if (len <= (low_size + high_size)) |
887 | { | |
888 | memcpy (valbuf, | |
1a309862 | 889 | ®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size); |
d4f3574e | 890 | memcpy (valbuf + low_size, |
1a309862 | 891 | ®buf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size); |
d4f3574e SS |
892 | } |
893 | else | |
8e65ff28 AC |
894 | internal_error (__FILE__, __LINE__, |
895 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
896 | } |
897 | } | |
898 | ||
ef9dff19 MK |
899 | /* Write into the appropriate registers a function return value stored |
900 | in VALBUF of type TYPE, given in virtual format. */ | |
901 | ||
902 | void | |
903 | i386_store_return_value (struct type *type, char *valbuf) | |
904 | { | |
905 | int len = TYPE_LENGTH (type); | |
906 | ||
1e8d0a7b MK |
907 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
908 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 MK |
909 | { |
910 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf); | |
911 | return; | |
912 | } | |
1e8d0a7b MK |
913 | |
914 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 915 | { |
ccb945b8 | 916 | unsigned int fstat; |
c6ba6f0d | 917 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 918 | |
ef9dff19 MK |
919 | if (NUM_FREGS == 0) |
920 | { | |
921 | warning ("Cannot set floating-point return value."); | |
922 | return; | |
923 | } | |
924 | ||
635b0cc1 MK |
925 | /* Returning floating-point values is a bit tricky. Apart from |
926 | storing the return value in %st(0), we have to simulate the | |
927 | state of the FPU at function return point. */ | |
928 | ||
c6ba6f0d MK |
929 | /* Convert the value found in VALBUF to the extended |
930 | floating-point format used by the FPU. This is probably | |
931 | not exactly how it would happen on the target itself, but | |
932 | it is the best we can do. */ | |
933 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
934 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf, | |
935 | FPU_REG_RAW_SIZE); | |
ccb945b8 | 936 | |
635b0cc1 MK |
937 | /* Set the top of the floating-point register stack to 7. The |
938 | actual value doesn't really matter, but 7 is what a normal | |
939 | function return would end up with if the program started out | |
940 | with a freshly initialized FPU. */ | |
ccb945b8 MK |
941 | fstat = read_register (FSTAT_REGNUM); |
942 | fstat |= (7 << 11); | |
943 | write_register (FSTAT_REGNUM, fstat); | |
944 | ||
635b0cc1 MK |
945 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
946 | the floating-point register stack to 7, the appropriate value | |
947 | for the tag word is 0x3fff. */ | |
ccb945b8 | 948 | write_register (FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
949 | } |
950 | else | |
951 | { | |
952 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
953 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
954 | ||
955 | if (len <= low_size) | |
956 | write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len); | |
957 | else if (len <= (low_size + high_size)) | |
958 | { | |
959 | write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), | |
960 | valbuf, low_size); | |
961 | write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM), | |
962 | valbuf + low_size, len - low_size); | |
963 | } | |
964 | else | |
8e65ff28 AC |
965 | internal_error (__FILE__, __LINE__, |
966 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
967 | } |
968 | } | |
f7af9647 MK |
969 | |
970 | /* Extract from an array REGBUF containing the (raw) register state | |
971 | the address in which a function should return its structure value, | |
972 | as a CORE_ADDR. */ | |
973 | ||
974 | CORE_ADDR | |
975 | i386_extract_struct_value_address (char *regbuf) | |
976 | { | |
977 | return extract_address (®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], | |
978 | REGISTER_RAW_SIZE (LOW_RETURN_REGNUM)); | |
979 | } | |
fc338970 | 980 | \f |
ef9dff19 | 981 | |
d7a0d72c MK |
982 | /* Return the GDB type object for the "standard" data type of data in |
983 | register REGNUM. Perhaps %esi and %edi should go here, but | |
984 | potentially they could be used for things other than address. */ | |
985 | ||
986 | struct type * | |
987 | i386_register_virtual_type (int regnum) | |
988 | { | |
989 | if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM) | |
990 | return lookup_pointer_type (builtin_type_void); | |
991 | ||
992 | if (IS_FP_REGNUM (regnum)) | |
c6ba6f0d | 993 | return builtin_type_i387_ext; |
d7a0d72c MK |
994 | |
995 | if (IS_SSE_REGNUM (regnum)) | |
996 | return builtin_type_v4sf; | |
997 | ||
998 | return builtin_type_int; | |
999 | } | |
1000 | ||
1001 | /* Return true iff register REGNUM's virtual format is different from | |
1002 | its raw format. Note that this definition assumes that the host | |
1003 | supports IEEE 32-bit floats, since it doesn't say that SSE | |
1004 | registers need conversion. Even if we can't find a counterexample, | |
1005 | this is still sloppy. */ | |
1006 | ||
1007 | int | |
1008 | i386_register_convertible (int regnum) | |
1009 | { | |
1010 | return IS_FP_REGNUM (regnum); | |
1011 | } | |
1012 | ||
ac27f131 | 1013 | /* Convert data from raw format for register REGNUM in buffer FROM to |
3d261580 | 1014 | virtual format with type TYPE in buffer TO. */ |
ac27f131 MK |
1015 | |
1016 | void | |
1017 | i386_register_convert_to_virtual (int regnum, struct type *type, | |
1018 | char *from, char *to) | |
1019 | { | |
c6ba6f0d | 1020 | gdb_assert (IS_FP_REGNUM (regnum)); |
3d261580 MK |
1021 | |
1022 | /* We only support floating-point values. */ | |
8d7f6b4a MK |
1023 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
1024 | { | |
1025 | warning ("Cannot convert floating-point register value " | |
1026 | "to non-floating-point type."); | |
1027 | memset (to, 0, TYPE_LENGTH (type)); | |
1028 | return; | |
1029 | } | |
3d261580 | 1030 | |
c6ba6f0d MK |
1031 | /* Convert to TYPE. This should be a no-op if TYPE is equivalent to |
1032 | the extended floating-point format used by the FPU. */ | |
1033 | convert_typed_floating (from, builtin_type_i387_ext, to, type); | |
ac27f131 MK |
1034 | } |
1035 | ||
1036 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
3d261580 | 1037 | raw format for register REGNUM in buffer TO. */ |
ac27f131 MK |
1038 | |
1039 | void | |
1040 | i386_register_convert_to_raw (struct type *type, int regnum, | |
1041 | char *from, char *to) | |
1042 | { | |
c6ba6f0d MK |
1043 | gdb_assert (IS_FP_REGNUM (regnum)); |
1044 | ||
1045 | /* We only support floating-point values. */ | |
1046 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
1047 | { | |
1048 | warning ("Cannot convert non-floating-point type " | |
1049 | "to floating-point register value."); | |
1050 | memset (to, 0, TYPE_LENGTH (type)); | |
1051 | return; | |
1052 | } | |
3d261580 | 1053 | |
c6ba6f0d MK |
1054 | /* Convert from TYPE. This should be a no-op if TYPE is equivalent |
1055 | to the extended floating-point format used by the FPU. */ | |
1056 | convert_typed_floating (from, type, to, builtin_type_i387_ext); | |
ac27f131 | 1057 | } |
ac27f131 | 1058 | \f |
fc338970 | 1059 | |
c906108c | 1060 | #ifdef I386V4_SIGTRAMP_SAVED_PC |
fc338970 MK |
1061 | /* Get saved user PC for sigtramp from the pushed ucontext on the |
1062 | stack for all three variants of SVR4 sigtramps. */ | |
c906108c SS |
1063 | |
1064 | CORE_ADDR | |
fba45db2 | 1065 | i386v4_sigtramp_saved_pc (struct frame_info *frame) |
c906108c SS |
1066 | { |
1067 | CORE_ADDR saved_pc_offset = 4; | |
1068 | char *name = NULL; | |
1069 | ||
1070 | find_pc_partial_function (frame->pc, &name, NULL, NULL); | |
1071 | if (name) | |
1072 | { | |
1073 | if (STREQ (name, "_sigreturn")) | |
1074 | saved_pc_offset = 132 + 14 * 4; | |
1075 | else if (STREQ (name, "_sigacthandler")) | |
1076 | saved_pc_offset = 80 + 14 * 4; | |
1077 | else if (STREQ (name, "sigvechandler")) | |
1078 | saved_pc_offset = 120 + 14 * 4; | |
1079 | } | |
1080 | ||
1081 | if (frame->next) | |
1082 | return read_memory_integer (frame->next->frame + saved_pc_offset, 4); | |
1083 | return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4); | |
1084 | } | |
1085 | #endif /* I386V4_SIGTRAMP_SAVED_PC */ | |
fc338970 | 1086 | \f |
a0b3c4fd | 1087 | |
c906108c | 1088 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1089 | /* SunPRO encodes the static variables. This is not related to C++ |
1090 | mangling, it is done for C too. */ | |
c906108c SS |
1091 | |
1092 | char * | |
fba45db2 | 1093 | sunpro_static_transform_name (char *name) |
c906108c SS |
1094 | { |
1095 | char *p; | |
1096 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1097 | { | |
fc338970 MK |
1098 | /* For file-local statics there will be a period, a bunch of |
1099 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1100 | N_OPT), a period and the name. For function-local statics |
1101 | there will be a bunch of junk (which seems to change the | |
1102 | second character from 'A' to 'B'), a period, the name of the | |
1103 | function, and the name. So just skip everything before the | |
1104 | last period. */ | |
c906108c SS |
1105 | p = strrchr (name, '.'); |
1106 | if (p != NULL) | |
1107 | name = p + 1; | |
1108 | } | |
1109 | return name; | |
1110 | } | |
1111 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1112 | \f |
c906108c | 1113 | |
fc338970 | 1114 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1115 | |
1116 | CORE_ADDR | |
fba45db2 | 1117 | skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1118 | { |
fc338970 | 1119 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1120 | { |
c5aa993b | 1121 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1122 | struct minimal_symbol *indsym = |
fc338970 | 1123 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
c5aa993b | 1124 | char *symname = indsym ? SYMBOL_NAME (indsym) : 0; |
c906108c | 1125 | |
c5aa993b | 1126 | if (symname) |
c906108c | 1127 | { |
c5aa993b JM |
1128 | if (strncmp (symname, "__imp_", 6) == 0 |
1129 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1130 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1131 | } | |
1132 | } | |
fc338970 | 1133 | return 0; /* Not a trampoline. */ |
c906108c | 1134 | } |
fc338970 MK |
1135 | \f |
1136 | ||
1137 | /* We have two flavours of disassembly. The machinery on this page | |
1138 | deals with switching between those. */ | |
c906108c SS |
1139 | |
1140 | static int | |
fba45db2 | 1141 | gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info) |
c906108c SS |
1142 | { |
1143 | if (disassembly_flavor == att_flavor) | |
1144 | return print_insn_i386_att (memaddr, info); | |
1145 | else if (disassembly_flavor == intel_flavor) | |
1146 | return print_insn_i386_intel (memaddr, info); | |
fc338970 MK |
1147 | /* Never reached -- disassembly_flavour is always either att_flavor |
1148 | or intel_flavor. */ | |
e1e9e218 | 1149 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
7a292a7a SS |
1150 | } |
1151 | ||
fc338970 MK |
1152 | /* If the disassembly mode is intel, we have to also switch the bfd |
1153 | mach_type. This function is run in the set disassembly_flavor | |
7a292a7a SS |
1154 | command, and does that. */ |
1155 | ||
1156 | static void | |
fba45db2 KB |
1157 | set_disassembly_flavor_sfunc (char *args, int from_tty, |
1158 | struct cmd_list_element *c) | |
7a292a7a SS |
1159 | { |
1160 | set_disassembly_flavor (); | |
7a292a7a SS |
1161 | } |
1162 | ||
1163 | static void | |
fba45db2 | 1164 | set_disassembly_flavor (void) |
7a292a7a SS |
1165 | { |
1166 | if (disassembly_flavor == att_flavor) | |
1167 | set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386); | |
1168 | else if (disassembly_flavor == intel_flavor) | |
fc338970 MK |
1169 | set_architecture_from_arch_mach (bfd_arch_i386, |
1170 | bfd_mach_i386_i386_intel_syntax); | |
c906108c | 1171 | } |
fc338970 | 1172 | \f |
2acceee2 | 1173 | |
28e9e0f0 MK |
1174 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1175 | void _initialize_i386_tdep (void); | |
1176 | ||
c906108c | 1177 | void |
fba45db2 | 1178 | _initialize_i386_tdep (void) |
c906108c | 1179 | { |
917317f4 JM |
1180 | /* Initialize the table saying where each register starts in the |
1181 | register file. */ | |
1182 | { | |
1183 | int i, offset; | |
1184 | ||
1185 | offset = 0; | |
1186 | for (i = 0; i < MAX_NUM_REGS; i++) | |
1187 | { | |
1188 | i386_register_byte[i] = offset; | |
1189 | offset += i386_register_raw_size[i]; | |
1190 | } | |
1191 | } | |
1192 | ||
1193 | /* Initialize the table of virtual register sizes. */ | |
1194 | { | |
1195 | int i; | |
1196 | ||
1197 | for (i = 0; i < MAX_NUM_REGS; i++) | |
1198 | i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i)); | |
1199 | } | |
c5aa993b | 1200 | |
c906108c SS |
1201 | tm_print_insn = gdb_print_insn_i386; |
1202 | tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach; | |
1203 | ||
fc338970 | 1204 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1205 | { |
1206 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1207 | |
917317f4 JM |
1208 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1209 | valid_flavors, | |
1ed2a135 | 1210 | &disassembly_flavor, |
fc338970 MK |
1211 | "\ |
1212 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1213 | and the default value is \"att\".", |
917317f4 JM |
1214 | &setlist); |
1215 | new_cmd->function.sfunc = set_disassembly_flavor_sfunc; | |
1216 | add_show_from_set (new_cmd, &showlist); | |
1217 | } | |
c5aa993b | 1218 | |
7a292a7a | 1219 | /* Finally, initialize the disassembly flavor to the default given |
fc338970 | 1220 | in the disassembly_flavor variable. */ |
7a292a7a | 1221 | set_disassembly_flavor (); |
c906108c | 1222 | } |