* regcache.h (get_regcache_arch): New prototype.
[deliverable/binutils-gdb.git] / gdb / i386-tdep.h
CommitLineData
9a82579f 1/* Target-dependent code for GDB, the GNU debugger.
4be87837 2 Copyright 2001, 2002, 2003
9a82579f
JS
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#ifndef I386_TDEP_H
23#define I386_TDEP_H
24
da3331ec
AC
25struct reggroup;
26struct gdbarch;
27struct frame_info;
28
96297dab
MK
29/* GDB's i386 target supports both the 32-bit Intel Architecture
30 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
31 a similar register layout for both.
32
33 - General purpose registers
34 - FPU data registers
35 - FPU control registers
36 - SSE data registers
37 - SSE control register
38
39 The general purpose registers for the x86-64 architecture are quite
40 different from IA-32. Therefore, the FP0_REGNUM target macro
41 determines the register number at which the FPU data registers
42 start. The number of FPU data and control registers is the same
43 for both architectures. The number of SSE registers however,
44 differs and is determined by the num_xmm_regs member of `struct
45 gdbarch_tdep'. */
46
8201327c 47/* Convention for returning structures. */
3ce1502b 48
8201327c
MK
49enum struct_return
50{
51 pcc_struct_return, /* Return "short" structures in memory. */
52 reg_struct_return /* Return "short" structures in registers. */
3ce1502b
MK
53};
54
96297dab
MK
55/* i386 architecture specific information. */
56struct gdbarch_tdep
57{
58 /* Number of SSE registers. */
59 int num_xmm_regs;
8201327c
MK
60
61 /* Offset of saved PC in jmp_buf. */
62 int jb_pc_offset;
63
64 /* Convention for returning structures. */
65 enum struct_return struct_return;
66
8201327c
MK
67 /* Address range where sigtramp lives. */
68 CORE_ADDR sigtramp_start;
69 CORE_ADDR sigtramp_end;
70
21d0e8a4
MK
71 /* Get address of sigcontext for sigtramp. */
72 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
73
a3386186
MK
74 /* Offset of registers in `struct sigcontext'. */
75 int *sc_reg_offset;
76 int sc_num_regs;
77
78 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
79 is deprecated, please use `sc_reg_offset' instead. */
8201327c 80 int sc_pc_offset;
21d0e8a4 81 int sc_sp_offset;
96297dab
MK
82};
83
84/* Floating-point registers. */
85
9a82579f
JS
86#define FPU_REG_RAW_SIZE 10
87
96297dab
MK
88/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
89 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
90 register cache. */
91
92/* "Generic" floating point control register. */
93#define FPC_REGNUM (FP0_REGNUM + 8)
94
9a82579f 95/* FPU control word. */
96297dab
MK
96#define FCTRL_REGNUM FPC_REGNUM
97
9a82579f 98/* FPU status word. */
96297dab
MK
99#define FSTAT_REGNUM (FPC_REGNUM + 1)
100
9a82579f 101/* FPU register tag word. */
96297dab
MK
102#define FTAG_REGNUM (FPC_REGNUM + 2)
103
104/* FPU instruction's code segment selector, called "FPU Instruction
105 Pointer Selector" in the IA-32 manuals. */
106#define FISEG_REGNUM (FPC_REGNUM + 3)
107
108/* FPU instruction's offset within segment. */
109#define FIOFF_REGNUM (FPC_REGNUM + 4)
110
9a82579f 111/* FPU operand's data segment. */
96297dab
MK
112#define FOSEG_REGNUM (FPC_REGNUM + 5)
113
114/* FPU operand's offset within segment */
115#define FOOFF_REGNUM (FPC_REGNUM + 6)
116
9a82579f 117/* FPU opcode, bottom eleven bits. */
96297dab 118#define FOP_REGNUM (FPC_REGNUM + 7)
9a82579f 119
23a34459
AC
120/* Return non-zero if REGNUM matches the FP register and the FP
121 register set is active. */
122extern int i386_fp_regnum_p (int regnum);
123extern int i386_fpc_regnum_p (int regnum);
96297dab
MK
124
125/* SSE registers. */
126
127/* First SSE data register. */
128#define XMM0_REGNUM (FPC_REGNUM + 8)
129
130/* SSE control/status register. */
131#define MXCSR_REGNUM \
132 (XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
133
23a34459
AC
134/* Return non-zero if REGNUM matches the SSE register and the SSE
135 register set is active. */
136extern int i386_sse_regnum_p (int regnum);
137extern int i386_mxcsr_regnum_p (int regnum);
138
96297dab
MK
139/* FIXME: kettenis/2001-11-24: Obsolete macro's. */
140#define FCS_REGNUM FISEG_REGNUM
141#define FCOFF_REGNUM FIOFF_REGNUM
142#define FDS_REGNUM FOSEG_REGNUM
143#define FDOFF_REGNUM FOOFF_REGNUM
9a82579f 144
a3386186
MK
145/* Register numbers of various important registers. */
146
147#define I386_EAX_REGNUM 0 /* %eax */
148#define I386_EDX_REGNUM 2 /* %edx */
149#define I386_ESP_REGNUM 4 /* %esp */
150#define I386_EBP_REGNUM 5 /* %ebp */
151#define I386_EIP_REGNUM 8 /* %eip */
152#define I386_EFLAGS_REGNUM 9 /* %eflags */
153#define I386_ST0_REGNUM 16 /* %st(0) */
154
8201327c
MK
155#define I386_NUM_GREGS 16
156#define I386_NUM_FREGS 16
157#define I386_NUM_XREGS 9
158
159#define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \
160 + I386_NUM_XREGS)
161
00f8375e
MK
162/* Size of the largest register. */
163#define I386_MAX_REGISTER_SIZE 16
164
1cce71eb
JB
165/* Functions exported from i386-tdep.c. */
166extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
5512c44a 167extern int i386_frameless_signal_p (struct frame_info *frame);
1cce71eb 168
8201327c 169/* Return the name of register REG. */
fa88f677 170extern char const *i386_register_name (int reg);
8201327c 171
38c968cf
AC
172/* Return non-zero if REGNUM is a member of the specified group. */
173extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
174 struct reggroup *group);
175
8201327c
MK
176/* Initialize a basic ELF architecture variant. */
177extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
178
179/* Initialize a SVR4 architecture variant. */
180extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
de0b6abb 181\f
8201327c 182
de0b6abb 183/* Functions and variables exported from i386bsd-tdep.c. */
8201327c 184
3cac699e 185extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
de0b6abb
MK
186extern CORE_ADDR i386fbsd_sigtramp_start;
187extern CORE_ADDR i386fbsd_sigtramp_end;
188extern CORE_ADDR i386obsd_sigtramp_start;
189extern CORE_ADDR i386obsd_sigtramp_end;
190extern int i386fbsd4_sc_reg_offset[];
191extern int i386fbsd_sc_reg_offset[];
192extern int i386nbsd_sc_reg_offset[];
193extern int i386obsd_sc_reg_offset[];
194extern int i386bsd_sc_reg_offset[];
3ce1502b 195
96297dab 196#endif /* i386-tdep.h */
de0b6abb 197
This page took 0.260818 seconds and 4 git commands to generate.