[deliverable/binutils-gdb.git] / gdb / i386-tdep.h

/* Target-dependent code for the i386.

   Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
   Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef I386_TDEP_H
#define I386_TDEP_H

struct frame_info;
struct gdbarch;
struct reggroup;
struct regset;
struct regcache;

/* GDB's i386 target supports both the 32-bit Intel Architecture
   (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
   a similar register layout for both.

   - General purpose registers
   - FPU data registers
   - FPU control registers
   - SSE data registers
   - SSE control register

   The general purpose registers for the x86-64 architecture are quite
   different from IA-32.  Therefore, gdbarch_fp0_regnum
   determines the register number at which the FPU data registers
   start.  The number of FPU data and control registers is the same
   for both architectures.  The number of SSE registers however,
   differs and is determined by the num_xmm_regs member of `struct
   gdbarch_tdep'.  */

/* Convention for returning structures.  */

enum struct_return
{
  pcc_struct_return,		/* Return "short" structures in memory.  */
  reg_struct_return		/* Return "short" structures in registers.  */
};

/* Register classes as defined in the AMD x86-64 psABI.  */

enum amd64_reg_class
{
  AMD64_INTEGER,
  AMD64_SSE,
  AMD64_SSEUP,
  AMD64_X87,
  AMD64_X87UP,
  AMD64_COMPLEX_X87,
  AMD64_NO_CLASS,
  AMD64_MEMORY
};

/* i386 architecture specific information.  */
struct gdbarch_tdep
{
  /* General-purpose registers.  */
  struct regset *gregset;
  int *gregset_reg_offset;
  int gregset_num_regs;
  size_t sizeof_gregset;

  /* The general-purpose registers used to pass integers when making
     function calls.  This only applies to amd64, as all parameters
     are passed through the stack on x86.  */
  int call_dummy_num_integer_regs;
  int *call_dummy_integer_regs;

  /* Used on amd64 only.  Classify TYPE according to calling conventions,
     and store the result in CLASS.  */
  void (*classify) (struct type *type, enum amd64_reg_class class[2]);

  /* Used on amd64 only.  Non-zero if the first few MEMORY arguments
     should be passed by pointer.

     More precisely, MEMORY arguments are passed through the stack.
     But certain architectures require that their address be passed
     by register as well, if there are still some integer registers
     available for argument passing.  */
  int memory_args_by_pointer;

  /* Used on amd64 only.

     If non-zero, then the callers of a function are expected to reserve
     some space in the stack just before the area where the PC is saved
     so that the callee may save the integer-parameter registers there.
     The amount of space is dependent on the list of registers used for
     integer parameter passing (see component call_dummy_num_integer_regs
     above).  */
  int integer_param_regs_saved_in_caller_frame;

  /* Floating-point registers.  */
  struct regset *fpregset;
  size_t sizeof_fpregset;

  /* Register number for %st(0).  The register numbers for the other
     registers follow from this one.  Set this to -1 to indicate the
     absence of an FPU.  */
  int st0_regnum;

  /* Register number for %mm0.  Set this to -1 to indicate the absence
     of MMX support.  */
  int mm0_regnum;

  /* Number of SSE registers.  */
  int num_xmm_regs;

  /* Offset of saved PC in jmp_buf.  */
  int jb_pc_offset;

  /* Convention for returning structures.  */
  enum struct_return struct_return;

  /* Address range where sigtramp lives.  */
  CORE_ADDR sigtramp_start;
  CORE_ADDR sigtramp_end;

  /* Detect sigtramp.  */
  int (*sigtramp_p) (struct frame_info *);

  /* Get address of sigcontext for sigtramp.  */
  CORE_ADDR (*sigcontext_addr) (struct frame_info *);

  /* Offset of registers in `struct sigcontext'.  */
  int *sc_reg_offset;
  int sc_num_regs;

  /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
     is deprecated, please use `sc_reg_offset' instead.  */
  int sc_pc_offset;
  int sc_sp_offset;

  /* ISA-specific data types.  */
  struct type *i386_eflags_type;
  struct type *i386_mxcsr_type;
  struct type *i386_mmx_type;
  struct type *i386_sse_type;
  struct type *i387_ext_type;

  /* Process record/replay target.  */
  /* The map for registers because the AMD64's registers order
     in GDB is not same as I386 instructions.  */
  const int *record_regmap;
  /* Parse intx80 args.  */
  int (*i386_intx80_record) (struct regcache *regcache);
  /* Parse sysenter args.  */
  int (*i386_sysenter_record) (struct regcache *regcache);
  /* Parse syscall args.  */
  int (*i386_syscall_record) (struct regcache *regcache);
};

/* Floating-point registers.  */

/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
   (at most) in the FPU, but are zero-extended to 32 bits in GDB's
   register cache.  */

/* Return non-zero if REGNUM matches the FP register and the FP
   register set is active.  */
extern int i386_fp_regnum_p (struct gdbarch *, int);
extern int i386_fpc_regnum_p (struct gdbarch *, int);

/* Register numbers of various important registers.  */

enum i386_regnum
{
  I386_EAX_REGNUM,		/* %eax */
  I386_ECX_REGNUM,		/* %ecx */
  I386_EDX_REGNUM,		/* %edx */
  I386_EBX_REGNUM,		/* %ebx */
  I386_ESP_REGNUM,		/* %esp */
  I386_EBP_REGNUM,		/* %ebp */
  I386_ESI_REGNUM,		/* %esi */
  I386_EDI_REGNUM,		/* %edi */
  I386_EIP_REGNUM,		/* %eip */
  I386_EFLAGS_REGNUM,		/* %eflags */
  I386_CS_REGNUM,		/* %cs */
  I386_SS_REGNUM,		/* %ss */
  I386_DS_REGNUM,		/* %ds */
  I386_ES_REGNUM,		/* %es */
  I386_FS_REGNUM,		/* %fs */
  I386_GS_REGNUM,		/* %gs */
  I386_ST0_REGNUM		/* %st(0) */
};

/* Register numbers of RECORD_REGMAP.  */

enum record_i386_regnum
{
  X86_RECORD_REAX_REGNUM,
  X86_RECORD_RECX_REGNUM,
  X86_RECORD_REDX_REGNUM,
  X86_RECORD_REBX_REGNUM,
  X86_RECORD_RESP_REGNUM,
  X86_RECORD_REBP_REGNUM,
  X86_RECORD_RESI_REGNUM,
  X86_RECORD_REDI_REGNUM,
  X86_RECORD_R8_REGNUM,
  X86_RECORD_R9_REGNUM,
  X86_RECORD_R10_REGNUM,
  X86_RECORD_R11_REGNUM,
  X86_RECORD_R12_REGNUM,
  X86_RECORD_R13_REGNUM,
  X86_RECORD_R14_REGNUM,
  X86_RECORD_R15_REGNUM,
  X86_RECORD_REIP_REGNUM,
  X86_RECORD_EFLAGS_REGNUM,
  X86_RECORD_CS_REGNUM,
  X86_RECORD_SS_REGNUM,
  X86_RECORD_DS_REGNUM,
  X86_RECORD_ES_REGNUM,
  X86_RECORD_FS_REGNUM,
  X86_RECORD_GS_REGNUM,
};

#define I386_NUM_GREGS	16
#define I386_NUM_FREGS	16
#define I386_NUM_XREGS  9

#define I386_SSE_NUM_REGS	(I386_NUM_GREGS + I386_NUM_FREGS \
				 + I386_NUM_XREGS)

/* Size of the largest register.  */
#define I386_MAX_REGISTER_SIZE	16

/* Types for i386-specific registers.  */
extern struct type *i386_eflags_type (struct gdbarch *gdbarch);
extern struct type *i386_mxcsr_type (struct gdbarch *gdbarch);
extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
extern struct type *i386_sse_type (struct gdbarch *gdbarch);
extern struct type *i387_ext_type (struct gdbarch *gdbarch);

/* Segment selectors.  */
#define I386_SEL_RPL	0x0003  /* Requester's Privilege Level mask.  */
#define I386_SEL_UPL	0x0003	/* User Privilige Level. */
#define I386_SEL_KPL	0x0000	/* Kernel Privilige Level. */

/* The length of the longest i386 instruction (according to
   include/asm-i386/kprobes.h in Linux 2.6.  */
#define I386_MAX_INSN_LEN (16)

/* Functions exported from i386-tdep.c.  */
extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
					       CORE_ADDR pc, char *name);
extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);

/* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
extern int i386_sigtramp_p (struct frame_info *this_frame);

/* Return the name of register REGNUM.  */
extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);

/* Return non-zero if REGNUM is a member of the specified group.  */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
				     struct reggroup *group);

/* Supply register REGNUM from the general-purpose register set REGSET
   to register cache REGCACHE.  If REGNUM is -1, do this for all
   registers in REGSET.  */
extern void i386_supply_gregset (const struct regset *regset,
				 struct regcache *regcache, int regnum,
				 const void *gregs, size_t len);

/* Collect register REGNUM from the register cache REGCACHE and store
   it in the buffer specified by GREGS and LEN as described by the
   general-purpose register set REGSET.  If REGNUM is -1, do this for
   all registers in REGSET.  */
extern void i386_collect_gregset (const struct regset *regset,
				  const struct regcache *regcache,
				  int regnum, void *gregs, size_t len);

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */
extern const struct regset *
  i386_regset_from_core_section (struct gdbarch *gdbarch,
				 const char *sect_name, size_t sect_size);


extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
				       struct displaced_step_closure *closure,
				       CORE_ADDR from, CORE_ADDR to,
				       struct regcache *regs);

/* Initialize a basic ELF architecture variant.  */
extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);

/* Initialize a SVR4 architecture variant.  */
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);

extern int i386_process_record (struct gdbarch *gdbarch,
                                struct regcache *regcache, CORE_ADDR addr);
\f

/* Functions and variables exported from i386bsd-tdep.c.  */

extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
extern CORE_ADDR i386fbsd_sigtramp_end_addr;
extern CORE_ADDR i386obsd_sigtramp_start_addr;
extern CORE_ADDR i386obsd_sigtramp_end_addr;
extern int i386fbsd4_sc_reg_offset[];
extern int i386fbsd_sc_reg_offset[];
extern int i386nbsd_sc_reg_offset[];
extern int i386obsd_sc_reg_offset[];
extern int i386bsd_sc_reg_offset[];

#endif /* i386-tdep.h */
Commit	Line	Data
5716833c MK	1	/* Target-dependent code for the i386.
5716833c MK	2
4c38e0a4	3	Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
5ae96ec1	4	Free Software Foundation, Inc.
9a82579f JS	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
a9762ec7	10	the Free Software Foundation; either version 3 of the License, or
9a82579f JS	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
a9762ec7	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
9a82579f JS	20
	21	#ifndef I386_TDEP_H
	22	#define I386_TDEP_H
	23
da3331ec	24	struct frame_info;
5716833c MK	25	struct gdbarch;
5716833c MK	26	struct reggroup;
c783cbd6	27	struct regset;
5439edaa	28	struct regcache;
da3331ec	29
96297dab MK	30	/* GDB's i386 target supports both the 32-bit Intel Architecture
	31	(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
	32	a similar register layout for both.
	33
	34	- General purpose registers
	35	- FPU data registers
	36	- FPU control registers
	37	- SSE data registers
	38	- SSE control register
	39
	40	The general purpose registers for the x86-64 architecture are quite
3e8c568d	41	different from IA-32. Therefore, gdbarch_fp0_regnum
96297dab MK	42	determines the register number at which the FPU data registers
	43	start. The number of FPU data and control registers is the same
	44	for both architectures. The number of SSE registers however,
	45	differs and is determined by the num_xmm_regs member of `struct
	46	gdbarch_tdep'. */
	47
8201327c	48	/* Convention for returning structures. */
3ce1502b	49
8201327c MK	50	enum struct_return
	51	{
	52	pcc_struct_return, /* Return "short" structures in memory. */
	53	reg_struct_return /* Return "short" structures in registers. */
3ce1502b MK	54	};
3ce1502b MK	55
ba581dc1 JB	56	/* Register classes as defined in the AMD x86-64 psABI. */
	57
	58	enum amd64_reg_class
	59	{
	60	AMD64_INTEGER,
	61	AMD64_SSE,
	62	AMD64_SSEUP,
	63	AMD64_X87,
	64	AMD64_X87UP,
	65	AMD64_COMPLEX_X87,
	66	AMD64_NO_CLASS,
	67	AMD64_MEMORY
	68	};
	69
96297dab MK	70	/* i386 architecture specific information. */
	71	struct gdbarch_tdep
	72	{
473f17b0 MK	73	/* General-purpose registers. */
	74	struct regset *gregset;
	75	int *gregset_reg_offset;
	76	int gregset_num_regs;
	77	size_t sizeof_gregset;
	78
ba581dc1 JB	79	/* The general-purpose registers used to pass integers when making
	80	function calls. This only applies to amd64, as all parameters
	81	are passed through the stack on x86. */
	82	int call_dummy_num_integer_regs;
	83	int *call_dummy_integer_regs;
	84
3af6ddfe JB	85	/* Used on amd64 only. Classify TYPE according to calling conventions,
3af6ddfe JB	86	and store the result in CLASS. */
ba581dc1 JB	87	void (classify) (struct type type, enum amd64_reg_class class[2]);
ba581dc1 JB	88
3af6ddfe JB	89	/* Used on amd64 only. Non-zero if the first few MEMORY arguments
3af6ddfe JB	90	should be passed by pointer.
80d19a06 JB	91
	92	More precisely, MEMORY arguments are passed through the stack.
	93	But certain architectures require that their address be passed
	94	by register as well, if there are still some integer registers
	95	available for argument passing. */
	96	int memory_args_by_pointer;
	97
3af6ddfe JB	98	/* Used on amd64 only.
	99
	100	If non-zero, then the callers of a function are expected to reserve
	101	some space in the stack just before the area where the PC is saved
	102	so that the callee may save the integer-parameter registers there.
	103	The amount of space is dependent on the list of registers used for
	104	integer parameter passing (see component call_dummy_num_integer_regs
	105	above). */
	106	int integer_param_regs_saved_in_caller_frame;
	107
473f17b0 MK	108	/* Floating-point registers. */
	109	struct regset *fpregset;
	110	size_t sizeof_fpregset;
	111
5716833c MK	112	/* Register number for %st(0). The register numbers for the other
	113	registers follow from this one. Set this to -1 to indicate the
	114	absence of an FPU. */
	115	int st0_regnum;
	116
	117	/* Register number for %mm0. Set this to -1 to indicate the absence
	118	of MMX support. */
	119	int mm0_regnum;
	120
96297dab MK	121	/* Number of SSE registers. */
96297dab MK	122	int num_xmm_regs;
8201327c MK	123
	124	/* Offset of saved PC in jmp_buf. */
	125	int jb_pc_offset;
	126
	127	/* Convention for returning structures. */
	128	enum struct_return struct_return;
	129
8201327c MK	130	/* Address range where sigtramp lives. */
	131	CORE_ADDR sigtramp_start;
	132	CORE_ADDR sigtramp_end;
	133
911bc6ee MK	134	/* Detect sigtramp. */
	135	int (sigtramp_p) (struct frame_info );
	136
21d0e8a4 MK	137	/* Get address of sigcontext for sigtramp. */
	138	CORE_ADDR (sigcontext_addr) (struct frame_info );
	139
a3386186 MK	140	/* Offset of registers in `struct sigcontext'. */
	141	int *sc_reg_offset;
	142	int sc_num_regs;
	143
	144	/* Offset of saved PC and SP in `struct sigcontext'. Usage of these
	145	is deprecated, please use `sc_reg_offset' instead. */
8201327c	146	int sc_pc_offset;
21d0e8a4	147	int sc_sp_offset;
794ac428 UW	148
794ac428 UW	149	/* ISA-specific data types. */
209bd28e UW	150	struct type *i386_eflags_type;
209bd28e UW	151	struct type *i386_mxcsr_type;
794ac428 UW	152	struct type *i386_mmx_type;
794ac428 UW	153	struct type *i386_sse_type;
27067745	154	struct type *i387_ext_type;
7ad10968 HZ	155
7ad10968 HZ	156	/* Process record/replay target. */
cf648174 HZ	157	/* The map for registers because the AMD64's registers order
	158	in GDB is not same as I386 instructions. */
	159	const int *record_regmap;
7ad10968 HZ	160	/* Parse intx80 args. */
	161	int (i386_intx80_record) (struct regcache regcache);
	162	/* Parse sysenter args. */
	163	int (i386_sysenter_record) (struct regcache regcache);
cf648174 HZ	164	/* Parse syscall args. */
cf648174 HZ	165	int (i386_syscall_record) (struct regcache regcache);
96297dab MK	166	};
	167
	168	/* Floating-point registers. */
	169
96297dab MK	170	/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
	171	(at most) in the FPU, but are zero-extended to 32 bits in GDB's
	172	register cache. */
	173
23a34459 AC	174	/* Return non-zero if REGNUM matches the FP register and the FP
23a34459 AC	175	register set is active. */
20a6ec49 MD	176	extern int i386_fp_regnum_p (struct gdbarch *, int);
20a6ec49 MD	177	extern int i386_fpc_regnum_p (struct gdbarch *, int);
96297dab	178
a3386186 MK	179	/* Register numbers of various important registers. */
a3386186 MK	180
bcf48cc7 MK	181	enum i386_regnum
	182	{
	183	I386_EAX_REGNUM, /* %eax */
	184	I386_ECX_REGNUM, /* %ecx */
	185	I386_EDX_REGNUM, /* %edx */
	186	I386_EBX_REGNUM, /* %ebx */
	187	I386_ESP_REGNUM, /* %esp */
	188	I386_EBP_REGNUM, /* %ebp */
	189	I386_ESI_REGNUM, /* %esi */
	190	I386_EDI_REGNUM, /* %edi */
	191	I386_EIP_REGNUM, /* %eip */
	192	I386_EFLAGS_REGNUM, /* %eflags */
2666fb59 MK	193	I386_CS_REGNUM, /* %cs */
2666fb59 MK	194	I386_SS_REGNUM, /* %ss */
e9ff708b AC	195	I386_DS_REGNUM, /* %ds */
	196	I386_ES_REGNUM, /* %es */
	197	I386_FS_REGNUM, /* %fs */
	198	I386_GS_REGNUM, /* %gs */
	199	I386_ST0_REGNUM /* %st(0) */
bcf48cc7	200	};
a3386186	201
cf648174 HZ	202	/* Register numbers of RECORD_REGMAP. */
	203
	204	enum record_i386_regnum
	205	{
	206	X86_RECORD_REAX_REGNUM,
	207	X86_RECORD_RECX_REGNUM,
	208	X86_RECORD_REDX_REGNUM,
	209	X86_RECORD_REBX_REGNUM,
	210	X86_RECORD_RESP_REGNUM,
	211	X86_RECORD_REBP_REGNUM,
	212	X86_RECORD_RESI_REGNUM,
	213	X86_RECORD_REDI_REGNUM,
	214	X86_RECORD_R8_REGNUM,
	215	X86_RECORD_R9_REGNUM,
	216	X86_RECORD_R10_REGNUM,
	217	X86_RECORD_R11_REGNUM,
	218	X86_RECORD_R12_REGNUM,
	219	X86_RECORD_R13_REGNUM,
	220	X86_RECORD_R14_REGNUM,
	221	X86_RECORD_R15_REGNUM,
	222	X86_RECORD_REIP_REGNUM,
	223	X86_RECORD_EFLAGS_REGNUM,
	224	X86_RECORD_CS_REGNUM,
	225	X86_RECORD_SS_REGNUM,
	226	X86_RECORD_DS_REGNUM,
	227	X86_RECORD_ES_REGNUM,
	228	X86_RECORD_FS_REGNUM,
	229	X86_RECORD_GS_REGNUM,
	230	};
	231
8201327c MK	232	#define I386_NUM_GREGS 16
	233	#define I386_NUM_FREGS 16
	234	#define I386_NUM_XREGS 9
	235
	236	#define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \
	237	+ I386_NUM_XREGS)
	238
00f8375e MK	239	/* Size of the largest register. */
	240	#define I386_MAX_REGISTER_SIZE 16
	241
5ae96ec1	242	/* Types for i386-specific registers. */
209bd28e UW	243	extern struct type i386_eflags_type (struct gdbarch gdbarch);
209bd28e UW	244	extern struct type i386_mxcsr_type (struct gdbarch gdbarch);
794ac428 UW	245	extern struct type i386_mmx_type (struct gdbarch gdbarch);
794ac428 UW	246	extern struct type i386_sse_type (struct gdbarch gdbarch);
27067745	247	extern struct type i387_ext_type (struct gdbarch gdbarch);
794ac428	248
508fbfea MK	249	/* Segment selectors. */
	250	#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
	251	#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
	252	#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
	253
237fc4c9 PA	254	/* The length of the longest i386 instruction (according to
	255	include/asm-i386/kprobes.h in Linux 2.6. */
	256	#define I386_MAX_INSN_LEN (16)
	257
1cce71eb	258	/* Functions exported from i386-tdep.c. */
e17a4113 UW	259	extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
e17a4113 UW	260	CORE_ADDR pc, char *name);
4309257c	261	extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
1cce71eb	262
4bd207ef TG	263	/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
	264	extern int i386_sigtramp_p (struct frame_info *this_frame);
	265
f6792ef4	266	/* Return the name of register REGNUM. */
d93859e2	267	extern char const i386_register_name (struct gdbarch gdbarch, int regnum);
8201327c	268
38c968cf AC	269	/* Return non-zero if REGNUM is a member of the specified group. */
	270	extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
	271	struct reggroup *group);
	272
20187ed5 MK	273	/* Supply register REGNUM from the general-purpose register set REGSET
	274	to register cache REGCACHE. If REGNUM is -1, do this for all
	275	registers in REGSET. */
	276	extern void i386_supply_gregset (const struct regset *regset,
	277	struct regcache *regcache, int regnum,
	278	const void *gregs, size_t len);
3d171c85 MK	279
	280	/* Collect register REGNUM from the register cache REGCACHE and store
	281	it in the buffer specified by GREGS and LEN as described by the
	282	general-purpose register set REGSET. If REGNUM is -1, do this for
	283	all registers in REGSET. */
	284	extern void i386_collect_gregset (const struct regset *regset,
	285	const struct regcache *regcache,
	286	int regnum, void *gregs, size_t len);
20187ed5	287
8446b36a MK	288	/* Return the appropriate register set for the core section identified
	289	by SECT_NAME and SECT_SIZE. */
	290	extern const struct regset *
	291	i386_regset_from_core_section (struct gdbarch *gdbarch,
	292	const char *sect_name, size_t sect_size);
	293
237fc4c9 PA	294
	295	extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
	296	struct displaced_step_closure *closure,
	297	CORE_ADDR from, CORE_ADDR to,
	298	struct regcache *regs);
	299
8201327c MK	300	/* Initialize a basic ELF architecture variant. */
	301	extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
	302
	303	/* Initialize a SVR4 architecture variant. */
	304	extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
a6b808b4 HZ	305
	306	extern int i386_process_record (struct gdbarch *gdbarch,
	307	struct regcache *regcache, CORE_ADDR addr);
de0b6abb	308	\f
8201327c	309
de0b6abb	310	/* Functions and variables exported from i386bsd-tdep.c. */
8201327c	311
3cac699e	312	extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
5d93ae8c MK	313	extern CORE_ADDR i386fbsd_sigtramp_start_addr;
	314	extern CORE_ADDR i386fbsd_sigtramp_end_addr;
	315	extern CORE_ADDR i386obsd_sigtramp_start_addr;
	316	extern CORE_ADDR i386obsd_sigtramp_end_addr;
de0b6abb MK	317	extern int i386fbsd4_sc_reg_offset[];
	318	extern int i386fbsd_sc_reg_offset[];
	319	extern int i386nbsd_sc_reg_offset[];
	320	extern int i386obsd_sc_reg_offset[];
	321	extern int i386bsd_sc_reg_offset[];
3ce1502b	322
96297dab	323	#endif /* i386-tdep.h */