gdb/
[deliverable/binutils-gdb.git] / gdb / i387-tdep.c
CommitLineData
c906108c 1/* Intel 387 floating point stuff.
38edeab8 2
6aba47ca 3 Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
7b6bb8da 4 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
4c38e0a4 5 Free Software Foundation, Inc.
c906108c 6
c5aa993b 7 This file is part of GDB.
c906108c 8
c5aa993b
JM
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
c5aa993b 12 (at your option) any later version.
c906108c 13
c5aa993b
JM
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
c906108c 18
c5aa993b 19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
21
22#include "defs.h"
786a90bb
MK
23#include "doublest.h"
24#include "floatformat.h"
c906108c 25#include "frame.h"
786a90bb 26#include "gdbcore.h"
c906108c
SS
27#include "inferior.h"
28#include "language.h"
4e052eda 29#include "regcache.h"
786a90bb
MK
30#include "value.h"
31
d0df8472 32#include "gdb_assert.h"
309367d4 33#include "gdb_string.h"
c906108c 34
9a82579f 35#include "i386-tdep.h"
42c466d7 36#include "i387-tdep.h"
31aeac78 37#include "i386-xstate.h"
c906108c 38
de57eccd 39/* Print the floating point number specified by RAW. */
786a90bb 40
de57eccd 41static void
27067745
UW
42print_i387_value (struct gdbarch *gdbarch,
43 const gdb_byte *raw, struct ui_file *file)
de57eccd
JM
44{
45 DOUBLEST value;
4583280c
MK
46
47 /* Using extract_typed_floating here might affect the representation
48 of certain numbers such as NaNs, even if GDB is running natively.
49 This is fine since our caller already detects such special
50 numbers and we print the hexadecimal representation anyway. */
27067745 51 value = extract_typed_floating (raw, i387_ext_type (gdbarch));
de57eccd
JM
52
53 /* We try to print 19 digits. The last digit may or may not contain
54 garbage, but we'd better print one too many. We need enough room
55 to print the value, 1 position for the sign, 1 for the decimal
56 point, 19 for the digits and 6 for the exponent adds up to 27. */
57#ifdef PRINTF_HAS_LONG_DOUBLE
61113f8b 58 fprintf_filtered (file, " %-+27.19Lg", (long double) value);
de57eccd 59#else
61113f8b 60 fprintf_filtered (file, " %-+27.19g", (double) value);
de57eccd
JM
61#endif
62}
63
64/* Print the classification for the register contents RAW. */
786a90bb 65
de57eccd 66static void
27067745
UW
67print_i387_ext (struct gdbarch *gdbarch,
68 const gdb_byte *raw, struct ui_file *file)
de57eccd
JM
69{
70 int sign;
71 int integer;
72 unsigned int exponent;
73 unsigned long fraction[2];
74
75 sign = raw[9] & 0x80;
76 integer = raw[7] & 0x80;
77 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
78 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
79 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
80 | (raw[5] << 8) | raw[4]);
81
82 if (exponent == 0x7fff && integer)
83 {
84 if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
85 /* Infinity. */
61113f8b 86 fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
de57eccd
JM
87 else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
88 /* Real Indefinite (QNaN). */
61113f8b 89 fputs_unfiltered (" Real Indefinite (QNaN)", file);
de57eccd
JM
90 else if (fraction[1] & 0x40000000)
91 /* QNaN. */
61113f8b 92 fputs_filtered (" QNaN", file);
de57eccd
JM
93 else
94 /* SNaN. */
61113f8b 95 fputs_filtered (" SNaN", file);
de57eccd
JM
96 }
97 else if (exponent < 0x7fff && exponent > 0x0000 && integer)
98 /* Normal. */
27067745 99 print_i387_value (gdbarch, raw, file);
de57eccd
JM
100 else if (exponent == 0x0000)
101 {
102 /* Denormal or zero. */
27067745 103 print_i387_value (gdbarch, raw, file);
de57eccd
JM
104
105 if (integer)
106 /* Pseudo-denormal. */
61113f8b 107 fputs_filtered (" Pseudo-denormal", file);
de57eccd
JM
108 else if (fraction[0] || fraction[1])
109 /* Denormal. */
61113f8b 110 fputs_filtered (" Denormal", file);
de57eccd
JM
111 }
112 else
113 /* Unsupported. */
61113f8b 114 fputs_filtered (" Unsupported", file);
de57eccd
JM
115}
116
117/* Print the status word STATUS. */
786a90bb 118
de57eccd 119static void
61113f8b 120print_i387_status_word (unsigned int status, struct ui_file *file)
de57eccd 121{
61113f8b 122 fprintf_filtered (file, "Status Word: %s",
bb599908 123 hex_string_custom (status, 4));
61113f8b
MK
124 fputs_filtered (" ", file);
125 fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
126 fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
127 fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
128 fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
129 fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
130 fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
131 fputs_filtered (" ", file);
132 fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
133 fputs_filtered (" ", file);
134 fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
135 fputs_filtered (" ", file);
136 fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
137 fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
138 fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
139 fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
140
141 fputs_filtered ("\n", file);
142
143 fprintf_filtered (file,
144 " TOP: %d\n", ((status >> 11) & 7));
de57eccd
JM
145}
146
147/* Print the control word CONTROL. */
786a90bb 148
de57eccd 149static void
61113f8b 150print_i387_control_word (unsigned int control, struct ui_file *file)
de57eccd 151{
61113f8b 152 fprintf_filtered (file, "Control Word: %s",
bb599908 153 hex_string_custom (control, 4));
61113f8b
MK
154 fputs_filtered (" ", file);
155 fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
156 fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
157 fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
158 fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
159 fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
160 fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
de57eccd 161
61113f8b 162 fputs_filtered ("\n", file);
de57eccd 163
61113f8b 164 fputs_filtered (" PC: ", file);
de57eccd
JM
165 switch ((control >> 8) & 3)
166 {
167 case 0:
61113f8b 168 fputs_filtered ("Single Precision (24-bits)\n", file);
de57eccd
JM
169 break;
170 case 1:
61113f8b 171 fputs_filtered ("Reserved\n", file);
de57eccd
JM
172 break;
173 case 2:
61113f8b 174 fputs_filtered ("Double Precision (53-bits)\n", file);
de57eccd
JM
175 break;
176 case 3:
61113f8b 177 fputs_filtered ("Extended Precision (64-bits)\n", file);
de57eccd
JM
178 break;
179 }
180
61113f8b 181 fputs_filtered (" RC: ", file);
de57eccd
JM
182 switch ((control >> 10) & 3)
183 {
184 case 0:
61113f8b 185 fputs_filtered ("Round to nearest\n", file);
de57eccd
JM
186 break;
187 case 1:
61113f8b 188 fputs_filtered ("Round down\n", file);
de57eccd
JM
189 break;
190 case 2:
61113f8b 191 fputs_filtered ("Round up\n", file);
de57eccd
JM
192 break;
193 case 3:
61113f8b 194 fputs_filtered ("Round toward zero\n", file);
de57eccd
JM
195 break;
196 }
197}
198
9b949a49 199/* Print out the i387 floating point state. Note that we ignore FRAME
7d8d2918
MK
200 in the code below. That's OK since floating-point registers are
201 never saved on the stack. */
202
de57eccd 203void
61113f8b 204i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
8e186fd6 205 struct frame_info *frame, const char *args)
de57eccd 206{
5716833c 207 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
1d70089a
MK
208 ULONGEST fctrl;
209 ULONGEST fstat;
210 ULONGEST ftag;
211 ULONGEST fiseg;
212 ULONGEST fioff;
213 ULONGEST foseg;
214 ULONGEST fooff;
215 ULONGEST fop;
de57eccd
JM
216 int fpreg;
217 int top;
218
5716833c
MK
219 gdb_assert (gdbarch == get_frame_arch (frame));
220
20a6ec49
MD
221 fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep));
222 fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep));
223 ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep));
224 fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep));
225 fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep));
226 foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep));
227 fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep));
228 fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep));
1d70089a 229
de57eccd
JM
230 top = ((fstat >> 11) & 7);
231
232 for (fpreg = 7; fpreg >= 0; fpreg--)
233 {
b4ad899f 234 gdb_byte raw[I386_MAX_REGISTER_SIZE];
de57eccd
JM
235 int tag = (ftag >> (fpreg * 2)) & 3;
236 int i;
237
61113f8b 238 fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
de57eccd
JM
239
240 switch (tag)
241 {
242 case 0:
61113f8b 243 fputs_filtered ("Valid ", file);
de57eccd
JM
244 break;
245 case 1:
61113f8b 246 fputs_filtered ("Zero ", file);
de57eccd
JM
247 break;
248 case 2:
61113f8b 249 fputs_filtered ("Special ", file);
de57eccd
JM
250 break;
251 case 3:
61113f8b 252 fputs_filtered ("Empty ", file);
de57eccd
JM
253 break;
254 }
255
1777feb0
MS
256 get_frame_register (frame,
257 (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep),
20a6ec49 258 raw);
de57eccd 259
61113f8b 260 fputs_filtered ("0x", file);
de57eccd 261 for (i = 9; i >= 0; i--)
61113f8b 262 fprintf_filtered (file, "%02x", raw[i]);
de57eccd
JM
263
264 if (tag != 3)
27067745 265 print_i387_ext (gdbarch, raw, file);
de57eccd 266
61113f8b 267 fputs_filtered ("\n", file);
de57eccd
JM
268 }
269
f16a25ae 270 fputs_filtered ("\n", file);
de57eccd 271
61113f8b
MK
272 print_i387_status_word (fstat, file);
273 print_i387_control_word (fctrl, file);
274 fprintf_filtered (file, "Tag Word: %s\n",
bb599908 275 hex_string_custom (ftag, 4));
61113f8b 276 fprintf_filtered (file, "Instruction Pointer: %s:",
bb599908
PH
277 hex_string_custom (fiseg, 2));
278 fprintf_filtered (file, "%s\n", hex_string_custom (fioff, 8));
61113f8b 279 fprintf_filtered (file, "Operand Pointer: %s:",
bb599908
PH
280 hex_string_custom (foseg, 2));
281 fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8));
61113f8b 282 fprintf_filtered (file, "Opcode: %s\n",
bb599908 283 hex_string_custom (fop ? (fop | 0xd800) : 0, 4));
de57eccd 284}
d532c08f
MK
285\f
286
83acabca
DJ
287/* Return nonzero if a value of type TYPE stored in register REGNUM
288 needs any special handling. */
289
290int
1777feb0
MS
291i387_convert_register_p (struct gdbarch *gdbarch, int regnum,
292 struct type *type)
83acabca 293{
20a6ec49 294 if (i386_fp_regnum_p (gdbarch, regnum))
83acabca
DJ
295 {
296 /* Floating point registers must be converted unless we are
297 accessing them in their hardware type. */
27067745 298 if (type == i387_ext_type (gdbarch))
83acabca
DJ
299 return 0;
300 else
301 return 1;
302 }
303
304 return 0;
305}
306
d532c08f
MK
307/* Read a value of type TYPE from register REGNUM in frame FRAME, and
308 return its contents in TO. */
309
310void
311i387_register_to_value (struct frame_info *frame, int regnum,
42835c2b 312 struct type *type, gdb_byte *to)
d532c08f 313{
27067745 314 struct gdbarch *gdbarch = get_frame_arch (frame);
b4ad899f 315 gdb_byte from[I386_MAX_REGISTER_SIZE];
d532c08f 316
27067745 317 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
d532c08f
MK
318
319 /* We only support floating-point values. */
320 if (TYPE_CODE (type) != TYPE_CODE_FLT)
321 {
8a3fe4f8
AC
322 warning (_("Cannot convert floating-point register value "
323 "to non-floating-point type."));
d532c08f
MK
324 return;
325 }
326
83acabca 327 /* Convert to TYPE. */
192285c6 328 get_frame_register (frame, regnum, from);
27067745 329 convert_typed_floating (from, i387_ext_type (gdbarch), to, type);
d532c08f
MK
330}
331
332/* Write the contents FROM of a value of type TYPE into register
333 REGNUM in frame FRAME. */
334
335void
336i387_value_to_register (struct frame_info *frame, int regnum,
42835c2b 337 struct type *type, const gdb_byte *from)
d532c08f 338{
27067745 339 struct gdbarch *gdbarch = get_frame_arch (frame);
b4ad899f 340 gdb_byte to[I386_MAX_REGISTER_SIZE];
d532c08f 341
27067745 342 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
d532c08f
MK
343
344 /* We only support floating-point values. */
345 if (TYPE_CODE (type) != TYPE_CODE_FLT)
346 {
8a3fe4f8
AC
347 warning (_("Cannot convert non-floating-point type "
348 "to floating-point register value."));
d532c08f
MK
349 return;
350 }
351
83acabca 352 /* Convert from TYPE. */
27067745 353 convert_typed_floating (from, type, to, i387_ext_type (gdbarch));
d532c08f
MK
354 put_frame_register (frame, regnum, to);
355}
356\f
e750d25e 357
786a90bb 358/* Handle FSAVE and FXSAVE formats. */
e750d25e
JT
359
360/* At fsave_offset[REGNUM] you'll find the offset to the location in
361 the data structure used by the "fsave" instruction where GDB
362 register REGNUM is stored. */
363
364static int fsave_offset[] =
365{
5716833c
MK
366 28 + 0 * 10, /* %st(0) ... */
367 28 + 1 * 10,
368 28 + 2 * 10,
369 28 + 3 * 10,
370 28 + 4 * 10,
371 28 + 5 * 10,
372 28 + 6 * 10,
373 28 + 7 * 10, /* ... %st(7). */
374 0, /* `fctrl' (16 bits). */
375 4, /* `fstat' (16 bits). */
376 8, /* `ftag' (16 bits). */
377 16, /* `fiseg' (16 bits). */
378 12, /* `fioff'. */
379 24, /* `foseg' (16 bits). */
380 20, /* `fooff'. */
381 18 /* `fop' (bottom 11 bits). */
e750d25e
JT
382};
383
20a6ec49
MD
384#define FSAVE_ADDR(tdep, fsave, regnum) \
385 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
e750d25e
JT
386\f
387
41d041d6
MK
388/* Fill register REGNUM in REGCACHE with the appropriate value from
389 *FSAVE. This function masks off any of the reserved bits in
390 *FSAVE. */
e750d25e
JT
391
392void
41d041d6 393i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
e750d25e 394{
e17a4113
UW
395 struct gdbarch *gdbarch = get_regcache_arch (regcache);
396 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
397 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b4ad899f 398 const gdb_byte *regs = fsave;
e750d25e
JT
399 int i;
400
5716833c
MK
401 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
402
20a6ec49 403 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
ed504bdf
MK
404 if (regnum == -1 || regnum == i)
405 {
406 if (fsave == NULL)
407 {
5716833c
MK
408 regcache_raw_supply (regcache, i, NULL);
409 continue;
ed504bdf
MK
410 }
411
412 /* Most of the FPU control registers occupy only 16 bits in the
413 fsave area. Give those a special treatment. */
20a6ec49
MD
414 if (i >= I387_FCTRL_REGNUM (tdep)
415 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
ed504bdf 416 {
b4ad899f 417 gdb_byte val[4];
ed504bdf 418
20a6ec49 419 memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
ed504bdf 420 val[2] = val[3] = 0;
20a6ec49 421 if (i == I387_FOP_REGNUM (tdep))
ed504bdf 422 val[1] &= ((1 << 3) - 1);
5716833c 423 regcache_raw_supply (regcache, i, val);
ed504bdf
MK
424 }
425 else
20a6ec49 426 regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
ed504bdf 427 }
b87bc0d8
MK
428
429 /* Provide dummy values for the SSE registers. */
20a6ec49 430 for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
b87bc0d8
MK
431 if (regnum == -1 || regnum == i)
432 regcache_raw_supply (regcache, i, NULL);
20a6ec49 433 if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
b87bc0d8 434 {
b4ad899f 435 gdb_byte buf[4];
b87bc0d8 436
e17a4113 437 store_unsigned_integer (buf, 4, byte_order, 0x1f80);
20a6ec49 438 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
b87bc0d8 439 }
e750d25e
JT
440}
441
442/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
63b6c53f
MK
443 with the value from REGCACHE. If REGNUM is -1, do this for all
444 registers. This function doesn't touch any of the reserved bits in
445 *FSAVE. */
e750d25e
JT
446
447void
63b6c53f 448i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
e750d25e 449{
e071d1f6 450 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
b4ad899f 451 gdb_byte *regs = fsave;
e750d25e
JT
452 int i;
453
5716833c
MK
454 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
455
20a6ec49 456 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
e750d25e
JT
457 if (regnum == -1 || regnum == i)
458 {
459 /* Most of the FPU control registers occupy only 16 bits in
460 the fsave area. Give those a special treatment. */
20a6ec49
MD
461 if (i >= I387_FCTRL_REGNUM (tdep)
462 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
e750d25e 463 {
b4ad899f 464 gdb_byte buf[4];
e750d25e 465
5716833c 466 regcache_raw_collect (regcache, i, buf);
e750d25e 467
20a6ec49 468 if (i == I387_FOP_REGNUM (tdep))
e750d25e
JT
469 {
470 /* The opcode occupies only 11 bits. Make sure we
471 don't touch the other bits. */
472 buf[1] &= ((1 << 3) - 1);
20a6ec49 473 buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
e750d25e 474 }
20a6ec49 475 memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
e750d25e
JT
476 }
477 else
20a6ec49 478 regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
e750d25e
JT
479 }
480}
481\f
482
483/* At fxsave_offset[REGNUM] you'll find the offset to the location in
484 the data structure used by the "fxsave" instruction where GDB
485 register REGNUM is stored. */
486
487static int fxsave_offset[] =
488{
5716833c 489 32, /* %st(0) through ... */
e750d25e
JT
490 48,
491 64,
492 80,
493 96,
494 112,
495 128,
5716833c
MK
496 144, /* ... %st(7) (80 bits each). */
497 0, /* `fctrl' (16 bits). */
498 2, /* `fstat' (16 bits). */
499 4, /* `ftag' (16 bits). */
500 12, /* `fiseg' (16 bits). */
501 8, /* `fioff'. */
502 20, /* `foseg' (16 bits). */
503 16, /* `fooff'. */
504 6, /* `fop' (bottom 11 bits). */
505 160 + 0 * 16, /* %xmm0 through ... */
04c8243f
MK
506 160 + 1 * 16,
507 160 + 2 * 16,
508 160 + 3 * 16,
509 160 + 4 * 16,
510 160 + 5 * 16,
511 160 + 6 * 16,
512 160 + 7 * 16,
513 160 + 8 * 16,
514 160 + 9 * 16,
515 160 + 10 * 16,
516 160 + 11 * 16,
517 160 + 12 * 16,
518 160 + 13 * 16,
519 160 + 14 * 16,
5716833c 520 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
e750d25e
JT
521};
522
20a6ec49
MD
523#define FXSAVE_ADDR(tdep, fxsave, regnum) \
524 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
5716833c
MK
525
526/* We made an unfortunate choice in putting %mxcsr after the SSE
527 registers %xmm0-%xmm7 instead of before, since it makes supporting
528 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
529 don't include the offset for %mxcsr here above. */
530
531#define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
e750d25e 532
b4ad899f 533static int i387_tag (const gdb_byte *raw);
e750d25e
JT
534\f
535
41d041d6 536/* Fill register REGNUM in REGCACHE with the appropriate
ed504bdf
MK
537 floating-point or SSE register value from *FXSAVE. This function
538 masks off any of the reserved bits in *FXSAVE. */
e750d25e
JT
539
540void
41d041d6 541i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
e750d25e 542{
41d041d6 543 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
b4ad899f 544 const gdb_byte *regs = fxsave;
5716833c
MK
545 int i;
546
547 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
548 gdb_assert (tdep->num_xmm_regs > 0);
dff95cc7 549
20a6ec49 550 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
ed504bdf
MK
551 if (regnum == -1 || regnum == i)
552 {
5716833c 553 if (regs == NULL)
ed504bdf 554 {
5716833c 555 regcache_raw_supply (regcache, i, NULL);
ed504bdf
MK
556 continue;
557 }
932bb524 558
ed504bdf
MK
559 /* Most of the FPU control registers occupy only 16 bits in
560 the fxsave area. Give those a special treatment. */
20a6ec49
MD
561 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
562 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
ed504bdf 563 {
b4ad899f 564 gdb_byte val[4];
ed504bdf 565
20a6ec49 566 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
ed504bdf 567 val[2] = val[3] = 0;
20a6ec49 568 if (i == I387_FOP_REGNUM (tdep))
ed504bdf 569 val[1] &= ((1 << 3) - 1);
20a6ec49 570 else if (i== I387_FTAG_REGNUM (tdep))
ed504bdf
MK
571 {
572 /* The fxsave area contains a simplified version of
573 the tag word. We have to look at the actual 80-bit
574 FP data to recreate the traditional i387 tag word. */
575
576 unsigned long ftag = 0;
577 int fpreg;
578 int top;
579
20a6ec49
MD
580 top = ((FXSAVE_ADDR (tdep, regs,
581 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
5716833c 582 top &= 0x7;
ed504bdf
MK
583
584 for (fpreg = 7; fpreg >= 0; fpreg--)
585 {
586 int tag;
587
588 if (val[0] & (1 << fpreg))
589 {
6d5e094a
MS
590 int thisreg = (fpreg + 8 - top) % 8
591 + I387_ST0_REGNUM (tdep);
592 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
ed504bdf
MK
593 }
594 else
595 tag = 3; /* Empty */
596
597 ftag |= tag << (2 * fpreg);
598 }
599 val[0] = ftag & 0xff;
600 val[1] = (ftag >> 8) & 0xff;
601 }
5716833c 602 regcache_raw_supply (regcache, i, val);
ed504bdf
MK
603 }
604 else
20a6ec49 605 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
ed504bdf 606 }
5716833c 607
20a6ec49 608 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
5716833c
MK
609 {
610 if (regs == NULL)
20a6ec49 611 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
5716833c 612 else
20a6ec49 613 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
5716833c
MK
614 FXSAVE_MXCSR_ADDR (regs));
615 }
e750d25e
JT
616}
617
618/* Fill register REGNUM (if it is a floating-point or SSE register) in
80571bff
MK
619 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
620 all registers. This function doesn't touch any of the reserved
621 bits in *FXSAVE. */
e750d25e
JT
622
623void
80571bff 624i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
e750d25e 625{
e071d1f6 626 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
b4ad899f 627 gdb_byte *regs = fxsave;
5716833c
MK
628 int i;
629
630 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
631 gdb_assert (tdep->num_xmm_regs > 0);
dff95cc7 632
20a6ec49 633 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
e750d25e
JT
634 if (regnum == -1 || regnum == i)
635 {
636 /* Most of the FPU control registers occupy only 16 bits in
637 the fxsave area. Give those a special treatment. */
20a6ec49
MD
638 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
639 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
e750d25e 640 {
b4ad899f 641 gdb_byte buf[4];
e750d25e 642
5716833c 643 regcache_raw_collect (regcache, i, buf);
e750d25e 644
31aeac78
L
645 if (i == I387_FOP_REGNUM (tdep))
646 {
647 /* The opcode occupies only 11 bits. Make sure we
648 don't touch the other bits. */
649 buf[1] &= ((1 << 3) - 1);
650 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
651 }
652 else if (i == I387_FTAG_REGNUM (tdep))
653 {
654 /* Converting back is much easier. */
655
656 unsigned short ftag;
657 int fpreg;
658
659 ftag = (buf[1] << 8) | buf[0];
660 buf[0] = 0;
661 buf[1] = 0;
662
663 for (fpreg = 7; fpreg >= 0; fpreg--)
664 {
665 int tag = (ftag >> (fpreg * 2)) & 3;
666
667 if (tag != 3)
668 buf[0] |= (1 << fpreg);
669 }
670 }
671 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
672 }
673 else
674 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
675 }
676
677 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
678 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
679 FXSAVE_MXCSR_ADDR (regs));
680}
681
682/* `xstate_bv' is at byte offset 512. */
683#define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
684
685/* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
686 the upper 128bit of AVX register data structure used by the "xsave"
687 instruction where GDB register REGNUM is stored. */
688
689static int xsave_avxh_offset[] =
690{
691 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
692 576 + 1 * 16,
693 576 + 2 * 16,
694 576 + 3 * 16,
695 576 + 4 * 16,
696 576 + 5 * 16,
697 576 + 6 * 16,
698 576 + 7 * 16,
699 576 + 8 * 16,
700 576 + 9 * 16,
701 576 + 10 * 16,
702 576 + 11 * 16,
703 576 + 12 * 16,
704 576 + 13 * 16,
705 576 + 14 * 16,
706 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
707};
708
709#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
710 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
711
712/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
713
714void
715i387_supply_xsave (struct regcache *regcache, int regnum,
716 const void *xsave)
717{
718 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
719 const gdb_byte *regs = xsave;
720 int i;
721 unsigned int clear_bv;
722 const gdb_byte *p;
723 enum
724 {
725 none = 0x0,
726 x87 = 0x1,
727 sse = 0x2,
728 avxh = 0x4,
729 all = x87 | sse | avxh
730 } regclass;
731
732 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
733 gdb_assert (tdep->num_xmm_regs > 0);
734
735 if (regnum == -1)
736 regclass = all;
737 else if (regnum >= I387_YMM0H_REGNUM (tdep)
738 && regnum < I387_YMMENDH_REGNUM (tdep))
739 regclass = avxh;
740 else if (regnum >= I387_XMM0_REGNUM(tdep)
741 && regnum < I387_MXCSR_REGNUM (tdep))
742 regclass = sse;
743 else if (regnum >= I387_ST0_REGNUM (tdep)
744 && regnum < I387_FCTRL_REGNUM (tdep))
745 regclass = x87;
746 else
747 regclass = none;
748
749 if (regs != NULL && regclass != none)
750 {
751 /* Get `xstat_bv'. */
752 const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
753
754 /* The supported bits in `xstat_bv' are 1 byte. Clear part in
755 vector registers if its bit in xstat_bv is zero. */
756 clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
757 }
758 else
759 clear_bv = I386_XSTATE_AVX_MASK;
760
761 switch (regclass)
762 {
763 case none:
764 break;
765
766 case avxh:
767 if ((clear_bv & I386_XSTATE_AVX))
768 p = NULL;
769 else
770 p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
771 regcache_raw_supply (regcache, regnum, p);
772 return;
773
774 case sse:
775 if ((clear_bv & I386_XSTATE_SSE))
776 p = NULL;
777 else
778 p = FXSAVE_ADDR (tdep, regs, regnum);
779 regcache_raw_supply (regcache, regnum, p);
780 return;
781
782 case x87:
783 if ((clear_bv & I386_XSTATE_X87))
784 p = NULL;
785 else
786 p = FXSAVE_ADDR (tdep, regs, regnum);
787 regcache_raw_supply (regcache, regnum, p);
788 return;
789
790 case all:
791 /* Hanle the upper YMM registers. */
792 if ((tdep->xcr0 & I386_XSTATE_AVX))
793 {
794 if ((clear_bv & I386_XSTATE_AVX))
795 p = NULL;
796 else
797 p = regs;
798
799 for (i = I387_YMM0H_REGNUM (tdep);
800 i < I387_YMMENDH_REGNUM (tdep); i++)
801 {
802 if (p != NULL)
803 p = XSAVE_AVXH_ADDR (tdep, regs, i);
804 regcache_raw_supply (regcache, i, p);
805 }
806 }
807
808 /* Handle the XMM registers. */
809 if ((tdep->xcr0 & I386_XSTATE_SSE))
810 {
811 if ((clear_bv & I386_XSTATE_SSE))
812 p = NULL;
813 else
814 p = regs;
815
816 for (i = I387_XMM0_REGNUM (tdep);
817 i < I387_MXCSR_REGNUM (tdep); i++)
818 {
819 if (p != NULL)
820 p = FXSAVE_ADDR (tdep, regs, i);
821 regcache_raw_supply (regcache, i, p);
822 }
823 }
824
825 /* Handle the x87 registers. */
826 if ((tdep->xcr0 & I386_XSTATE_X87))
827 {
828 if ((clear_bv & I386_XSTATE_X87))
829 p = NULL;
830 else
831 p = regs;
832
833 for (i = I387_ST0_REGNUM (tdep);
834 i < I387_FCTRL_REGNUM (tdep); i++)
835 {
836 if (p != NULL)
837 p = FXSAVE_ADDR (tdep, regs, i);
838 regcache_raw_supply (regcache, i, p);
839 }
840 }
841 break;
842 }
843
844 /* Only handle x87 control registers. */
845 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
846 if (regnum == -1 || regnum == i)
847 {
848 if (regs == NULL)
849 {
850 regcache_raw_supply (regcache, i, NULL);
851 continue;
852 }
853
854 /* Most of the FPU control registers occupy only 16 bits in
855 the xsave extended state. Give those a special treatment. */
856 if (i != I387_FIOFF_REGNUM (tdep)
857 && i != I387_FOOFF_REGNUM (tdep))
858 {
859 gdb_byte val[4];
860
861 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
862 val[2] = val[3] = 0;
863 if (i == I387_FOP_REGNUM (tdep))
864 val[1] &= ((1 << 3) - 1);
865 else if (i== I387_FTAG_REGNUM (tdep))
866 {
867 /* The fxsave area contains a simplified version of
868 the tag word. We have to look at the actual 80-bit
869 FP data to recreate the traditional i387 tag word. */
870
871 unsigned long ftag = 0;
872 int fpreg;
873 int top;
874
875 top = ((FXSAVE_ADDR (tdep, regs,
876 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
877 top &= 0x7;
878
879 for (fpreg = 7; fpreg >= 0; fpreg--)
880 {
881 int tag;
882
883 if (val[0] & (1 << fpreg))
884 {
e5b3d7d6 885 int thisreg = (fpreg + 8 - top) % 8
31aeac78 886 + I387_ST0_REGNUM (tdep);
e5b3d7d6 887 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
31aeac78
L
888 }
889 else
890 tag = 3; /* Empty */
891
892 ftag |= tag << (2 * fpreg);
893 }
894 val[0] = ftag & 0xff;
895 val[1] = (ftag >> 8) & 0xff;
896 }
897 regcache_raw_supply (regcache, i, val);
898 }
899 else
900 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
901 }
902
903 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
904 {
905 p = regs == NULL ? NULL : FXSAVE_MXCSR_ADDR (regs);
906 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), p);
907 }
908}
909
910/* Similar to i387_collect_fxsave, but use XSAVE extended state. */
911
912void
913i387_collect_xsave (const struct regcache *regcache, int regnum,
914 void *xsave, int gcore)
915{
916 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
917 gdb_byte *regs = xsave;
918 int i;
919 enum
920 {
921 none = 0x0,
922 check = 0x1,
923 x87 = 0x2 | check,
924 sse = 0x4 | check,
925 avxh = 0x8 | check,
926 all = x87 | sse | avxh
927 } regclass;
928
929 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
930 gdb_assert (tdep->num_xmm_regs > 0);
931
932 if (regnum == -1)
933 regclass = all;
934 else if (regnum >= I387_YMM0H_REGNUM (tdep)
935 && regnum < I387_YMMENDH_REGNUM (tdep))
936 regclass = avxh;
937 else if (regnum >= I387_XMM0_REGNUM(tdep)
938 && regnum < I387_MXCSR_REGNUM (tdep))
939 regclass = sse;
940 else if (regnum >= I387_ST0_REGNUM (tdep)
941 && regnum < I387_FCTRL_REGNUM (tdep))
942 regclass = x87;
943 else
944 regclass = none;
945
946 if (gcore)
947 {
948 /* Clear XSAVE extended state. */
949 memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
950
951 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
952 if (tdep->xsave_xcr0_offset != -1)
953 memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8);
954 memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8);
955 }
956
957 if ((regclass & check))
958 {
959 gdb_byte raw[I386_MAX_REGISTER_SIZE];
960 gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
961 unsigned int xstate_bv = 0;
1777feb0 962 /* The supported bits in `xstat_bv' are 1 byte. */
31aeac78
L
963 unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
964 gdb_byte *p;
965
966 /* Clear register set if its bit in xstat_bv is zero. */
967 if (clear_bv)
968 {
969 if ((clear_bv & I386_XSTATE_AVX))
970 for (i = I387_YMM0H_REGNUM (tdep);
971 i < I387_YMMENDH_REGNUM (tdep); i++)
972 memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
973
974 if ((clear_bv & I386_XSTATE_SSE))
975 for (i = I387_XMM0_REGNUM (tdep);
976 i < I387_MXCSR_REGNUM (tdep); i++)
977 memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
978
979 if ((clear_bv & I386_XSTATE_X87))
980 for (i = I387_ST0_REGNUM (tdep);
981 i < I387_FCTRL_REGNUM (tdep); i++)
982 memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
983 }
984
985 if (regclass == all)
986 {
987 /* Check if any upper YMM registers are changed. */
988 if ((tdep->xcr0 & I386_XSTATE_AVX))
989 for (i = I387_YMM0H_REGNUM (tdep);
990 i < I387_YMMENDH_REGNUM (tdep); i++)
991 {
992 regcache_raw_collect (regcache, i, raw);
993 p = XSAVE_AVXH_ADDR (tdep, regs, i);
994 if (memcmp (raw, p, 16))
995 {
996 xstate_bv |= I386_XSTATE_AVX;
997 memcpy (p, raw, 16);
998 }
999 }
1000
1001 /* Check if any SSE registers are changed. */
1002 if ((tdep->xcr0 & I386_XSTATE_SSE))
1003 for (i = I387_XMM0_REGNUM (tdep);
1004 i < I387_MXCSR_REGNUM (tdep); i++)
1005 {
1006 regcache_raw_collect (regcache, i, raw);
1007 p = FXSAVE_ADDR (tdep, regs, i);
1008 if (memcmp (raw, p, 16))
1009 {
1010 xstate_bv |= I386_XSTATE_SSE;
1011 memcpy (p, raw, 16);
1012 }
1013 }
1014
1015 /* Check if any X87 registers are changed. */
1016 if ((tdep->xcr0 & I386_XSTATE_X87))
1017 for (i = I387_ST0_REGNUM (tdep);
1018 i < I387_FCTRL_REGNUM (tdep); i++)
1019 {
1020 regcache_raw_collect (regcache, i, raw);
1021 p = FXSAVE_ADDR (tdep, regs, i);
1022 if (memcmp (raw, p, 10))
1023 {
1024 xstate_bv |= I386_XSTATE_X87;
1025 memcpy (p, raw, 10);
1026 }
1027 }
1028 }
1029 else
1030 {
1031 /* Check if REGNUM is changed. */
1032 regcache_raw_collect (regcache, regnum, raw);
1033
1034 switch (regclass)
1035 {
1036 default:
4e4d8374
L
1037 internal_error (__FILE__, __LINE__,
1038 _("invalid i387 regclass"));
31aeac78 1039
40936b0d
L
1040 case avxh:
1041 /* This is an upper YMM register. */
1042 p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
1043 if (memcmp (raw, p, 16))
31aeac78 1044 {
40936b0d
L
1045 xstate_bv |= I386_XSTATE_AVX;
1046 memcpy (p, raw, 16);
1047 }
1048 break;
31aeac78 1049
40936b0d
L
1050 case sse:
1051 /* This is an SSE register. */
1052 p = FXSAVE_ADDR (tdep, regs, regnum);
1053 if (memcmp (raw, p, 16))
1054 {
1055 xstate_bv |= I386_XSTATE_SSE;
1056 memcpy (p, raw, 16);
1057 }
1058 break;
31aeac78 1059
40936b0d
L
1060 case x87:
1061 /* This is an x87 register. */
1062 p = FXSAVE_ADDR (tdep, regs, regnum);
1063 if (memcmp (raw, p, 10))
1064 {
1065 xstate_bv |= I386_XSTATE_X87;
1066 memcpy (p, raw, 10);
31aeac78 1067 }
40936b0d 1068 break;
31aeac78 1069 }
40936b0d
L
1070 }
1071
1072 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1073 registers are changed. */
1074 if (xstate_bv)
1075 {
1076 /* The supported bits in `xstat_bv' are 1 byte. */
1077 *xstate_bv_p |= (gdb_byte) xstate_bv;
1078
1079 switch (regclass)
31aeac78 1080 {
40936b0d 1081 default:
4e4d8374
L
1082 internal_error (__FILE__, __LINE__,
1083 _("invalid i387 regclass"));
40936b0d
L
1084
1085 case all:
1086 break;
1087
1088 case x87:
1089 case sse:
1090 case avxh:
1091 /* Register REGNUM has been updated. Return. */
1092 return;
31aeac78 1093 }
40936b0d
L
1094 }
1095 else
1096 {
1097 /* Return if REGNUM isn't changed. */
1098 if (regclass != all)
1099 return;
1100 }
31aeac78
L
1101 }
1102
1103 /* Only handle x87 control registers. */
1104 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
1105 if (regnum == -1 || regnum == i)
1106 {
1107 /* Most of the FPU control registers occupy only 16 bits in
1108 the xsave extended state. Give those a special treatment. */
1109 if (i != I387_FIOFF_REGNUM (tdep)
1110 && i != I387_FOOFF_REGNUM (tdep))
1111 {
1112 gdb_byte buf[4];
1113
1114 regcache_raw_collect (regcache, i, buf);
1115
20a6ec49 1116 if (i == I387_FOP_REGNUM (tdep))
e750d25e
JT
1117 {
1118 /* The opcode occupies only 11 bits. Make sure we
40936b0d 1119 don't touch the other bits. */
e750d25e 1120 buf[1] &= ((1 << 3) - 1);
20a6ec49 1121 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
e750d25e 1122 }
20a6ec49 1123 else if (i == I387_FTAG_REGNUM (tdep))
e750d25e
JT
1124 {
1125 /* Converting back is much easier. */
1126
1127 unsigned short ftag;
1128 int fpreg;
1129
1130 ftag = (buf[1] << 8) | buf[0];
1131 buf[0] = 0;
1132 buf[1] = 0;
1133
1134 for (fpreg = 7; fpreg >= 0; fpreg--)
1135 {
1136 int tag = (ftag >> (fpreg * 2)) & 3;
1137
1138 if (tag != 3)
1139 buf[0] |= (1 << fpreg);
1140 }
1141 }
20a6ec49 1142 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
e750d25e
JT
1143 }
1144 else
20a6ec49 1145 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
e750d25e 1146 }
5716833c 1147
20a6ec49
MD
1148 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
1149 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
5716833c 1150 FXSAVE_MXCSR_ADDR (regs));
e750d25e
JT
1151}
1152
1153/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1154 *RAW. */
1155
1156static int
b4ad899f 1157i387_tag (const gdb_byte *raw)
e750d25e
JT
1158{
1159 int integer;
1160 unsigned int exponent;
1161 unsigned long fraction[2];
1162
1163 integer = raw[7] & 0x80;
1164 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
1165 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
1166 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
1167 | (raw[5] << 8) | raw[4]);
1168
1169 if (exponent == 0x7fff)
1170 {
1171 /* Special. */
1172 return (2);
1173 }
1174 else if (exponent == 0x0000)
1175 {
1176 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
1177 {
1178 /* Zero. */
1179 return (1);
1180 }
1181 else
1182 {
1183 /* Special. */
1184 return (2);
1185 }
1186 }
1187 else
1188 {
1189 if (integer)
1190 {
1191 /* Valid. */
1192 return (0);
1193 }
1194 else
1195 {
1196 /* Special. */
1197 return (2);
1198 }
1199 }
1200}
efb1c01c
MK
1201
1202/* Prepare the FPU stack in REGCACHE for a function return. */
1203
1204void
1205i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
1206{
1207 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1208 ULONGEST fstat;
1209
efb1c01c
MK
1210 /* Set the top of the floating-point register stack to 7. The
1211 actual value doesn't really matter, but 7 is what a normal
1212 function return would end up with if the program started out with
1213 a freshly initialized FPU. */
20a6ec49 1214 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
efb1c01c 1215 fstat |= (7 << 11);
20a6ec49 1216 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
efb1c01c
MK
1217
1218 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1219 floating-point register stack to 7, the appropriate value for the
1220 tag word is 0x3fff. */
20a6ec49 1221 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
efb1c01c 1222
efb1c01c 1223}
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