projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
2001-07-15 H.J. Lu <hjl@gnu.org>
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
8e65ff28 2 Copyright 1999, 2000, 2001
16461d7d
KB		 3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
16461d7d
KB		 29
30#include "objfiles.h"
31#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 32#include "elf-bfd.h"
16461d7d 33
698cb3f0
KB		 34/* Hook for determining the global pointer when calling functions in
35 the inferior under AIX. The initialization code in ia64-aix-nat.c
36 sets this hook to the address of a function which will find the
37 global pointer for a given address.
38
39 The generic code which uses the dynamic section in the inferior for
40 finding the global pointer is not of much use on AIX since the
41 values obtained from the inferior have not been relocated. */
42
43CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
44
45/* An enumeration of the different IA-64 instruction types. */
46
16461d7d
KB		 47typedef enum instruction_type
48{
49 A, /* Integer ALU ; I-unit or M-unit */
50 I, /* Non-ALU integer; I-unit */
51 M, /* Memory ; M-unit */
52 F, /* Floating-point ; F-unit */
53 B, /* Branch ; B-unit */
54 L, /* Extended (L+X) ; I-unit */
55 X, /* Extended (L+X) ; I-unit */
56 undefined /* undefined or reserved */
57} instruction_type;
58
59/* We represent IA-64 PC addresses as the value of the instruction
60 pointer or'd with some bit combination in the low nibble which
61 represents the slot number in the bundle addressed by the
62 instruction pointer. The problem is that the Linux kernel
63 multiplies its slot numbers (for exceptions) by one while the
64 disassembler multiplies its slot numbers by 6. In addition, I've
65 heard it said that the simulator uses 1 as the multiplier.
66
67 I've fixed the disassembler so that the bytes_per_line field will
68 be the slot multiplier. If bytes_per_line comes in as zero, it
69 is set to six (which is how it was set up initially). -- objdump
70 displays pretty disassembly dumps with this value. For our purposes,
71 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
72 never want to also display the raw bytes the way objdump does. */
73
74#define SLOT_MULTIPLIER 1
75
76/* Length in bytes of an instruction bundle */
77
78#define BUNDLE_LEN 16
79
d7fa2ae2 80/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 81extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 82extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 83
16461d7d
KB		 84static gdbarch_init_ftype ia64_gdbarch_init;
85
86static gdbarch_register_name_ftype ia64_register_name;
87static gdbarch_register_raw_size_ftype ia64_register_raw_size;
88static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
89static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
90static gdbarch_register_byte_ftype ia64_register_byte;
91static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
92static gdbarch_frame_chain_ftype ia64_frame_chain;
93static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
94static gdbarch_skip_prologue_ftype ia64_skip_prologue;
95static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
96static gdbarch_get_saved_register_ftype ia64_get_saved_register;
97static gdbarch_extract_return_value_ftype ia64_extract_return_value;
98static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
99static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
100static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
101static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
102static gdbarch_store_return_value_ftype ia64_store_return_value;
103static gdbarch_store_struct_return_ftype ia64_store_struct_return;
104static gdbarch_push_arguments_ftype ia64_push_arguments;
105static gdbarch_push_return_address_ftype ia64_push_return_address;
106static gdbarch_pop_frame_ftype ia64_pop_frame;
107static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 108static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 109static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 110
111static int ia64_num_regs = 590;
112
113static int pc_regnum = IA64_IP_REGNUM;
114static int sp_regnum = IA64_GR12_REGNUM;
115static int fp_regnum = IA64_VFP_REGNUM;
116static int lr_regnum = IA64_VRAP_REGNUM;
117
118static LONGEST ia64_call_dummy_words[] = {0};
119
120/* Array of register names; There should be ia64_num_regs strings in
121 the initializer. */
122
123static char *ia64_register_names[] =
124{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
125 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
126 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
127 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
128 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
129 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
130 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
131 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
132 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
133 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
134 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
135 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
136 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
137 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
138 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
139 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
140
141 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
142 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
143 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
144 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
145 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
146 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
147 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
148 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
149 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
150 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
151 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
152 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
153 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
154 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
155 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
156 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
157
158 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
159 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
160 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
161 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
162 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
163 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
164 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
165 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
166
167 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
168
169 "vfp", "vrap",
170
171 "pr", "ip", "psr", "cfm",
172
173 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
174 "", "", "", "", "", "", "", "",
175 "rsc", "bsp", "bspstore", "rnat",
176 "", "fcr", "", "",
177 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
178 "ccv", "", "", "", "unat", "", "", "",
179 "fpsr", "", "", "", "itc",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "",
182 "pfs", "lc", "ec",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "",
190 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
191 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
192 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
193 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
194 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
195 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
196 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
197 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
198 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
199 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
200 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
201 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
202 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
203 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
204 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
205 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
206};
207
208struct frame_extra_info
244bc108
KB		 209 {
210 CORE_ADDR bsp; /* points at r32 for the current frame */
211 CORE_ADDR cfm; /* cfm value for current frame */
212 int sof; /* Size of frame (decoded from cfm value) */
213 int sol; /* Size of locals (decoded from cfm value) */
214 CORE_ADDR after_prologue;
215 /* Address of first instruction after the last
16461d7d
KB		 216 prologue instruction; Note that there may
217 be instructions from the function's body
218 intermingled with the prologue. */
244bc108
KB		 219 int mem_stack_frame_size;
220 /* Size of the memory stack frame (may be zero),
16461d7d 221 or -1 if it has not been determined yet. */
244bc108
KB		 222 int fp_reg; /* Register number (if any) used a frame pointer
223 for this frame. 0 if no register is being used
16461d7d 224 as the frame pointer. */
244bc108
KB		 225 };
226
227struct gdbarch_tdep
228 {
229 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 230 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB		 231 etc. */
232 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
233 /* OS specific function which, given a frame address
234 and register number, returns the offset to the
235 given register from the start of the frame. */
698cb3f0 236 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB		 237 };
238
698cb3f0
KB		 239#define SIGCONTEXT_REGISTER_ADDRESS \
240 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
241#define FIND_GLOBAL_POINTER \
242 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d
KB		 243
244static char *
245ia64_register_name (int reg)
246{
247 return ia64_register_names[reg];
248}
249
250int
251ia64_register_raw_size (int reg)
252{
253 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
254}
255
256int
257ia64_register_virtual_size (int reg)
258{
259 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
260}
261
262/* Return true iff register N's virtual format is different from
263 its raw format. */
264int
265ia64_register_convertible (int nr)
266{
267 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
268}
269
270const struct floatformat floatformat_ia64_ext =
271{
272 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
273 floatformat_intbit_yes
274};
275
276void
277ia64_register_convert_to_virtual (int regnum, struct type *type,
278 char *from, char *to)
279{
280 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
281 {
282 DOUBLEST val;
283 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
284 store_floating(to, TYPE_LENGTH(type), val);
285 }
286 else
287 error("ia64_register_convert_to_virtual called with non floating point register number");
288}
289
290void
291ia64_register_convert_to_raw (struct type *type, int regnum,
292 char *from, char *to)
293{
294 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
295 {
296 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
297 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
298 }
299 else
300 error("ia64_register_convert_to_raw called with non floating point register number");
301}
302
303struct type *
304ia64_register_virtual_type (int reg)
305{
306 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
307 return builtin_type_long_double;
308 else
309 return builtin_type_long;
310}
311
312int
313ia64_register_byte (int reg)
314{
315 return (8 * reg) +
316 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
317}
318
244bc108
KB		 319/* Read the given register from a sigcontext structure in the
320 specified frame. */
321
322static CORE_ADDR
323read_sigcontext_register (struct frame_info *frame, int regnum)
324{
325 CORE_ADDR regaddr;
326
327 if (frame == NULL)
8e65ff28
AC		 328 internal_error (__FILE__, __LINE__,
329 "read_sigcontext_register: NULL frame");
244bc108 330 if (!frame->signal_handler_caller)
8e65ff28
AC		 331 internal_error (__FILE__, __LINE__,
332 "read_sigcontext_register: frame not a signal_handler_caller");
244bc108 333 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC		 334 internal_error (__FILE__, __LINE__,
335 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108
KB		 336
337 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
338 if (regaddr)
339 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
340 else
8e65ff28
AC		 341 internal_error (__FILE__, __LINE__,
342 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
KB		 343}
344
16461d7d
KB		 345/* Extract ``len'' bits from an instruction bundle starting at
346 bit ``from''. */
347
244bc108 348static long long
16461d7d
KB		 349extract_bit_field (char *bundle, int from, int len)
350{
351 long long result = 0LL;
352 int to = from + len;
353 int from_byte = from / 8;
354 int to_byte = to / 8;
355 unsigned char *b = (unsigned char *) bundle;
356 unsigned char c;
357 int lshift;
358 int i;
359
360 c = b[from_byte];
361 if (from_byte == to_byte)
362 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
363 result = c >> (from % 8);
364 lshift = 8 - (from % 8);
365
366 for (i = from_byte+1; i < to_byte; i++)
367 {
368 result |= ((long long) b[i]) << lshift;
369 lshift += 8;
370 }
371
372 if (from_byte < to_byte && (to % 8 != 0))
373 {
374 c = b[to_byte];
375 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
376 result |= ((long long) c) << lshift;
377 }
378
379 return result;
380}
381
382/* Replace the specified bits in an instruction bundle */
383
244bc108 384static void
16461d7d
KB		 385replace_bit_field (char *bundle, long long val, int from, int len)
386{
387 int to = from + len;
388 int from_byte = from / 8;
389 int to_byte = to / 8;
390 unsigned char *b = (unsigned char *) bundle;
391 unsigned char c;
392
393 if (from_byte == to_byte)
394 {
395 unsigned char left, right;
396 c = b[from_byte];
397 left = (c >> (to % 8)) << (to % 8);
398 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
399 c = (unsigned char) (val & 0xff);
400 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
401 c |= right | left;
402 b[from_byte] = c;
403 }
404 else
405 {
406 int i;
407 c = b[from_byte];
408 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
409 c = c | (val << (from % 8));
410 b[from_byte] = c;
411 val >>= 8 - from % 8;
412
413 for (i = from_byte+1; i < to_byte; i++)
414 {
415 c = val & 0xff;
416 val >>= 8;
417 b[i] = c;
418 }
419
420 if (to % 8 != 0)
421 {
422 unsigned char cv = (unsigned char) val;
423 c = b[to_byte];
424 c = c >> (to % 8) << (to % 8);
425 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
426 b[to_byte] = c;
427 }
428 }
429}
430
431/* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
433
244bc108 434static long long
2fc3ac7e 435slotN_contents (char *bundle, int slotnum)
16461d7d
KB		 436{
437 return extract_bit_field (bundle, 5+41*slotnum, 41);
438}
439
440/* Store an instruction in an instruction bundle */
441
244bc108 442static void
2fc3ac7e 443replace_slotN_contents (char *bundle, long long instr, int slotnum)
16461d7d
KB		 444{
445 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
446}
447
64a5b29c 448static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 449{
450 { M, I, I }, /* 00 */
451 { M, I, I }, /* 01 */
452 { M, I, I }, /* 02 */
453 { M, I, I }, /* 03 */
454 { M, L, X }, /* 04 */
455 { M, L, X }, /* 05 */
456 { undefined, undefined, undefined }, /* 06 */
457 { undefined, undefined, undefined }, /* 07 */
458 { M, M, I }, /* 08 */
459 { M, M, I }, /* 09 */
460 { M, M, I }, /* 0A */
461 { M, M, I }, /* 0B */
462 { M, F, I }, /* 0C */
463 { M, F, I }, /* 0D */
464 { M, M, F }, /* 0E */
465 { M, M, F }, /* 0F */
466 { M, I, B }, /* 10 */
467 { M, I, B }, /* 11 */
468 { M, B, B }, /* 12 */
469 { M, B, B }, /* 13 */
470 { undefined, undefined, undefined }, /* 14 */
471 { undefined, undefined, undefined }, /* 15 */
472 { B, B, B }, /* 16 */
473 { B, B, B }, /* 17 */
474 { M, M, B }, /* 18 */
475 { M, M, B }, /* 19 */
476 { undefined, undefined, undefined }, /* 1A */
477 { undefined, undefined, undefined }, /* 1B */
478 { M, F, B }, /* 1C */
479 { M, F, B }, /* 1D */
480 { undefined, undefined, undefined }, /* 1E */
481 { undefined, undefined, undefined }, /* 1F */
482};
483
484/* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
486
487static CORE_ADDR
488fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
489{
490 char bundle[BUNDLE_LEN];
491 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
492 long long template;
493 int val;
494
c26e1c2b
KB		 495 /* Warn about slot numbers greater than 2. We used to generate
496 an error here on the assumption that the user entered an invalid
497 address. But, sometimes GDB itself requests an invalid address.
498 This can (easily) happen when execution stops in a function for
499 which there are no symbols. The prologue scanner will attempt to
500 find the beginning of the function - if the nearest symbol
501 happens to not be aligned on a bundle boundary (16 bytes), the
502 resulting starting address will cause GDB to think that the slot
503 number is too large.
504
505 So we warn about it and set the slot number to zero. It is
506 not necessarily a fatal condition, particularly if debugging
507 at the assembly language level. */
16461d7d 508 if (slotnum > 2)
c26e1c2b
KB		 509 {
510 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
511 "Using slot 0 instead");
512 slotnum = 0;
513 }
16461d7d
KB		 514
515 addr &= ~0x0f;
516
517 val = target_read_memory (addr, bundle, BUNDLE_LEN);
518
519 if (val != 0)
520 return 0;
521
522 *instr = slotN_contents (bundle, slotnum);
523 template = extract_bit_field (bundle, 0, 5);
524 *it = template_encoding_table[(int)template][slotnum];
525
64a5b29c 526 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 527 addr += 16;
528 else
529 addr += (slotnum + 1) * SLOT_MULTIPLIER;
530
531 return addr;
532}
533
534/* There are 5 different break instructions (break.i, break.b,
535 break.m, break.f, and break.x), but they all have the same
536 encoding. (The five bit template in the low five bits of the
537 instruction bundle distinguishes one from another.)
538
539 The runtime architecture manual specifies that break instructions
540 used for debugging purposes must have the upper two bits of the 21
541 bit immediate set to a 0 and a 1 respectively. A breakpoint
542 instruction encodes the most significant bit of its 21 bit
543 immediate at bit 36 of the 41 bit instruction. The penultimate msb
544 is at bit 25 which leads to the pattern below.
545
546 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
547 it turns out that 0x80000 was used as the syscall break in the early
548 simulators. So I changed the pattern slightly to do "break.i 0x080001"
549 instead. But that didn't work either (I later found out that this
550 pattern was used by the simulator that I was using.) So I ended up
551 using the pattern seen below. */
552
553#if 0
554#define BREAKPOINT 0x00002000040LL
555#endif
556#define BREAKPOINT 0x00003333300LL
557
558static int
559ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
560{
561 char bundle[BUNDLE_LEN];
562 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
563 long long instr;
564 int val;
565
566 if (slotnum > 2)
567 error("Can't insert breakpoint for slot numbers greater than 2.");
568
569 addr &= ~0x0f;
570
571 val = target_read_memory (addr, bundle, BUNDLE_LEN);
572 instr = slotN_contents (bundle, slotnum);
573 memcpy(contents_cache, &instr, sizeof(instr));
574 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
575 if (val == 0)
576 target_write_memory (addr, bundle, BUNDLE_LEN);
577
578 return val;
579}
580
581static int
582ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
583{
584 char bundle[BUNDLE_LEN];
585 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
586 long long instr;
587 int val;
588
589 addr &= ~0x0f;
590
591 val = target_read_memory (addr, bundle, BUNDLE_LEN);
592 memcpy (&instr, contents_cache, sizeof instr);
593 replace_slotN_contents (bundle, instr, slotnum);
594 if (val == 0)
595 target_write_memory (addr, bundle, BUNDLE_LEN);
596
597 return val;
598}
599
600/* We don't really want to use this, but remote.c needs to call it in order
601 to figure out if Z-packets are supported or not. Oh, well. */
602unsigned char *
fba45db2 603ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 604{
605 static unsigned char breakpoint[] =
606 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
607 *lenptr = sizeof (breakpoint);
608#if 0
609 *pcptr &= ~0x0f;
610#endif
611 return breakpoint;
612}
613
614CORE_ADDR
39f77062 615ia64_read_pc (ptid_t ptid)
16461d7d 616{
39f77062
KB		 617 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
618 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB		 619 int slot_num = (psr_value >> 41) & 3;
620
621 return pc_value | (slot_num * SLOT_MULTIPLIER);
622}
623
624void
39f77062 625ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB		 626{
627 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 628 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB		 629 psr_value &= ~(3LL << 41);
630 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
631
632 new_pc &= ~0xfLL;
633
39f77062
KB		 634 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
635 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB		 636}
637
638#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
639
640/* Returns the address of the slot that's NSLOTS slots away from
641 the address ADDR. NSLOTS may be positive or negative. */
642static CORE_ADDR
643rse_address_add(CORE_ADDR addr, int nslots)
644{
645 CORE_ADDR new_addr;
646 int mandatory_nat_slots = nslots / 63;
647 int direction = nslots < 0 ? -1 : 1;
648
649 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
650
651 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
652 new_addr += 8 * direction;
653
654 if (IS_NaT_COLLECTION_ADDR(new_addr))
655 new_addr += 8 * direction;
656
657 return new_addr;
658}
659
660/* The IA-64 frame chain is a bit odd. We won't always have a frame
661 pointer, so we use the SP value as the FP for the purpose of
662 creating a frame. There is sometimes a register (not fixed) which
663 is used as a frame pointer. When this register exists, it is not
664 especially hard to determine which one is being used. It isn't
665 even really hard to compute the frame chain, but it can be
666 computationally expensive. So, instead of making life difficult
667 (and slow), we pick a more convenient representation of the frame
668 chain, knowing that we'll have to make some small adjustments
669 in other places. (E.g, note that read_fp() and write_fp() are
670 actually read_sp() and write_sp() below in ia64_gdbarch_init()
671 below.)
672
673 Okay, so what is the frame chain exactly? It'll be the SP value
674 at the time that the function in question was entered.
675
676 Note that this *should* actually the frame pointer for the current
677 function! But as I note above, if we were to attempt to find the
678 address of the beginning of the previous frame, we'd waste a lot
679 of cycles for no good reason. So instead, we simply choose to
680 represent the frame chain as the end of the previous frame instead
681 of the beginning. */
682
683CORE_ADDR
684ia64_frame_chain (struct frame_info *frame)
685{
244bc108
KB		 686 if (frame->signal_handler_caller)
687 return read_sigcontext_register (frame, sp_regnum);
688 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
689 return frame->frame;
16461d7d 690 else
244bc108
KB		 691 {
692 FRAME_INIT_SAVED_REGS (frame);
693 if (frame->saved_regs[IA64_VFP_REGNUM])
694 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
695 else
696 return frame->frame + frame->extra_info->mem_stack_frame_size;
697 }
16461d7d
KB		 698}
699
700CORE_ADDR
701ia64_frame_saved_pc (struct frame_info *frame)
702{
244bc108
KB		 703 if (frame->signal_handler_caller)
704 return read_sigcontext_register (frame, pc_regnum);
705 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
706 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
707 else
708 {
709 FRAME_INIT_SAVED_REGS (frame);
16461d7d 710
244bc108
KB		 711 if (frame->saved_regs[IA64_VRAP_REGNUM])
712 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
713 else if (frame->next && frame->next->signal_handler_caller)
714 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
715 else /* either frameless, or not far enough along in the prologue... */
716 return ia64_saved_pc_after_call (frame);
717 }
16461d7d
KB		 718}
719
58ab00f9
KB		 720/* Limit the number of skipped non-prologue instructions since examining
721 of the prologue is expensive. */
722static int max_skip_non_prologue_insns = 10;
723
724/* Given PC representing the starting address of a function, and
725 LIM_PC which is the (sloppy) limit to which to scan when looking
726 for a prologue, attempt to further refine this limit by using
727 the line data in the symbol table. If successful, a better guess
728 on where the prologue ends is returned, otherwise the previous
729 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
730 which will be set to indicate whether the returned limit may be
731 used with no further scanning in the event that the function is
732 frameless. */
733
734static CORE_ADDR
735refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
736{
737 struct symtab_and_line prologue_sal;
738 CORE_ADDR start_pc = pc;
739
740 /* Start off not trusting the limit. */
741 *trust_limit = 0;
742
743 prologue_sal = find_pc_line (pc, 0);
744 if (prologue_sal.line != 0)
745 {
746 int i;
747 CORE_ADDR addr = prologue_sal.end;
748
749 /* Handle the case in which compiler's optimizer/scheduler
750 has moved instructions into the prologue. We scan ahead
751 in the function looking for address ranges whose corresponding
752 line number is less than or equal to the first one that we
753 found for the function. (It can be less than when the
754 scheduler puts a body instruction before the first prologue
755 instruction.) */
756 for (i = 2 * max_skip_non_prologue_insns;
757 i > 0 && (lim_pc == 0 || addr < lim_pc);
758 i--)
759 {
760 struct symtab_and_line sal;
761
762 sal = find_pc_line (addr, 0);
763 if (sal.line == 0)
764 break;
765 if (sal.line <= prologue_sal.line
766 && sal.symtab == prologue_sal.symtab)
767 {
768 prologue_sal = sal;
769 }
770 addr = sal.end;
771 }
772
773 if (lim_pc == 0 || prologue_sal.end < lim_pc)
774 {
775 lim_pc = prologue_sal.end;
776 if (start_pc == get_pc_function_start (lim_pc))
777 *trust_limit = 1;
778 }
779 }
780 return lim_pc;
781}
782
16461d7d
KB		 783#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
784 || (8 <= (_regnum_) && (_regnum_) <= 11) \
785 || (14 <= (_regnum_) && (_regnum_) <= 31))
786#define imm9(_instr_) \
787 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
788 | (((_instr_) & 0x00008000000LL) >> 20) \
789 | (((_instr_) & 0x00000001fc0LL) >> 6))
790
791static CORE_ADDR
792examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
793{
794 CORE_ADDR next_pc;
795 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 796 instruction_type it;
797 long long instr;
798 int do_fsr_stuff = 0;
799
800 int cfm_reg = 0;
801 int ret_reg = 0;
802 int fp_reg = 0;
803 int unat_save_reg = 0;
804 int pr_save_reg = 0;
805 int mem_stack_frame_size = 0;
806 int spill_reg = 0;
807 CORE_ADDR spill_addr = 0;
0927a22b
KB		 808 char instores[8];
809 char infpstores[8];
58ab00f9 810 int trust_limit;
0927a22b
KB		 811
812 memset (instores, 0, sizeof instores);
813 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 814
815 if (frame && !frame->saved_regs)
816 {
817 frame_saved_regs_zalloc (frame);
818 do_fsr_stuff = 1;
819 }
820
821 if (frame
822 && !do_fsr_stuff
823 && frame->extra_info->after_prologue != 0
824 && frame->extra_info->after_prologue <= lim_pc)
825 return frame->extra_info->after_prologue;
826
58ab00f9
KB		 827 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
828
16461d7d
KB		 829 /* Must start with an alloc instruction */
830 next_pc = fetch_instruction (pc, &it, &instr);
831 if (pc < lim_pc && next_pc
832 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
833 {
834 /* alloc */
835 int sor = (int) ((instr & 0x00078000000LL) >> 27);
836 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
837 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
838 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
839 we could compare against the size given to us via the cfm as
840 either a sanity check or possibly to see if the frame has been
841 changed by a later alloc instruction... */
842 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
843 cfm_reg = rN;
844 last_prologue_pc = next_pc;
845 pc = next_pc;
846 }
847 else
58ab00f9
KB		 848 {
849 pc = lim_pc; /* Frameless: We're done early. */
850 if (trust_limit)
851 last_prologue_pc = lim_pc;
852 }
16461d7d
KB		 853
854 /* Loop, looking for prologue instructions, keeping track of
855 where preserved registers were spilled. */
856 while (pc < lim_pc)
857 {
858 next_pc = fetch_instruction (pc, &it, &instr);
859 if (next_pc == 0)
860 break;
861
0927a22b
KB		 862 if (it == B || ((instr & 0x3fLL) != 0LL))
863 {
864 /* Exit loop upon hitting a branch instruction or a predicated
865 instruction. */
866 break;
867 }
868 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 869 {
870 /* Move from BR */
871 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
872 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
873 int qp = (int) (instr & 0x0000000003f);
874
875 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
876 {
877 ret_reg = rN;
878 last_prologue_pc = next_pc;
879 }
880 }
881 else if ((it == I || it == M)
882 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
883 {
884 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
885 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
886 | ((instr & 0x001f8000000LL) >> 20)
887 | ((instr & 0x000000fe000LL) >> 13));
888 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
889 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
890 int qp = (int) (instr & 0x0000000003fLL);
891
892 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
893 {
894 /* mov rN, r12 */
895 fp_reg = rN;
896 last_prologue_pc = next_pc;
897 }
898 else if (qp == 0 && rN == 12 && rM == 12)
899 {
900 /* adds r12, -mem_stack_frame_size, r12 */
901 mem_stack_frame_size -= imm;
902 last_prologue_pc = next_pc;
903 }
904 else if (qp == 0 && rN == 2
905 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
906 {
907 /* adds r2, spilloffset, rFramePointer
908 or
909 adds r2, spilloffset, r12
910
911 Get ready for stf.spill or st8.spill instructions.
912 The address to start spilling at is loaded into r2.
913 FIXME: Why r2? That's what gcc currently uses; it
914 could well be different for other compilers. */
915
916 /* Hmm... whether or not this will work will depend on
917 where the pc is. If it's still early in the prologue
918 this'll be wrong. FIXME */
919 spill_addr = (frame ? frame->frame : 0)
920 + (rM == 12 ? 0 : mem_stack_frame_size)
921 + imm;
922 spill_reg = rN;
923 last_prologue_pc = next_pc;
924 }
925 }
926 else if (it == M
927 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
928 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
929 {
930 /* stf.spill [rN] = fM, imm9
931 or
932 stf.spill [rN] = fM */
933
934 int imm = imm9(instr);
935 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
936 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
937 int qp = (int) (instr & 0x0000000003fLL);
938 if (qp == 0 && rN == spill_reg && spill_addr != 0
939 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
940 {
941 if (do_fsr_stuff)
942 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
943
944 if ((instr & 0x1efc0000000) == 0x0eec0000000)
945 spill_addr += imm;
946 else
947 spill_addr = 0; /* last one; must be done */
948 last_prologue_pc = next_pc;
949 }
950 }
951 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
952 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
953 {
954 /* mov.m rN = arM
955 or
956 mov.i rN = arM */
957
958 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
959 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
960 int qp = (int) (instr & 0x0000000003fLL);
961 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
962 {
963 /* We have something like "mov.m r3 = ar.unat". Remember the
964 r3 (or whatever) and watch for a store of this register... */
965 unat_save_reg = rN;
966 last_prologue_pc = next_pc;
967 }
968 }
969 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
970 {
971 /* mov rN = pr */
972 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
973 int qp = (int) (instr & 0x0000000003fLL);
974 if (qp == 0 && isScratch (rN))
975 {
976 pr_save_reg = rN;
977 last_prologue_pc = next_pc;
978 }
979 }
980 else if (it == M
981 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
982 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
983 {
984 /* st8 [rN] = rM
985 or
986 st8 [rN] = rM, imm9 */
987 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
988 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
989 int qp = (int) (instr & 0x0000000003fLL);
990 if (qp == 0 && rN == spill_reg && spill_addr != 0
991 && (rM == unat_save_reg || rM == pr_save_reg))
992 {
993 /* We've found a spill of either the UNAT register or the PR
994 register. (Well, not exactly; what we've actually found is
995 a spill of the register that UNAT or PR was moved to).
996 Record that fact and move on... */
997 if (rM == unat_save_reg)
998 {
999 /* Track UNAT register */
1000 if (do_fsr_stuff)
1001 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1002 unat_save_reg = 0;
1003 }
1004 else
1005 {
1006 /* Track PR register */
1007 if (do_fsr_stuff)
1008 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
1009 pr_save_reg = 0;
1010 }
1011 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1012 /* st8 [rN] = rM, imm9 */
1013 spill_addr += imm9(instr);
1014 else
1015 spill_addr = 0; /* must be done spilling */
1016 last_prologue_pc = next_pc;
1017 }
0927a22b
KB		 1018 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1019 {
1020 /* Allow up to one store of each input register. */
1021 instores[rM-32] = 1;
1022 last_prologue_pc = next_pc;
1023 }
1024 }
1025 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1026 {
1027 /* One of
1028 st1 [rN] = rM
1029 st2 [rN] = rM
1030 st4 [rN] = rM
1031 st8 [rN] = rM
1032 Note that the st8 case is handled in the clause above.
1033
1034 Advance over stores of input registers. One store per input
1035 register is permitted. */
1036 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1037 int qp = (int) (instr & 0x0000000003fLL);
1038 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1039 {
1040 instores[rM-32] = 1;
1041 last_prologue_pc = next_pc;
1042 }
1043 }
1044 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1045 {
1046 /* Either
1047 stfs [rN] = fM
1048 or
1049 stfd [rN] = fM
1050
1051 Advance over stores of floating point input registers. Again
1052 one store per register is permitted */
1053 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1054 int qp = (int) (instr & 0x0000000003fLL);
1055 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1056 {
1057 infpstores[fM-8] = 1;
1058 last_prologue_pc = next_pc;
1059 }
16461d7d
KB		 1060 }
1061 else if (it == M
1062 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1063 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1064 {
1065 /* st8.spill [rN] = rM
1066 or
1067 st8.spill [rN] = rM, imm9 */
1068 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1069 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1070 int qp = (int) (instr & 0x0000000003fLL);
1071 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1072 {
1073 /* We've found a spill of one of the preserved general purpose
1074 regs. Record the spill address and advance the spill
1075 register if appropriate. */
1076 if (do_fsr_stuff)
1077 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1078 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1079 /* st8.spill [rN] = rM, imm9 */
1080 spill_addr += imm9(instr);
1081 else
1082 spill_addr = 0; /* Done spilling */
1083 last_prologue_pc = next_pc;
1084 }
1085 }
16461d7d
KB		 1086
1087 pc = next_pc;
1088 }
1089
1090 if (do_fsr_stuff) {
1091 int i;
1092 CORE_ADDR addr;
3a854e23
KB		 1093 int sor, rrb_gr;
1094
1095 /* Extract the size of the rotating portion of the stack
1096 frame and the register rename base from the current
1097 frame marker. */
1098 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1099 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB		 1100
1101 for (i = 0, addr = frame->extra_info->bsp;
1102 i < frame->extra_info->sof;
1103 i++, addr += 8)
1104 {
1105 if (IS_NaT_COLLECTION_ADDR (addr))
1106 {
1107 addr += 8;
1108 }
3a854e23
KB		 1109 if (i < sor)
1110 frame->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1111 = addr;
1112 else
1113 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB		 1114
1115 if (i+32 == cfm_reg)
1116 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1117 if (i+32 == ret_reg)
1118 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1119 if (i+32 == fp_reg)
1120 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1121 }
1122 }
1123
1124 if (frame && frame->extra_info) {
1125 frame->extra_info->after_prologue = last_prologue_pc;
1126 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1127 frame->extra_info->fp_reg = fp_reg;
1128 }
1129
1130 return last_prologue_pc;
1131}
1132
1133CORE_ADDR
1134ia64_skip_prologue (CORE_ADDR pc)
1135{
1136 return examine_prologue (pc, pc+1024, 0);
1137}
1138
1139void
1140ia64_frame_init_saved_regs (struct frame_info *frame)
1141{
16461d7d
KB		 1142 if (frame->saved_regs)
1143 return;
1144
244bc108
KB		 1145 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1146 {
1147 int regno;
16461d7d 1148
244bc108 1149 frame_saved_regs_zalloc (frame);
16461d7d 1150
244bc108
KB		 1151 frame->saved_regs[IA64_VRAP_REGNUM] =
1152 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1153 frame->saved_regs[IA64_CFM_REGNUM] =
1154 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1155 frame->saved_regs[IA64_PSR_REGNUM] =
1156 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1157#if 0
1158 frame->saved_regs[IA64_BSP_REGNUM] =
1159 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1160#endif
1161 frame->saved_regs[IA64_RNAT_REGNUM] =
1162 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1163 frame->saved_regs[IA64_CCV_REGNUM] =
1164 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1165 frame->saved_regs[IA64_UNAT_REGNUM] =
1166 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1167 frame->saved_regs[IA64_FPSR_REGNUM] =
1168 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1169 frame->saved_regs[IA64_PFS_REGNUM] =
1170 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1171 frame->saved_regs[IA64_LC_REGNUM] =
1172 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1173 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1174 if (regno != sp_regnum)
1175 frame->saved_regs[regno] =
1176 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1177 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1178 frame->saved_regs[regno] =
1179 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1180 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1181 frame->saved_regs[regno] =
1182 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1183 }
1184 else
1185 {
244bc108 1186 CORE_ADDR func_start;
16461d7d 1187
244bc108
KB		 1188 func_start = get_pc_function_start (frame->pc);
1189 examine_prologue (func_start, frame->pc, frame);
1190 }
16461d7d
KB		 1191}
1192
1193void
1194ia64_get_saved_register (char *raw_buffer,
1195 int *optimized,
1196 CORE_ADDR *addrp,
1197 struct frame_info *frame,
1198 int regnum,
1199 enum lval_type *lval)
1200{
244bc108 1201 int is_dummy_frame;
16461d7d
KB		 1202
1203 if (!target_has_registers)
1204 error ("No registers.");
1205
1206 if (optimized != NULL)
1207 *optimized = 0;
244bc108
KB		 1208
1209 if (addrp != NULL)
1210 *addrp = 0;
1211
1212 if (lval != NULL)
1213 *lval = not_lval;
1214
1215 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1216
1217 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1218 {
1219 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1220 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1221 }
1222 else if (regnum == IA64_BSP_REGNUM)
1223 {
16461d7d
KB		 1224 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1225 frame->extra_info->bsp);
1226 }
1227 else if (regnum == IA64_VFP_REGNUM)
1228 {
1229 /* If the function in question uses an automatic register (r32-r127)
1230 for the frame pointer, it'll be found by ia64_find_saved_register()
1231 above. If the function lacks one of these frame pointers, we can
1232 still provide a value since we know the size of the frame */
1233 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1234 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1235 }
1236 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1237 {
2fc3ac7e 1238 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB		 1239 int pr_optim;
1240 enum lval_type pr_lval;
1241 CORE_ADDR pr_addr;
1242 int prN_val;
1243 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1244 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB		 1245 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1246 {
1247 /* Fetch predicate register rename base from current frame
1248 marker for this frame. */
1249 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1250
1251 /* Adjust the register number to account for register rotation. */
1252 regnum = IA64_PR16_REGNUM
1253 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1254 }
16461d7d
KB		 1255 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1256 regnum - IA64_PR0_REGNUM, 1);
1257 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1258 }
1259 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1260 {
2fc3ac7e 1261 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB		 1262 int unat_optim;
1263 enum lval_type unat_lval;
1264 CORE_ADDR unat_addr;
1265 int unatN_val;
1266 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1267 frame, IA64_UNAT_REGNUM, &unat_lval);
1268 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1269 regnum - IA64_NAT0_REGNUM, 1);
1270 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1271 unatN_val);
16461d7d
KB		 1272 }
1273 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1274 {
1275 int natval = 0;
1276 /* Find address of general register corresponding to nat bit we're
1277 interested in. */
244bc108
KB		 1278 CORE_ADDR gr_addr = 0;
1279
1280 if (!is_dummy_frame)
1281 {
1282 FRAME_INIT_SAVED_REGS (frame);
1283 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1284 + IA64_GR0_REGNUM];
1285 }
16461d7d
KB		 1286 if (gr_addr)
1287 {
1288 /* Compute address of nat collection bits */
1289 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1290 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1291 CORE_ADDR nat_collection;
1292 int nat_bit;
1293 /* If our nat collection address is bigger than bsp, we have to get
1294 the nat collection from rnat. Otherwise, we fetch the nat
1295 collection from the computed address. */
1296 if (nat_addr >= bsp)
1297 nat_collection = read_register (IA64_RNAT_REGNUM);
1298 else
1299 nat_collection = read_memory_integer (nat_addr, 8);
1300 nat_bit = (gr_addr >> 3) & 0x3f;
1301 natval = (nat_collection >> nat_bit) & 1;
1302 }
1303 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1304 }
1305 else if (regnum == IA64_IP_REGNUM)
1306 {
1307 CORE_ADDR pc;
1308 if (frame->next)
1309 {
1310 /* FIXME: Set *addrp, *lval when possible. */
1311 pc = ia64_frame_saved_pc (frame->next);
1312 }
1313 else
1314 {
1315 pc = read_pc ();
1316 }
1317 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1318 }
1319 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1320 {
1321 CORE_ADDR addr = 0;
1322 if (!is_dummy_frame)
1323 {
1324 FRAME_INIT_SAVED_REGS (frame);
1325 addr = frame->saved_regs[regnum];
1326 }
1327
1328 if (addr != 0)
1329 {
1330 if (lval != NULL)
1331 *lval = lval_memory;
1332 if (addrp != NULL)
1333 *addrp = addr;
1334 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1335 }
1336 else
1337 {
1338 /* r32 - r127 must be fetchable via memory. If they aren't,
1339 then the register is unavailable */
1340 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1341 }
16461d7d
KB		 1342 }
1343 else
1344 {
3a854e23
KB		 1345 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1346 {
1347 /* Fetch floating point register rename base from current
1348 frame marker for this frame. */
1349 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1350
1351 /* Adjust the floating point register number to account for
1352 register rotation. */
1353 regnum = IA64_FR32_REGNUM
1354 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1355 }
1356
244bc108
KB		 1357 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1358 regnum, lval);
16461d7d 1359 }
16461d7d
KB		 1360}
1361
1362/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1363 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1364 and TYPE is the type (which is known to be struct, union or array). */
1365int
1366ia64_use_struct_convention (int gcc_p, struct type *type)
1367{
64a5b29c
KB		 1368 struct type *float_elt_type;
1369
1370 /* HFAs are structures (or arrays) consisting entirely of floating
1371 point values of the same length. Up to 8 of these are returned
1372 in registers. Don't use the struct convention when this is the
1373 case. */
1374 float_elt_type = is_float_or_hfa_type (type);
1375 if (float_elt_type != NULL
1376 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1377 return 0;
1378
1379 /* Other structs of length 32 or less are returned in r8-r11.
1380 Don't use the struct convention for those either. */
16461d7d
KB		 1381 return TYPE_LENGTH (type) > 32;
1382}
1383
1384void
1385ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1386{
64a5b29c
KB		 1387 struct type *float_elt_type;
1388
1389 float_elt_type = is_float_or_hfa_type (type);
1390 if (float_elt_type != NULL)
1391 {
1392 int offset = 0;
1393 int regnum = IA64_FR8_REGNUM;
1394 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1395
1396 while (n-- > 0)
1397 {
1398 ia64_register_convert_to_virtual (regnum, float_elt_type,
1399 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1400 offset += TYPE_LENGTH (float_elt_type);
1401 regnum++;
1402 }
1403 }
16461d7d 1404 else
64a5b29c
KB		 1405 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1406 TYPE_LENGTH (type));
16461d7d
KB		 1407}
1408
1409/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1410 like this is necessary though since the IA-64 calling conventions specify
1411 that r8 is not preserved. */
1412static CORE_ADDR struct_return_address;
1413
1414CORE_ADDR
1415ia64_extract_struct_value_address (char *regbuf)
1416{
1417 /* FIXME: See above. */
1418 return struct_return_address;
1419}
1420
1421void
1422ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1423{
1424 /* FIXME: See above. */
1425 /* Note that most of the work was done in ia64_push_arguments() */
1426 struct_return_address = addr;
1427}
1428
1429int
1430ia64_frameless_function_invocation (struct frame_info *frame)
1431{
fbad0893
KB		 1432 FRAME_INIT_SAVED_REGS (frame);
1433 return (frame->extra_info->mem_stack_frame_size == 0);
16461d7d
KB		 1434}
1435
1436CORE_ADDR
1437ia64_saved_pc_after_call (struct frame_info *frame)
1438{
1439 return read_register (IA64_BR0_REGNUM);
1440}
1441
1442CORE_ADDR
1443ia64_frame_args_address (struct frame_info *frame)
1444{
1445 /* frame->frame points at the SP for this frame; But we want the start
1446 of the frame, not the end. Calling frame chain will get his for us. */
1447 return ia64_frame_chain (frame);
1448}
1449
1450CORE_ADDR
1451ia64_frame_locals_address (struct frame_info *frame)
1452{
1453 /* frame->frame points at the SP for this frame; But we want the start
1454 of the frame, not the end. Calling frame chain will get his for us. */
1455 return ia64_frame_chain (frame);
1456}
1457
1458void
1459ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1460{
1461 CORE_ADDR bsp, cfm;
244bc108
KB		 1462 int next_frame_is_call_dummy = ((frame->next != NULL)
1463 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1464 frame->next->frame));
16461d7d
KB		 1465
1466 frame->extra_info = (struct frame_extra_info *)
1467 frame_obstack_alloc (sizeof (struct frame_extra_info));
1468
1469 if (frame->next == 0)
1470 {
1471 bsp = read_register (IA64_BSP_REGNUM);
1472 cfm = read_register (IA64_CFM_REGNUM);
1473
1474 }
244bc108
KB		 1475 else if (frame->next->signal_handler_caller)
1476 {
1477 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1478 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1479 }
1480 else if (next_frame_is_call_dummy)
1481 {
1482 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1483 IA64_BSP_REGNUM);
1484 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1485 IA64_CFM_REGNUM);
1486 }
16461d7d
KB		 1487 else
1488 {
1489 struct frame_info *frn = frame->next;
16461d7d
KB		 1490
1491 FRAME_INIT_SAVED_REGS (frn);
1492
1493 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1494 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1495 else if (frn->next && frn->next->signal_handler_caller)
1496 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1497 else if (frn->next
1498 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1499 frn->next->frame))
1500 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1501 IA64_PFS_REGNUM);
16461d7d 1502 else
76d689a6 1503 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1504
1505 bsp = frn->extra_info->bsp;
1506 }
1507 frame->extra_info->cfm = cfm;
1508 frame->extra_info->sof = cfm & 0x7f;
1509 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1510 if (frame->next == 0
1511 || frame->next->signal_handler_caller
1512 || next_frame_is_call_dummy)
16461d7d
KB		 1513 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1514 else
1515 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1516
1517 frame->extra_info->after_prologue = 0;
1518 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1519 frame->extra_info->fp_reg = 0;
1520}
1521
64a5b29c
KB		 1522static int
1523is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1524{
1525 switch (TYPE_CODE (t))
1526 {
1527 case TYPE_CODE_FLT:
1528 if (*etp)
1529 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1530 else
1531 {
1532 *etp = t;
1533 return 1;
1534 }
1535 break;
1536 case TYPE_CODE_ARRAY:
98f96ba1
KB		 1537 return
1538 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1539 etp);
64a5b29c
KB		 1540 break;
1541 case TYPE_CODE_STRUCT:
1542 {
1543 int i;
1544
1545 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB		 1546 if (!is_float_or_hfa_type_recurse
1547 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB		 1548 return 0;
1549 return 1;
1550 }
1551 break;
1552 default:
1553 return 0;
1554 break;
1555 }
1556}
1557
1558/* Determine if the given type is one of the floating point types or
1559 and HFA (which is a struct, array, or combination thereof whose
1560 bottom-most elements are all of the same floating point type.) */
1561
1562static struct type *
1563is_float_or_hfa_type (struct type *t)
1564{
1565 struct type *et = 0;
1566
1567 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1568}
1569
1570
98f96ba1
KB		 1571/* Return 1 if the alignment of T is such that the next even slot
1572 should be used. Return 0, if the next available slot should
1573 be used. (See section 8.5.1 of the IA-64 Software Conventions
1574 and Runtime manual.) */
1575
1576static int
1577slot_alignment_is_next_even (struct type *t)
1578{
1579 switch (TYPE_CODE (t))
1580 {
1581 case TYPE_CODE_INT:
1582 case TYPE_CODE_FLT:
1583 if (TYPE_LENGTH (t) > 8)
1584 return 1;
1585 else
1586 return 0;
1587 case TYPE_CODE_ARRAY:
1588 return
1589 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1590 case TYPE_CODE_STRUCT:
1591 {
1592 int i;
1593
1594 for (i = 0; i < TYPE_NFIELDS (t); i++)
1595 if (slot_alignment_is_next_even
1596 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1597 return 1;
1598 return 0;
1599 }
1600 default:
1601 return 0;
1602 }
1603}
1604
64a5b29c
KB		 1605/* Attempt to find (and return) the global pointer for the given
1606 function.
1607
1608 This is a rather nasty bit of code searchs for the .dynamic section
1609 in the objfile corresponding to the pc of the function we're trying
1610 to call. Once it finds the addresses at which the .dynamic section
1611 lives in the child process, it scans the Elf64_Dyn entries for a
1612 DT_PLTGOT tag. If it finds one of these, the corresponding
1613 d_un.d_ptr value is the global pointer. */
1614
1615static CORE_ADDR
698cb3f0 1616generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1617{
76d689a6 1618 struct obj_section *faddr_sect;
64a5b29c 1619
76d689a6
KB		 1620 faddr_sect = find_pc_section (faddr);
1621 if (faddr_sect != NULL)
64a5b29c
KB		 1622 {
1623 struct obj_section *osect;
1624
76d689a6 1625 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1626 {
1627 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1628 break;
1629 }
1630
76d689a6 1631 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1632 {
1633 CORE_ADDR addr;
1634
1635 addr = osect->addr;
1636 while (addr < osect->endaddr)
1637 {
1638 int status;
1639 LONGEST tag;
1640 char buf[8];
1641
1642 status = target_read_memory (addr, buf, sizeof (buf));
1643 if (status != 0)
1644 break;
1645 tag = extract_signed_integer (buf, sizeof (buf));
1646
1647 if (tag == DT_PLTGOT)
1648 {
1649 CORE_ADDR global_pointer;
1650
1651 status = target_read_memory (addr + 8, buf, sizeof (buf));
1652 if (status != 0)
1653 break;
1654 global_pointer = extract_address (buf, sizeof (buf));
1655
1656 /* The payoff... */
1657 return global_pointer;
1658 }
1659
1660 if (tag == DT_NULL)
1661 break;
1662
1663 addr += 16;
1664 }
1665 }
1666 }
1667 return 0;
1668}
1669
1670/* Given a function's address, attempt to find (and return) the
1671 corresponding (canonical) function descriptor. Return 0 if
1672 not found. */
1673static CORE_ADDR
1674find_extant_func_descr (CORE_ADDR faddr)
1675{
76d689a6 1676 struct obj_section *faddr_sect;
64a5b29c
KB		 1677
1678 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1679 faddr_sect = find_pc_section (faddr);
1680 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1681 return faddr;
1682
76d689a6 1683 if (faddr_sect != NULL)
64a5b29c 1684 {
76d689a6
KB		 1685 struct obj_section *osect;
1686 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1687 {
1688 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1689 break;
1690 }
1691
76d689a6 1692 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1693 {
1694 CORE_ADDR addr;
1695
1696 addr = osect->addr;
1697 while (addr < osect->endaddr)
1698 {
1699 int status;
1700 LONGEST faddr2;
1701 char buf[8];
1702
1703 status = target_read_memory (addr, buf, sizeof (buf));
1704 if (status != 0)
1705 break;
1706 faddr2 = extract_signed_integer (buf, sizeof (buf));
1707
1708 if (faddr == faddr2)
1709 return addr;
1710
1711 addr += 16;
1712 }
1713 }
1714 }
1715 return 0;
1716}
1717
1718/* Attempt to find a function descriptor corresponding to the
1719 given address. If none is found, construct one on the
1720 stack using the address at fdaptr */
1721
1722static CORE_ADDR
1723find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1724{
1725 CORE_ADDR fdesc;
1726
1727 fdesc = find_extant_func_descr (faddr);
1728
1729 if (fdesc == 0)
1730 {
1731 CORE_ADDR global_pointer;
1732 char buf[16];
1733
1734 fdesc = *fdaptr;
1735 *fdaptr += 16;
1736
698cb3f0 1737 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB		 1738
1739 if (global_pointer == 0)
1740 global_pointer = read_register (IA64_GR1_REGNUM);
1741
1742 store_address (buf, 8, faddr);
1743 store_address (buf + 8, 8, global_pointer);
1744
1745 write_memory (fdesc, buf, 16);
1746 }
1747
1748 return fdesc;
1749}
16461d7d
KB		 1750
1751CORE_ADDR
1752ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1753 int struct_return, CORE_ADDR struct_addr)
1754{
1755 int argno;
1756 value_ptr arg;
1757 struct type *type;
1758 int len, argoffset;
64a5b29c 1759 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1760 int floatreg;
64a5b29c 1761 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1762
1763 nslots = 0;
64a5b29c 1764 nfuncargs = 0;
16461d7d
KB		 1765 /* Count the number of slots needed for the arguments */
1766 for (argno = 0; argno < nargs; argno++)
1767 {
1768 arg = args[argno];
1769 type = check_typedef (VALUE_TYPE (arg));
1770 len = TYPE_LENGTH (type);
1771
98f96ba1 1772 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB		 1773 nslots++;
1774
64a5b29c
KB		 1775 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1776 nfuncargs++;
1777
16461d7d
KB		 1778 nslots += (len + 7) / 8;
1779 }
1780
64a5b29c 1781 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1782 rseslots = (nslots > 8) ? 8 : nslots;
1783 memslots = nslots - rseslots;
1784
64a5b29c 1785 /* Allocate a new RSE frame */
16461d7d
KB		 1786 cfm = read_register (IA64_CFM_REGNUM);
1787
1788 bsp = read_register (IA64_BSP_REGNUM);
1789 bsp = rse_address_add (bsp, cfm & 0x7f);
1790 new_bsp = rse_address_add (bsp, rseslots);
1791 write_register (IA64_BSP_REGNUM, new_bsp);
1792
1793 pfs = read_register (IA64_PFS_REGNUM);
1794 pfs &= 0xc000000000000000LL;
1795 pfs |= (cfm & 0xffffffffffffLL);
1796 write_register (IA64_PFS_REGNUM, pfs);
1797
1798 cfm &= 0xc000000000000000LL;
1799 cfm |= rseslots;
1800 write_register (IA64_CFM_REGNUM, cfm);
1801
64a5b29c
KB		 1802 /* We will attempt to find function descriptors in the .opd segment,
1803 but if we can't we'll construct them ourselves. That being the
1804 case, we'll need to reserve space on the stack for them. */
1805 funcdescaddr = sp - nfuncargs * 16;
1806 funcdescaddr &= ~0xfLL;
1807
1808 /* Adjust the stack pointer to it's new value. The calling conventions
1809 require us to have 16 bytes of scratch, plus whatever space is
1810 necessary for the memory slots and our function descriptors */
1811 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1812 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1813
64a5b29c
KB		 1814 /* Place the arguments where they belong. The arguments will be
1815 either placed in the RSE backing store or on the memory stack.
1816 In addition, floating point arguments or HFAs are placed in
1817 floating point registers. */
16461d7d
KB		 1818 slotnum = 0;
1819 floatreg = IA64_FR8_REGNUM;
1820 for (argno = 0; argno < nargs; argno++)
1821 {
64a5b29c
KB		 1822 struct type *float_elt_type;
1823
16461d7d
KB		 1824 arg = args[argno];
1825 type = check_typedef (VALUE_TYPE (arg));
1826 len = TYPE_LENGTH (type);
64a5b29c
KB		 1827
1828 /* Special handling for function parameters */
1829 if (len == 8
1830 && TYPE_CODE (type) == TYPE_CODE_PTR
1831 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1832 {
1833 char val_buf[8];
1834
1835 store_address (val_buf, 8,
1836 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1837 &funcdescaddr));
1838 if (slotnum < rseslots)
1839 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1840 else
1841 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1842 slotnum++;
1843 continue;
1844 }
1845
1846 /* Normal slots */
98f96ba1
KB		 1847
1848 /* Skip odd slot if necessary... */
1849 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1850 slotnum++;
98f96ba1 1851
16461d7d
KB		 1852 argoffset = 0;
1853 while (len > 0)
1854 {
1855 char val_buf[8];
1856
1857 memset (val_buf, 0, 8);
1858 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1859
1860 if (slotnum < rseslots)
1861 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1862 else
1863 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1864
1865 argoffset += 8;
1866 len -= 8;
1867 slotnum++;
1868 }
64a5b29c
KB		 1869
1870 /* Handle floating point types (including HFAs) */
1871 float_elt_type = is_float_or_hfa_type (type);
1872 if (float_elt_type != NULL)
1873 {
1874 argoffset = 0;
1875 len = TYPE_LENGTH (type);
1876 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1877 {
1878 ia64_register_convert_to_raw (
1879 float_elt_type,
1880 floatreg,
1881 VALUE_CONTENTS (arg) + argoffset,
1882 &registers[REGISTER_BYTE (floatreg)]);
1883 floatreg++;
1884 argoffset += TYPE_LENGTH (float_elt_type);
1885 len -= TYPE_LENGTH (float_elt_type);
1886 }
16461d7d
KB		 1887 }
1888 }
1889
64a5b29c 1890 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1891 if (struct_return)
1892 {
1893 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1894 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1895 struct_addr);
1896 }
1897
64a5b29c 1898 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1899 target_store_registers (-1);
1900
1901 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1902 to be defined to call generic_save_dummy_frame_tos(). But at the
1903 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1904 I chose to put this call here instead of using the old mechanisms.
1905 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1906 line
1907
1908 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1909
1910 to ia64_gdbarch_init() and remove the line below. */
1911 generic_save_dummy_frame_tos (sp);
1912
1913 return sp;
1914}
1915
1916CORE_ADDR
1917ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1918{
698cb3f0 1919 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1920
64a5b29c
KB		 1921 if (global_pointer != 0)
1922 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1923
1924 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1925 return sp;
1926}
1927
1928void
1929ia64_store_return_value (struct type *type, char *valbuf)
1930{
1931 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1932 {
1933 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1934 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1935 target_store_registers (IA64_FR8_REGNUM);
1936 }
1937 else
1938 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1939 valbuf, TYPE_LENGTH (type));
1940}
1941
1942void
1943ia64_pop_frame (void)
1944{
1945 generic_pop_current_frame (ia64_pop_frame_regular);
1946}
1947
1948static void
1949ia64_pop_frame_regular (struct frame_info *frame)
1950{
1951 int regno;
1952 CORE_ADDR bsp, cfm, pfs;
1953
1954 FRAME_INIT_SAVED_REGS (frame);
1955
1956 for (regno = 0; regno < ia64_num_regs; regno++)
1957 {
1958 if (frame->saved_regs[regno]
1959 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1960 && regno != pc_regnum
1961 && regno != sp_regnum
1962 && regno != IA64_PFS_REGNUM
1963 && regno != IA64_CFM_REGNUM
1964 && regno != IA64_BSP_REGNUM
1965 && regno != IA64_BSPSTORE_REGNUM)
1966 {
1967 write_register (regno,
1968 read_memory_integer (frame->saved_regs[regno],
1969 REGISTER_RAW_SIZE (regno)));
1970 }
1971 }
1972
1973 write_register (sp_regnum, FRAME_CHAIN (frame));
1974 write_pc (FRAME_SAVED_PC (frame));
1975
1976 cfm = read_register (IA64_CFM_REGNUM);
1977
1978 if (frame->saved_regs[IA64_PFS_REGNUM])
1979 {
1980 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1981 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1982 }
1983 else
1984 pfs = read_register (IA64_PFS_REGNUM);
1985
1986 /* Compute the new bsp by *adding* the difference between the
1987 size of the frame and the size of the locals (both wrt the
1988 frame that we're going back to). This seems kind of strange,
1989 especially since it seems like we ought to be subtracting the
1990 size of the locals... and we should; but the linux kernel
1991 wants bsp to be set at the end of all used registers. It's
1992 likely that this code will need to be revised to accomodate
1993 other operating systems. */
1994 bsp = rse_address_add (frame->extra_info->bsp,
1995 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1996 write_register (IA64_BSP_REGNUM, bsp);
1997
1998 /* FIXME: What becomes of the epilog count in the PFS? */
1999 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2000 write_register (IA64_CFM_REGNUM, cfm);
2001
2002 flush_cached_frames ();
2003}
2004
2005static void
2006ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2007 CORE_ADDR *targ_addr, int *targ_len)
2008{
2009 *targ_addr = memaddr;
2010 *targ_len = nr_bytes;
2011}
2012
244bc108
KB		 2013static void
2014process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2015{
2016 int *os_ident_ptr = obj;
2017 const char *name;
2018 unsigned int sectsize;
2019
2020 name = bfd_get_section_name (abfd, sect);
2021 sectsize = bfd_section_size (abfd, sect);
2022 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2023 {
2024 unsigned int name_length, data_length, note_type;
2025 char *note = alloca (sectsize);
2026
2027 bfd_get_section_contents (abfd, sect, note,
2028 (file_ptr) 0, (bfd_size_type) sectsize);
2029
2030 name_length = bfd_h_get_32 (abfd, note);
2031 data_length = bfd_h_get_32 (abfd, note + 4);
2032 note_type = bfd_h_get_32 (abfd, note + 8);
2033
2034 if (name_length == 4 && data_length == 16 && note_type == 1
2035 && strcmp (note + 12, "GNU") == 0)
2036 {
2037 int os_number = bfd_h_get_32 (abfd, note + 16);
2038
2039 /* The case numbers are from abi-tags in glibc */
2040 switch (os_number)
2041 {
2042 case 0 :
2043 *os_ident_ptr = ELFOSABI_LINUX;
2044 break;
244bc108
KB		 2045 case 1 :
2046 *os_ident_ptr = ELFOSABI_HURD;
2047 break;
2048 case 2 :
2049 *os_ident_ptr = ELFOSABI_SOLARIS;
2050 break;
244bc108 2051 default :
8e65ff28
AC		 2052 internal_error (__FILE__, __LINE__,
2053 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB		 2054 break;
2055 }
2056 }
2057 }
2058}
2059
16461d7d
KB		 2060static struct gdbarch *
2061ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2062{
2063 struct gdbarch *gdbarch;
244bc108
KB		 2064 struct gdbarch_tdep *tdep;
2065 int os_ident;
2066
2067 if (info.abfd != NULL
2068 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2069 {
2070 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2071
2072 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 2073 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 2074 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
2075 zero. So we have to check for note sections too. */
2076 if (os_ident == 0)
2077 {
2078 bfd_map_over_sections (info.abfd,
2079 process_note_abi_tag_sections,
2080 &os_ident);
2081 }
2082 }
2083 else
2084 os_ident = -1;
16461d7d 2085
244bc108
KB		 2086 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2087 arches != NULL;
2088 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2089 {
2090 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
2091 continue;
2092 return arches->gdbarch;
2093 }
16461d7d 2094
244bc108
KB		 2095 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2096 gdbarch = gdbarch_alloc (&info, tdep);
2097 tdep->os_ident = os_ident;
2098
d7fa2ae2
KB		 2099
2100 /* Set the method of obtaining the sigcontext addresses at which
2101 registers are saved. The method of checking to see if
2102 native_find_global_pointer is nonzero to indicate that we're
2103 on AIX is kind of hokey, but I can't think of a better way
2104 to do it. */
244bc108
KB		 2105 if (os_ident == ELFOSABI_LINUX)
2106 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB		 2107 else if (native_find_global_pointer != 0)
2108 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB		 2109 else
2110 tdep->sigcontext_register_address = 0;
16461d7d 2111
698cb3f0
KB		 2112 /* We know that Linux won't have to resort to the native_find_global_pointer
2113 hackery. But that's the only one we know about so far, so if
2114 native_find_global_pointer is set to something non-zero, then use
2115 it. Otherwise fall back to using generic_elf_find_global_pointer.
2116 This arrangement should (in theory) allow us to cross debug Linux
2117 binaries from an AIX machine. */
2118 if (os_ident == ELFOSABI_LINUX)
2119 tdep->find_global_pointer = generic_elf_find_global_pointer;
2120 else if (native_find_global_pointer != 0)
2121 tdep->find_global_pointer = native_find_global_pointer;
2122 else
2123 tdep->find_global_pointer = generic_elf_find_global_pointer;
2124
16461d7d
KB		 2125 set_gdbarch_short_bit (gdbarch, 16);
2126 set_gdbarch_int_bit (gdbarch, 32);
2127 set_gdbarch_long_bit (gdbarch, 64);
2128 set_gdbarch_long_long_bit (gdbarch, 64);
2129 set_gdbarch_float_bit (gdbarch, 32);
2130 set_gdbarch_double_bit (gdbarch, 64);
2131 set_gdbarch_long_double_bit (gdbarch, 64);
2132 set_gdbarch_ptr_bit (gdbarch, 64);
2133
2134 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2135 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2136 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2137 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2138 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 2139
2140 set_gdbarch_register_name (gdbarch, ia64_register_name);
2141 set_gdbarch_register_size (gdbarch, 8);
2142 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2143 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2144 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2145 set_gdbarch_max_register_raw_size (gdbarch, 16);
2146 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2147 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2148 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2149
2150 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2151
2152 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2153 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2154
2155 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2156
2157 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2158 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 2159 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2160
2161 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2162 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2163
2164 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2165 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2166 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2167
2168 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2169 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
2170
2171 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2172 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
2173 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2174
2175 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2176 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2177 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2178 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2179 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2180
2181 /* Settings for calling functions in the inferior. */
2182 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2183 set_gdbarch_call_dummy_length (gdbarch, 0);
2184 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2185 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2186 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2187
2188 set_gdbarch_call_dummy_p (gdbarch, 1);
2189 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2190 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2191 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2192 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2193 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2194 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2195
2196 /* We won't necessarily have a frame pointer and even if we do,
2197 it winds up being extraordinarly messy when attempting to find
2198 the frame chain. So for the purposes of creating frames (which
2199 is all read_fp() is used for), simply use the stack pointer value
2200 instead. */
2201 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2202 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2203
2204 /* Settings that should be unnecessary. */
2205 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2206
2207 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2208 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2209
2210 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2211 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2212 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2213 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2214 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2215 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2216 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2217 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2218
2219 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2220 set_gdbarch_function_start_offset (gdbarch, 0);
2221
2222 set_gdbarch_remote_translate_xfer_address (
2223 gdbarch, ia64_remote_translate_xfer_address);
2224
2225 return gdbarch;
2226}
2227
2228void
2229_initialize_ia64_tdep (void)
2230{
2231 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2232
2233 tm_print_insn = print_insn_ia64;
2234 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2235}
GDB Binutils - Deliverables
This page took 0.211373 seconds and 4 git commands to generate.