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[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
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16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
8e65ff28 2 Copyright 1999, 2000, 2001
16461d7d
KB		 3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d
KB		 27#include "floatformat.h"
28
29#include "objfiles.h"
30#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 31#include "elf-bfd.h"
16461d7d 32
698cb3f0
KB		 33/* Hook for determining the global pointer when calling functions in
34 the inferior under AIX. The initialization code in ia64-aix-nat.c
35 sets this hook to the address of a function which will find the
36 global pointer for a given address.
37
38 The generic code which uses the dynamic section in the inferior for
39 finding the global pointer is not of much use on AIX since the
40 values obtained from the inferior have not been relocated. */
41
42CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
43
44/* An enumeration of the different IA-64 instruction types. */
45
16461d7d
KB		 46typedef enum instruction_type
47{
48 A, /* Integer ALU ; I-unit or M-unit */
49 I, /* Non-ALU integer; I-unit */
50 M, /* Memory ; M-unit */
51 F, /* Floating-point ; F-unit */
52 B, /* Branch ; B-unit */
53 L, /* Extended (L+X) ; I-unit */
54 X, /* Extended (L+X) ; I-unit */
55 undefined /* undefined or reserved */
56} instruction_type;
57
58/* We represent IA-64 PC addresses as the value of the instruction
59 pointer or'd with some bit combination in the low nibble which
60 represents the slot number in the bundle addressed by the
61 instruction pointer. The problem is that the Linux kernel
62 multiplies its slot numbers (for exceptions) by one while the
63 disassembler multiplies its slot numbers by 6. In addition, I've
64 heard it said that the simulator uses 1 as the multiplier.
65
66 I've fixed the disassembler so that the bytes_per_line field will
67 be the slot multiplier. If bytes_per_line comes in as zero, it
68 is set to six (which is how it was set up initially). -- objdump
69 displays pretty disassembly dumps with this value. For our purposes,
70 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
71 never want to also display the raw bytes the way objdump does. */
72
73#define SLOT_MULTIPLIER 1
74
75/* Length in bytes of an instruction bundle */
76
77#define BUNDLE_LEN 16
78
d7fa2ae2 79/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 80extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 81extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 82
16461d7d
KB		 83static gdbarch_init_ftype ia64_gdbarch_init;
84
85static gdbarch_register_name_ftype ia64_register_name;
86static gdbarch_register_raw_size_ftype ia64_register_raw_size;
87static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
88static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
89static gdbarch_register_byte_ftype ia64_register_byte;
90static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
91static gdbarch_frame_chain_ftype ia64_frame_chain;
92static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
93static gdbarch_skip_prologue_ftype ia64_skip_prologue;
94static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
95static gdbarch_get_saved_register_ftype ia64_get_saved_register;
96static gdbarch_extract_return_value_ftype ia64_extract_return_value;
97static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
98static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
99static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
100static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
101static gdbarch_store_return_value_ftype ia64_store_return_value;
102static gdbarch_store_struct_return_ftype ia64_store_struct_return;
103static gdbarch_push_arguments_ftype ia64_push_arguments;
104static gdbarch_push_return_address_ftype ia64_push_return_address;
105static gdbarch_pop_frame_ftype ia64_pop_frame;
106static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 107static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 108static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 109
110static int ia64_num_regs = 590;
111
112static int pc_regnum = IA64_IP_REGNUM;
113static int sp_regnum = IA64_GR12_REGNUM;
114static int fp_regnum = IA64_VFP_REGNUM;
115static int lr_regnum = IA64_VRAP_REGNUM;
116
117static LONGEST ia64_call_dummy_words[] = {0};
118
119/* Array of register names; There should be ia64_num_regs strings in
120 the initializer. */
121
122static char *ia64_register_names[] =
123{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
124 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
125 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
126 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
127 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
128 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
129 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
130 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
131 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
132 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
133 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
134 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
135 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
136 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
137 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
138 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
139
140 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
141 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
142 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
143 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
144 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
145 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
146 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
147 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
148 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
149 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
150 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
151 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
152 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
153 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
154 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
155 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
156
157 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
158 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
159 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
160 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
161 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
162 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
163 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
164 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
165
166 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
167
168 "vfp", "vrap",
169
170 "pr", "ip", "psr", "cfm",
171
172 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
173 "", "", "", "", "", "", "", "",
174 "rsc", "bsp", "bspstore", "rnat",
175 "", "fcr", "", "",
176 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
177 "ccv", "", "", "", "unat", "", "", "",
178 "fpsr", "", "", "", "itc",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "",
181 "pfs", "lc", "ec",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "",
189 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
190 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
191 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
192 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
193 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
194 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
195 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
196 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
197 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
198 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
199 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
200 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
201 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
202 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
203 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
204 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
205};
206
207struct frame_extra_info
244bc108
KB		 208 {
209 CORE_ADDR bsp; /* points at r32 for the current frame */
210 CORE_ADDR cfm; /* cfm value for current frame */
211 int sof; /* Size of frame (decoded from cfm value) */
212 int sol; /* Size of locals (decoded from cfm value) */
213 CORE_ADDR after_prologue;
214 /* Address of first instruction after the last
16461d7d
KB		 215 prologue instruction; Note that there may
216 be instructions from the function's body
217 intermingled with the prologue. */
244bc108
KB		 218 int mem_stack_frame_size;
219 /* Size of the memory stack frame (may be zero),
16461d7d 220 or -1 if it has not been determined yet. */
244bc108
KB		 221 int fp_reg; /* Register number (if any) used a frame pointer
222 for this frame. 0 if no register is being used
16461d7d 223 as the frame pointer. */
244bc108
KB		 224 };
225
226struct gdbarch_tdep
227 {
228 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 229 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB		 230 etc. */
231 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
232 /* OS specific function which, given a frame address
233 and register number, returns the offset to the
234 given register from the start of the frame. */
698cb3f0 235 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB		 236 };
237
698cb3f0
KB		 238#define SIGCONTEXT_REGISTER_ADDRESS \
239 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
240#define FIND_GLOBAL_POINTER \
241 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d
KB		 242
243static char *
244ia64_register_name (int reg)
245{
246 return ia64_register_names[reg];
247}
248
249int
250ia64_register_raw_size (int reg)
251{
252 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
253}
254
255int
256ia64_register_virtual_size (int reg)
257{
258 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
259}
260
261/* Return true iff register N's virtual format is different from
262 its raw format. */
263int
264ia64_register_convertible (int nr)
265{
266 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
267}
268
269const struct floatformat floatformat_ia64_ext =
270{
271 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
272 floatformat_intbit_yes
273};
274
275void
276ia64_register_convert_to_virtual (int regnum, struct type *type,
277 char *from, char *to)
278{
279 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
280 {
281 DOUBLEST val;
282 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
283 store_floating(to, TYPE_LENGTH(type), val);
284 }
285 else
286 error("ia64_register_convert_to_virtual called with non floating point register number");
287}
288
289void
290ia64_register_convert_to_raw (struct type *type, int regnum,
291 char *from, char *to)
292{
293 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
294 {
295 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
296 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
297 }
298 else
299 error("ia64_register_convert_to_raw called with non floating point register number");
300}
301
302struct type *
303ia64_register_virtual_type (int reg)
304{
305 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
306 return builtin_type_long_double;
307 else
308 return builtin_type_long;
309}
310
311int
312ia64_register_byte (int reg)
313{
314 return (8 * reg) +
315 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
316}
317
244bc108
KB		 318/* Read the given register from a sigcontext structure in the
319 specified frame. */
320
321static CORE_ADDR
322read_sigcontext_register (struct frame_info *frame, int regnum)
323{
324 CORE_ADDR regaddr;
325
326 if (frame == NULL)
8e65ff28
AC		 327 internal_error (__FILE__, __LINE__,
328 "read_sigcontext_register: NULL frame");
244bc108 329 if (!frame->signal_handler_caller)
8e65ff28
AC		 330 internal_error (__FILE__, __LINE__,
331 "read_sigcontext_register: frame not a signal_handler_caller");
244bc108 332 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC		 333 internal_error (__FILE__, __LINE__,
334 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108
KB		 335
336 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
337 if (regaddr)
338 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
339 else
8e65ff28
AC		 340 internal_error (__FILE__, __LINE__,
341 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
KB		 342}
343
16461d7d
KB		 344/* Extract ``len'' bits from an instruction bundle starting at
345 bit ``from''. */
346
244bc108 347static long long
16461d7d
KB		 348extract_bit_field (char *bundle, int from, int len)
349{
350 long long result = 0LL;
351 int to = from + len;
352 int from_byte = from / 8;
353 int to_byte = to / 8;
354 unsigned char *b = (unsigned char *) bundle;
355 unsigned char c;
356 int lshift;
357 int i;
358
359 c = b[from_byte];
360 if (from_byte == to_byte)
361 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
362 result = c >> (from % 8);
363 lshift = 8 - (from % 8);
364
365 for (i = from_byte+1; i < to_byte; i++)
366 {
367 result |= ((long long) b[i]) << lshift;
368 lshift += 8;
369 }
370
371 if (from_byte < to_byte && (to % 8 != 0))
372 {
373 c = b[to_byte];
374 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
375 result |= ((long long) c) << lshift;
376 }
377
378 return result;
379}
380
381/* Replace the specified bits in an instruction bundle */
382
244bc108 383static void
16461d7d
KB		 384replace_bit_field (char *bundle, long long val, int from, int len)
385{
386 int to = from + len;
387 int from_byte = from / 8;
388 int to_byte = to / 8;
389 unsigned char *b = (unsigned char *) bundle;
390 unsigned char c;
391
392 if (from_byte == to_byte)
393 {
394 unsigned char left, right;
395 c = b[from_byte];
396 left = (c >> (to % 8)) << (to % 8);
397 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
398 c = (unsigned char) (val & 0xff);
399 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
400 c |= right | left;
401 b[from_byte] = c;
402 }
403 else
404 {
405 int i;
406 c = b[from_byte];
407 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
408 c = c | (val << (from % 8));
409 b[from_byte] = c;
410 val >>= 8 - from % 8;
411
412 for (i = from_byte+1; i < to_byte; i++)
413 {
414 c = val & 0xff;
415 val >>= 8;
416 b[i] = c;
417 }
418
419 if (to % 8 != 0)
420 {
421 unsigned char cv = (unsigned char) val;
422 c = b[to_byte];
423 c = c >> (to % 8) << (to % 8);
424 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
425 b[to_byte] = c;
426 }
427 }
428}
429
430/* Return the contents of slot N (for N = 0, 1, or 2) in
431 and instruction bundle */
432
244bc108 433static long long
16461d7d
KB		 434slotN_contents (unsigned char *bundle, int slotnum)
435{
436 return extract_bit_field (bundle, 5+41*slotnum, 41);
437}
438
439/* Store an instruction in an instruction bundle */
440
244bc108 441static void
16461d7d
KB		 442replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
443{
444 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
445}
446
64a5b29c 447static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 448{
449 { M, I, I }, /* 00 */
450 { M, I, I }, /* 01 */
451 { M, I, I }, /* 02 */
452 { M, I, I }, /* 03 */
453 { M, L, X }, /* 04 */
454 { M, L, X }, /* 05 */
455 { undefined, undefined, undefined }, /* 06 */
456 { undefined, undefined, undefined }, /* 07 */
457 { M, M, I }, /* 08 */
458 { M, M, I }, /* 09 */
459 { M, M, I }, /* 0A */
460 { M, M, I }, /* 0B */
461 { M, F, I }, /* 0C */
462 { M, F, I }, /* 0D */
463 { M, M, F }, /* 0E */
464 { M, M, F }, /* 0F */
465 { M, I, B }, /* 10 */
466 { M, I, B }, /* 11 */
467 { M, B, B }, /* 12 */
468 { M, B, B }, /* 13 */
469 { undefined, undefined, undefined }, /* 14 */
470 { undefined, undefined, undefined }, /* 15 */
471 { B, B, B }, /* 16 */
472 { B, B, B }, /* 17 */
473 { M, M, B }, /* 18 */
474 { M, M, B }, /* 19 */
475 { undefined, undefined, undefined }, /* 1A */
476 { undefined, undefined, undefined }, /* 1B */
477 { M, F, B }, /* 1C */
478 { M, F, B }, /* 1D */
479 { undefined, undefined, undefined }, /* 1E */
480 { undefined, undefined, undefined }, /* 1F */
481};
482
483/* Fetch and (partially) decode an instruction at ADDR and return the
484 address of the next instruction to fetch. */
485
486static CORE_ADDR
487fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
488{
489 char bundle[BUNDLE_LEN];
490 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
491 long long template;
492 int val;
493
494 if (slotnum > 2)
495 error("Can't fetch instructions for slot numbers greater than 2.");
496
497 addr &= ~0x0f;
498
499 val = target_read_memory (addr, bundle, BUNDLE_LEN);
500
501 if (val != 0)
502 return 0;
503
504 *instr = slotN_contents (bundle, slotnum);
505 template = extract_bit_field (bundle, 0, 5);
506 *it = template_encoding_table[(int)template][slotnum];
507
64a5b29c 508 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 509 addr += 16;
510 else
511 addr += (slotnum + 1) * SLOT_MULTIPLIER;
512
513 return addr;
514}
515
516/* There are 5 different break instructions (break.i, break.b,
517 break.m, break.f, and break.x), but they all have the same
518 encoding. (The five bit template in the low five bits of the
519 instruction bundle distinguishes one from another.)
520
521 The runtime architecture manual specifies that break instructions
522 used for debugging purposes must have the upper two bits of the 21
523 bit immediate set to a 0 and a 1 respectively. A breakpoint
524 instruction encodes the most significant bit of its 21 bit
525 immediate at bit 36 of the 41 bit instruction. The penultimate msb
526 is at bit 25 which leads to the pattern below.
527
528 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
529 it turns out that 0x80000 was used as the syscall break in the early
530 simulators. So I changed the pattern slightly to do "break.i 0x080001"
531 instead. But that didn't work either (I later found out that this
532 pattern was used by the simulator that I was using.) So I ended up
533 using the pattern seen below. */
534
535#if 0
536#define BREAKPOINT 0x00002000040LL
537#endif
538#define BREAKPOINT 0x00003333300LL
539
540static int
541ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
542{
543 char bundle[BUNDLE_LEN];
544 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
545 long long instr;
546 int val;
547
548 if (slotnum > 2)
549 error("Can't insert breakpoint for slot numbers greater than 2.");
550
551 addr &= ~0x0f;
552
553 val = target_read_memory (addr, bundle, BUNDLE_LEN);
554 instr = slotN_contents (bundle, slotnum);
555 memcpy(contents_cache, &instr, sizeof(instr));
556 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
557 if (val == 0)
558 target_write_memory (addr, bundle, BUNDLE_LEN);
559
560 return val;
561}
562
563static int
564ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
565{
566 char bundle[BUNDLE_LEN];
567 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
568 long long instr;
569 int val;
570
571 addr &= ~0x0f;
572
573 val = target_read_memory (addr, bundle, BUNDLE_LEN);
574 memcpy (&instr, contents_cache, sizeof instr);
575 replace_slotN_contents (bundle, instr, slotnum);
576 if (val == 0)
577 target_write_memory (addr, bundle, BUNDLE_LEN);
578
579 return val;
580}
581
582/* We don't really want to use this, but remote.c needs to call it in order
583 to figure out if Z-packets are supported or not. Oh, well. */
584unsigned char *
fba45db2 585ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 586{
587 static unsigned char breakpoint[] =
588 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
589 *lenptr = sizeof (breakpoint);
590#if 0
591 *pcptr &= ~0x0f;
592#endif
593 return breakpoint;
594}
595
596CORE_ADDR
597ia64_read_pc (int pid)
598{
599 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
600 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
601 int slot_num = (psr_value >> 41) & 3;
602
603 return pc_value | (slot_num * SLOT_MULTIPLIER);
604}
605
606void
607ia64_write_pc (CORE_ADDR new_pc, int pid)
608{
609 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
610 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
611 psr_value &= ~(3LL << 41);
612 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
613
614 new_pc &= ~0xfLL;
615
616 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
617 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
618}
619
620#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
621
622/* Returns the address of the slot that's NSLOTS slots away from
623 the address ADDR. NSLOTS may be positive or negative. */
624static CORE_ADDR
625rse_address_add(CORE_ADDR addr, int nslots)
626{
627 CORE_ADDR new_addr;
628 int mandatory_nat_slots = nslots / 63;
629 int direction = nslots < 0 ? -1 : 1;
630
631 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
632
633 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
634 new_addr += 8 * direction;
635
636 if (IS_NaT_COLLECTION_ADDR(new_addr))
637 new_addr += 8 * direction;
638
639 return new_addr;
640}
641
642/* The IA-64 frame chain is a bit odd. We won't always have a frame
643 pointer, so we use the SP value as the FP for the purpose of
644 creating a frame. There is sometimes a register (not fixed) which
645 is used as a frame pointer. When this register exists, it is not
646 especially hard to determine which one is being used. It isn't
647 even really hard to compute the frame chain, but it can be
648 computationally expensive. So, instead of making life difficult
649 (and slow), we pick a more convenient representation of the frame
650 chain, knowing that we'll have to make some small adjustments
651 in other places. (E.g, note that read_fp() and write_fp() are
652 actually read_sp() and write_sp() below in ia64_gdbarch_init()
653 below.)
654
655 Okay, so what is the frame chain exactly? It'll be the SP value
656 at the time that the function in question was entered.
657
658 Note that this *should* actually the frame pointer for the current
659 function! But as I note above, if we were to attempt to find the
660 address of the beginning of the previous frame, we'd waste a lot
661 of cycles for no good reason. So instead, we simply choose to
662 represent the frame chain as the end of the previous frame instead
663 of the beginning. */
664
665CORE_ADDR
666ia64_frame_chain (struct frame_info *frame)
667{
244bc108
KB		 668 if (frame->signal_handler_caller)
669 return read_sigcontext_register (frame, sp_regnum);
670 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
671 return frame->frame;
16461d7d 672 else
244bc108
KB		 673 {
674 FRAME_INIT_SAVED_REGS (frame);
675 if (frame->saved_regs[IA64_VFP_REGNUM])
676 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
677 else
678 return frame->frame + frame->extra_info->mem_stack_frame_size;
679 }
16461d7d
KB		 680}
681
682CORE_ADDR
683ia64_frame_saved_pc (struct frame_info *frame)
684{
244bc108
KB		 685 if (frame->signal_handler_caller)
686 return read_sigcontext_register (frame, pc_regnum);
687 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
688 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
689 else
690 {
691 FRAME_INIT_SAVED_REGS (frame);
16461d7d 692
244bc108
KB		 693 if (frame->saved_regs[IA64_VRAP_REGNUM])
694 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
695 else if (frame->next && frame->next->signal_handler_caller)
696 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
697 else /* either frameless, or not far enough along in the prologue... */
698 return ia64_saved_pc_after_call (frame);
699 }
16461d7d
KB		 700}
701
702#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
703 || (8 <= (_regnum_) && (_regnum_) <= 11) \
704 || (14 <= (_regnum_) && (_regnum_) <= 31))
705#define imm9(_instr_) \
706 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
707 | (((_instr_) & 0x00008000000LL) >> 20) \
708 | (((_instr_) & 0x00000001fc0LL) >> 6))
709
710static CORE_ADDR
711examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
712{
713 CORE_ADDR next_pc;
714 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 715 instruction_type it;
716 long long instr;
717 int do_fsr_stuff = 0;
718
719 int cfm_reg = 0;
720 int ret_reg = 0;
721 int fp_reg = 0;
722 int unat_save_reg = 0;
723 int pr_save_reg = 0;
724 int mem_stack_frame_size = 0;
725 int spill_reg = 0;
726 CORE_ADDR spill_addr = 0;
0927a22b
KB		 727 char instores[8];
728 char infpstores[8];
729
730 memset (instores, 0, sizeof instores);
731 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 732
733 if (frame && !frame->saved_regs)
734 {
735 frame_saved_regs_zalloc (frame);
736 do_fsr_stuff = 1;
737 }
738
739 if (frame
740 && !do_fsr_stuff
741 && frame->extra_info->after_prologue != 0
742 && frame->extra_info->after_prologue <= lim_pc)
743 return frame->extra_info->after_prologue;
744
745 /* Must start with an alloc instruction */
746 next_pc = fetch_instruction (pc, &it, &instr);
747 if (pc < lim_pc && next_pc
748 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
749 {
750 /* alloc */
751 int sor = (int) ((instr & 0x00078000000LL) >> 27);
752 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
753 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
754 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
755 we could compare against the size given to us via the cfm as
756 either a sanity check or possibly to see if the frame has been
757 changed by a later alloc instruction... */
758 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
759 cfm_reg = rN;
760 last_prologue_pc = next_pc;
761 pc = next_pc;
762 }
763 else
764 pc = lim_pc; /* We're done early */
765
766 /* Loop, looking for prologue instructions, keeping track of
767 where preserved registers were spilled. */
768 while (pc < lim_pc)
769 {
770 next_pc = fetch_instruction (pc, &it, &instr);
771 if (next_pc == 0)
772 break;
773
0927a22b
KB		 774 if (it == B || ((instr & 0x3fLL) != 0LL))
775 {
776 /* Exit loop upon hitting a branch instruction or a predicated
777 instruction. */
778 break;
779 }
780 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 781 {
782 /* Move from BR */
783 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
784 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
785 int qp = (int) (instr & 0x0000000003f);
786
787 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
788 {
789 ret_reg = rN;
790 last_prologue_pc = next_pc;
791 }
792 }
793 else if ((it == I || it == M)
794 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
795 {
796 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
797 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
798 | ((instr & 0x001f8000000LL) >> 20)
799 | ((instr & 0x000000fe000LL) >> 13));
800 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
801 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
802 int qp = (int) (instr & 0x0000000003fLL);
803
804 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
805 {
806 /* mov rN, r12 */
807 fp_reg = rN;
808 last_prologue_pc = next_pc;
809 }
810 else if (qp == 0 && rN == 12 && rM == 12)
811 {
812 /* adds r12, -mem_stack_frame_size, r12 */
813 mem_stack_frame_size -= imm;
814 last_prologue_pc = next_pc;
815 }
816 else if (qp == 0 && rN == 2
817 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
818 {
819 /* adds r2, spilloffset, rFramePointer
820 or
821 adds r2, spilloffset, r12
822
823 Get ready for stf.spill or st8.spill instructions.
824 The address to start spilling at is loaded into r2.
825 FIXME: Why r2? That's what gcc currently uses; it
826 could well be different for other compilers. */
827
828 /* Hmm... whether or not this will work will depend on
829 where the pc is. If it's still early in the prologue
830 this'll be wrong. FIXME */
831 spill_addr = (frame ? frame->frame : 0)
832 + (rM == 12 ? 0 : mem_stack_frame_size)
833 + imm;
834 spill_reg = rN;
835 last_prologue_pc = next_pc;
836 }
837 }
838 else if (it == M
839 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
840 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
841 {
842 /* stf.spill [rN] = fM, imm9
843 or
844 stf.spill [rN] = fM */
845
846 int imm = imm9(instr);
847 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
848 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
849 int qp = (int) (instr & 0x0000000003fLL);
850 if (qp == 0 && rN == spill_reg && spill_addr != 0
851 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
852 {
853 if (do_fsr_stuff)
854 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
855
856 if ((instr & 0x1efc0000000) == 0x0eec0000000)
857 spill_addr += imm;
858 else
859 spill_addr = 0; /* last one; must be done */
860 last_prologue_pc = next_pc;
861 }
862 }
863 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
864 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
865 {
866 /* mov.m rN = arM
867 or
868 mov.i rN = arM */
869
870 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
871 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
872 int qp = (int) (instr & 0x0000000003fLL);
873 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
874 {
875 /* We have something like "mov.m r3 = ar.unat". Remember the
876 r3 (or whatever) and watch for a store of this register... */
877 unat_save_reg = rN;
878 last_prologue_pc = next_pc;
879 }
880 }
881 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
882 {
883 /* mov rN = pr */
884 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
885 int qp = (int) (instr & 0x0000000003fLL);
886 if (qp == 0 && isScratch (rN))
887 {
888 pr_save_reg = rN;
889 last_prologue_pc = next_pc;
890 }
891 }
892 else if (it == M
893 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
894 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
895 {
896 /* st8 [rN] = rM
897 or
898 st8 [rN] = rM, imm9 */
899 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
900 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
901 int qp = (int) (instr & 0x0000000003fLL);
902 if (qp == 0 && rN == spill_reg && spill_addr != 0
903 && (rM == unat_save_reg || rM == pr_save_reg))
904 {
905 /* We've found a spill of either the UNAT register or the PR
906 register. (Well, not exactly; what we've actually found is
907 a spill of the register that UNAT or PR was moved to).
908 Record that fact and move on... */
909 if (rM == unat_save_reg)
910 {
911 /* Track UNAT register */
912 if (do_fsr_stuff)
913 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
914 unat_save_reg = 0;
915 }
916 else
917 {
918 /* Track PR register */
919 if (do_fsr_stuff)
920 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
921 pr_save_reg = 0;
922 }
923 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
924 /* st8 [rN] = rM, imm9 */
925 spill_addr += imm9(instr);
926 else
927 spill_addr = 0; /* must be done spilling */
928 last_prologue_pc = next_pc;
929 }
0927a22b
KB		 930 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
931 {
932 /* Allow up to one store of each input register. */
933 instores[rM-32] = 1;
934 last_prologue_pc = next_pc;
935 }
936 }
937 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
938 {
939 /* One of
940 st1 [rN] = rM
941 st2 [rN] = rM
942 st4 [rN] = rM
943 st8 [rN] = rM
944 Note that the st8 case is handled in the clause above.
945
946 Advance over stores of input registers. One store per input
947 register is permitted. */
948 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
949 int qp = (int) (instr & 0x0000000003fLL);
950 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
951 {
952 instores[rM-32] = 1;
953 last_prologue_pc = next_pc;
954 }
955 }
956 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
957 {
958 /* Either
959 stfs [rN] = fM
960 or
961 stfd [rN] = fM
962
963 Advance over stores of floating point input registers. Again
964 one store per register is permitted */
965 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
966 int qp = (int) (instr & 0x0000000003fLL);
967 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
968 {
969 infpstores[fM-8] = 1;
970 last_prologue_pc = next_pc;
971 }
16461d7d
KB		 972 }
973 else if (it == M
974 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
975 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
976 {
977 /* st8.spill [rN] = rM
978 or
979 st8.spill [rN] = rM, imm9 */
980 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
981 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
982 int qp = (int) (instr & 0x0000000003fLL);
983 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
984 {
985 /* We've found a spill of one of the preserved general purpose
986 regs. Record the spill address and advance the spill
987 register if appropriate. */
988 if (do_fsr_stuff)
989 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
990 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
991 /* st8.spill [rN] = rM, imm9 */
992 spill_addr += imm9(instr);
993 else
994 spill_addr = 0; /* Done spilling */
995 last_prologue_pc = next_pc;
996 }
997 }
16461d7d
KB		 998
999 pc = next_pc;
1000 }
1001
1002 if (do_fsr_stuff) {
1003 int i;
1004 CORE_ADDR addr;
3a854e23
KB		 1005 int sor, rrb_gr;
1006
1007 /* Extract the size of the rotating portion of the stack
1008 frame and the register rename base from the current
1009 frame marker. */
1010 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1011 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB		 1012
1013 for (i = 0, addr = frame->extra_info->bsp;
1014 i < frame->extra_info->sof;
1015 i++, addr += 8)
1016 {
1017 if (IS_NaT_COLLECTION_ADDR (addr))
1018 {
1019 addr += 8;
1020 }
3a854e23
KB		 1021 if (i < sor)
1022 frame->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1023 = addr;
1024 else
1025 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB		 1026
1027 if (i+32 == cfm_reg)
1028 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1029 if (i+32 == ret_reg)
1030 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1031 if (i+32 == fp_reg)
1032 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1033 }
1034 }
1035
1036 if (frame && frame->extra_info) {
1037 frame->extra_info->after_prologue = last_prologue_pc;
1038 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1039 frame->extra_info->fp_reg = fp_reg;
1040 }
1041
1042 return last_prologue_pc;
1043}
1044
1045CORE_ADDR
1046ia64_skip_prologue (CORE_ADDR pc)
1047{
1048 return examine_prologue (pc, pc+1024, 0);
1049}
1050
1051void
1052ia64_frame_init_saved_regs (struct frame_info *frame)
1053{
16461d7d
KB		 1054 if (frame->saved_regs)
1055 return;
1056
244bc108
KB		 1057 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1058 {
1059 int regno;
16461d7d 1060
244bc108 1061 frame_saved_regs_zalloc (frame);
16461d7d 1062
244bc108
KB		 1063 frame->saved_regs[IA64_VRAP_REGNUM] =
1064 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1065 frame->saved_regs[IA64_CFM_REGNUM] =
1066 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1067 frame->saved_regs[IA64_PSR_REGNUM] =
1068 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1069#if 0
1070 frame->saved_regs[IA64_BSP_REGNUM] =
1071 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1072#endif
1073 frame->saved_regs[IA64_RNAT_REGNUM] =
1074 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1075 frame->saved_regs[IA64_CCV_REGNUM] =
1076 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1077 frame->saved_regs[IA64_UNAT_REGNUM] =
1078 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1079 frame->saved_regs[IA64_FPSR_REGNUM] =
1080 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1081 frame->saved_regs[IA64_PFS_REGNUM] =
1082 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1083 frame->saved_regs[IA64_LC_REGNUM] =
1084 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1085 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1086 if (regno != sp_regnum)
1087 frame->saved_regs[regno] =
1088 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1089 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1090 frame->saved_regs[regno] =
1091 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1092 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1093 frame->saved_regs[regno] =
1094 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1095 }
1096 else
1097 {
244bc108 1098 CORE_ADDR func_start;
16461d7d 1099
244bc108
KB		 1100 func_start = get_pc_function_start (frame->pc);
1101 examine_prologue (func_start, frame->pc, frame);
1102 }
16461d7d
KB		 1103}
1104
1105void
1106ia64_get_saved_register (char *raw_buffer,
1107 int *optimized,
1108 CORE_ADDR *addrp,
1109 struct frame_info *frame,
1110 int regnum,
1111 enum lval_type *lval)
1112{
244bc108 1113 int is_dummy_frame;
16461d7d
KB		 1114
1115 if (!target_has_registers)
1116 error ("No registers.");
1117
1118 if (optimized != NULL)
1119 *optimized = 0;
244bc108
KB		 1120
1121 if (addrp != NULL)
1122 *addrp = 0;
1123
1124 if (lval != NULL)
1125 *lval = not_lval;
1126
1127 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1128
1129 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1130 {
1131 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1132 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1133 }
1134 else if (regnum == IA64_BSP_REGNUM)
1135 {
16461d7d
KB		 1136 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1137 frame->extra_info->bsp);
1138 }
1139 else if (regnum == IA64_VFP_REGNUM)
1140 {
1141 /* If the function in question uses an automatic register (r32-r127)
1142 for the frame pointer, it'll be found by ia64_find_saved_register()
1143 above. If the function lacks one of these frame pointers, we can
1144 still provide a value since we know the size of the frame */
1145 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1146 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1147 }
1148 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1149 {
1150 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1151 int pr_optim;
1152 enum lval_type pr_lval;
1153 CORE_ADDR pr_addr;
1154 int prN_val;
1155 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1156 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB		 1157 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1158 {
1159 /* Fetch predicate register rename base from current frame
1160 marker for this frame. */
1161 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1162
1163 /* Adjust the register number to account for register rotation. */
1164 regnum = IA64_PR16_REGNUM
1165 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1166 }
16461d7d
KB		 1167 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1168 regnum - IA64_PR0_REGNUM, 1);
1169 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1170 }
1171 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1172 {
1173 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1174 int unat_optim;
1175 enum lval_type unat_lval;
1176 CORE_ADDR unat_addr;
1177 int unatN_val;
1178 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1179 frame, IA64_UNAT_REGNUM, &unat_lval);
1180 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1181 regnum - IA64_NAT0_REGNUM, 1);
1182 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1183 unatN_val);
16461d7d
KB		 1184 }
1185 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1186 {
1187 int natval = 0;
1188 /* Find address of general register corresponding to nat bit we're
1189 interested in. */
244bc108
KB		 1190 CORE_ADDR gr_addr = 0;
1191
1192 if (!is_dummy_frame)
1193 {
1194 FRAME_INIT_SAVED_REGS (frame);
1195 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1196 + IA64_GR0_REGNUM];
1197 }
16461d7d
KB		 1198 if (gr_addr)
1199 {
1200 /* Compute address of nat collection bits */
1201 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1202 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1203 CORE_ADDR nat_collection;
1204 int nat_bit;
1205 /* If our nat collection address is bigger than bsp, we have to get
1206 the nat collection from rnat. Otherwise, we fetch the nat
1207 collection from the computed address. */
1208 if (nat_addr >= bsp)
1209 nat_collection = read_register (IA64_RNAT_REGNUM);
1210 else
1211 nat_collection = read_memory_integer (nat_addr, 8);
1212 nat_bit = (gr_addr >> 3) & 0x3f;
1213 natval = (nat_collection >> nat_bit) & 1;
1214 }
1215 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1216 }
1217 else if (regnum == IA64_IP_REGNUM)
1218 {
1219 CORE_ADDR pc;
1220 if (frame->next)
1221 {
1222 /* FIXME: Set *addrp, *lval when possible. */
1223 pc = ia64_frame_saved_pc (frame->next);
1224 }
1225 else
1226 {
1227 pc = read_pc ();
1228 }
1229 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1230 }
1231 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1232 {
1233 CORE_ADDR addr = 0;
1234 if (!is_dummy_frame)
1235 {
1236 FRAME_INIT_SAVED_REGS (frame);
1237 addr = frame->saved_regs[regnum];
1238 }
1239
1240 if (addr != 0)
1241 {
1242 if (lval != NULL)
1243 *lval = lval_memory;
1244 if (addrp != NULL)
1245 *addrp = addr;
1246 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1247 }
1248 else
1249 {
1250 /* r32 - r127 must be fetchable via memory. If they aren't,
1251 then the register is unavailable */
1252 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1253 }
16461d7d
KB		 1254 }
1255 else
1256 {
3a854e23
KB		 1257 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1258 {
1259 /* Fetch floating point register rename base from current
1260 frame marker for this frame. */
1261 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1262
1263 /* Adjust the floating point register number to account for
1264 register rotation. */
1265 regnum = IA64_FR32_REGNUM
1266 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1267 }
1268
244bc108
KB		 1269 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1270 regnum, lval);
16461d7d 1271 }
16461d7d
KB		 1272}
1273
1274/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1275 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1276 and TYPE is the type (which is known to be struct, union or array). */
1277int
1278ia64_use_struct_convention (int gcc_p, struct type *type)
1279{
64a5b29c
KB		 1280 struct type *float_elt_type;
1281
1282 /* HFAs are structures (or arrays) consisting entirely of floating
1283 point values of the same length. Up to 8 of these are returned
1284 in registers. Don't use the struct convention when this is the
1285 case. */
1286 float_elt_type = is_float_or_hfa_type (type);
1287 if (float_elt_type != NULL
1288 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1289 return 0;
1290
1291 /* Other structs of length 32 or less are returned in r8-r11.
1292 Don't use the struct convention for those either. */
16461d7d
KB		 1293 return TYPE_LENGTH (type) > 32;
1294}
1295
1296void
1297ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1298{
64a5b29c
KB		 1299 struct type *float_elt_type;
1300
1301 float_elt_type = is_float_or_hfa_type (type);
1302 if (float_elt_type != NULL)
1303 {
1304 int offset = 0;
1305 int regnum = IA64_FR8_REGNUM;
1306 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1307
1308 while (n-- > 0)
1309 {
1310 ia64_register_convert_to_virtual (regnum, float_elt_type,
1311 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1312 offset += TYPE_LENGTH (float_elt_type);
1313 regnum++;
1314 }
1315 }
16461d7d 1316 else
64a5b29c
KB		 1317 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1318 TYPE_LENGTH (type));
16461d7d
KB		 1319}
1320
1321/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1322 like this is necessary though since the IA-64 calling conventions specify
1323 that r8 is not preserved. */
1324static CORE_ADDR struct_return_address;
1325
1326CORE_ADDR
1327ia64_extract_struct_value_address (char *regbuf)
1328{
1329 /* FIXME: See above. */
1330 return struct_return_address;
1331}
1332
1333void
1334ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1335{
1336 /* FIXME: See above. */
1337 /* Note that most of the work was done in ia64_push_arguments() */
1338 struct_return_address = addr;
1339}
1340
1341int
1342ia64_frameless_function_invocation (struct frame_info *frame)
1343{
fbad0893
KB		 1344 FRAME_INIT_SAVED_REGS (frame);
1345 return (frame->extra_info->mem_stack_frame_size == 0);
16461d7d
KB		 1346}
1347
1348CORE_ADDR
1349ia64_saved_pc_after_call (struct frame_info *frame)
1350{
1351 return read_register (IA64_BR0_REGNUM);
1352}
1353
1354CORE_ADDR
1355ia64_frame_args_address (struct frame_info *frame)
1356{
1357 /* frame->frame points at the SP for this frame; But we want the start
1358 of the frame, not the end. Calling frame chain will get his for us. */
1359 return ia64_frame_chain (frame);
1360}
1361
1362CORE_ADDR
1363ia64_frame_locals_address (struct frame_info *frame)
1364{
1365 /* frame->frame points at the SP for this frame; But we want the start
1366 of the frame, not the end. Calling frame chain will get his for us. */
1367 return ia64_frame_chain (frame);
1368}
1369
1370void
1371ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1372{
1373 CORE_ADDR bsp, cfm;
244bc108
KB		 1374 int next_frame_is_call_dummy = ((frame->next != NULL)
1375 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1376 frame->next->frame));
16461d7d
KB		 1377
1378 frame->extra_info = (struct frame_extra_info *)
1379 frame_obstack_alloc (sizeof (struct frame_extra_info));
1380
1381 if (frame->next == 0)
1382 {
1383 bsp = read_register (IA64_BSP_REGNUM);
1384 cfm = read_register (IA64_CFM_REGNUM);
1385
1386 }
244bc108
KB		 1387 else if (frame->next->signal_handler_caller)
1388 {
1389 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1390 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1391 }
1392 else if (next_frame_is_call_dummy)
1393 {
1394 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1395 IA64_BSP_REGNUM);
1396 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1397 IA64_CFM_REGNUM);
1398 }
16461d7d
KB		 1399 else
1400 {
1401 struct frame_info *frn = frame->next;
16461d7d
KB		 1402
1403 FRAME_INIT_SAVED_REGS (frn);
1404
1405 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1406 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1407 else if (frn->next && frn->next->signal_handler_caller)
1408 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1409 else if (frn->next
1410 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1411 frn->next->frame))
1412 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1413 IA64_PFS_REGNUM);
16461d7d 1414 else
76d689a6 1415 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1416
1417 bsp = frn->extra_info->bsp;
1418 }
1419 frame->extra_info->cfm = cfm;
1420 frame->extra_info->sof = cfm & 0x7f;
1421 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1422 if (frame->next == 0
1423 || frame->next->signal_handler_caller
1424 || next_frame_is_call_dummy)
16461d7d
KB		 1425 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1426 else
1427 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1428
1429 frame->extra_info->after_prologue = 0;
1430 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1431 frame->extra_info->fp_reg = 0;
1432}
1433
64a5b29c
KB		 1434static int
1435is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1436{
1437 switch (TYPE_CODE (t))
1438 {
1439 case TYPE_CODE_FLT:
1440 if (*etp)
1441 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1442 else
1443 {
1444 *etp = t;
1445 return 1;
1446 }
1447 break;
1448 case TYPE_CODE_ARRAY:
1449 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1450 break;
1451 case TYPE_CODE_STRUCT:
1452 {
1453 int i;
1454
1455 for (i = 0; i < TYPE_NFIELDS (t); i++)
1456 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1457 return 0;
1458 return 1;
1459 }
1460 break;
1461 default:
1462 return 0;
1463 break;
1464 }
1465}
1466
1467/* Determine if the given type is one of the floating point types or
1468 and HFA (which is a struct, array, or combination thereof whose
1469 bottom-most elements are all of the same floating point type.) */
1470
1471static struct type *
1472is_float_or_hfa_type (struct type *t)
1473{
1474 struct type *et = 0;
1475
1476 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1477}
1478
1479
1480/* Attempt to find (and return) the global pointer for the given
1481 function.
1482
1483 This is a rather nasty bit of code searchs for the .dynamic section
1484 in the objfile corresponding to the pc of the function we're trying
1485 to call. Once it finds the addresses at which the .dynamic section
1486 lives in the child process, it scans the Elf64_Dyn entries for a
1487 DT_PLTGOT tag. If it finds one of these, the corresponding
1488 d_un.d_ptr value is the global pointer. */
1489
1490static CORE_ADDR
698cb3f0 1491generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1492{
76d689a6 1493 struct obj_section *faddr_sect;
64a5b29c 1494
76d689a6
KB		 1495 faddr_sect = find_pc_section (faddr);
1496 if (faddr_sect != NULL)
64a5b29c
KB		 1497 {
1498 struct obj_section *osect;
1499
76d689a6 1500 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1501 {
1502 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1503 break;
1504 }
1505
76d689a6 1506 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1507 {
1508 CORE_ADDR addr;
1509
1510 addr = osect->addr;
1511 while (addr < osect->endaddr)
1512 {
1513 int status;
1514 LONGEST tag;
1515 char buf[8];
1516
1517 status = target_read_memory (addr, buf, sizeof (buf));
1518 if (status != 0)
1519 break;
1520 tag = extract_signed_integer (buf, sizeof (buf));
1521
1522 if (tag == DT_PLTGOT)
1523 {
1524 CORE_ADDR global_pointer;
1525
1526 status = target_read_memory (addr + 8, buf, sizeof (buf));
1527 if (status != 0)
1528 break;
1529 global_pointer = extract_address (buf, sizeof (buf));
1530
1531 /* The payoff... */
1532 return global_pointer;
1533 }
1534
1535 if (tag == DT_NULL)
1536 break;
1537
1538 addr += 16;
1539 }
1540 }
1541 }
1542 return 0;
1543}
1544
1545/* Given a function's address, attempt to find (and return) the
1546 corresponding (canonical) function descriptor. Return 0 if
1547 not found. */
1548static CORE_ADDR
1549find_extant_func_descr (CORE_ADDR faddr)
1550{
76d689a6 1551 struct obj_section *faddr_sect;
64a5b29c
KB		 1552
1553 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1554 faddr_sect = find_pc_section (faddr);
1555 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1556 return faddr;
1557
76d689a6 1558 if (faddr_sect != NULL)
64a5b29c 1559 {
76d689a6
KB		 1560 struct obj_section *osect;
1561 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1562 {
1563 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1564 break;
1565 }
1566
76d689a6 1567 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1568 {
1569 CORE_ADDR addr;
1570
1571 addr = osect->addr;
1572 while (addr < osect->endaddr)
1573 {
1574 int status;
1575 LONGEST faddr2;
1576 char buf[8];
1577
1578 status = target_read_memory (addr, buf, sizeof (buf));
1579 if (status != 0)
1580 break;
1581 faddr2 = extract_signed_integer (buf, sizeof (buf));
1582
1583 if (faddr == faddr2)
1584 return addr;
1585
1586 addr += 16;
1587 }
1588 }
1589 }
1590 return 0;
1591}
1592
1593/* Attempt to find a function descriptor corresponding to the
1594 given address. If none is found, construct one on the
1595 stack using the address at fdaptr */
1596
1597static CORE_ADDR
1598find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1599{
1600 CORE_ADDR fdesc;
1601
1602 fdesc = find_extant_func_descr (faddr);
1603
1604 if (fdesc == 0)
1605 {
1606 CORE_ADDR global_pointer;
1607 char buf[16];
1608
1609 fdesc = *fdaptr;
1610 *fdaptr += 16;
1611
698cb3f0 1612 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB		 1613
1614 if (global_pointer == 0)
1615 global_pointer = read_register (IA64_GR1_REGNUM);
1616
1617 store_address (buf, 8, faddr);
1618 store_address (buf + 8, 8, global_pointer);
1619
1620 write_memory (fdesc, buf, 16);
1621 }
1622
1623 return fdesc;
1624}
16461d7d
KB		 1625
1626CORE_ADDR
1627ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1628 int struct_return, CORE_ADDR struct_addr)
1629{
1630 int argno;
1631 value_ptr arg;
1632 struct type *type;
1633 int len, argoffset;
64a5b29c 1634 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1635 int floatreg;
64a5b29c 1636 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1637
1638 nslots = 0;
64a5b29c 1639 nfuncargs = 0;
16461d7d
KB		 1640 /* Count the number of slots needed for the arguments */
1641 for (argno = 0; argno < nargs; argno++)
1642 {
1643 arg = args[argno];
1644 type = check_typedef (VALUE_TYPE (arg));
1645 len = TYPE_LENGTH (type);
1646
1647 /* FIXME: This is crude and it is wrong (IMO), but it matches
1648 what gcc does, I think. */
1649 if (len > 8 && (nslots & 1))
1650 nslots++;
1651
64a5b29c
KB		 1652 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1653 nfuncargs++;
1654
16461d7d
KB		 1655 nslots += (len + 7) / 8;
1656 }
1657
64a5b29c 1658 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1659 rseslots = (nslots > 8) ? 8 : nslots;
1660 memslots = nslots - rseslots;
1661
64a5b29c 1662 /* Allocate a new RSE frame */
16461d7d
KB		 1663 cfm = read_register (IA64_CFM_REGNUM);
1664
1665 bsp = read_register (IA64_BSP_REGNUM);
1666 bsp = rse_address_add (bsp, cfm & 0x7f);
1667 new_bsp = rse_address_add (bsp, rseslots);
1668 write_register (IA64_BSP_REGNUM, new_bsp);
1669
1670 pfs = read_register (IA64_PFS_REGNUM);
1671 pfs &= 0xc000000000000000LL;
1672 pfs |= (cfm & 0xffffffffffffLL);
1673 write_register (IA64_PFS_REGNUM, pfs);
1674
1675 cfm &= 0xc000000000000000LL;
1676 cfm |= rseslots;
1677 write_register (IA64_CFM_REGNUM, cfm);
1678
64a5b29c
KB		 1679 /* We will attempt to find function descriptors in the .opd segment,
1680 but if we can't we'll construct them ourselves. That being the
1681 case, we'll need to reserve space on the stack for them. */
1682 funcdescaddr = sp - nfuncargs * 16;
1683 funcdescaddr &= ~0xfLL;
1684
1685 /* Adjust the stack pointer to it's new value. The calling conventions
1686 require us to have 16 bytes of scratch, plus whatever space is
1687 necessary for the memory slots and our function descriptors */
1688 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1689 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1690
64a5b29c
KB		 1691 /* Place the arguments where they belong. The arguments will be
1692 either placed in the RSE backing store or on the memory stack.
1693 In addition, floating point arguments or HFAs are placed in
1694 floating point registers. */
16461d7d
KB		 1695 slotnum = 0;
1696 floatreg = IA64_FR8_REGNUM;
1697 for (argno = 0; argno < nargs; argno++)
1698 {
64a5b29c
KB		 1699 struct type *float_elt_type;
1700
16461d7d
KB		 1701 arg = args[argno];
1702 type = check_typedef (VALUE_TYPE (arg));
1703 len = TYPE_LENGTH (type);
64a5b29c
KB		 1704
1705 /* Special handling for function parameters */
1706 if (len == 8
1707 && TYPE_CODE (type) == TYPE_CODE_PTR
1708 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1709 {
1710 char val_buf[8];
1711
1712 store_address (val_buf, 8,
1713 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1714 &funcdescaddr));
1715 if (slotnum < rseslots)
1716 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1717 else
1718 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1719 slotnum++;
1720 continue;
1721 }
1722
1723 /* Normal slots */
16461d7d
KB		 1724 if (len > 8 && (slotnum & 1))
1725 slotnum++;
1726 argoffset = 0;
1727 while (len > 0)
1728 {
1729 char val_buf[8];
1730
1731 memset (val_buf, 0, 8);
1732 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1733
1734 if (slotnum < rseslots)
1735 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1736 else
1737 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1738
1739 argoffset += 8;
1740 len -= 8;
1741 slotnum++;
1742 }
64a5b29c
KB		 1743
1744 /* Handle floating point types (including HFAs) */
1745 float_elt_type = is_float_or_hfa_type (type);
1746 if (float_elt_type != NULL)
1747 {
1748 argoffset = 0;
1749 len = TYPE_LENGTH (type);
1750 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1751 {
1752 ia64_register_convert_to_raw (
1753 float_elt_type,
1754 floatreg,
1755 VALUE_CONTENTS (arg) + argoffset,
1756 &registers[REGISTER_BYTE (floatreg)]);
1757 floatreg++;
1758 argoffset += TYPE_LENGTH (float_elt_type);
1759 len -= TYPE_LENGTH (float_elt_type);
1760 }
16461d7d
KB		 1761 }
1762 }
1763
64a5b29c 1764 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1765 if (struct_return)
1766 {
1767 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1768 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1769 struct_addr);
1770 }
1771
64a5b29c 1772 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1773 target_store_registers (-1);
1774
1775 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1776 to be defined to call generic_save_dummy_frame_tos(). But at the
1777 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1778 I chose to put this call here instead of using the old mechanisms.
1779 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1780 line
1781
1782 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1783
1784 to ia64_gdbarch_init() and remove the line below. */
1785 generic_save_dummy_frame_tos (sp);
1786
1787 return sp;
1788}
1789
1790CORE_ADDR
1791ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1792{
698cb3f0 1793 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1794
64a5b29c
KB		 1795 if (global_pointer != 0)
1796 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1797
1798 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1799 return sp;
1800}
1801
1802void
1803ia64_store_return_value (struct type *type, char *valbuf)
1804{
1805 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1806 {
1807 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1808 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1809 target_store_registers (IA64_FR8_REGNUM);
1810 }
1811 else
1812 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1813 valbuf, TYPE_LENGTH (type));
1814}
1815
1816void
1817ia64_pop_frame (void)
1818{
1819 generic_pop_current_frame (ia64_pop_frame_regular);
1820}
1821
1822static void
1823ia64_pop_frame_regular (struct frame_info *frame)
1824{
1825 int regno;
1826 CORE_ADDR bsp, cfm, pfs;
1827
1828 FRAME_INIT_SAVED_REGS (frame);
1829
1830 for (regno = 0; regno < ia64_num_regs; regno++)
1831 {
1832 if (frame->saved_regs[regno]
1833 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1834 && regno != pc_regnum
1835 && regno != sp_regnum
1836 && regno != IA64_PFS_REGNUM
1837 && regno != IA64_CFM_REGNUM
1838 && regno != IA64_BSP_REGNUM
1839 && regno != IA64_BSPSTORE_REGNUM)
1840 {
1841 write_register (regno,
1842 read_memory_integer (frame->saved_regs[regno],
1843 REGISTER_RAW_SIZE (regno)));
1844 }
1845 }
1846
1847 write_register (sp_regnum, FRAME_CHAIN (frame));
1848 write_pc (FRAME_SAVED_PC (frame));
1849
1850 cfm = read_register (IA64_CFM_REGNUM);
1851
1852 if (frame->saved_regs[IA64_PFS_REGNUM])
1853 {
1854 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1855 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1856 }
1857 else
1858 pfs = read_register (IA64_PFS_REGNUM);
1859
1860 /* Compute the new bsp by *adding* the difference between the
1861 size of the frame and the size of the locals (both wrt the
1862 frame that we're going back to). This seems kind of strange,
1863 especially since it seems like we ought to be subtracting the
1864 size of the locals... and we should; but the linux kernel
1865 wants bsp to be set at the end of all used registers. It's
1866 likely that this code will need to be revised to accomodate
1867 other operating systems. */
1868 bsp = rse_address_add (frame->extra_info->bsp,
1869 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1870 write_register (IA64_BSP_REGNUM, bsp);
1871
1872 /* FIXME: What becomes of the epilog count in the PFS? */
1873 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1874 write_register (IA64_CFM_REGNUM, cfm);
1875
1876 flush_cached_frames ();
1877}
1878
1879static void
1880ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1881 CORE_ADDR *targ_addr, int *targ_len)
1882{
1883 *targ_addr = memaddr;
1884 *targ_len = nr_bytes;
1885}
1886
244bc108
KB		 1887static void
1888process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1889{
1890 int *os_ident_ptr = obj;
1891 const char *name;
1892 unsigned int sectsize;
1893
1894 name = bfd_get_section_name (abfd, sect);
1895 sectsize = bfd_section_size (abfd, sect);
1896 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1897 {
1898 unsigned int name_length, data_length, note_type;
1899 char *note = alloca (sectsize);
1900
1901 bfd_get_section_contents (abfd, sect, note,
1902 (file_ptr) 0, (bfd_size_type) sectsize);
1903
1904 name_length = bfd_h_get_32 (abfd, note);
1905 data_length = bfd_h_get_32 (abfd, note + 4);
1906 note_type = bfd_h_get_32 (abfd, note + 8);
1907
1908 if (name_length == 4 && data_length == 16 && note_type == 1
1909 && strcmp (note + 12, "GNU") == 0)
1910 {
1911 int os_number = bfd_h_get_32 (abfd, note + 16);
1912
1913 /* The case numbers are from abi-tags in glibc */
1914 switch (os_number)
1915 {
1916 case 0 :
1917 *os_ident_ptr = ELFOSABI_LINUX;
1918 break;
244bc108
KB		 1919 case 1 :
1920 *os_ident_ptr = ELFOSABI_HURD;
1921 break;
1922 case 2 :
1923 *os_ident_ptr = ELFOSABI_SOLARIS;
1924 break;
244bc108 1925 default :
8e65ff28
AC		 1926 internal_error (__FILE__, __LINE__,
1927 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB		 1928 break;
1929 }
1930 }
1931 }
1932}
1933
16461d7d
KB		 1934static struct gdbarch *
1935ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1936{
1937 struct gdbarch *gdbarch;
244bc108
KB		 1938 struct gdbarch_tdep *tdep;
1939 int os_ident;
1940
1941 if (info.abfd != NULL
1942 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1943 {
1944 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
1945
1946 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 1947 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 1948 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1949 zero. So we have to check for note sections too. */
1950 if (os_ident == 0)
1951 {
1952 bfd_map_over_sections (info.abfd,
1953 process_note_abi_tag_sections,
1954 &os_ident);
1955 }
1956 }
1957 else
1958 os_ident = -1;
16461d7d 1959
244bc108
KB		 1960 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1961 arches != NULL;
1962 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1963 {
1964 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
1965 continue;
1966 return arches->gdbarch;
1967 }
16461d7d 1968
244bc108
KB		 1969 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1970 gdbarch = gdbarch_alloc (&info, tdep);
1971 tdep->os_ident = os_ident;
1972
d7fa2ae2
KB		 1973
1974 /* Set the method of obtaining the sigcontext addresses at which
1975 registers are saved. The method of checking to see if
1976 native_find_global_pointer is nonzero to indicate that we're
1977 on AIX is kind of hokey, but I can't think of a better way
1978 to do it. */
244bc108
KB		 1979 if (os_ident == ELFOSABI_LINUX)
1980 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB		 1981 else if (native_find_global_pointer != 0)
1982 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB		 1983 else
1984 tdep->sigcontext_register_address = 0;
16461d7d 1985
698cb3f0
KB		 1986 /* We know that Linux won't have to resort to the native_find_global_pointer
1987 hackery. But that's the only one we know about so far, so if
1988 native_find_global_pointer is set to something non-zero, then use
1989 it. Otherwise fall back to using generic_elf_find_global_pointer.
1990 This arrangement should (in theory) allow us to cross debug Linux
1991 binaries from an AIX machine. */
1992 if (os_ident == ELFOSABI_LINUX)
1993 tdep->find_global_pointer = generic_elf_find_global_pointer;
1994 else if (native_find_global_pointer != 0)
1995 tdep->find_global_pointer = native_find_global_pointer;
1996 else
1997 tdep->find_global_pointer = generic_elf_find_global_pointer;
1998
16461d7d
KB		 1999 set_gdbarch_short_bit (gdbarch, 16);
2000 set_gdbarch_int_bit (gdbarch, 32);
2001 set_gdbarch_long_bit (gdbarch, 64);
2002 set_gdbarch_long_long_bit (gdbarch, 64);
2003 set_gdbarch_float_bit (gdbarch, 32);
2004 set_gdbarch_double_bit (gdbarch, 64);
2005 set_gdbarch_long_double_bit (gdbarch, 64);
2006 set_gdbarch_ptr_bit (gdbarch, 64);
2007
2008 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2009 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2010 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2011 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2012 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 2013
2014 set_gdbarch_register_name (gdbarch, ia64_register_name);
2015 set_gdbarch_register_size (gdbarch, 8);
2016 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2017 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2018 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2019 set_gdbarch_max_register_raw_size (gdbarch, 16);
2020 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2021 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2022 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2023
2024 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2025
2026 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2027 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2028
2029 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2030
2031 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2032 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 2033 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2034
2035 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2036 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2037
2038 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2039 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2040 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2041
2042 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2043 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
2044
2045 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2046 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
2047 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2048
2049 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2050 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2051 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2052 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2053 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2054
2055 /* Settings for calling functions in the inferior. */
2056 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2057 set_gdbarch_call_dummy_length (gdbarch, 0);
2058 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2059 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2060 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2061
2062 set_gdbarch_call_dummy_p (gdbarch, 1);
2063 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2064 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2065 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2066 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2067 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2068 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2069
2070 /* We won't necessarily have a frame pointer and even if we do,
2071 it winds up being extraordinarly messy when attempting to find
2072 the frame chain. So for the purposes of creating frames (which
2073 is all read_fp() is used for), simply use the stack pointer value
2074 instead. */
2075 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2076 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2077
2078 /* Settings that should be unnecessary. */
2079 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2080
2081 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2082 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2083
2084 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2085 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2086 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2087 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2088 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2089 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2090 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2091 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2092
2093 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2094 set_gdbarch_function_start_offset (gdbarch, 0);
2095
2096 set_gdbarch_remote_translate_xfer_address (
2097 gdbarch, ia64_remote_translate_xfer_address);
2098
2099 return gdbarch;
2100}
2101
2102void
2103_initialize_ia64_tdep (void)
2104{
2105 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2106
2107 tm_print_insn = print_insn_ia64;
2108 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2109}
GDB Binutils - Deliverables
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