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Phase 1 of the ptid_t changes.
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
8e65ff28 2 Copyright 1999, 2000, 2001
16461d7d
KB		 3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
16461d7d
KB		 29
30#include "objfiles.h"
31#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 32#include "elf-bfd.h"
16461d7d 33
698cb3f0
KB		 34/* Hook for determining the global pointer when calling functions in
35 the inferior under AIX. The initialization code in ia64-aix-nat.c
36 sets this hook to the address of a function which will find the
37 global pointer for a given address.
38
39 The generic code which uses the dynamic section in the inferior for
40 finding the global pointer is not of much use on AIX since the
41 values obtained from the inferior have not been relocated. */
42
43CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
44
45/* An enumeration of the different IA-64 instruction types. */
46
16461d7d
KB		 47typedef enum instruction_type
48{
49 A, /* Integer ALU ; I-unit or M-unit */
50 I, /* Non-ALU integer; I-unit */
51 M, /* Memory ; M-unit */
52 F, /* Floating-point ; F-unit */
53 B, /* Branch ; B-unit */
54 L, /* Extended (L+X) ; I-unit */
55 X, /* Extended (L+X) ; I-unit */
56 undefined /* undefined or reserved */
57} instruction_type;
58
59/* We represent IA-64 PC addresses as the value of the instruction
60 pointer or'd with some bit combination in the low nibble which
61 represents the slot number in the bundle addressed by the
62 instruction pointer. The problem is that the Linux kernel
63 multiplies its slot numbers (for exceptions) by one while the
64 disassembler multiplies its slot numbers by 6. In addition, I've
65 heard it said that the simulator uses 1 as the multiplier.
66
67 I've fixed the disassembler so that the bytes_per_line field will
68 be the slot multiplier. If bytes_per_line comes in as zero, it
69 is set to six (which is how it was set up initially). -- objdump
70 displays pretty disassembly dumps with this value. For our purposes,
71 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
72 never want to also display the raw bytes the way objdump does. */
73
74#define SLOT_MULTIPLIER 1
75
76/* Length in bytes of an instruction bundle */
77
78#define BUNDLE_LEN 16
79
d7fa2ae2 80/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 81extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 82extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 83
16461d7d
KB		 84static gdbarch_init_ftype ia64_gdbarch_init;
85
86static gdbarch_register_name_ftype ia64_register_name;
87static gdbarch_register_raw_size_ftype ia64_register_raw_size;
88static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
89static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
90static gdbarch_register_byte_ftype ia64_register_byte;
91static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
92static gdbarch_frame_chain_ftype ia64_frame_chain;
93static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
94static gdbarch_skip_prologue_ftype ia64_skip_prologue;
95static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
96static gdbarch_get_saved_register_ftype ia64_get_saved_register;
97static gdbarch_extract_return_value_ftype ia64_extract_return_value;
98static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
99static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
100static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
101static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
102static gdbarch_store_return_value_ftype ia64_store_return_value;
103static gdbarch_store_struct_return_ftype ia64_store_struct_return;
104static gdbarch_push_arguments_ftype ia64_push_arguments;
105static gdbarch_push_return_address_ftype ia64_push_return_address;
106static gdbarch_pop_frame_ftype ia64_pop_frame;
107static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 108static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 109static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 110
111static int ia64_num_regs = 590;
112
113static int pc_regnum = IA64_IP_REGNUM;
114static int sp_regnum = IA64_GR12_REGNUM;
115static int fp_regnum = IA64_VFP_REGNUM;
116static int lr_regnum = IA64_VRAP_REGNUM;
117
118static LONGEST ia64_call_dummy_words[] = {0};
119
120/* Array of register names; There should be ia64_num_regs strings in
121 the initializer. */
122
123static char *ia64_register_names[] =
124{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
125 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
126 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
127 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
128 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
129 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
130 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
131 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
132 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
133 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
134 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
135 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
136 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
137 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
138 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
139 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
140
141 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
142 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
143 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
144 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
145 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
146 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
147 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
148 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
149 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
150 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
151 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
152 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
153 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
154 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
155 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
156 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
157
158 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
159 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
160 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
161 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
162 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
163 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
164 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
165 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
166
167 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
168
169 "vfp", "vrap",
170
171 "pr", "ip", "psr", "cfm",
172
173 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
174 "", "", "", "", "", "", "", "",
175 "rsc", "bsp", "bspstore", "rnat",
176 "", "fcr", "", "",
177 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
178 "ccv", "", "", "", "unat", "", "", "",
179 "fpsr", "", "", "", "itc",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "",
182 "pfs", "lc", "ec",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "",
190 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
191 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
192 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
193 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
194 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
195 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
196 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
197 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
198 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
199 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
200 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
201 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
202 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
203 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
204 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
205 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
206};
207
208struct frame_extra_info
244bc108
KB		 209 {
210 CORE_ADDR bsp; /* points at r32 for the current frame */
211 CORE_ADDR cfm; /* cfm value for current frame */
212 int sof; /* Size of frame (decoded from cfm value) */
213 int sol; /* Size of locals (decoded from cfm value) */
214 CORE_ADDR after_prologue;
215 /* Address of first instruction after the last
16461d7d
KB		 216 prologue instruction; Note that there may
217 be instructions from the function's body
218 intermingled with the prologue. */
244bc108
KB		 219 int mem_stack_frame_size;
220 /* Size of the memory stack frame (may be zero),
16461d7d 221 or -1 if it has not been determined yet. */
244bc108
KB		 222 int fp_reg; /* Register number (if any) used a frame pointer
223 for this frame. 0 if no register is being used
16461d7d 224 as the frame pointer. */
244bc108
KB		 225 };
226
227struct gdbarch_tdep
228 {
229 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 230 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB		 231 etc. */
232 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
233 /* OS specific function which, given a frame address
234 and register number, returns the offset to the
235 given register from the start of the frame. */
698cb3f0 236 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB		 237 };
238
698cb3f0
KB		 239#define SIGCONTEXT_REGISTER_ADDRESS \
240 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
241#define FIND_GLOBAL_POINTER \
242 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d
KB		 243
244static char *
245ia64_register_name (int reg)
246{
247 return ia64_register_names[reg];
248}
249
250int
251ia64_register_raw_size (int reg)
252{
253 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
254}
255
256int
257ia64_register_virtual_size (int reg)
258{
259 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
260}
261
262/* Return true iff register N's virtual format is different from
263 its raw format. */
264int
265ia64_register_convertible (int nr)
266{
267 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
268}
269
270const struct floatformat floatformat_ia64_ext =
271{
272 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
273 floatformat_intbit_yes
274};
275
276void
277ia64_register_convert_to_virtual (int regnum, struct type *type,
278 char *from, char *to)
279{
280 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
281 {
282 DOUBLEST val;
283 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
284 store_floating(to, TYPE_LENGTH(type), val);
285 }
286 else
287 error("ia64_register_convert_to_virtual called with non floating point register number");
288}
289
290void
291ia64_register_convert_to_raw (struct type *type, int regnum,
292 char *from, char *to)
293{
294 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
295 {
296 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
297 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
298 }
299 else
300 error("ia64_register_convert_to_raw called with non floating point register number");
301}
302
303struct type *
304ia64_register_virtual_type (int reg)
305{
306 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
307 return builtin_type_long_double;
308 else
309 return builtin_type_long;
310}
311
312int
313ia64_register_byte (int reg)
314{
315 return (8 * reg) +
316 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
317}
318
244bc108
KB		 319/* Read the given register from a sigcontext structure in the
320 specified frame. */
321
322static CORE_ADDR
323read_sigcontext_register (struct frame_info *frame, int regnum)
324{
325 CORE_ADDR regaddr;
326
327 if (frame == NULL)
8e65ff28
AC		 328 internal_error (__FILE__, __LINE__,
329 "read_sigcontext_register: NULL frame");
244bc108 330 if (!frame->signal_handler_caller)
8e65ff28
AC		 331 internal_error (__FILE__, __LINE__,
332 "read_sigcontext_register: frame not a signal_handler_caller");
244bc108 333 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC		 334 internal_error (__FILE__, __LINE__,
335 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108
KB		 336
337 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
338 if (regaddr)
339 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
340 else
8e65ff28
AC		 341 internal_error (__FILE__, __LINE__,
342 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
KB		 343}
344
16461d7d
KB		 345/* Extract ``len'' bits from an instruction bundle starting at
346 bit ``from''. */
347
244bc108 348static long long
16461d7d
KB		 349extract_bit_field (char *bundle, int from, int len)
350{
351 long long result = 0LL;
352 int to = from + len;
353 int from_byte = from / 8;
354 int to_byte = to / 8;
355 unsigned char *b = (unsigned char *) bundle;
356 unsigned char c;
357 int lshift;
358 int i;
359
360 c = b[from_byte];
361 if (from_byte == to_byte)
362 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
363 result = c >> (from % 8);
364 lshift = 8 - (from % 8);
365
366 for (i = from_byte+1; i < to_byte; i++)
367 {
368 result |= ((long long) b[i]) << lshift;
369 lshift += 8;
370 }
371
372 if (from_byte < to_byte && (to % 8 != 0))
373 {
374 c = b[to_byte];
375 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
376 result |= ((long long) c) << lshift;
377 }
378
379 return result;
380}
381
382/* Replace the specified bits in an instruction bundle */
383
244bc108 384static void
16461d7d
KB		 385replace_bit_field (char *bundle, long long val, int from, int len)
386{
387 int to = from + len;
388 int from_byte = from / 8;
389 int to_byte = to / 8;
390 unsigned char *b = (unsigned char *) bundle;
391 unsigned char c;
392
393 if (from_byte == to_byte)
394 {
395 unsigned char left, right;
396 c = b[from_byte];
397 left = (c >> (to % 8)) << (to % 8);
398 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
399 c = (unsigned char) (val & 0xff);
400 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
401 c |= right | left;
402 b[from_byte] = c;
403 }
404 else
405 {
406 int i;
407 c = b[from_byte];
408 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
409 c = c | (val << (from % 8));
410 b[from_byte] = c;
411 val >>= 8 - from % 8;
412
413 for (i = from_byte+1; i < to_byte; i++)
414 {
415 c = val & 0xff;
416 val >>= 8;
417 b[i] = c;
418 }
419
420 if (to % 8 != 0)
421 {
422 unsigned char cv = (unsigned char) val;
423 c = b[to_byte];
424 c = c >> (to % 8) << (to % 8);
425 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
426 b[to_byte] = c;
427 }
428 }
429}
430
431/* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
433
244bc108 434static long long
2fc3ac7e 435slotN_contents (char *bundle, int slotnum)
16461d7d
KB		 436{
437 return extract_bit_field (bundle, 5+41*slotnum, 41);
438}
439
440/* Store an instruction in an instruction bundle */
441
244bc108 442static void
2fc3ac7e 443replace_slotN_contents (char *bundle, long long instr, int slotnum)
16461d7d
KB		 444{
445 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
446}
447
64a5b29c 448static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 449{
450 { M, I, I }, /* 00 */
451 { M, I, I }, /* 01 */
452 { M, I, I }, /* 02 */
453 { M, I, I }, /* 03 */
454 { M, L, X }, /* 04 */
455 { M, L, X }, /* 05 */
456 { undefined, undefined, undefined }, /* 06 */
457 { undefined, undefined, undefined }, /* 07 */
458 { M, M, I }, /* 08 */
459 { M, M, I }, /* 09 */
460 { M, M, I }, /* 0A */
461 { M, M, I }, /* 0B */
462 { M, F, I }, /* 0C */
463 { M, F, I }, /* 0D */
464 { M, M, F }, /* 0E */
465 { M, M, F }, /* 0F */
466 { M, I, B }, /* 10 */
467 { M, I, B }, /* 11 */
468 { M, B, B }, /* 12 */
469 { M, B, B }, /* 13 */
470 { undefined, undefined, undefined }, /* 14 */
471 { undefined, undefined, undefined }, /* 15 */
472 { B, B, B }, /* 16 */
473 { B, B, B }, /* 17 */
474 { M, M, B }, /* 18 */
475 { M, M, B }, /* 19 */
476 { undefined, undefined, undefined }, /* 1A */
477 { undefined, undefined, undefined }, /* 1B */
478 { M, F, B }, /* 1C */
479 { M, F, B }, /* 1D */
480 { undefined, undefined, undefined }, /* 1E */
481 { undefined, undefined, undefined }, /* 1F */
482};
483
484/* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
486
487static CORE_ADDR
488fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
489{
490 char bundle[BUNDLE_LEN];
491 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
492 long long template;
493 int val;
494
c26e1c2b
KB		 495 /* Warn about slot numbers greater than 2. We used to generate
496 an error here on the assumption that the user entered an invalid
497 address. But, sometimes GDB itself requests an invalid address.
498 This can (easily) happen when execution stops in a function for
499 which there are no symbols. The prologue scanner will attempt to
500 find the beginning of the function - if the nearest symbol
501 happens to not be aligned on a bundle boundary (16 bytes), the
502 resulting starting address will cause GDB to think that the slot
503 number is too large.
504
505 So we warn about it and set the slot number to zero. It is
506 not necessarily a fatal condition, particularly if debugging
507 at the assembly language level. */
16461d7d 508 if (slotnum > 2)
c26e1c2b
KB		 509 {
510 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
511 "Using slot 0 instead");
512 slotnum = 0;
513 }
16461d7d
KB		 514
515 addr &= ~0x0f;
516
517 val = target_read_memory (addr, bundle, BUNDLE_LEN);
518
519 if (val != 0)
520 return 0;
521
522 *instr = slotN_contents (bundle, slotnum);
523 template = extract_bit_field (bundle, 0, 5);
524 *it = template_encoding_table[(int)template][slotnum];
525
64a5b29c 526 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 527 addr += 16;
528 else
529 addr += (slotnum + 1) * SLOT_MULTIPLIER;
530
531 return addr;
532}
533
534/* There are 5 different break instructions (break.i, break.b,
535 break.m, break.f, and break.x), but they all have the same
536 encoding. (The five bit template in the low five bits of the
537 instruction bundle distinguishes one from another.)
538
539 The runtime architecture manual specifies that break instructions
540 used for debugging purposes must have the upper two bits of the 21
541 bit immediate set to a 0 and a 1 respectively. A breakpoint
542 instruction encodes the most significant bit of its 21 bit
543 immediate at bit 36 of the 41 bit instruction. The penultimate msb
544 is at bit 25 which leads to the pattern below.
545
546 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
547 it turns out that 0x80000 was used as the syscall break in the early
548 simulators. So I changed the pattern slightly to do "break.i 0x080001"
549 instead. But that didn't work either (I later found out that this
550 pattern was used by the simulator that I was using.) So I ended up
551 using the pattern seen below. */
552
553#if 0
554#define BREAKPOINT 0x00002000040LL
555#endif
556#define BREAKPOINT 0x00003333300LL
557
558static int
559ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
560{
561 char bundle[BUNDLE_LEN];
562 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
563 long long instr;
564 int val;
565
566 if (slotnum > 2)
567 error("Can't insert breakpoint for slot numbers greater than 2.");
568
569 addr &= ~0x0f;
570
571 val = target_read_memory (addr, bundle, BUNDLE_LEN);
572 instr = slotN_contents (bundle, slotnum);
573 memcpy(contents_cache, &instr, sizeof(instr));
574 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
575 if (val == 0)
576 target_write_memory (addr, bundle, BUNDLE_LEN);
577
578 return val;
579}
580
581static int
582ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
583{
584 char bundle[BUNDLE_LEN];
585 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
586 long long instr;
587 int val;
588
589 addr &= ~0x0f;
590
591 val = target_read_memory (addr, bundle, BUNDLE_LEN);
592 memcpy (&instr, contents_cache, sizeof instr);
593 replace_slotN_contents (bundle, instr, slotnum);
594 if (val == 0)
595 target_write_memory (addr, bundle, BUNDLE_LEN);
596
597 return val;
598}
599
600/* We don't really want to use this, but remote.c needs to call it in order
601 to figure out if Z-packets are supported or not. Oh, well. */
602unsigned char *
fba45db2 603ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 604{
605 static unsigned char breakpoint[] =
606 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
607 *lenptr = sizeof (breakpoint);
608#if 0
609 *pcptr &= ~0x0f;
610#endif
611 return breakpoint;
612}
613
614CORE_ADDR
39f77062 615ia64_read_pc (ptid_t ptid)
16461d7d 616{
39f77062
KB		 617 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
618 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB		 619 int slot_num = (psr_value >> 41) & 3;
620
621 return pc_value | (slot_num * SLOT_MULTIPLIER);
622}
623
624void
39f77062 625ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB		 626{
627 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 628 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB		 629 psr_value &= ~(3LL << 41);
630 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
631
632 new_pc &= ~0xfLL;
633
39f77062
KB		 634 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
635 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB		 636}
637
638#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
639
640/* Returns the address of the slot that's NSLOTS slots away from
641 the address ADDR. NSLOTS may be positive or negative. */
642static CORE_ADDR
643rse_address_add(CORE_ADDR addr, int nslots)
644{
645 CORE_ADDR new_addr;
646 int mandatory_nat_slots = nslots / 63;
647 int direction = nslots < 0 ? -1 : 1;
648
649 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
650
651 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
652 new_addr += 8 * direction;
653
654 if (IS_NaT_COLLECTION_ADDR(new_addr))
655 new_addr += 8 * direction;
656
657 return new_addr;
658}
659
660/* The IA-64 frame chain is a bit odd. We won't always have a frame
661 pointer, so we use the SP value as the FP for the purpose of
662 creating a frame. There is sometimes a register (not fixed) which
663 is used as a frame pointer. When this register exists, it is not
664 especially hard to determine which one is being used. It isn't
665 even really hard to compute the frame chain, but it can be
666 computationally expensive. So, instead of making life difficult
667 (and slow), we pick a more convenient representation of the frame
668 chain, knowing that we'll have to make some small adjustments
669 in other places. (E.g, note that read_fp() and write_fp() are
670 actually read_sp() and write_sp() below in ia64_gdbarch_init()
671 below.)
672
673 Okay, so what is the frame chain exactly? It'll be the SP value
674 at the time that the function in question was entered.
675
676 Note that this *should* actually the frame pointer for the current
677 function! But as I note above, if we were to attempt to find the
678 address of the beginning of the previous frame, we'd waste a lot
679 of cycles for no good reason. So instead, we simply choose to
680 represent the frame chain as the end of the previous frame instead
681 of the beginning. */
682
683CORE_ADDR
684ia64_frame_chain (struct frame_info *frame)
685{
244bc108
KB		 686 if (frame->signal_handler_caller)
687 return read_sigcontext_register (frame, sp_regnum);
688 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
689 return frame->frame;
16461d7d 690 else
244bc108
KB		 691 {
692 FRAME_INIT_SAVED_REGS (frame);
693 if (frame->saved_regs[IA64_VFP_REGNUM])
694 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
695 else
696 return frame->frame + frame->extra_info->mem_stack_frame_size;
697 }
16461d7d
KB		 698}
699
700CORE_ADDR
701ia64_frame_saved_pc (struct frame_info *frame)
702{
244bc108
KB		 703 if (frame->signal_handler_caller)
704 return read_sigcontext_register (frame, pc_regnum);
705 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
706 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
707 else
708 {
709 FRAME_INIT_SAVED_REGS (frame);
16461d7d 710
244bc108
KB		 711 if (frame->saved_regs[IA64_VRAP_REGNUM])
712 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
713 else if (frame->next && frame->next->signal_handler_caller)
714 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
715 else /* either frameless, or not far enough along in the prologue... */
716 return ia64_saved_pc_after_call (frame);
717 }
16461d7d
KB		 718}
719
720#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
721 || (8 <= (_regnum_) && (_regnum_) <= 11) \
722 || (14 <= (_regnum_) && (_regnum_) <= 31))
723#define imm9(_instr_) \
724 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
725 | (((_instr_) & 0x00008000000LL) >> 20) \
726 | (((_instr_) & 0x00000001fc0LL) >> 6))
727
728static CORE_ADDR
729examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
730{
731 CORE_ADDR next_pc;
732 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 733 instruction_type it;
734 long long instr;
735 int do_fsr_stuff = 0;
736
737 int cfm_reg = 0;
738 int ret_reg = 0;
739 int fp_reg = 0;
740 int unat_save_reg = 0;
741 int pr_save_reg = 0;
742 int mem_stack_frame_size = 0;
743 int spill_reg = 0;
744 CORE_ADDR spill_addr = 0;
0927a22b
KB		 745 char instores[8];
746 char infpstores[8];
747
748 memset (instores, 0, sizeof instores);
749 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 750
751 if (frame && !frame->saved_regs)
752 {
753 frame_saved_regs_zalloc (frame);
754 do_fsr_stuff = 1;
755 }
756
757 if (frame
758 && !do_fsr_stuff
759 && frame->extra_info->after_prologue != 0
760 && frame->extra_info->after_prologue <= lim_pc)
761 return frame->extra_info->after_prologue;
762
763 /* Must start with an alloc instruction */
764 next_pc = fetch_instruction (pc, &it, &instr);
765 if (pc < lim_pc && next_pc
766 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
767 {
768 /* alloc */
769 int sor = (int) ((instr & 0x00078000000LL) >> 27);
770 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
771 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
772 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
773 we could compare against the size given to us via the cfm as
774 either a sanity check or possibly to see if the frame has been
775 changed by a later alloc instruction... */
776 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
777 cfm_reg = rN;
778 last_prologue_pc = next_pc;
779 pc = next_pc;
780 }
781 else
782 pc = lim_pc; /* We're done early */
783
784 /* Loop, looking for prologue instructions, keeping track of
785 where preserved registers were spilled. */
786 while (pc < lim_pc)
787 {
788 next_pc = fetch_instruction (pc, &it, &instr);
789 if (next_pc == 0)
790 break;
791
0927a22b
KB		 792 if (it == B || ((instr & 0x3fLL) != 0LL))
793 {
794 /* Exit loop upon hitting a branch instruction or a predicated
795 instruction. */
796 break;
797 }
798 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 799 {
800 /* Move from BR */
801 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
802 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
803 int qp = (int) (instr & 0x0000000003f);
804
805 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
806 {
807 ret_reg = rN;
808 last_prologue_pc = next_pc;
809 }
810 }
811 else if ((it == I || it == M)
812 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
813 {
814 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
815 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
816 | ((instr & 0x001f8000000LL) >> 20)
817 | ((instr & 0x000000fe000LL) >> 13));
818 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
819 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
820 int qp = (int) (instr & 0x0000000003fLL);
821
822 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
823 {
824 /* mov rN, r12 */
825 fp_reg = rN;
826 last_prologue_pc = next_pc;
827 }
828 else if (qp == 0 && rN == 12 && rM == 12)
829 {
830 /* adds r12, -mem_stack_frame_size, r12 */
831 mem_stack_frame_size -= imm;
832 last_prologue_pc = next_pc;
833 }
834 else if (qp == 0 && rN == 2
835 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
836 {
837 /* adds r2, spilloffset, rFramePointer
838 or
839 adds r2, spilloffset, r12
840
841 Get ready for stf.spill or st8.spill instructions.
842 The address to start spilling at is loaded into r2.
843 FIXME: Why r2? That's what gcc currently uses; it
844 could well be different for other compilers. */
845
846 /* Hmm... whether or not this will work will depend on
847 where the pc is. If it's still early in the prologue
848 this'll be wrong. FIXME */
849 spill_addr = (frame ? frame->frame : 0)
850 + (rM == 12 ? 0 : mem_stack_frame_size)
851 + imm;
852 spill_reg = rN;
853 last_prologue_pc = next_pc;
854 }
855 }
856 else if (it == M
857 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
858 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
859 {
860 /* stf.spill [rN] = fM, imm9
861 or
862 stf.spill [rN] = fM */
863
864 int imm = imm9(instr);
865 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
866 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
867 int qp = (int) (instr & 0x0000000003fLL);
868 if (qp == 0 && rN == spill_reg && spill_addr != 0
869 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
870 {
871 if (do_fsr_stuff)
872 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
873
874 if ((instr & 0x1efc0000000) == 0x0eec0000000)
875 spill_addr += imm;
876 else
877 spill_addr = 0; /* last one; must be done */
878 last_prologue_pc = next_pc;
879 }
880 }
881 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
882 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
883 {
884 /* mov.m rN = arM
885 or
886 mov.i rN = arM */
887
888 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
889 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
890 int qp = (int) (instr & 0x0000000003fLL);
891 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
892 {
893 /* We have something like "mov.m r3 = ar.unat". Remember the
894 r3 (or whatever) and watch for a store of this register... */
895 unat_save_reg = rN;
896 last_prologue_pc = next_pc;
897 }
898 }
899 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
900 {
901 /* mov rN = pr */
902 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
903 int qp = (int) (instr & 0x0000000003fLL);
904 if (qp == 0 && isScratch (rN))
905 {
906 pr_save_reg = rN;
907 last_prologue_pc = next_pc;
908 }
909 }
910 else if (it == M
911 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
912 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
913 {
914 /* st8 [rN] = rM
915 or
916 st8 [rN] = rM, imm9 */
917 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
918 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
919 int qp = (int) (instr & 0x0000000003fLL);
920 if (qp == 0 && rN == spill_reg && spill_addr != 0
921 && (rM == unat_save_reg || rM == pr_save_reg))
922 {
923 /* We've found a spill of either the UNAT register or the PR
924 register. (Well, not exactly; what we've actually found is
925 a spill of the register that UNAT or PR was moved to).
926 Record that fact and move on... */
927 if (rM == unat_save_reg)
928 {
929 /* Track UNAT register */
930 if (do_fsr_stuff)
931 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
932 unat_save_reg = 0;
933 }
934 else
935 {
936 /* Track PR register */
937 if (do_fsr_stuff)
938 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
939 pr_save_reg = 0;
940 }
941 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
942 /* st8 [rN] = rM, imm9 */
943 spill_addr += imm9(instr);
944 else
945 spill_addr = 0; /* must be done spilling */
946 last_prologue_pc = next_pc;
947 }
0927a22b
KB		 948 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
949 {
950 /* Allow up to one store of each input register. */
951 instores[rM-32] = 1;
952 last_prologue_pc = next_pc;
953 }
954 }
955 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
956 {
957 /* One of
958 st1 [rN] = rM
959 st2 [rN] = rM
960 st4 [rN] = rM
961 st8 [rN] = rM
962 Note that the st8 case is handled in the clause above.
963
964 Advance over stores of input registers. One store per input
965 register is permitted. */
966 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
967 int qp = (int) (instr & 0x0000000003fLL);
968 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
969 {
970 instores[rM-32] = 1;
971 last_prologue_pc = next_pc;
972 }
973 }
974 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
975 {
976 /* Either
977 stfs [rN] = fM
978 or
979 stfd [rN] = fM
980
981 Advance over stores of floating point input registers. Again
982 one store per register is permitted */
983 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
984 int qp = (int) (instr & 0x0000000003fLL);
985 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
986 {
987 infpstores[fM-8] = 1;
988 last_prologue_pc = next_pc;
989 }
16461d7d
KB		 990 }
991 else if (it == M
992 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
993 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
994 {
995 /* st8.spill [rN] = rM
996 or
997 st8.spill [rN] = rM, imm9 */
998 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
999 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1000 int qp = (int) (instr & 0x0000000003fLL);
1001 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1002 {
1003 /* We've found a spill of one of the preserved general purpose
1004 regs. Record the spill address and advance the spill
1005 register if appropriate. */
1006 if (do_fsr_stuff)
1007 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1008 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1009 /* st8.spill [rN] = rM, imm9 */
1010 spill_addr += imm9(instr);
1011 else
1012 spill_addr = 0; /* Done spilling */
1013 last_prologue_pc = next_pc;
1014 }
1015 }
16461d7d
KB		 1016
1017 pc = next_pc;
1018 }
1019
1020 if (do_fsr_stuff) {
1021 int i;
1022 CORE_ADDR addr;
3a854e23
KB		 1023 int sor, rrb_gr;
1024
1025 /* Extract the size of the rotating portion of the stack
1026 frame and the register rename base from the current
1027 frame marker. */
1028 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1029 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB		 1030
1031 for (i = 0, addr = frame->extra_info->bsp;
1032 i < frame->extra_info->sof;
1033 i++, addr += 8)
1034 {
1035 if (IS_NaT_COLLECTION_ADDR (addr))
1036 {
1037 addr += 8;
1038 }
3a854e23
KB		 1039 if (i < sor)
1040 frame->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1041 = addr;
1042 else
1043 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB		 1044
1045 if (i+32 == cfm_reg)
1046 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1047 if (i+32 == ret_reg)
1048 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1049 if (i+32 == fp_reg)
1050 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1051 }
1052 }
1053
1054 if (frame && frame->extra_info) {
1055 frame->extra_info->after_prologue = last_prologue_pc;
1056 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1057 frame->extra_info->fp_reg = fp_reg;
1058 }
1059
1060 return last_prologue_pc;
1061}
1062
1063CORE_ADDR
1064ia64_skip_prologue (CORE_ADDR pc)
1065{
1066 return examine_prologue (pc, pc+1024, 0);
1067}
1068
1069void
1070ia64_frame_init_saved_regs (struct frame_info *frame)
1071{
16461d7d
KB		 1072 if (frame->saved_regs)
1073 return;
1074
244bc108
KB		 1075 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1076 {
1077 int regno;
16461d7d 1078
244bc108 1079 frame_saved_regs_zalloc (frame);
16461d7d 1080
244bc108
KB		 1081 frame->saved_regs[IA64_VRAP_REGNUM] =
1082 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1083 frame->saved_regs[IA64_CFM_REGNUM] =
1084 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1085 frame->saved_regs[IA64_PSR_REGNUM] =
1086 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1087#if 0
1088 frame->saved_regs[IA64_BSP_REGNUM] =
1089 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1090#endif
1091 frame->saved_regs[IA64_RNAT_REGNUM] =
1092 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1093 frame->saved_regs[IA64_CCV_REGNUM] =
1094 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1095 frame->saved_regs[IA64_UNAT_REGNUM] =
1096 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1097 frame->saved_regs[IA64_FPSR_REGNUM] =
1098 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1099 frame->saved_regs[IA64_PFS_REGNUM] =
1100 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1101 frame->saved_regs[IA64_LC_REGNUM] =
1102 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1103 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1104 if (regno != sp_regnum)
1105 frame->saved_regs[regno] =
1106 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1107 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1108 frame->saved_regs[regno] =
1109 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1110 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1111 frame->saved_regs[regno] =
1112 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1113 }
1114 else
1115 {
244bc108 1116 CORE_ADDR func_start;
16461d7d 1117
244bc108
KB		 1118 func_start = get_pc_function_start (frame->pc);
1119 examine_prologue (func_start, frame->pc, frame);
1120 }
16461d7d
KB		 1121}
1122
1123void
1124ia64_get_saved_register (char *raw_buffer,
1125 int *optimized,
1126 CORE_ADDR *addrp,
1127 struct frame_info *frame,
1128 int regnum,
1129 enum lval_type *lval)
1130{
244bc108 1131 int is_dummy_frame;
16461d7d
KB		 1132
1133 if (!target_has_registers)
1134 error ("No registers.");
1135
1136 if (optimized != NULL)
1137 *optimized = 0;
244bc108
KB		 1138
1139 if (addrp != NULL)
1140 *addrp = 0;
1141
1142 if (lval != NULL)
1143 *lval = not_lval;
1144
1145 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1146
1147 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1148 {
1149 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1150 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1151 }
1152 else if (regnum == IA64_BSP_REGNUM)
1153 {
16461d7d
KB		 1154 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1155 frame->extra_info->bsp);
1156 }
1157 else if (regnum == IA64_VFP_REGNUM)
1158 {
1159 /* If the function in question uses an automatic register (r32-r127)
1160 for the frame pointer, it'll be found by ia64_find_saved_register()
1161 above. If the function lacks one of these frame pointers, we can
1162 still provide a value since we know the size of the frame */
1163 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1164 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1165 }
1166 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1167 {
2fc3ac7e 1168 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB		 1169 int pr_optim;
1170 enum lval_type pr_lval;
1171 CORE_ADDR pr_addr;
1172 int prN_val;
1173 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1174 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB		 1175 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1176 {
1177 /* Fetch predicate register rename base from current frame
1178 marker for this frame. */
1179 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1180
1181 /* Adjust the register number to account for register rotation. */
1182 regnum = IA64_PR16_REGNUM
1183 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1184 }
16461d7d
KB		 1185 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1186 regnum - IA64_PR0_REGNUM, 1);
1187 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1188 }
1189 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1190 {
2fc3ac7e 1191 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB		 1192 int unat_optim;
1193 enum lval_type unat_lval;
1194 CORE_ADDR unat_addr;
1195 int unatN_val;
1196 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1197 frame, IA64_UNAT_REGNUM, &unat_lval);
1198 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1199 regnum - IA64_NAT0_REGNUM, 1);
1200 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1201 unatN_val);
16461d7d
KB		 1202 }
1203 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1204 {
1205 int natval = 0;
1206 /* Find address of general register corresponding to nat bit we're
1207 interested in. */
244bc108
KB		 1208 CORE_ADDR gr_addr = 0;
1209
1210 if (!is_dummy_frame)
1211 {
1212 FRAME_INIT_SAVED_REGS (frame);
1213 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1214 + IA64_GR0_REGNUM];
1215 }
16461d7d
KB		 1216 if (gr_addr)
1217 {
1218 /* Compute address of nat collection bits */
1219 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1220 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1221 CORE_ADDR nat_collection;
1222 int nat_bit;
1223 /* If our nat collection address is bigger than bsp, we have to get
1224 the nat collection from rnat. Otherwise, we fetch the nat
1225 collection from the computed address. */
1226 if (nat_addr >= bsp)
1227 nat_collection = read_register (IA64_RNAT_REGNUM);
1228 else
1229 nat_collection = read_memory_integer (nat_addr, 8);
1230 nat_bit = (gr_addr >> 3) & 0x3f;
1231 natval = (nat_collection >> nat_bit) & 1;
1232 }
1233 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1234 }
1235 else if (regnum == IA64_IP_REGNUM)
1236 {
1237 CORE_ADDR pc;
1238 if (frame->next)
1239 {
1240 /* FIXME: Set *addrp, *lval when possible. */
1241 pc = ia64_frame_saved_pc (frame->next);
1242 }
1243 else
1244 {
1245 pc = read_pc ();
1246 }
1247 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1248 }
1249 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1250 {
1251 CORE_ADDR addr = 0;
1252 if (!is_dummy_frame)
1253 {
1254 FRAME_INIT_SAVED_REGS (frame);
1255 addr = frame->saved_regs[regnum];
1256 }
1257
1258 if (addr != 0)
1259 {
1260 if (lval != NULL)
1261 *lval = lval_memory;
1262 if (addrp != NULL)
1263 *addrp = addr;
1264 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1265 }
1266 else
1267 {
1268 /* r32 - r127 must be fetchable via memory. If they aren't,
1269 then the register is unavailable */
1270 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1271 }
16461d7d
KB		 1272 }
1273 else
1274 {
3a854e23
KB		 1275 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1276 {
1277 /* Fetch floating point register rename base from current
1278 frame marker for this frame. */
1279 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1280
1281 /* Adjust the floating point register number to account for
1282 register rotation. */
1283 regnum = IA64_FR32_REGNUM
1284 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1285 }
1286
244bc108
KB		 1287 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1288 regnum, lval);
16461d7d 1289 }
16461d7d
KB		 1290}
1291
1292/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1293 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1294 and TYPE is the type (which is known to be struct, union or array). */
1295int
1296ia64_use_struct_convention (int gcc_p, struct type *type)
1297{
64a5b29c
KB		 1298 struct type *float_elt_type;
1299
1300 /* HFAs are structures (or arrays) consisting entirely of floating
1301 point values of the same length. Up to 8 of these are returned
1302 in registers. Don't use the struct convention when this is the
1303 case. */
1304 float_elt_type = is_float_or_hfa_type (type);
1305 if (float_elt_type != NULL
1306 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1307 return 0;
1308
1309 /* Other structs of length 32 or less are returned in r8-r11.
1310 Don't use the struct convention for those either. */
16461d7d
KB		 1311 return TYPE_LENGTH (type) > 32;
1312}
1313
1314void
1315ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1316{
64a5b29c
KB		 1317 struct type *float_elt_type;
1318
1319 float_elt_type = is_float_or_hfa_type (type);
1320 if (float_elt_type != NULL)
1321 {
1322 int offset = 0;
1323 int regnum = IA64_FR8_REGNUM;
1324 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1325
1326 while (n-- > 0)
1327 {
1328 ia64_register_convert_to_virtual (regnum, float_elt_type,
1329 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1330 offset += TYPE_LENGTH (float_elt_type);
1331 regnum++;
1332 }
1333 }
16461d7d 1334 else
64a5b29c
KB		 1335 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1336 TYPE_LENGTH (type));
16461d7d
KB		 1337}
1338
1339/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1340 like this is necessary though since the IA-64 calling conventions specify
1341 that r8 is not preserved. */
1342static CORE_ADDR struct_return_address;
1343
1344CORE_ADDR
1345ia64_extract_struct_value_address (char *regbuf)
1346{
1347 /* FIXME: See above. */
1348 return struct_return_address;
1349}
1350
1351void
1352ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1353{
1354 /* FIXME: See above. */
1355 /* Note that most of the work was done in ia64_push_arguments() */
1356 struct_return_address = addr;
1357}
1358
1359int
1360ia64_frameless_function_invocation (struct frame_info *frame)
1361{
fbad0893
KB		 1362 FRAME_INIT_SAVED_REGS (frame);
1363 return (frame->extra_info->mem_stack_frame_size == 0);
16461d7d
KB		 1364}
1365
1366CORE_ADDR
1367ia64_saved_pc_after_call (struct frame_info *frame)
1368{
1369 return read_register (IA64_BR0_REGNUM);
1370}
1371
1372CORE_ADDR
1373ia64_frame_args_address (struct frame_info *frame)
1374{
1375 /* frame->frame points at the SP for this frame; But we want the start
1376 of the frame, not the end. Calling frame chain will get his for us. */
1377 return ia64_frame_chain (frame);
1378}
1379
1380CORE_ADDR
1381ia64_frame_locals_address (struct frame_info *frame)
1382{
1383 /* frame->frame points at the SP for this frame; But we want the start
1384 of the frame, not the end. Calling frame chain will get his for us. */
1385 return ia64_frame_chain (frame);
1386}
1387
1388void
1389ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1390{
1391 CORE_ADDR bsp, cfm;
244bc108
KB		 1392 int next_frame_is_call_dummy = ((frame->next != NULL)
1393 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1394 frame->next->frame));
16461d7d
KB		 1395
1396 frame->extra_info = (struct frame_extra_info *)
1397 frame_obstack_alloc (sizeof (struct frame_extra_info));
1398
1399 if (frame->next == 0)
1400 {
1401 bsp = read_register (IA64_BSP_REGNUM);
1402 cfm = read_register (IA64_CFM_REGNUM);
1403
1404 }
244bc108
KB		 1405 else if (frame->next->signal_handler_caller)
1406 {
1407 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1408 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1409 }
1410 else if (next_frame_is_call_dummy)
1411 {
1412 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1413 IA64_BSP_REGNUM);
1414 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1415 IA64_CFM_REGNUM);
1416 }
16461d7d
KB		 1417 else
1418 {
1419 struct frame_info *frn = frame->next;
16461d7d
KB		 1420
1421 FRAME_INIT_SAVED_REGS (frn);
1422
1423 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1424 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1425 else if (frn->next && frn->next->signal_handler_caller)
1426 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1427 else if (frn->next
1428 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1429 frn->next->frame))
1430 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1431 IA64_PFS_REGNUM);
16461d7d 1432 else
76d689a6 1433 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1434
1435 bsp = frn->extra_info->bsp;
1436 }
1437 frame->extra_info->cfm = cfm;
1438 frame->extra_info->sof = cfm & 0x7f;
1439 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1440 if (frame->next == 0
1441 || frame->next->signal_handler_caller
1442 || next_frame_is_call_dummy)
16461d7d
KB		 1443 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1444 else
1445 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1446
1447 frame->extra_info->after_prologue = 0;
1448 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1449 frame->extra_info->fp_reg = 0;
1450}
1451
64a5b29c
KB		 1452static int
1453is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1454{
1455 switch (TYPE_CODE (t))
1456 {
1457 case TYPE_CODE_FLT:
1458 if (*etp)
1459 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1460 else
1461 {
1462 *etp = t;
1463 return 1;
1464 }
1465 break;
1466 case TYPE_CODE_ARRAY:
1467 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1468 break;
1469 case TYPE_CODE_STRUCT:
1470 {
1471 int i;
1472
1473 for (i = 0; i < TYPE_NFIELDS (t); i++)
1474 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1475 return 0;
1476 return 1;
1477 }
1478 break;
1479 default:
1480 return 0;
1481 break;
1482 }
1483}
1484
1485/* Determine if the given type is one of the floating point types or
1486 and HFA (which is a struct, array, or combination thereof whose
1487 bottom-most elements are all of the same floating point type.) */
1488
1489static struct type *
1490is_float_or_hfa_type (struct type *t)
1491{
1492 struct type *et = 0;
1493
1494 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1495}
1496
1497
1498/* Attempt to find (and return) the global pointer for the given
1499 function.
1500
1501 This is a rather nasty bit of code searchs for the .dynamic section
1502 in the objfile corresponding to the pc of the function we're trying
1503 to call. Once it finds the addresses at which the .dynamic section
1504 lives in the child process, it scans the Elf64_Dyn entries for a
1505 DT_PLTGOT tag. If it finds one of these, the corresponding
1506 d_un.d_ptr value is the global pointer. */
1507
1508static CORE_ADDR
698cb3f0 1509generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1510{
76d689a6 1511 struct obj_section *faddr_sect;
64a5b29c 1512
76d689a6
KB		 1513 faddr_sect = find_pc_section (faddr);
1514 if (faddr_sect != NULL)
64a5b29c
KB		 1515 {
1516 struct obj_section *osect;
1517
76d689a6 1518 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1519 {
1520 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1521 break;
1522 }
1523
76d689a6 1524 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1525 {
1526 CORE_ADDR addr;
1527
1528 addr = osect->addr;
1529 while (addr < osect->endaddr)
1530 {
1531 int status;
1532 LONGEST tag;
1533 char buf[8];
1534
1535 status = target_read_memory (addr, buf, sizeof (buf));
1536 if (status != 0)
1537 break;
1538 tag = extract_signed_integer (buf, sizeof (buf));
1539
1540 if (tag == DT_PLTGOT)
1541 {
1542 CORE_ADDR global_pointer;
1543
1544 status = target_read_memory (addr + 8, buf, sizeof (buf));
1545 if (status != 0)
1546 break;
1547 global_pointer = extract_address (buf, sizeof (buf));
1548
1549 /* The payoff... */
1550 return global_pointer;
1551 }
1552
1553 if (tag == DT_NULL)
1554 break;
1555
1556 addr += 16;
1557 }
1558 }
1559 }
1560 return 0;
1561}
1562
1563/* Given a function's address, attempt to find (and return) the
1564 corresponding (canonical) function descriptor. Return 0 if
1565 not found. */
1566static CORE_ADDR
1567find_extant_func_descr (CORE_ADDR faddr)
1568{
76d689a6 1569 struct obj_section *faddr_sect;
64a5b29c
KB		 1570
1571 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1572 faddr_sect = find_pc_section (faddr);
1573 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1574 return faddr;
1575
76d689a6 1576 if (faddr_sect != NULL)
64a5b29c 1577 {
76d689a6
KB		 1578 struct obj_section *osect;
1579 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1580 {
1581 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1582 break;
1583 }
1584
76d689a6 1585 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1586 {
1587 CORE_ADDR addr;
1588
1589 addr = osect->addr;
1590 while (addr < osect->endaddr)
1591 {
1592 int status;
1593 LONGEST faddr2;
1594 char buf[8];
1595
1596 status = target_read_memory (addr, buf, sizeof (buf));
1597 if (status != 0)
1598 break;
1599 faddr2 = extract_signed_integer (buf, sizeof (buf));
1600
1601 if (faddr == faddr2)
1602 return addr;
1603
1604 addr += 16;
1605 }
1606 }
1607 }
1608 return 0;
1609}
1610
1611/* Attempt to find a function descriptor corresponding to the
1612 given address. If none is found, construct one on the
1613 stack using the address at fdaptr */
1614
1615static CORE_ADDR
1616find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1617{
1618 CORE_ADDR fdesc;
1619
1620 fdesc = find_extant_func_descr (faddr);
1621
1622 if (fdesc == 0)
1623 {
1624 CORE_ADDR global_pointer;
1625 char buf[16];
1626
1627 fdesc = *fdaptr;
1628 *fdaptr += 16;
1629
698cb3f0 1630 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB		 1631
1632 if (global_pointer == 0)
1633 global_pointer = read_register (IA64_GR1_REGNUM);
1634
1635 store_address (buf, 8, faddr);
1636 store_address (buf + 8, 8, global_pointer);
1637
1638 write_memory (fdesc, buf, 16);
1639 }
1640
1641 return fdesc;
1642}
16461d7d
KB		 1643
1644CORE_ADDR
1645ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1646 int struct_return, CORE_ADDR struct_addr)
1647{
1648 int argno;
1649 value_ptr arg;
1650 struct type *type;
1651 int len, argoffset;
64a5b29c 1652 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1653 int floatreg;
64a5b29c 1654 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1655
1656 nslots = 0;
64a5b29c 1657 nfuncargs = 0;
16461d7d
KB		 1658 /* Count the number of slots needed for the arguments */
1659 for (argno = 0; argno < nargs; argno++)
1660 {
1661 arg = args[argno];
1662 type = check_typedef (VALUE_TYPE (arg));
1663 len = TYPE_LENGTH (type);
1664
1665 /* FIXME: This is crude and it is wrong (IMO), but it matches
1666 what gcc does, I think. */
1667 if (len > 8 && (nslots & 1))
1668 nslots++;
1669
64a5b29c
KB		 1670 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1671 nfuncargs++;
1672
16461d7d
KB		 1673 nslots += (len + 7) / 8;
1674 }
1675
64a5b29c 1676 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1677 rseslots = (nslots > 8) ? 8 : nslots;
1678 memslots = nslots - rseslots;
1679
64a5b29c 1680 /* Allocate a new RSE frame */
16461d7d
KB		 1681 cfm = read_register (IA64_CFM_REGNUM);
1682
1683 bsp = read_register (IA64_BSP_REGNUM);
1684 bsp = rse_address_add (bsp, cfm & 0x7f);
1685 new_bsp = rse_address_add (bsp, rseslots);
1686 write_register (IA64_BSP_REGNUM, new_bsp);
1687
1688 pfs = read_register (IA64_PFS_REGNUM);
1689 pfs &= 0xc000000000000000LL;
1690 pfs |= (cfm & 0xffffffffffffLL);
1691 write_register (IA64_PFS_REGNUM, pfs);
1692
1693 cfm &= 0xc000000000000000LL;
1694 cfm |= rseslots;
1695 write_register (IA64_CFM_REGNUM, cfm);
1696
64a5b29c
KB		 1697 /* We will attempt to find function descriptors in the .opd segment,
1698 but if we can't we'll construct them ourselves. That being the
1699 case, we'll need to reserve space on the stack for them. */
1700 funcdescaddr = sp - nfuncargs * 16;
1701 funcdescaddr &= ~0xfLL;
1702
1703 /* Adjust the stack pointer to it's new value. The calling conventions
1704 require us to have 16 bytes of scratch, plus whatever space is
1705 necessary for the memory slots and our function descriptors */
1706 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1707 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1708
64a5b29c
KB		 1709 /* Place the arguments where they belong. The arguments will be
1710 either placed in the RSE backing store or on the memory stack.
1711 In addition, floating point arguments or HFAs are placed in
1712 floating point registers. */
16461d7d
KB		 1713 slotnum = 0;
1714 floatreg = IA64_FR8_REGNUM;
1715 for (argno = 0; argno < nargs; argno++)
1716 {
64a5b29c
KB		 1717 struct type *float_elt_type;
1718
16461d7d
KB		 1719 arg = args[argno];
1720 type = check_typedef (VALUE_TYPE (arg));
1721 len = TYPE_LENGTH (type);
64a5b29c
KB		 1722
1723 /* Special handling for function parameters */
1724 if (len == 8
1725 && TYPE_CODE (type) == TYPE_CODE_PTR
1726 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1727 {
1728 char val_buf[8];
1729
1730 store_address (val_buf, 8,
1731 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1732 &funcdescaddr));
1733 if (slotnum < rseslots)
1734 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1735 else
1736 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1737 slotnum++;
1738 continue;
1739 }
1740
1741 /* Normal slots */
16461d7d
KB		 1742 if (len > 8 && (slotnum & 1))
1743 slotnum++;
1744 argoffset = 0;
1745 while (len > 0)
1746 {
1747 char val_buf[8];
1748
1749 memset (val_buf, 0, 8);
1750 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1751
1752 if (slotnum < rseslots)
1753 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1754 else
1755 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1756
1757 argoffset += 8;
1758 len -= 8;
1759 slotnum++;
1760 }
64a5b29c
KB		 1761
1762 /* Handle floating point types (including HFAs) */
1763 float_elt_type = is_float_or_hfa_type (type);
1764 if (float_elt_type != NULL)
1765 {
1766 argoffset = 0;
1767 len = TYPE_LENGTH (type);
1768 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1769 {
1770 ia64_register_convert_to_raw (
1771 float_elt_type,
1772 floatreg,
1773 VALUE_CONTENTS (arg) + argoffset,
1774 &registers[REGISTER_BYTE (floatreg)]);
1775 floatreg++;
1776 argoffset += TYPE_LENGTH (float_elt_type);
1777 len -= TYPE_LENGTH (float_elt_type);
1778 }
16461d7d
KB		 1779 }
1780 }
1781
64a5b29c 1782 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1783 if (struct_return)
1784 {
1785 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1786 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1787 struct_addr);
1788 }
1789
64a5b29c 1790 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1791 target_store_registers (-1);
1792
1793 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1794 to be defined to call generic_save_dummy_frame_tos(). But at the
1795 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1796 I chose to put this call here instead of using the old mechanisms.
1797 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1798 line
1799
1800 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1801
1802 to ia64_gdbarch_init() and remove the line below. */
1803 generic_save_dummy_frame_tos (sp);
1804
1805 return sp;
1806}
1807
1808CORE_ADDR
1809ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1810{
698cb3f0 1811 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1812
64a5b29c
KB		 1813 if (global_pointer != 0)
1814 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1815
1816 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1817 return sp;
1818}
1819
1820void
1821ia64_store_return_value (struct type *type, char *valbuf)
1822{
1823 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1824 {
1825 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1826 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1827 target_store_registers (IA64_FR8_REGNUM);
1828 }
1829 else
1830 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1831 valbuf, TYPE_LENGTH (type));
1832}
1833
1834void
1835ia64_pop_frame (void)
1836{
1837 generic_pop_current_frame (ia64_pop_frame_regular);
1838}
1839
1840static void
1841ia64_pop_frame_regular (struct frame_info *frame)
1842{
1843 int regno;
1844 CORE_ADDR bsp, cfm, pfs;
1845
1846 FRAME_INIT_SAVED_REGS (frame);
1847
1848 for (regno = 0; regno < ia64_num_regs; regno++)
1849 {
1850 if (frame->saved_regs[regno]
1851 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1852 && regno != pc_regnum
1853 && regno != sp_regnum
1854 && regno != IA64_PFS_REGNUM
1855 && regno != IA64_CFM_REGNUM
1856 && regno != IA64_BSP_REGNUM
1857 && regno != IA64_BSPSTORE_REGNUM)
1858 {
1859 write_register (regno,
1860 read_memory_integer (frame->saved_regs[regno],
1861 REGISTER_RAW_SIZE (regno)));
1862 }
1863 }
1864
1865 write_register (sp_regnum, FRAME_CHAIN (frame));
1866 write_pc (FRAME_SAVED_PC (frame));
1867
1868 cfm = read_register (IA64_CFM_REGNUM);
1869
1870 if (frame->saved_regs[IA64_PFS_REGNUM])
1871 {
1872 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1873 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1874 }
1875 else
1876 pfs = read_register (IA64_PFS_REGNUM);
1877
1878 /* Compute the new bsp by *adding* the difference between the
1879 size of the frame and the size of the locals (both wrt the
1880 frame that we're going back to). This seems kind of strange,
1881 especially since it seems like we ought to be subtracting the
1882 size of the locals... and we should; but the linux kernel
1883 wants bsp to be set at the end of all used registers. It's
1884 likely that this code will need to be revised to accomodate
1885 other operating systems. */
1886 bsp = rse_address_add (frame->extra_info->bsp,
1887 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1888 write_register (IA64_BSP_REGNUM, bsp);
1889
1890 /* FIXME: What becomes of the epilog count in the PFS? */
1891 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1892 write_register (IA64_CFM_REGNUM, cfm);
1893
1894 flush_cached_frames ();
1895}
1896
1897static void
1898ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1899 CORE_ADDR *targ_addr, int *targ_len)
1900{
1901 *targ_addr = memaddr;
1902 *targ_len = nr_bytes;
1903}
1904
244bc108
KB		 1905static void
1906process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1907{
1908 int *os_ident_ptr = obj;
1909 const char *name;
1910 unsigned int sectsize;
1911
1912 name = bfd_get_section_name (abfd, sect);
1913 sectsize = bfd_section_size (abfd, sect);
1914 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1915 {
1916 unsigned int name_length, data_length, note_type;
1917 char *note = alloca (sectsize);
1918
1919 bfd_get_section_contents (abfd, sect, note,
1920 (file_ptr) 0, (bfd_size_type) sectsize);
1921
1922 name_length = bfd_h_get_32 (abfd, note);
1923 data_length = bfd_h_get_32 (abfd, note + 4);
1924 note_type = bfd_h_get_32 (abfd, note + 8);
1925
1926 if (name_length == 4 && data_length == 16 && note_type == 1
1927 && strcmp (note + 12, "GNU") == 0)
1928 {
1929 int os_number = bfd_h_get_32 (abfd, note + 16);
1930
1931 /* The case numbers are from abi-tags in glibc */
1932 switch (os_number)
1933 {
1934 case 0 :
1935 *os_ident_ptr = ELFOSABI_LINUX;
1936 break;
244bc108
KB		 1937 case 1 :
1938 *os_ident_ptr = ELFOSABI_HURD;
1939 break;
1940 case 2 :
1941 *os_ident_ptr = ELFOSABI_SOLARIS;
1942 break;
244bc108 1943 default :
8e65ff28
AC		 1944 internal_error (__FILE__, __LINE__,
1945 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB		 1946 break;
1947 }
1948 }
1949 }
1950}
1951
16461d7d
KB		 1952static struct gdbarch *
1953ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1954{
1955 struct gdbarch *gdbarch;
244bc108
KB		 1956 struct gdbarch_tdep *tdep;
1957 int os_ident;
1958
1959 if (info.abfd != NULL
1960 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1961 {
1962 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
1963
1964 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 1965 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 1966 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1967 zero. So we have to check for note sections too. */
1968 if (os_ident == 0)
1969 {
1970 bfd_map_over_sections (info.abfd,
1971 process_note_abi_tag_sections,
1972 &os_ident);
1973 }
1974 }
1975 else
1976 os_ident = -1;
16461d7d 1977
244bc108
KB		 1978 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1979 arches != NULL;
1980 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1981 {
1982 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
1983 continue;
1984 return arches->gdbarch;
1985 }
16461d7d 1986
244bc108
KB		 1987 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1988 gdbarch = gdbarch_alloc (&info, tdep);
1989 tdep->os_ident = os_ident;
1990
d7fa2ae2
KB		 1991
1992 /* Set the method of obtaining the sigcontext addresses at which
1993 registers are saved. The method of checking to see if
1994 native_find_global_pointer is nonzero to indicate that we're
1995 on AIX is kind of hokey, but I can't think of a better way
1996 to do it. */
244bc108
KB		 1997 if (os_ident == ELFOSABI_LINUX)
1998 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB		 1999 else if (native_find_global_pointer != 0)
2000 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB		 2001 else
2002 tdep->sigcontext_register_address = 0;
16461d7d 2003
698cb3f0
KB		 2004 /* We know that Linux won't have to resort to the native_find_global_pointer
2005 hackery. But that's the only one we know about so far, so if
2006 native_find_global_pointer is set to something non-zero, then use
2007 it. Otherwise fall back to using generic_elf_find_global_pointer.
2008 This arrangement should (in theory) allow us to cross debug Linux
2009 binaries from an AIX machine. */
2010 if (os_ident == ELFOSABI_LINUX)
2011 tdep->find_global_pointer = generic_elf_find_global_pointer;
2012 else if (native_find_global_pointer != 0)
2013 tdep->find_global_pointer = native_find_global_pointer;
2014 else
2015 tdep->find_global_pointer = generic_elf_find_global_pointer;
2016
16461d7d
KB		 2017 set_gdbarch_short_bit (gdbarch, 16);
2018 set_gdbarch_int_bit (gdbarch, 32);
2019 set_gdbarch_long_bit (gdbarch, 64);
2020 set_gdbarch_long_long_bit (gdbarch, 64);
2021 set_gdbarch_float_bit (gdbarch, 32);
2022 set_gdbarch_double_bit (gdbarch, 64);
2023 set_gdbarch_long_double_bit (gdbarch, 64);
2024 set_gdbarch_ptr_bit (gdbarch, 64);
2025
2026 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2027 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2028 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2029 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2030 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 2031
2032 set_gdbarch_register_name (gdbarch, ia64_register_name);
2033 set_gdbarch_register_size (gdbarch, 8);
2034 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2035 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2036 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2037 set_gdbarch_max_register_raw_size (gdbarch, 16);
2038 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2039 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2040 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2041
2042 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2043
2044 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2045 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2046
2047 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2048
2049 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2050 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 2051 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2052
2053 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2054 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2055
2056 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2057 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2058 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2059
2060 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2061 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
2062
2063 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2064 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
2065 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2066
2067 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2068 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2069 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2070 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2071 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2072
2073 /* Settings for calling functions in the inferior. */
2074 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2075 set_gdbarch_call_dummy_length (gdbarch, 0);
2076 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2077 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2078 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2079
2080 set_gdbarch_call_dummy_p (gdbarch, 1);
2081 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2082 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2083 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2084 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2085 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2086 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2087
2088 /* We won't necessarily have a frame pointer and even if we do,
2089 it winds up being extraordinarly messy when attempting to find
2090 the frame chain. So for the purposes of creating frames (which
2091 is all read_fp() is used for), simply use the stack pointer value
2092 instead. */
2093 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2094 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2095
2096 /* Settings that should be unnecessary. */
2097 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2098
2099 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2100 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2101
2102 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2103 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2104 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2105 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2106 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2107 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2108 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2109 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2110
2111 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2112 set_gdbarch_function_start_offset (gdbarch, 0);
2113
2114 set_gdbarch_remote_translate_xfer_address (
2115 gdbarch, ia64_remote_translate_xfer_address);
2116
2117 return gdbarch;
2118}
2119
2120void
2121_initialize_ia64_tdep (void)
2122{
2123 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2124
2125 tm_print_insn = print_insn_ia64;
2126 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2127}
GDB Binutils - Deliverables
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