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[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
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16461d7d
KB		 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2 Copyright 1999, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
26#include "floatformat.h"
27
28#include "objfiles.h"
29#include "elf/common.h" /* for DT_PLTGOT value */
30
31typedef enum instruction_type
32{
33 A, /* Integer ALU ; I-unit or M-unit */
34 I, /* Non-ALU integer; I-unit */
35 M, /* Memory ; M-unit */
36 F, /* Floating-point ; F-unit */
37 B, /* Branch ; B-unit */
38 L, /* Extended (L+X) ; I-unit */
39 X, /* Extended (L+X) ; I-unit */
40 undefined /* undefined or reserved */
41} instruction_type;
42
43/* We represent IA-64 PC addresses as the value of the instruction
44 pointer or'd with some bit combination in the low nibble which
45 represents the slot number in the bundle addressed by the
46 instruction pointer. The problem is that the Linux kernel
47 multiplies its slot numbers (for exceptions) by one while the
48 disassembler multiplies its slot numbers by 6. In addition, I've
49 heard it said that the simulator uses 1 as the multiplier.
50
51 I've fixed the disassembler so that the bytes_per_line field will
52 be the slot multiplier. If bytes_per_line comes in as zero, it
53 is set to six (which is how it was set up initially). -- objdump
54 displays pretty disassembly dumps with this value. For our purposes,
55 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
56 never want to also display the raw bytes the way objdump does. */
57
58#define SLOT_MULTIPLIER 1
59
60/* Length in bytes of an instruction bundle */
61
62#define BUNDLE_LEN 16
63
64extern void _initialize_ia64_tdep (void);
65
66static gdbarch_init_ftype ia64_gdbarch_init;
67
68static gdbarch_register_name_ftype ia64_register_name;
69static gdbarch_register_raw_size_ftype ia64_register_raw_size;
70static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
71static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
72static gdbarch_register_byte_ftype ia64_register_byte;
73static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
74static gdbarch_frame_chain_ftype ia64_frame_chain;
75static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
76static gdbarch_skip_prologue_ftype ia64_skip_prologue;
77static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
78static gdbarch_get_saved_register_ftype ia64_get_saved_register;
79static gdbarch_extract_return_value_ftype ia64_extract_return_value;
80static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
81static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
82static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
83static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
84static gdbarch_store_return_value_ftype ia64_store_return_value;
85static gdbarch_store_struct_return_ftype ia64_store_struct_return;
86static gdbarch_push_arguments_ftype ia64_push_arguments;
87static gdbarch_push_return_address_ftype ia64_push_return_address;
88static gdbarch_pop_frame_ftype ia64_pop_frame;
89static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 90static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 91static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 92
93static int ia64_num_regs = 590;
94
95static int pc_regnum = IA64_IP_REGNUM;
96static int sp_regnum = IA64_GR12_REGNUM;
97static int fp_regnum = IA64_VFP_REGNUM;
98static int lr_regnum = IA64_VRAP_REGNUM;
99
100static LONGEST ia64_call_dummy_words[] = {0};
101
102/* Array of register names; There should be ia64_num_regs strings in
103 the initializer. */
104
105static char *ia64_register_names[] =
106{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
107 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
108 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
109 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
110 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
111 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
112 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
113 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
114 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
115 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
116 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
117 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
118 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
119 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
120 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
121 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
122
123 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
124 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
125 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
126 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
127 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
128 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
129 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
130 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
131 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
132 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
133 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
134 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
135 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
136 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
137 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
138 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
139
140 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
141 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
142 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
143 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
144 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
145 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
146 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
147 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
148
149 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
150
151 "vfp", "vrap",
152
153 "pr", "ip", "psr", "cfm",
154
155 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
156 "", "", "", "", "", "", "", "",
157 "rsc", "bsp", "bspstore", "rnat",
158 "", "fcr", "", "",
159 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
160 "ccv", "", "", "", "unat", "", "", "",
161 "fpsr", "", "", "", "itc",
162 "", "", "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "", "",
164 "pfs", "lc", "ec",
165 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
171 "",
172 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
173 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
174 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
175 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
176 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
177 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
178 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
179 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
180 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
181 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
182 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
183 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
184 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
185 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
186 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
187 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
188};
189
190struct frame_extra_info
191{
192 CORE_ADDR bsp; /* points at r32 for the current frame */
193 CORE_ADDR cfm; /* cfm value for current frame */
194 int sof; /* Size of frame (decoded from cfm value) */
195 int sol; /* Size of locals (decoded from cfm value) */
196 CORE_ADDR after_prologue;
197 /* Address of first instruction after the last
198 prologue instruction; Note that there may
199 be instructions from the function's body
200 intermingled with the prologue. */
201 int mem_stack_frame_size;
202 /* Size of the memory stack frame (may be zero),
203 or -1 if it has not been determined yet. */
204 int fp_reg; /* Register number (if any) used a frame pointer
205 for this frame. 0 if no register is being used
206 as the frame pointer. */
207};
208
209static char *
210ia64_register_name (int reg)
211{
212 return ia64_register_names[reg];
213}
214
215int
216ia64_register_raw_size (int reg)
217{
218 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
219}
220
221int
222ia64_register_virtual_size (int reg)
223{
224 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
225}
226
227/* Return true iff register N's virtual format is different from
228 its raw format. */
229int
230ia64_register_convertible (int nr)
231{
232 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
233}
234
235const struct floatformat floatformat_ia64_ext =
236{
237 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
238 floatformat_intbit_yes
239};
240
241void
242ia64_register_convert_to_virtual (int regnum, struct type *type,
243 char *from, char *to)
244{
245 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
246 {
247 DOUBLEST val;
248 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
249 store_floating(to, TYPE_LENGTH(type), val);
250 }
251 else
252 error("ia64_register_convert_to_virtual called with non floating point register number");
253}
254
255void
256ia64_register_convert_to_raw (struct type *type, int regnum,
257 char *from, char *to)
258{
259 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
260 {
261 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
262 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
263 }
264 else
265 error("ia64_register_convert_to_raw called with non floating point register number");
266}
267
268struct type *
269ia64_register_virtual_type (int reg)
270{
271 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
272 return builtin_type_long_double;
273 else
274 return builtin_type_long;
275}
276
277int
278ia64_register_byte (int reg)
279{
280 return (8 * reg) +
281 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
282}
283
284/* Extract ``len'' bits from an instruction bundle starting at
285 bit ``from''. */
286
287long long
288extract_bit_field (char *bundle, int from, int len)
289{
290 long long result = 0LL;
291 int to = from + len;
292 int from_byte = from / 8;
293 int to_byte = to / 8;
294 unsigned char *b = (unsigned char *) bundle;
295 unsigned char c;
296 int lshift;
297 int i;
298
299 c = b[from_byte];
300 if (from_byte == to_byte)
301 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
302 result = c >> (from % 8);
303 lshift = 8 - (from % 8);
304
305 for (i = from_byte+1; i < to_byte; i++)
306 {
307 result |= ((long long) b[i]) << lshift;
308 lshift += 8;
309 }
310
311 if (from_byte < to_byte && (to % 8 != 0))
312 {
313 c = b[to_byte];
314 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
315 result |= ((long long) c) << lshift;
316 }
317
318 return result;
319}
320
321/* Replace the specified bits in an instruction bundle */
322
323void
324replace_bit_field (char *bundle, long long val, int from, int len)
325{
326 int to = from + len;
327 int from_byte = from / 8;
328 int to_byte = to / 8;
329 unsigned char *b = (unsigned char *) bundle;
330 unsigned char c;
331
332 if (from_byte == to_byte)
333 {
334 unsigned char left, right;
335 c = b[from_byte];
336 left = (c >> (to % 8)) << (to % 8);
337 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
338 c = (unsigned char) (val & 0xff);
339 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
340 c |= right | left;
341 b[from_byte] = c;
342 }
343 else
344 {
345 int i;
346 c = b[from_byte];
347 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
348 c = c | (val << (from % 8));
349 b[from_byte] = c;
350 val >>= 8 - from % 8;
351
352 for (i = from_byte+1; i < to_byte; i++)
353 {
354 c = val & 0xff;
355 val >>= 8;
356 b[i] = c;
357 }
358
359 if (to % 8 != 0)
360 {
361 unsigned char cv = (unsigned char) val;
362 c = b[to_byte];
363 c = c >> (to % 8) << (to % 8);
364 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
365 b[to_byte] = c;
366 }
367 }
368}
369
370/* Return the contents of slot N (for N = 0, 1, or 2) in
371 and instruction bundle */
372
373long long
374slotN_contents (unsigned char *bundle, int slotnum)
375{
376 return extract_bit_field (bundle, 5+41*slotnum, 41);
377}
378
379/* Store an instruction in an instruction bundle */
380
381void
382replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
383{
384 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
385}
386
64a5b29c 387static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 388{
389 { M, I, I }, /* 00 */
390 { M, I, I }, /* 01 */
391 { M, I, I }, /* 02 */
392 { M, I, I }, /* 03 */
393 { M, L, X }, /* 04 */
394 { M, L, X }, /* 05 */
395 { undefined, undefined, undefined }, /* 06 */
396 { undefined, undefined, undefined }, /* 07 */
397 { M, M, I }, /* 08 */
398 { M, M, I }, /* 09 */
399 { M, M, I }, /* 0A */
400 { M, M, I }, /* 0B */
401 { M, F, I }, /* 0C */
402 { M, F, I }, /* 0D */
403 { M, M, F }, /* 0E */
404 { M, M, F }, /* 0F */
405 { M, I, B }, /* 10 */
406 { M, I, B }, /* 11 */
407 { M, B, B }, /* 12 */
408 { M, B, B }, /* 13 */
409 { undefined, undefined, undefined }, /* 14 */
410 { undefined, undefined, undefined }, /* 15 */
411 { B, B, B }, /* 16 */
412 { B, B, B }, /* 17 */
413 { M, M, B }, /* 18 */
414 { M, M, B }, /* 19 */
415 { undefined, undefined, undefined }, /* 1A */
416 { undefined, undefined, undefined }, /* 1B */
417 { M, F, B }, /* 1C */
418 { M, F, B }, /* 1D */
419 { undefined, undefined, undefined }, /* 1E */
420 { undefined, undefined, undefined }, /* 1F */
421};
422
423/* Fetch and (partially) decode an instruction at ADDR and return the
424 address of the next instruction to fetch. */
425
426static CORE_ADDR
427fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
428{
429 char bundle[BUNDLE_LEN];
430 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
431 long long template;
432 int val;
433
434 if (slotnum > 2)
435 error("Can't fetch instructions for slot numbers greater than 2.");
436
437 addr &= ~0x0f;
438
439 val = target_read_memory (addr, bundle, BUNDLE_LEN);
440
441 if (val != 0)
442 return 0;
443
444 *instr = slotN_contents (bundle, slotnum);
445 template = extract_bit_field (bundle, 0, 5);
446 *it = template_encoding_table[(int)template][slotnum];
447
64a5b29c 448 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 449 addr += 16;
450 else
451 addr += (slotnum + 1) * SLOT_MULTIPLIER;
452
453 return addr;
454}
455
456/* There are 5 different break instructions (break.i, break.b,
457 break.m, break.f, and break.x), but they all have the same
458 encoding. (The five bit template in the low five bits of the
459 instruction bundle distinguishes one from another.)
460
461 The runtime architecture manual specifies that break instructions
462 used for debugging purposes must have the upper two bits of the 21
463 bit immediate set to a 0 and a 1 respectively. A breakpoint
464 instruction encodes the most significant bit of its 21 bit
465 immediate at bit 36 of the 41 bit instruction. The penultimate msb
466 is at bit 25 which leads to the pattern below.
467
468 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
469 it turns out that 0x80000 was used as the syscall break in the early
470 simulators. So I changed the pattern slightly to do "break.i 0x080001"
471 instead. But that didn't work either (I later found out that this
472 pattern was used by the simulator that I was using.) So I ended up
473 using the pattern seen below. */
474
475#if 0
476#define BREAKPOINT 0x00002000040LL
477#endif
478#define BREAKPOINT 0x00003333300LL
479
480static int
481ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
482{
483 char bundle[BUNDLE_LEN];
484 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
485 long long instr;
486 int val;
487
488 if (slotnum > 2)
489 error("Can't insert breakpoint for slot numbers greater than 2.");
490
491 addr &= ~0x0f;
492
493 val = target_read_memory (addr, bundle, BUNDLE_LEN);
494 instr = slotN_contents (bundle, slotnum);
495 memcpy(contents_cache, &instr, sizeof(instr));
496 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
497 if (val == 0)
498 target_write_memory (addr, bundle, BUNDLE_LEN);
499
500 return val;
501}
502
503static int
504ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
505{
506 char bundle[BUNDLE_LEN];
507 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
508 long long instr;
509 int val;
510
511 addr &= ~0x0f;
512
513 val = target_read_memory (addr, bundle, BUNDLE_LEN);
514 memcpy (&instr, contents_cache, sizeof instr);
515 replace_slotN_contents (bundle, instr, slotnum);
516 if (val == 0)
517 target_write_memory (addr, bundle, BUNDLE_LEN);
518
519 return val;
520}
521
522/* We don't really want to use this, but remote.c needs to call it in order
523 to figure out if Z-packets are supported or not. Oh, well. */
524unsigned char *
525ia64_breakpoint_from_pc (pcptr, lenptr)
526 CORE_ADDR *pcptr;
527 int *lenptr;
528{
529 static unsigned char breakpoint[] =
530 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
531 *lenptr = sizeof (breakpoint);
532#if 0
533 *pcptr &= ~0x0f;
534#endif
535 return breakpoint;
536}
537
538CORE_ADDR
539ia64_read_pc (int pid)
540{
541 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
542 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
543 int slot_num = (psr_value >> 41) & 3;
544
545 return pc_value | (slot_num * SLOT_MULTIPLIER);
546}
547
548void
549ia64_write_pc (CORE_ADDR new_pc, int pid)
550{
551 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
552 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
553 psr_value &= ~(3LL << 41);
554 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
555
556 new_pc &= ~0xfLL;
557
558 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
559 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
560}
561
562#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
563
564/* Returns the address of the slot that's NSLOTS slots away from
565 the address ADDR. NSLOTS may be positive or negative. */
566static CORE_ADDR
567rse_address_add(CORE_ADDR addr, int nslots)
568{
569 CORE_ADDR new_addr;
570 int mandatory_nat_slots = nslots / 63;
571 int direction = nslots < 0 ? -1 : 1;
572
573 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
574
575 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
576 new_addr += 8 * direction;
577
578 if (IS_NaT_COLLECTION_ADDR(new_addr))
579 new_addr += 8 * direction;
580
581 return new_addr;
582}
583
584/* The IA-64 frame chain is a bit odd. We won't always have a frame
585 pointer, so we use the SP value as the FP for the purpose of
586 creating a frame. There is sometimes a register (not fixed) which
587 is used as a frame pointer. When this register exists, it is not
588 especially hard to determine which one is being used. It isn't
589 even really hard to compute the frame chain, but it can be
590 computationally expensive. So, instead of making life difficult
591 (and slow), we pick a more convenient representation of the frame
592 chain, knowing that we'll have to make some small adjustments
593 in other places. (E.g, note that read_fp() and write_fp() are
594 actually read_sp() and write_sp() below in ia64_gdbarch_init()
595 below.)
596
597 Okay, so what is the frame chain exactly? It'll be the SP value
598 at the time that the function in question was entered.
599
600 Note that this *should* actually the frame pointer for the current
601 function! But as I note above, if we were to attempt to find the
602 address of the beginning of the previous frame, we'd waste a lot
603 of cycles for no good reason. So instead, we simply choose to
604 represent the frame chain as the end of the previous frame instead
605 of the beginning. */
606
607CORE_ADDR
608ia64_frame_chain (struct frame_info *frame)
609{
610 FRAME_INIT_SAVED_REGS (frame);
611
612 if (frame->saved_regs[IA64_VFP_REGNUM])
613 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
614 else
615 return frame->frame + frame->extra_info->mem_stack_frame_size;
616}
617
618CORE_ADDR
619ia64_frame_saved_pc (struct frame_info *frame)
620{
621 FRAME_INIT_SAVED_REGS (frame);
622
623 if (frame->saved_regs[IA64_VRAP_REGNUM])
624 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
625 else /* either frameless, or not far enough along in the prologue... */
626 return ia64_saved_pc_after_call (frame);
627}
628
629#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
630 || (8 <= (_regnum_) && (_regnum_) <= 11) \
631 || (14 <= (_regnum_) && (_regnum_) <= 31))
632#define imm9(_instr_) \
633 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
634 | (((_instr_) & 0x00008000000LL) >> 20) \
635 | (((_instr_) & 0x00000001fc0LL) >> 6))
636
637static CORE_ADDR
638examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
639{
640 CORE_ADDR next_pc;
641 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 642 instruction_type it;
643 long long instr;
644 int do_fsr_stuff = 0;
645
646 int cfm_reg = 0;
647 int ret_reg = 0;
648 int fp_reg = 0;
649 int unat_save_reg = 0;
650 int pr_save_reg = 0;
651 int mem_stack_frame_size = 0;
652 int spill_reg = 0;
653 CORE_ADDR spill_addr = 0;
654
655 if (frame && !frame->saved_regs)
656 {
657 frame_saved_regs_zalloc (frame);
658 do_fsr_stuff = 1;
659 }
660
661 if (frame
662 && !do_fsr_stuff
663 && frame->extra_info->after_prologue != 0
664 && frame->extra_info->after_prologue <= lim_pc)
665 return frame->extra_info->after_prologue;
666
667 /* Must start with an alloc instruction */
668 next_pc = fetch_instruction (pc, &it, &instr);
669 if (pc < lim_pc && next_pc
670 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
671 {
672 /* alloc */
673 int sor = (int) ((instr & 0x00078000000LL) >> 27);
674 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
675 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
676 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
677 we could compare against the size given to us via the cfm as
678 either a sanity check or possibly to see if the frame has been
679 changed by a later alloc instruction... */
680 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
681 cfm_reg = rN;
682 last_prologue_pc = next_pc;
683 pc = next_pc;
684 }
685 else
686 pc = lim_pc; /* We're done early */
687
688 /* Loop, looking for prologue instructions, keeping track of
689 where preserved registers were spilled. */
690 while (pc < lim_pc)
691 {
692 next_pc = fetch_instruction (pc, &it, &instr);
693 if (next_pc == 0)
694 break;
695
696 if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
697 {
698 /* Move from BR */
699 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
700 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
701 int qp = (int) (instr & 0x0000000003f);
702
703 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
704 {
705 ret_reg = rN;
706 last_prologue_pc = next_pc;
707 }
708 }
709 else if ((it == I || it == M)
710 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
711 {
712 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
713 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
714 | ((instr & 0x001f8000000LL) >> 20)
715 | ((instr & 0x000000fe000LL) >> 13));
716 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
717 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
718 int qp = (int) (instr & 0x0000000003fLL);
719
720 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
721 {
722 /* mov rN, r12 */
723 fp_reg = rN;
724 last_prologue_pc = next_pc;
725 }
726 else if (qp == 0 && rN == 12 && rM == 12)
727 {
728 /* adds r12, -mem_stack_frame_size, r12 */
729 mem_stack_frame_size -= imm;
730 last_prologue_pc = next_pc;
731 }
732 else if (qp == 0 && rN == 2
733 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
734 {
735 /* adds r2, spilloffset, rFramePointer
736 or
737 adds r2, spilloffset, r12
738
739 Get ready for stf.spill or st8.spill instructions.
740 The address to start spilling at is loaded into r2.
741 FIXME: Why r2? That's what gcc currently uses; it
742 could well be different for other compilers. */
743
744 /* Hmm... whether or not this will work will depend on
745 where the pc is. If it's still early in the prologue
746 this'll be wrong. FIXME */
747 spill_addr = (frame ? frame->frame : 0)
748 + (rM == 12 ? 0 : mem_stack_frame_size)
749 + imm;
750 spill_reg = rN;
751 last_prologue_pc = next_pc;
752 }
753 }
754 else if (it == M
755 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
756 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
757 {
758 /* stf.spill [rN] = fM, imm9
759 or
760 stf.spill [rN] = fM */
761
762 int imm = imm9(instr);
763 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
764 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
765 int qp = (int) (instr & 0x0000000003fLL);
766 if (qp == 0 && rN == spill_reg && spill_addr != 0
767 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
768 {
769 if (do_fsr_stuff)
770 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
771
772 if ((instr & 0x1efc0000000) == 0x0eec0000000)
773 spill_addr += imm;
774 else
775 spill_addr = 0; /* last one; must be done */
776 last_prologue_pc = next_pc;
777 }
778 }
779 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
780 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
781 {
782 /* mov.m rN = arM
783 or
784 mov.i rN = arM */
785
786 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
787 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
788 int qp = (int) (instr & 0x0000000003fLL);
789 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
790 {
791 /* We have something like "mov.m r3 = ar.unat". Remember the
792 r3 (or whatever) and watch for a store of this register... */
793 unat_save_reg = rN;
794 last_prologue_pc = next_pc;
795 }
796 }
797 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
798 {
799 /* mov rN = pr */
800 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
801 int qp = (int) (instr & 0x0000000003fLL);
802 if (qp == 0 && isScratch (rN))
803 {
804 pr_save_reg = rN;
805 last_prologue_pc = next_pc;
806 }
807 }
808 else if (it == M
809 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
810 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
811 {
812 /* st8 [rN] = rM
813 or
814 st8 [rN] = rM, imm9 */
815 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
816 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
817 int qp = (int) (instr & 0x0000000003fLL);
818 if (qp == 0 && rN == spill_reg && spill_addr != 0
819 && (rM == unat_save_reg || rM == pr_save_reg))
820 {
821 /* We've found a spill of either the UNAT register or the PR
822 register. (Well, not exactly; what we've actually found is
823 a spill of the register that UNAT or PR was moved to).
824 Record that fact and move on... */
825 if (rM == unat_save_reg)
826 {
827 /* Track UNAT register */
828 if (do_fsr_stuff)
829 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
830 unat_save_reg = 0;
831 }
832 else
833 {
834 /* Track PR register */
835 if (do_fsr_stuff)
836 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
837 pr_save_reg = 0;
838 }
839 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
840 /* st8 [rN] = rM, imm9 */
841 spill_addr += imm9(instr);
842 else
843 spill_addr = 0; /* must be done spilling */
844 last_prologue_pc = next_pc;
845 }
846 }
847 else if (it == M
848 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
849 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
850 {
851 /* st8.spill [rN] = rM
852 or
853 st8.spill [rN] = rM, imm9 */
854 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
855 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
856 int qp = (int) (instr & 0x0000000003fLL);
857 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
858 {
859 /* We've found a spill of one of the preserved general purpose
860 regs. Record the spill address and advance the spill
861 register if appropriate. */
862 if (do_fsr_stuff)
863 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
864 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
865 /* st8.spill [rN] = rM, imm9 */
866 spill_addr += imm9(instr);
867 else
868 spill_addr = 0; /* Done spilling */
869 last_prologue_pc = next_pc;
870 }
871 }
872 else if (it == B || ((instr & 0x3fLL) != 0LL))
873 break;
874
875 pc = next_pc;
876 }
877
878 if (do_fsr_stuff) {
879 int i;
880 CORE_ADDR addr;
881
882 for (i = 0, addr = frame->extra_info->bsp;
883 i < frame->extra_info->sof;
884 i++, addr += 8)
885 {
886 if (IS_NaT_COLLECTION_ADDR (addr))
887 {
888 addr += 8;
889 }
890 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
891
892 if (i+32 == cfm_reg)
893 frame->saved_regs[IA64_CFM_REGNUM] = addr;
894 if (i+32 == ret_reg)
895 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
896 if (i+32 == fp_reg)
897 frame->saved_regs[IA64_VFP_REGNUM] = addr;
898 }
899 }
900
901 if (frame && frame->extra_info) {
902 frame->extra_info->after_prologue = last_prologue_pc;
903 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
904 frame->extra_info->fp_reg = fp_reg;
905 }
906
907 return last_prologue_pc;
908}
909
910CORE_ADDR
911ia64_skip_prologue (CORE_ADDR pc)
912{
913 return examine_prologue (pc, pc+1024, 0);
914}
915
916void
917ia64_frame_init_saved_regs (struct frame_info *frame)
918{
919 CORE_ADDR func_start;
920
921 if (frame->saved_regs)
922 return;
923
924 func_start = get_pc_function_start (frame->pc);
925 examine_prologue (func_start, frame->pc, frame);
926}
927
928static CORE_ADDR
929ia64_find_saved_register (frame, regnum)
930 struct frame_info *frame;
931 int regnum;
932{
933 register CORE_ADDR addr = 0;
934
935 if ((IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
936 || regnum == IA64_VFP_REGNUM
937 || regnum == IA64_VRAP_REGNUM)
938 {
939 FRAME_INIT_SAVED_REGS (frame);
940 return frame->saved_regs[regnum];
941 }
942 else if (regnum == IA64_IP_REGNUM && frame->next)
943 {
944 FRAME_INIT_SAVED_REGS (frame->next);
945 return frame->next->saved_regs[IA64_VRAP_REGNUM];
946 }
947 else
948 {
949 struct frame_info *frame1 = NULL;
950 while (1)
951 {
952 QUIT;
953 frame1 = get_prev_frame (frame1);
954 if (frame1 == 0 || frame1 == frame)
955 break;
956 FRAME_INIT_SAVED_REGS (frame1);
957 if (frame1->saved_regs[regnum])
958 addr = frame1->saved_regs[regnum];
959 }
960 }
961
962 return addr;
963}
964
965void
966ia64_get_saved_register (char *raw_buffer,
967 int *optimized,
968 CORE_ADDR *addrp,
969 struct frame_info *frame,
970 int regnum,
971 enum lval_type *lval)
972{
973 CORE_ADDR addr;
974
975 if (!target_has_registers)
976 error ("No registers.");
977
978 if (optimized != NULL)
979 *optimized = 0;
980 addr = ia64_find_saved_register (frame, regnum);
981 if (addr != 0)
982 {
983 if (lval != NULL)
984 *lval = lval_memory;
985 if (regnum == SP_REGNUM)
986 {
987 if (raw_buffer != NULL)
988 {
989 /* Put it back in target format. */
990 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), (LONGEST) addr);
991 }
992 if (addrp != NULL)
993 *addrp = 0;
994 return;
995 }
996 if (raw_buffer != NULL)
997 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
998 }
999 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1000 {
1001 /* r32 - r127 must be fetchable via memory. If they aren't,
1002 then the register is unavailable */
1003 addr = 0;
1004 if (lval != NULL)
1005 *lval = not_lval;
1006 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1007 }
1008 else if (regnum == IA64_IP_REGNUM)
1009 {
1010 CORE_ADDR pc;
1011 if (frame->next)
1012 {
1013 /* This case will normally be handled above, except when it's
1014 frameless or we haven't advanced far enough into the prologue
1015 of the top frame to save the register. */
1016 addr = REGISTER_BYTE (regnum);
1017 if (lval != NULL)
1018 *lval = lval_register;
1019 pc = ia64_saved_pc_after_call (frame);
1020 }
1021 else
1022 {
1023 addr = 0;
1024 if (lval != NULL)
1025 *lval = not_lval;
1026 pc = read_pc ();
1027 }
1028 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1029 }
1030 else if (regnum == SP_REGNUM && frame->next)
1031 {
1032 /* Handle SP values for all frames but the topmost. */
1033 addr = 0;
1034 if (lval != NULL)
1035 *lval = not_lval;
1036 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1037 }
1038 else if (regnum == IA64_BSP_REGNUM)
1039 {
1040 addr = 0;
1041 if (lval != NULL)
1042 *lval = not_lval;
1043 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1044 frame->extra_info->bsp);
1045 }
1046 else if (regnum == IA64_VFP_REGNUM)
1047 {
1048 /* If the function in question uses an automatic register (r32-r127)
1049 for the frame pointer, it'll be found by ia64_find_saved_register()
1050 above. If the function lacks one of these frame pointers, we can
1051 still provide a value since we know the size of the frame */
1052 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
1053 addr = 0;
1054 if (lval != NULL)
1055 *lval = not_lval;
1056 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1057 }
1058 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1059 {
1060 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1061 int pr_optim;
1062 enum lval_type pr_lval;
1063 CORE_ADDR pr_addr;
1064 int prN_val;
1065 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1066 frame, IA64_PR_REGNUM, &pr_lval);
1067 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1068 regnum - IA64_PR0_REGNUM, 1);
1069 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
1070 addr = 0;
1071 if (lval != NULL)
1072 *lval = not_lval;
1073 }
1074 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1075 {
1076 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1077 int unat_optim;
1078 enum lval_type unat_lval;
1079 CORE_ADDR unat_addr;
1080 int unatN_val;
1081 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1082 frame, IA64_UNAT_REGNUM, &unat_lval);
1083 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1084 regnum - IA64_NAT0_REGNUM, 1);
1085 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1086 unatN_val);
1087 addr = 0;
1088 if (lval != NULL)
1089 *lval = not_lval;
1090 }
1091 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1092 {
1093 int natval = 0;
1094 /* Find address of general register corresponding to nat bit we're
1095 interested in. */
1096 CORE_ADDR gr_addr =
1097 ia64_find_saved_register (frame,
1098 regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM);
1099 if (gr_addr)
1100 {
1101 /* Compute address of nat collection bits */
1102 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1103 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1104 CORE_ADDR nat_collection;
1105 int nat_bit;
1106 /* If our nat collection address is bigger than bsp, we have to get
1107 the nat collection from rnat. Otherwise, we fetch the nat
1108 collection from the computed address. */
1109 if (nat_addr >= bsp)
1110 nat_collection = read_register (IA64_RNAT_REGNUM);
1111 else
1112 nat_collection = read_memory_integer (nat_addr, 8);
1113 nat_bit = (gr_addr >> 3) & 0x3f;
1114 natval = (nat_collection >> nat_bit) & 1;
1115 }
1116 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
1117 addr = 0;
1118 if (lval != NULL)
1119 *lval = not_lval;
1120 }
1121 else
1122 {
1123 if (lval != NULL)
1124 *lval = lval_register;
1125 addr = REGISTER_BYTE (regnum);
1126 if (raw_buffer != NULL)
1127 read_register_gen (regnum, raw_buffer);
1128 }
1129 if (addrp != NULL)
1130 *addrp = addr;
1131}
1132
1133/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1134 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1135 and TYPE is the type (which is known to be struct, union or array). */
1136int
1137ia64_use_struct_convention (int gcc_p, struct type *type)
1138{
64a5b29c
KB		 1139 struct type *float_elt_type;
1140
1141 /* HFAs are structures (or arrays) consisting entirely of floating
1142 point values of the same length. Up to 8 of these are returned
1143 in registers. Don't use the struct convention when this is the
1144 case. */
1145 float_elt_type = is_float_or_hfa_type (type);
1146 if (float_elt_type != NULL
1147 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1148 return 0;
1149
1150 /* Other structs of length 32 or less are returned in r8-r11.
1151 Don't use the struct convention for those either. */
16461d7d
KB		 1152 return TYPE_LENGTH (type) > 32;
1153}
1154
1155void
1156ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1157{
64a5b29c
KB		 1158 struct type *float_elt_type;
1159
1160 float_elt_type = is_float_or_hfa_type (type);
1161 if (float_elt_type != NULL)
1162 {
1163 int offset = 0;
1164 int regnum = IA64_FR8_REGNUM;
1165 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1166
1167 while (n-- > 0)
1168 {
1169 ia64_register_convert_to_virtual (regnum, float_elt_type,
1170 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1171 offset += TYPE_LENGTH (float_elt_type);
1172 regnum++;
1173 }
1174 }
16461d7d 1175 else
64a5b29c
KB		 1176 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1177 TYPE_LENGTH (type));
16461d7d
KB		 1178}
1179
1180/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1181 like this is necessary though since the IA-64 calling conventions specify
1182 that r8 is not preserved. */
1183static CORE_ADDR struct_return_address;
1184
1185CORE_ADDR
1186ia64_extract_struct_value_address (char *regbuf)
1187{
1188 /* FIXME: See above. */
1189 return struct_return_address;
1190}
1191
1192void
1193ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1194{
1195 /* FIXME: See above. */
1196 /* Note that most of the work was done in ia64_push_arguments() */
1197 struct_return_address = addr;
1198}
1199
1200int
1201ia64_frameless_function_invocation (struct frame_info *frame)
1202{
1203 /* FIXME: Implement */
1204 return 0;
1205}
1206
1207CORE_ADDR
1208ia64_saved_pc_after_call (struct frame_info *frame)
1209{
1210 return read_register (IA64_BR0_REGNUM);
1211}
1212
1213CORE_ADDR
1214ia64_frame_args_address (struct frame_info *frame)
1215{
1216 /* frame->frame points at the SP for this frame; But we want the start
1217 of the frame, not the end. Calling frame chain will get his for us. */
1218 return ia64_frame_chain (frame);
1219}
1220
1221CORE_ADDR
1222ia64_frame_locals_address (struct frame_info *frame)
1223{
1224 /* frame->frame points at the SP for this frame; But we want the start
1225 of the frame, not the end. Calling frame chain will get his for us. */
1226 return ia64_frame_chain (frame);
1227}
1228
1229void
1230ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1231{
1232 CORE_ADDR bsp, cfm;
1233
1234 frame->extra_info = (struct frame_extra_info *)
1235 frame_obstack_alloc (sizeof (struct frame_extra_info));
1236
1237 if (frame->next == 0)
1238 {
1239 bsp = read_register (IA64_BSP_REGNUM);
1240 cfm = read_register (IA64_CFM_REGNUM);
1241
1242 }
1243 else
1244 {
1245 struct frame_info *frn = frame->next;
16461d7d
KB		 1246
1247 FRAME_INIT_SAVED_REGS (frn);
1248
1249 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1250 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
1251 else
1252 cfm = read_register (IA64_CFM_REGNUM);
1253
1254 bsp = frn->extra_info->bsp;
1255 }
1256 frame->extra_info->cfm = cfm;
1257 frame->extra_info->sof = cfm & 0x7f;
1258 frame->extra_info->sol = (cfm >> 7) & 0x7f;
1259 if (frame->next == 0)
1260 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1261 else
1262 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1263
1264 frame->extra_info->after_prologue = 0;
1265 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1266 frame->extra_info->fp_reg = 0;
1267}
1268
64a5b29c
KB		 1269static int
1270is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1271{
1272 switch (TYPE_CODE (t))
1273 {
1274 case TYPE_CODE_FLT:
1275 if (*etp)
1276 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1277 else
1278 {
1279 *etp = t;
1280 return 1;
1281 }
1282 break;
1283 case TYPE_CODE_ARRAY:
1284 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1285 break;
1286 case TYPE_CODE_STRUCT:
1287 {
1288 int i;
1289
1290 for (i = 0; i < TYPE_NFIELDS (t); i++)
1291 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1292 return 0;
1293 return 1;
1294 }
1295 break;
1296 default:
1297 return 0;
1298 break;
1299 }
1300}
1301
1302/* Determine if the given type is one of the floating point types or
1303 and HFA (which is a struct, array, or combination thereof whose
1304 bottom-most elements are all of the same floating point type.) */
1305
1306static struct type *
1307is_float_or_hfa_type (struct type *t)
1308{
1309 struct type *et = 0;
1310
1311 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1312}
1313
1314
1315/* Attempt to find (and return) the global pointer for the given
1316 function.
1317
1318 This is a rather nasty bit of code searchs for the .dynamic section
1319 in the objfile corresponding to the pc of the function we're trying
1320 to call. Once it finds the addresses at which the .dynamic section
1321 lives in the child process, it scans the Elf64_Dyn entries for a
1322 DT_PLTGOT tag. If it finds one of these, the corresponding
1323 d_un.d_ptr value is the global pointer. */
1324
1325static CORE_ADDR
1326find_global_pointer (CORE_ADDR faddr)
1327{
1328 struct partial_symtab *pst;
1329
1330 pst = find_pc_psymtab (faddr);
1331 if (pst != NULL)
1332 {
1333 struct obj_section *osect;
1334
1335 ALL_OBJFILE_OSECTIONS (pst->objfile, osect)
1336 {
1337 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1338 break;
1339 }
1340
1341 if (osect < pst->objfile->sections_end)
1342 {
1343 CORE_ADDR addr;
1344
1345 addr = osect->addr;
1346 while (addr < osect->endaddr)
1347 {
1348 int status;
1349 LONGEST tag;
1350 char buf[8];
1351
1352 status = target_read_memory (addr, buf, sizeof (buf));
1353 if (status != 0)
1354 break;
1355 tag = extract_signed_integer (buf, sizeof (buf));
1356
1357 if (tag == DT_PLTGOT)
1358 {
1359 CORE_ADDR global_pointer;
1360
1361 status = target_read_memory (addr + 8, buf, sizeof (buf));
1362 if (status != 0)
1363 break;
1364 global_pointer = extract_address (buf, sizeof (buf));
1365
1366 /* The payoff... */
1367 return global_pointer;
1368 }
1369
1370 if (tag == DT_NULL)
1371 break;
1372
1373 addr += 16;
1374 }
1375 }
1376 }
1377 return 0;
1378}
1379
1380/* Given a function's address, attempt to find (and return) the
1381 corresponding (canonical) function descriptor. Return 0 if
1382 not found. */
1383static CORE_ADDR
1384find_extant_func_descr (CORE_ADDR faddr)
1385{
1386 struct partial_symtab *pst;
1387 struct obj_section *osect;
1388
1389 /* Return early if faddr is already a function descriptor */
1390 osect = find_pc_section (faddr);
1391 if (osect && strcmp (osect->the_bfd_section->name, ".opd") == 0)
1392 return faddr;
1393
1394 pst = find_pc_psymtab (faddr);
1395 if (pst != NULL)
1396 {
1397 ALL_OBJFILE_OSECTIONS (pst->objfile, osect)
1398 {
1399 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1400 break;
1401 }
1402
1403 if (osect < pst->objfile->sections_end)
1404 {
1405 CORE_ADDR addr;
1406
1407 addr = osect->addr;
1408 while (addr < osect->endaddr)
1409 {
1410 int status;
1411 LONGEST faddr2;
1412 char buf[8];
1413
1414 status = target_read_memory (addr, buf, sizeof (buf));
1415 if (status != 0)
1416 break;
1417 faddr2 = extract_signed_integer (buf, sizeof (buf));
1418
1419 if (faddr == faddr2)
1420 return addr;
1421
1422 addr += 16;
1423 }
1424 }
1425 }
1426 return 0;
1427}
1428
1429/* Attempt to find a function descriptor corresponding to the
1430 given address. If none is found, construct one on the
1431 stack using the address at fdaptr */
1432
1433static CORE_ADDR
1434find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1435{
1436 CORE_ADDR fdesc;
1437
1438 fdesc = find_extant_func_descr (faddr);
1439
1440 if (fdesc == 0)
1441 {
1442 CORE_ADDR global_pointer;
1443 char buf[16];
1444
1445 fdesc = *fdaptr;
1446 *fdaptr += 16;
1447
1448 global_pointer = find_global_pointer (faddr);
1449
1450 if (global_pointer == 0)
1451 global_pointer = read_register (IA64_GR1_REGNUM);
1452
1453 store_address (buf, 8, faddr);
1454 store_address (buf + 8, 8, global_pointer);
1455
1456 write_memory (fdesc, buf, 16);
1457 }
1458
1459 return fdesc;
1460}
16461d7d
KB		 1461
1462CORE_ADDR
1463ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1464 int struct_return, CORE_ADDR struct_addr)
1465{
1466 int argno;
1467 value_ptr arg;
1468 struct type *type;
1469 int len, argoffset;
64a5b29c 1470 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1471 int floatreg;
64a5b29c 1472 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1473
1474 nslots = 0;
64a5b29c 1475 nfuncargs = 0;
16461d7d
KB		 1476 /* Count the number of slots needed for the arguments */
1477 for (argno = 0; argno < nargs; argno++)
1478 {
1479 arg = args[argno];
1480 type = check_typedef (VALUE_TYPE (arg));
1481 len = TYPE_LENGTH (type);
1482
1483 /* FIXME: This is crude and it is wrong (IMO), but it matches
1484 what gcc does, I think. */
1485 if (len > 8 && (nslots & 1))
1486 nslots++;
1487
64a5b29c
KB		 1488 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1489 nfuncargs++;
1490
16461d7d
KB		 1491 nslots += (len + 7) / 8;
1492 }
1493
64a5b29c 1494 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1495 rseslots = (nslots > 8) ? 8 : nslots;
1496 memslots = nslots - rseslots;
1497
64a5b29c 1498 /* Allocate a new RSE frame */
16461d7d
KB		 1499 cfm = read_register (IA64_CFM_REGNUM);
1500
1501 bsp = read_register (IA64_BSP_REGNUM);
1502 bsp = rse_address_add (bsp, cfm & 0x7f);
1503 new_bsp = rse_address_add (bsp, rseslots);
1504 write_register (IA64_BSP_REGNUM, new_bsp);
1505
1506 pfs = read_register (IA64_PFS_REGNUM);
1507 pfs &= 0xc000000000000000LL;
1508 pfs |= (cfm & 0xffffffffffffLL);
1509 write_register (IA64_PFS_REGNUM, pfs);
1510
1511 cfm &= 0xc000000000000000LL;
1512 cfm |= rseslots;
1513 write_register (IA64_CFM_REGNUM, cfm);
1514
64a5b29c
KB		 1515 /* We will attempt to find function descriptors in the .opd segment,
1516 but if we can't we'll construct them ourselves. That being the
1517 case, we'll need to reserve space on the stack for them. */
1518 funcdescaddr = sp - nfuncargs * 16;
1519 funcdescaddr &= ~0xfLL;
1520
1521 /* Adjust the stack pointer to it's new value. The calling conventions
1522 require us to have 16 bytes of scratch, plus whatever space is
1523 necessary for the memory slots and our function descriptors */
1524 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1525 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1526
64a5b29c
KB		 1527 /* Place the arguments where they belong. The arguments will be
1528 either placed in the RSE backing store or on the memory stack.
1529 In addition, floating point arguments or HFAs are placed in
1530 floating point registers. */
16461d7d
KB		 1531 slotnum = 0;
1532 floatreg = IA64_FR8_REGNUM;
1533 for (argno = 0; argno < nargs; argno++)
1534 {
64a5b29c
KB		 1535 struct type *float_elt_type;
1536
16461d7d
KB		 1537 arg = args[argno];
1538 type = check_typedef (VALUE_TYPE (arg));
1539 len = TYPE_LENGTH (type);
64a5b29c
KB		 1540
1541 /* Special handling for function parameters */
1542 if (len == 8
1543 && TYPE_CODE (type) == TYPE_CODE_PTR
1544 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1545 {
1546 char val_buf[8];
1547
1548 store_address (val_buf, 8,
1549 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1550 &funcdescaddr));
1551 if (slotnum < rseslots)
1552 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1553 else
1554 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1555 slotnum++;
1556 continue;
1557 }
1558
1559 /* Normal slots */
16461d7d
KB		 1560 if (len > 8 && (slotnum & 1))
1561 slotnum++;
1562 argoffset = 0;
1563 while (len > 0)
1564 {
1565 char val_buf[8];
1566
1567 memset (val_buf, 0, 8);
1568 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1569
1570 if (slotnum < rseslots)
1571 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1572 else
1573 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1574
1575 argoffset += 8;
1576 len -= 8;
1577 slotnum++;
1578 }
64a5b29c
KB		 1579
1580 /* Handle floating point types (including HFAs) */
1581 float_elt_type = is_float_or_hfa_type (type);
1582 if (float_elt_type != NULL)
1583 {
1584 argoffset = 0;
1585 len = TYPE_LENGTH (type);
1586 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1587 {
1588 ia64_register_convert_to_raw (
1589 float_elt_type,
1590 floatreg,
1591 VALUE_CONTENTS (arg) + argoffset,
1592 &registers[REGISTER_BYTE (floatreg)]);
1593 floatreg++;
1594 argoffset += TYPE_LENGTH (float_elt_type);
1595 len -= TYPE_LENGTH (float_elt_type);
1596 }
16461d7d
KB		 1597 }
1598 }
1599
64a5b29c 1600 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1601 if (struct_return)
1602 {
1603 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1604 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1605 struct_addr);
1606 }
1607
64a5b29c 1608 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1609 target_store_registers (-1);
1610
1611 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1612 to be defined to call generic_save_dummy_frame_tos(). But at the
1613 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1614 I chose to put this call here instead of using the old mechanisms.
1615 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1616 line
1617
1618 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1619
1620 to ia64_gdbarch_init() and remove the line below. */
1621 generic_save_dummy_frame_tos (sp);
1622
1623 return sp;
1624}
1625
1626CORE_ADDR
1627ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1628{
64a5b29c 1629 CORE_ADDR global_pointer = find_global_pointer (pc);
16461d7d 1630
64a5b29c
KB		 1631 if (global_pointer != 0)
1632 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1633
1634 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1635 return sp;
1636}
1637
1638void
1639ia64_store_return_value (struct type *type, char *valbuf)
1640{
1641 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1642 {
1643 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1644 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1645 target_store_registers (IA64_FR8_REGNUM);
1646 }
1647 else
1648 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1649 valbuf, TYPE_LENGTH (type));
1650}
1651
1652void
1653ia64_pop_frame (void)
1654{
1655 generic_pop_current_frame (ia64_pop_frame_regular);
1656}
1657
1658static void
1659ia64_pop_frame_regular (struct frame_info *frame)
1660{
1661 int regno;
1662 CORE_ADDR bsp, cfm, pfs;
1663
1664 FRAME_INIT_SAVED_REGS (frame);
1665
1666 for (regno = 0; regno < ia64_num_regs; regno++)
1667 {
1668 if (frame->saved_regs[regno]
1669 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1670 && regno != pc_regnum
1671 && regno != sp_regnum
1672 && regno != IA64_PFS_REGNUM
1673 && regno != IA64_CFM_REGNUM
1674 && regno != IA64_BSP_REGNUM
1675 && regno != IA64_BSPSTORE_REGNUM)
1676 {
1677 write_register (regno,
1678 read_memory_integer (frame->saved_regs[regno],
1679 REGISTER_RAW_SIZE (regno)));
1680 }
1681 }
1682
1683 write_register (sp_regnum, FRAME_CHAIN (frame));
1684 write_pc (FRAME_SAVED_PC (frame));
1685
1686 cfm = read_register (IA64_CFM_REGNUM);
1687
1688 if (frame->saved_regs[IA64_PFS_REGNUM])
1689 {
1690 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1691 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1692 }
1693 else
1694 pfs = read_register (IA64_PFS_REGNUM);
1695
1696 /* Compute the new bsp by *adding* the difference between the
1697 size of the frame and the size of the locals (both wrt the
1698 frame that we're going back to). This seems kind of strange,
1699 especially since it seems like we ought to be subtracting the
1700 size of the locals... and we should; but the linux kernel
1701 wants bsp to be set at the end of all used registers. It's
1702 likely that this code will need to be revised to accomodate
1703 other operating systems. */
1704 bsp = rse_address_add (frame->extra_info->bsp,
1705 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1706 write_register (IA64_BSP_REGNUM, bsp);
1707
1708 /* FIXME: What becomes of the epilog count in the PFS? */
1709 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1710 write_register (IA64_CFM_REGNUM, cfm);
1711
1712 flush_cached_frames ();
1713}
1714
1715static void
1716ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1717 CORE_ADDR *targ_addr, int *targ_len)
1718{
1719 *targ_addr = memaddr;
1720 *targ_len = nr_bytes;
1721}
1722
1723static struct gdbarch *
1724ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1725{
1726 struct gdbarch *gdbarch;
1727
1728 arches = gdbarch_list_lookup_by_info (arches, &info);
1729 if (arches != NULL)
1730 return arches->gdbarch;
1731
1732 gdbarch = gdbarch_alloc (&info, NULL);
1733
1734 set_gdbarch_short_bit (gdbarch, 16);
1735 set_gdbarch_int_bit (gdbarch, 32);
1736 set_gdbarch_long_bit (gdbarch, 64);
1737 set_gdbarch_long_long_bit (gdbarch, 64);
1738 set_gdbarch_float_bit (gdbarch, 32);
1739 set_gdbarch_double_bit (gdbarch, 64);
1740 set_gdbarch_long_double_bit (gdbarch, 64);
1741 set_gdbarch_ptr_bit (gdbarch, 64);
1742
1743 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
1744 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1745 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
1746 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1747
1748 set_gdbarch_register_name (gdbarch, ia64_register_name);
1749 set_gdbarch_register_size (gdbarch, 8);
1750 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
1751 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
1752 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
1753 set_gdbarch_max_register_raw_size (gdbarch, 16);
1754 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
1755 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1756 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
1757
1758 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
1759
1760 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1761 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
1762
1763 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
1764
1765 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
1766 set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
1767 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
1768
1769 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
1770 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
1771
1772 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
1773 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
1774 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
1775
1776 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
1777 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
1778
1779 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
1780 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
1781 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
1782
1783 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
1784 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
1785 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
1786 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
1787 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
1788
1789 /* Settings for calling functions in the inferior. */
1790 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1791 set_gdbarch_call_dummy_length (gdbarch, 0);
1792 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
1793 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
1794 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
1795
1796 set_gdbarch_call_dummy_p (gdbarch, 1);
1797 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
1798 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
1799 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1800 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
1801 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
1802 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
1803
1804 /* We won't necessarily have a frame pointer and even if we do,
1805 it winds up being extraordinarly messy when attempting to find
1806 the frame chain. So for the purposes of creating frames (which
1807 is all read_fp() is used for), simply use the stack pointer value
1808 instead. */
1809 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
1810 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
1811
1812 /* Settings that should be unnecessary. */
1813 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1814
1815 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1816 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1817
1818 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1819 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1820 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1821 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1822 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1823 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1824 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1825 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1826
1827 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1828 set_gdbarch_function_start_offset (gdbarch, 0);
1829
1830 set_gdbarch_remote_translate_xfer_address (
1831 gdbarch, ia64_remote_translate_xfer_address);
1832
1833 return gdbarch;
1834}
1835
1836void
1837_initialize_ia64_tdep (void)
1838{
1839 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
1840
1841 tm_print_insn = print_insn_ia64;
1842 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
1843}
GDB Binutils - Deliverables
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