* linux-arm-low.c (arm_reinsert_addr): New function.
[deliverable/binutils-gdb.git] / gdb / m68hc11-tdep.c
CommitLineData
908f682f 1/* Target-dependent code for Motorola 68HC11 & 68HC12
51603483 2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
ffe1f3ee 3 Contributed by Stephane Carrez, stcarrez@nerim.fr
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4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
78073dd8 21
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22#include "defs.h"
23#include "frame.h"
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24#include "symtab.h"
25#include "gdbtypes.h"
26#include "gdbcmd.h"
27#include "gdbcore.h"
28#include "gdb_string.h"
29#include "value.h"
30#include "inferior.h"
31#include "dis-asm.h"
32#include "symfile.h"
33#include "objfiles.h"
34#include "arch-utils.h"
4e052eda 35#include "regcache.h"
b631436b 36#include "reggroups.h"
78073dd8 37
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38#include "target.h"
39#include "opcode/m68hc11.h"
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40#include "elf/m68hc11.h"
41#include "elf-bfd.h"
78073dd8 42
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43/* Macros for setting and testing a bit in a minimal symbol.
44 For 68HC11/68HC12 we have two flags that tell which return
45 type the function is using. This is used for prologue and frame
46 analysis to compute correct stack frame layout.
47
48 The MSB of the minimal symbol's "info" field is used for this purpose.
49 This field is already being used to store the symbol size, so the
50 assumption is that the symbol size cannot exceed 2^30.
51
52 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
53 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
54 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
55 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
56 MSYMBOL_SIZE Returns the size of the minimal symbol,
57 i.e. the "info" field with the "special" bit
58 masked out. */
59
60#define MSYMBOL_SET_RTC(msym) \
61 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
62 | 0x80000000)
63
64#define MSYMBOL_SET_RTI(msym) \
65 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
66 | 0x40000000)
67
68#define MSYMBOL_IS_RTC(msym) \
69 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
70
71#define MSYMBOL_IS_RTI(msym) \
72 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
73
74#define MSYMBOL_SIZE(msym) \
75 ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
76
77enum insn_return_kind {
78 RETURN_RTS,
79 RETURN_RTC,
80 RETURN_RTI
81};
82
83
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84/* Register numbers of various important registers.
85 Note that some of these values are "real" register numbers,
86 and correspond to the general registers of the machine,
87 and some are "phony" register numbers which are too large
88 to be actual register numbers as far as the user is concerned
89 but do serve to get the desired values when passed to read_register. */
90
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91#define HARD_X_REGNUM 0
92#define HARD_D_REGNUM 1
93#define HARD_Y_REGNUM 2
94#define HARD_SP_REGNUM 3
95#define HARD_PC_REGNUM 4
96
97#define HARD_A_REGNUM 5
98#define HARD_B_REGNUM 6
99#define HARD_CCR_REGNUM 7
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100
101/* 68HC12 page number register.
102 Note: to keep a compatibility with gcc register naming, we must
103 not have to rename FP and other soft registers. The page register
104 is a real hard register and must therefore be counted by NUM_REGS.
105 For this it has the same number as Z register (which is not used). */
106#define HARD_PAGE_REGNUM 8
107#define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
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108
109/* Z is replaced by X or Y by gcc during machine reorg.
110 ??? There is no way to get it and even know whether
111 it's in X or Y or in ZS. */
112#define SOFT_Z_REGNUM 8
113
114/* Soft registers. These registers are special. There are treated
115 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
116 They are physically located in memory. */
117#define SOFT_FP_REGNUM 9
118#define SOFT_TMP_REGNUM 10
119#define SOFT_ZS_REGNUM 11
120#define SOFT_XY_REGNUM 12
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121#define SOFT_UNUSED_REGNUM 13
122#define SOFT_D1_REGNUM 14
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123#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
124#define M68HC11_MAX_SOFT_REGS 32
125
126#define M68HC11_NUM_REGS (8)
127#define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
128#define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
129
130#define M68HC11_REG_SIZE (2)
131
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132#define M68HC12_NUM_REGS (9)
133#define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
134#define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
135
908f682f 136struct insn_sequence;
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137struct gdbarch_tdep
138 {
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139 /* Stack pointer correction value. For 68hc11, the stack pointer points
140 to the next push location. An offset of 1 must be applied to obtain
141 the address where the last value is saved. For 68hc12, the stack
142 pointer points to the last value pushed. No offset is necessary. */
143 int stack_correction;
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144
145 /* Description of instructions in the prologue. */
146 struct insn_sequence *prologue;
81967506 147
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148 /* True if the page memory bank register is available
149 and must be used. */
150 int use_page_register;
151
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152 /* ELF flags for ABI. */
153 int elf_flags;
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154 };
155
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156#define M6811_TDEP gdbarch_tdep (current_gdbarch)
157#define STACK_CORRECTION (M6811_TDEP->stack_correction)
7df11f59 158#define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
5d1a66bd 159
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160struct frame_extra_info
161{
82c230c2 162 CORE_ADDR return_pc;
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163 int frameless;
164 int size;
7df11f59 165 enum insn_return_kind return_kind;
82c230c2 166};
78073dd8 167
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168/* Table of registers for 68HC11. This includes the hard registers
169 and the soft registers used by GCC. */
170static char *
171m68hc11_register_names[] =
172{
173 "x", "d", "y", "sp", "pc", "a", "b",
5706502a 174 "ccr", "page", "frame","tmp", "zs", "xy", 0,
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175 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
176 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
177 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
178 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
179 "d29", "d30", "d31", "d32"
180};
78073dd8 181
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182struct m68hc11_soft_reg
183{
184 const char *name;
185 CORE_ADDR addr;
186};
78073dd8 187
82c230c2 188static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
78073dd8 189
82c230c2 190#define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
78073dd8 191
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192static int soft_min_addr;
193static int soft_max_addr;
194static int soft_reg_initialized = 0;
78073dd8 195
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196/* Look in the symbol table for the address of a pseudo register
197 in memory. If we don't find it, pretend the register is not used
198 and not available. */
199static void
200m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
201{
202 struct minimal_symbol *msymbol;
78073dd8 203
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204 msymbol = lookup_minimal_symbol (name, NULL, NULL);
205 if (msymbol)
206 {
207 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
208 reg->name = xstrdup (name);
209
210 /* Keep track of the address range for soft registers. */
211 if (reg->addr < (CORE_ADDR) soft_min_addr)
212 soft_min_addr = reg->addr;
213 if (reg->addr > (CORE_ADDR) soft_max_addr)
214 soft_max_addr = reg->addr;
215 }
216 else
217 {
218 reg->name = 0;
219 reg->addr = 0;
220 }
221}
78073dd8 222
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223/* Initialize the table of soft register addresses according
224 to the symbol table. */
225 static void
226m68hc11_initialize_register_info (void)
227{
228 int i;
78073dd8 229
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230 if (soft_reg_initialized)
231 return;
232
233 soft_min_addr = INT_MAX;
234 soft_max_addr = 0;
235 for (i = 0; i < M68HC11_ALL_REGS; i++)
236 {
237 soft_regs[i].name = 0;
238 }
239
240 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
241 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
242 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
243 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
244 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
78073dd8 245
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246 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
247 {
248 char buf[10];
78073dd8 249
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250 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
251 m68hc11_get_register_info (&soft_regs[i], buf);
252 }
78073dd8 253
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254 if (soft_regs[SOFT_FP_REGNUM].name == 0)
255 {
256 warning ("No frame soft register found in the symbol table.\n");
257 warning ("Stack backtrace will not work.\n");
258 }
259 soft_reg_initialized = 1;
260}
78073dd8 261
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262/* Given an address in memory, return the soft register number if
263 that address corresponds to a soft register. Returns -1 if not. */
264static int
265m68hc11_which_soft_register (CORE_ADDR addr)
266{
267 int i;
268
269 if (addr < soft_min_addr || addr > soft_max_addr)
270 return -1;
271
272 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
273 {
274 if (soft_regs[i].name && soft_regs[i].addr == addr)
275 return i;
276 }
277 return -1;
278}
78073dd8 279
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280/* Fetch a pseudo register. The 68hc11 soft registers are treated like
281 pseudo registers. They are located in memory. Translate the register
282 fetch into a memory read. */
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283static void
284m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
285 struct regcache *regcache,
286 int regno, void *buf)
82c230c2 287{
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288 /* The PC is a pseudo reg only for 68HC12 with the memory bank
289 addressing mode. */
290 if (regno == M68HC12_HARD_PC_REGNUM)
291 {
4db73d49 292 ULONGEST pc;
548bcbec 293 const int regsize = TYPE_LENGTH (builtin_type_uint32);
548bcbec 294
4db73d49 295 regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
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296 if (pc >= 0x8000 && pc < 0xc000)
297 {
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298 ULONGEST page;
299
300 regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
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301 pc -= 0x8000;
302 pc += (page << 14);
303 pc += 0x1000000;
304 }
305 store_unsigned_integer (buf, regsize, pc);
306 return;
307 }
308
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309 m68hc11_initialize_register_info ();
310
311 /* Fetch a soft register: translate into a memory read. */
312 if (soft_regs[regno].name)
313 {
314 target_read_memory (soft_regs[regno].addr, buf, 2);
315 }
316 else
317 {
318 memset (buf, 0, 2);
319 }
82c230c2 320}
78073dd8 321
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322/* Store a pseudo register. Translate the register store
323 into a memory write. */
324static void
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325m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
326 struct regcache *regcache,
327 int regno, const void *buf)
82c230c2 328{
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329 /* The PC is a pseudo reg only for 68HC12 with the memory bank
330 addressing mode. */
331 if (regno == M68HC12_HARD_PC_REGNUM)
332 {
333 const int regsize = TYPE_LENGTH (builtin_type_uint32);
334 char *tmp = alloca (regsize);
335 CORE_ADDR pc;
336
337 memcpy (tmp, buf, regsize);
338 pc = extract_unsigned_integer (tmp, regsize);
339 if (pc >= 0x1000000)
340 {
341 pc -= 0x1000000;
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342 regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
343 (pc >> 14) & 0x0ff);
548bcbec 344 pc &= 0x03fff;
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345 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
346 pc + 0x8000);
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347 }
348 else
4db73d49 349 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
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350 return;
351 }
352
82c230c2 353 m68hc11_initialize_register_info ();
78073dd8 354
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355 /* Store a soft register: translate into a memory write. */
356 if (soft_regs[regno].name)
357 {
46ce284d
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358 const int regsize = 2;
359 char *tmp = alloca (regsize);
360 memcpy (tmp, buf, regsize);
361 target_write_memory (soft_regs[regno].addr, tmp, regsize);
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362 }
363}
78073dd8 364
fa88f677 365static const char *
82c230c2 366m68hc11_register_name (int reg_nr)
78073dd8 367{
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368 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
369 return "pc";
370 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
371 return "ppc";
372
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373 if (reg_nr < 0)
374 return NULL;
375 if (reg_nr >= M68HC11_ALL_REGS)
376 return NULL;
377
378 /* If we don't know the address of a soft register, pretend it
379 does not exist. */
380 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
381 return NULL;
382 return m68hc11_register_names[reg_nr];
383}
78073dd8 384
f4f9705a 385static const unsigned char *
82c230c2 386m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
78073dd8 387{
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388 static unsigned char breakpoint[] = {0x0};
389
390 *lenptr = sizeof (breakpoint);
391 return breakpoint;
78073dd8
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392}
393
394/* Immediately after a function call, return the saved pc before the frame
82c230c2 395 is setup. */
78073dd8 396
82c230c2 397static CORE_ADDR
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398m68hc11_saved_pc_after_call (struct frame_info *frame)
399{
82c230c2 400 CORE_ADDR addr;
4db73d49
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401 ULONGEST sp;
402
403 regcache_cooked_read_unsigned (current_regcache, HARD_SP_REGNUM, &sp);
404 sp += STACK_CORRECTION;
405 addr = sp & 0x0ffff;
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406 return read_memory_integer (addr, 2) & 0x0FFFF;
407}
408
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409static CORE_ADDR
410m68hc11_frame_saved_pc (struct frame_info *frame)
411{
da50a4b7 412 return get_frame_extra_info (frame)->return_pc;
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413}
414
415static CORE_ADDR
416m68hc11_frame_args_address (struct frame_info *frame)
417{
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418 CORE_ADDR addr;
419
da50a4b7
AC
420 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION + 2;
421 if (get_frame_extra_info (frame)->return_kind == RETURN_RTC)
7df11f59 422 addr += 1;
da50a4b7 423 else if (get_frame_extra_info (frame)->return_kind == RETURN_RTI)
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424 addr += 7;
425
426 return addr;
82c230c2
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427}
428
78073dd8
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429/* Discard from the stack the innermost frame, restoring all saved
430 registers. */
431
82c230c2 432static void
fba45db2 433m68hc11_pop_frame (void)
78073dd8 434{
82c230c2
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435 register struct frame_info *frame = get_current_frame ();
436 register CORE_ADDR fp, sp;
437 register int regnum;
438
1e2330ba
AC
439 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
440 get_frame_base (frame),
441 get_frame_base (frame)))
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442 generic_pop_dummy_frame ();
443 else
444 {
c193f6ac 445 fp = get_frame_base (frame);
f30ee0bc 446 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
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447
448 /* Copy regs from where they were saved in the frame. */
449 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
b2fb4676 450 if (get_frame_saved_regs (frame)[regnum])
82c230c2 451 write_register (regnum,
b2fb4676 452 read_memory_integer (get_frame_saved_regs (frame)[regnum], 2));
82c230c2 453
da50a4b7
AC
454 write_register (HARD_PC_REGNUM, get_frame_extra_info (frame)->return_pc);
455 sp = (fp + get_frame_extra_info (frame)->size + 2) & 0x0ffff;
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456 write_register (HARD_SP_REGNUM, sp);
457 }
458 flush_cached_frames ();
78073dd8
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459}
460
908f682f
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461\f
462/* 68HC11 & 68HC12 prologue analysis.
463
464 */
465#define MAX_CODES 12
466
467/* 68HC11 opcodes. */
468#undef M6811_OP_PAGE2
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469#define M6811_OP_PAGE2 (0x18)
470#define M6811_OP_LDX (0xde)
471#define M6811_OP_LDX_EXT (0xfe)
472#define M6811_OP_PSHX (0x3c)
473#define M6811_OP_STS (0x9f)
474#define M6811_OP_STS_EXT (0xbf)
475#define M6811_OP_TSX (0x30)
476#define M6811_OP_XGDX (0x8f)
477#define M6811_OP_ADDD (0xc3)
478#define M6811_OP_TXS (0x35)
479#define M6811_OP_DES (0x34)
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480
481/* 68HC12 opcodes. */
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482#define M6812_OP_PAGE2 (0x18)
483#define M6812_OP_MOVW (0x01)
484#define M6812_PB_PSHW (0xae)
485#define M6812_OP_STS (0x5f)
486#define M6812_OP_STS_EXT (0x7f)
487#define M6812_OP_LEAS (0x1b)
488#define M6812_OP_PSHX (0x34)
489#define M6812_OP_PSHY (0x35)
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490
491/* Operand extraction. */
492#define OP_DIRECT (0x100) /* 8-byte direct addressing. */
493#define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
494#define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
495#define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
496
497/* Identification of the sequence. */
498enum m6811_seq_type
499{
500 P_LAST = 0,
501 P_SAVE_REG, /* Save a register on the stack. */
502 P_SET_FRAME, /* Setup the frame pointer. */
503 P_LOCAL_1, /* Allocate 1 byte for locals. */
504 P_LOCAL_2, /* Allocate 2 bytes for locals. */
505 P_LOCAL_N /* Allocate N bytes for locals. */
506};
507
508struct insn_sequence {
509 enum m6811_seq_type type;
510 unsigned length;
511 unsigned short code[MAX_CODES];
512};
513
514/* Sequence of instructions in the 68HC11 function prologue. */
515static struct insn_sequence m6811_prologue[] = {
516 /* Sequences to save a soft-register. */
517 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
518 M6811_OP_PSHX } },
519 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
520 M6811_OP_PAGE2, M6811_OP_PSHX } },
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521 { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
522 M6811_OP_PSHX } },
523 { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
524 M6811_OP_PAGE2, M6811_OP_PSHX } },
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525
526 /* Sequences to allocate local variables. */
527 { P_LOCAL_N, 7, { M6811_OP_TSX,
528 M6811_OP_XGDX,
529 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
530 M6811_OP_XGDX,
531 M6811_OP_TXS } },
532 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
533 M6811_OP_PAGE2, M6811_OP_XGDX,
534 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
535 M6811_OP_PAGE2, M6811_OP_XGDX,
536 M6811_OP_PAGE2, M6811_OP_TXS } },
537 { P_LOCAL_1, 1, { M6811_OP_DES } },
538 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
539 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
540
541 /* Initialize the frame pointer. */
542 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
b94a41a1 543 { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
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544 { P_LAST, 0, { 0 } }
545};
546
547
548/* Sequence of instructions in the 68HC12 function prologue. */
549static struct insn_sequence m6812_prologue[] = {
550 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
551 OP_IMM_HIGH, OP_IMM_LOW } },
b94a41a1
SC
552 { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
553 { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
908f682f 554 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
ffe1f3ee
SC
555 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
556 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
908f682f
SC
557 { P_LAST, 0 }
558};
559
560
561/* Analyze the sequence of instructions starting at the given address.
562 Returns a pointer to the sequence when it is recognized and
563 the optional value (constant/address) associated with it.
564 Advance the pc for the next sequence. */
565static struct insn_sequence *
566m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
567 CORE_ADDR *val)
568{
569 unsigned char buffer[MAX_CODES];
570 unsigned bufsize;
571 unsigned j;
572 CORE_ADDR cur_val;
573 short v = 0;
574
575 bufsize = 0;
576 for (; seq->type != P_LAST; seq++)
577 {
578 cur_val = 0;
579 for (j = 0; j < seq->length; j++)
580 {
581 if (bufsize < j + 1)
582 {
583 buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
584 1);
585 bufsize++;
586 }
587 /* Continue while we match the opcode. */
588 if (seq->code[j] == buffer[j])
589 continue;
590
591 if ((seq->code[j] & 0xf00) == 0)
592 break;
593
594 /* Extract a sequence parameter (address or constant). */
595 switch (seq->code[j])
596 {
597 case OP_DIRECT:
598 cur_val = (CORE_ADDR) buffer[j];
599 break;
600
601 case OP_IMM_HIGH:
602 cur_val = cur_val & 0x0ff;
603 cur_val |= (buffer[j] << 8);
604 break;
605
606 case OP_IMM_LOW:
607 cur_val &= 0x0ff00;
608 cur_val |= buffer[j];
609 break;
610
611 case OP_PBYTE:
612 if ((buffer[j] & 0xE0) == 0x80)
613 {
614 v = buffer[j] & 0x1f;
615 if (v & 0x10)
616 v |= 0xfff0;
617 }
618 else if ((buffer[j] & 0xfe) == 0xf0)
619 {
620 v = read_memory_unsigned_integer (*pc + j + 1, 1);
621 if (buffer[j] & 1)
622 v |= 0xff00;
b4fa4770 623 *pc = *pc + 1;
908f682f
SC
624 }
625 else if (buffer[j] == 0xf2)
626 {
627 v = read_memory_unsigned_integer (*pc + j + 1, 2);
b4fa4770 628 *pc = *pc + 2;
908f682f
SC
629 }
630 cur_val = v;
631 break;
632 }
633 }
634
635 /* We have a full match. */
636 if (j == seq->length)
637 {
638 *val = cur_val;
639 *pc = *pc + j;
640 return seq;
641 }
642 }
643 return 0;
644}
645
7df11f59
SC
646/* Return the instruction that the function at the PC is using. */
647static enum insn_return_kind
648m68hc11_get_return_insn (CORE_ADDR pc)
649{
650 struct minimal_symbol *sym;
651
652 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
653 function is stored by elfread.c in the high bit of the info field.
654 Use this to decide which instruction the function uses to return. */
655 sym = lookup_minimal_symbol_by_pc (pc);
656 if (sym == 0)
657 return RETURN_RTS;
658
659 if (MSYMBOL_IS_RTC (sym))
660 return RETURN_RTC;
661 else if (MSYMBOL_IS_RTI (sym))
662 return RETURN_RTI;
663 else
664 return RETURN_RTS;
665}
666
667
78073dd8
AC
668/* Analyze the function prologue to find some information
669 about the function:
670 - the PC of the first line (for m68hc11_skip_prologue)
671 - the offset of the previous frame saved address (from current frame)
672 - the soft registers which are pushed. */
673static void
82c230c2
SC
674m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
675 CORE_ADDR *first_line,
676 int *frame_offset, CORE_ADDR *pushed_regs)
78073dd8 677{
82c230c2 678 CORE_ADDR save_addr;
78073dd8 679 CORE_ADDR func_end;
78073dd8
AC
680 int size;
681 int found_frame_point;
82c230c2 682 int saved_reg;
78073dd8 683 CORE_ADDR first_pc;
908f682f
SC
684 int done = 0;
685 struct insn_sequence *seq_table;
78073dd8
AC
686
687 first_pc = get_pc_function_start (pc);
688 size = 0;
689
82c230c2 690 m68hc11_initialize_register_info ();
78073dd8
AC
691 if (first_pc == 0)
692 {
693 *frame_offset = 0;
78073dd8
AC
694 *first_line = pc;
695 return;
696 }
697
908f682f
SC
698 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
699
78073dd8
AC
700 /* The 68hc11 stack is as follows:
701
702
703 | |
704 +-----------+
705 | |
706 | args |
707 | |
708 +-----------+
709 | PC-return |
710 +-----------+
711 | Old frame |
712 +-----------+
713 | |
714 | Locals |
715 | |
716 +-----------+ <--- current frame
717 | |
718
719 With most processors (like 68K) the previous frame can be computed
720 easily because it is always at a fixed offset (see link/unlink).
721 That is, locals are accessed with negative offsets, arguments are
722 accessed with positive ones. Since 68hc11 only supports offsets
723 in the range [0..255], the frame is defined at the bottom of
724 locals (see picture).
725
726 The purpose of the analysis made here is to find out the size
727 of locals in this function. An alternative to this is to use
728 DWARF2 info. This would be better but I don't know how to
729 access dwarf2 debug from this function.
730
731 Walk from the function entry point to the point where we save
732 the frame. While walking instructions, compute the size of bytes
733 which are pushed. This gives us the index to access the previous
734 frame.
735
736 We limit the search to 128 bytes so that the algorithm is bounded
737 in case of random and wrong code. We also stop and abort if
738 we find an instruction which is not supposed to appear in the
739 prologue (as generated by gcc 2.95, 2.96).
740 */
741 pc = first_pc;
742 func_end = pc + 128;
78073dd8 743 found_frame_point = 0;
908f682f 744 *frame_offset = 0;
b4fa4770 745 save_addr = fp + STACK_CORRECTION;
908f682f 746 while (!done && pc + 2 < func_end)
78073dd8 747 {
908f682f
SC
748 struct insn_sequence *seq;
749 CORE_ADDR val;
78073dd8 750
908f682f
SC
751 seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
752 if (seq == 0)
753 break;
78073dd8 754
908f682f 755 if (seq->type == P_SAVE_REG)
78073dd8 756 {
908f682f
SC
757 if (found_frame_point)
758 {
759 saved_reg = m68hc11_which_soft_register (val);
760 if (saved_reg < 0)
761 break;
78073dd8 762
908f682f
SC
763 save_addr -= 2;
764 if (pushed_regs)
765 pushed_regs[saved_reg] = save_addr;
766 }
767 else
768 {
769 size += 2;
770 }
78073dd8 771 }
908f682f 772 else if (seq->type == P_SET_FRAME)
78073dd8
AC
773 {
774 found_frame_point = 1;
908f682f 775 *frame_offset = size;
78073dd8 776 }
908f682f 777 else if (seq->type == P_LOCAL_1)
78073dd8 778 {
6148eca7
SC
779 size += 1;
780 }
908f682f 781 else if (seq->type == P_LOCAL_2)
78073dd8 782 {
908f682f 783 size += 2;
78073dd8 784 }
908f682f 785 else if (seq->type == P_LOCAL_N)
78073dd8 786 {
908f682f
SC
787 /* Stack pointer is decremented for the allocation. */
788 if (val & 0x8000)
789 size -= (int) (val) | 0xffff0000;
790 else
791 size -= val;
78073dd8
AC
792 }
793 }
78073dd8
AC
794 *first_line = pc;
795}
796
82c230c2 797static CORE_ADDR
78073dd8
AC
798m68hc11_skip_prologue (CORE_ADDR pc)
799{
800 CORE_ADDR func_addr, func_end;
801 struct symtab_and_line sal;
802 int frame_offset;
78073dd8 803
82c230c2
SC
804 /* If we have line debugging information, then the end of the
805 prologue should be the first assembly instruction of the
78073dd8
AC
806 first source line. */
807 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
808 {
809 sal = find_pc_line (func_addr, 0);
810 if (sal.end && sal.end < func_end)
811 return sal.end;
812 }
813
82c230c2 814 m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
78073dd8
AC
815 return pc;
816}
817
a5afb99f
AC
818/* Given a GDB frame, determine the address of the calling function's
819 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
820 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
821 will be called for the new frame. */
78073dd8 822
82c230c2 823static CORE_ADDR
78073dd8
AC
824m68hc11_frame_chain (struct frame_info *frame)
825{
82c230c2 826 CORE_ADDR addr;
78073dd8 827
1e2330ba
AC
828 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
829 get_frame_base (frame),
830 get_frame_base (frame)))
831 return get_frame_base (frame); /* dummy frame same as caller's frame */
6148eca7 832
da50a4b7
AC
833 if (get_frame_extra_info (frame)->return_pc == 0
834 || inside_entry_file (get_frame_extra_info (frame)->return_pc))
82c230c2 835 return (CORE_ADDR) 0;
78073dd8 836
1e2330ba 837 if (get_frame_base (frame) == 0)
78073dd8
AC
838 {
839 return (CORE_ADDR) 0;
840 }
841
da50a4b7 842 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION - 2;
78073dd8 843 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
78073dd8
AC
844 return addr;
845}
846
847/* Put here the code to store, into a struct frame_saved_regs, the
848 addresses of the saved registers of frame described by FRAME_INFO.
849 This includes special registers such as pc and fp saved in special
850 ways in the stack frame. sp is even more special: the address we
851 return for it IS the sp for the next frame. */
82c230c2
SC
852static void
853m68hc11_frame_init_saved_regs (struct frame_info *fi)
78073dd8
AC
854{
855 CORE_ADDR pc;
184651e3 856 CORE_ADDR addr;
7df11f59 857
b2fb4676 858 if (get_frame_saved_regs (fi) == NULL)
82c230c2
SC
859 frame_saved_regs_zalloc (fi);
860 else
b2fb4676 861 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
82c230c2 862
50abf9e5 863 pc = get_frame_pc (fi);
da50a4b7
AC
864 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (pc);
865 m68hc11_guess_from_prologue (pc, get_frame_base (fi), &pc,
866 &get_frame_extra_info (fi)->size,
b2fb4676 867 get_frame_saved_regs (fi));
82c230c2 868
da50a4b7 869 addr = get_frame_base (fi) + get_frame_extra_info (fi)->size + STACK_CORRECTION;
908f682f 870 if (soft_regs[SOFT_FP_REGNUM].name)
b2fb4676 871 get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2;
7df11f59
SC
872
873 /* Take into account how the function was called/returns. */
da50a4b7 874 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC)
7df11f59 875 {
b2fb4676 876 get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr;
7df11f59
SC
877 addr++;
878 }
da50a4b7 879 else if (get_frame_extra_info (fi)->return_kind == RETURN_RTI)
7df11f59 880 {
b2fb4676
AC
881 get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr;
882 get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1;
883 get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3;
884 get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5;
7df11f59
SC
885 addr += 7;
886 }
b2fb4676
AC
887 get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr;
888 get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM];
78073dd8
AC
889}
890
82c230c2 891static void
78073dd8
AC
892m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
893{
82c230c2 894 CORE_ADDR addr;
78073dd8 895
a00a19e9 896 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
82c230c2 897
11c02a10 898 if (get_next_frame (fi))
8bedc050 899 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
82c230c2
SC
900
901 m68hc11_frame_init_saved_regs (fi);
78073dd8
AC
902
903 if (fromleaf)
904 {
da50a4b7
AC
905 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (get_frame_pc (fi));
906 get_frame_extra_info (fi)->return_pc = m68hc11_saved_pc_after_call (fi);
78073dd8
AC
907 }
908 else
909 {
b2fb4676 910 addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM];
82c230c2 911 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
7df11f59
SC
912
913 /* Take into account the 68HC12 specific call (PC + page). */
da50a4b7 914 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC
7df11f59
SC
915 && addr >= 0x08000 && addr < 0x0c000
916 && USE_PAGE_REGISTER)
917 {
b2fb4676 918 CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM];
7df11f59
SC
919
920 unsigned page = read_memory_unsigned_integer (page_addr, 1);
921 addr -= 0x08000;
922 addr += ((page & 0x0ff) << 14);
923 addr += 0x1000000;
924 }
da50a4b7 925 get_frame_extra_info (fi)->return_pc = addr;
78073dd8
AC
926 }
927}
928
929/* Same as 'info reg' but prints the registers in a different way. */
930static void
931show_regs (char *args, int from_tty)
932{
82c230c2 933 int ccr = read_register (HARD_CCR_REGNUM);
78073dd8 934 int i;
82c230c2
SC
935 int nr;
936
78073dd8 937 printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
82c230c2
SC
938 (int) read_register (HARD_PC_REGNUM),
939 (int) read_register (HARD_SP_REGNUM),
940 (int) read_register (SOFT_FP_REGNUM),
78073dd8
AC
941 ccr,
942 ccr & M6811_S_BIT ? 'S' : '-',
943 ccr & M6811_X_BIT ? 'X' : '-',
944 ccr & M6811_H_BIT ? 'H' : '-',
945 ccr & M6811_I_BIT ? 'I' : '-',
946 ccr & M6811_N_BIT ? 'N' : '-',
947 ccr & M6811_Z_BIT ? 'Z' : '-',
948 ccr & M6811_V_BIT ? 'V' : '-',
949 ccr & M6811_C_BIT ? 'C' : '-');
950
7df11f59 951 printf_filtered ("D=%04x IX=%04x IY=%04x",
82c230c2
SC
952 (int) read_register (HARD_D_REGNUM),
953 (int) read_register (HARD_X_REGNUM),
954 (int) read_register (HARD_Y_REGNUM));
955
7df11f59
SC
956 if (USE_PAGE_REGISTER)
957 {
958 printf_filtered (" Page=%02x",
959 (int) read_register (HARD_PAGE_REGNUM));
960 }
961 printf_filtered ("\n");
962
82c230c2
SC
963 nr = 0;
964 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
78073dd8 965 {
82c230c2
SC
966 /* Skip registers which are not defined in the symbol table. */
967 if (soft_regs[i].name == 0)
968 continue;
969
970 printf_filtered ("D%d=%04x",
971 i - SOFT_D1_REGNUM + 1,
972 (int) read_register (i));
973 nr++;
974 if ((nr % 8) == 7)
78073dd8
AC
975 printf_filtered ("\n");
976 else
977 printf_filtered (" ");
978 }
82c230c2
SC
979 if (nr && (nr % 8) != 7)
980 printf_filtered ("\n");
78073dd8
AC
981}
982
22df305e
SC
983static CORE_ADDR
984m68hc11_stack_align (CORE_ADDR addr)
985{
986 return ((addr + 1) & -2);
987}
988
82c230c2 989static CORE_ADDR
78073dd8 990m68hc11_push_arguments (int nargs,
ea7c478f 991 struct value **args,
78073dd8
AC
992 CORE_ADDR sp,
993 int struct_return,
994 CORE_ADDR struct_addr)
995{
82c230c2
SC
996 int stack_alloc;
997 int argnum;
998 int first_stack_argnum;
999 int stack_offset;
1000 struct type *type;
1001 char *val;
1002 int len;
1003
1004 stack_alloc = 0;
1005 first_stack_argnum = 0;
1006 if (struct_return)
1007 {
184651e3
SC
1008 /* The struct is allocated on the stack and gdb used the stack
1009 pointer for the address of that struct. We must apply the
1010 stack offset on the address. */
5d1a66bd 1011 write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
82c230c2
SC
1012 }
1013 else if (nargs > 0)
1014 {
1015 type = VALUE_TYPE (args[0]);
1016 len = TYPE_LENGTH (type);
1017
1018 /* First argument is passed in D and X registers. */
1019 if (len <= 4)
1020 {
1021 LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
1022 first_stack_argnum = 1;
1023 write_register (HARD_D_REGNUM, v);
1024 if (len > 2)
1025 {
1026 v >>= 16;
1027 write_register (HARD_X_REGNUM, v);
1028 }
1029 }
1030 }
1031 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
1032 {
1033 type = VALUE_TYPE (args[argnum]);
22df305e 1034 stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
82c230c2
SC
1035 }
1036 sp -= stack_alloc;
1037
5d1a66bd 1038 stack_offset = STACK_CORRECTION;
82c230c2
SC
1039 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
1040 {
1041 type = VALUE_TYPE (args[argnum]);
1042 len = TYPE_LENGTH (type);
1043
1044 val = (char*) VALUE_CONTENTS (args[argnum]);
1045 write_memory (sp + stack_offset, val, len);
1046 stack_offset += len;
22df305e
SC
1047 if (len & 1)
1048 {
1049 static char zero = 0;
1050
1051 write_memory (sp + stack_offset, &zero, 1);
1052 stack_offset++;
1053 }
82c230c2
SC
1054 }
1055 return sp;
78073dd8
AC
1056}
1057
1058
4db73d49
SC
1059/* Return the GDB type object for the "standard" data type
1060 of data in register N. */
1061
82c230c2 1062static struct type *
4db73d49 1063m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
82c230c2 1064{
5706502a
SC
1065 switch (reg_nr)
1066 {
1067 case HARD_PAGE_REGNUM:
1068 case HARD_A_REGNUM:
1069 case HARD_B_REGNUM:
1070 case HARD_CCR_REGNUM:
1071 return builtin_type_uint8;
1072
548bcbec
SC
1073 case M68HC12_HARD_PC_REGNUM:
1074 return builtin_type_uint32;
1075
5706502a
SC
1076 default:
1077 return builtin_type_uint16;
1078 }
82c230c2
SC
1079}
1080
1081static void
1082m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1083{
184651e3
SC
1084 /* The struct address computed by gdb is on the stack.
1085 It uses the stack pointer so we must apply the stack
1086 correction offset. */
5d1a66bd 1087 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
82c230c2
SC
1088}
1089
1090static void
4db73d49
SC
1091m68hc11_store_return_value (struct type *type, struct regcache *regcache,
1092 const void *valbuf)
82c230c2 1093{
22df305e
SC
1094 int len;
1095
1096 len = TYPE_LENGTH (type);
1097
1098 /* First argument is passed in D and X registers. */
4db73d49
SC
1099 if (len <= 2)
1100 regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
1101 else if (len <= 4)
22df305e 1102 {
4db73d49
SC
1103 regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
1104 len - 2, valbuf);
1105 regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
22df305e
SC
1106 }
1107 else
1108 error ("return of value > 4 is not supported.");
82c230c2
SC
1109}
1110
1111
ef2b8fcd 1112/* Given a return value in `regcache' with a type `type',
78073dd8
AC
1113 extract and copy its value into `valbuf'. */
1114
82c230c2 1115static void
ef2b8fcd
SC
1116m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
1117 void *valbuf)
78073dd8 1118{
82c230c2 1119 int len = TYPE_LENGTH (type);
ef2b8fcd
SC
1120 char buf[M68HC11_REG_SIZE];
1121
1122 regcache_raw_read (regcache, HARD_D_REGNUM, buf);
22df305e 1123 switch (len)
82c230c2 1124 {
22df305e 1125 case 1:
ef2b8fcd 1126 memcpy (valbuf, buf + 1, 1);
22df305e 1127 break;
ef2b8fcd 1128
22df305e 1129 case 2:
ef2b8fcd 1130 memcpy (valbuf, buf, 2);
22df305e 1131 break;
ef2b8fcd 1132
22df305e 1133 case 3:
ef2b8fcd
SC
1134 memcpy ((char*) valbuf + 1, buf, 2);
1135 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1136 memcpy (valbuf, buf + 1, 1);
22df305e 1137 break;
ef2b8fcd 1138
22df305e 1139 case 4:
ef2b8fcd
SC
1140 memcpy ((char*) valbuf + 2, buf, 2);
1141 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1142 memcpy (valbuf, buf, 2);
22df305e
SC
1143 break;
1144
1145 default:
82c230c2
SC
1146 error ("bad size for return value");
1147 }
1148}
1149
1150/* Should call_function allocate stack space for a struct return? */
1151static int
1152m68hc11_use_struct_convention (int gcc_p, struct type *type)
1153{
22df305e
SC
1154 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
1155 || TYPE_CODE (type) == TYPE_CODE_UNION
1156 || TYPE_LENGTH (type) > 4);
82c230c2
SC
1157}
1158
1159static int
1160m68hc11_return_value_on_stack (struct type *type)
1161{
22df305e 1162 return TYPE_LENGTH (type) > 4;
82c230c2
SC
1163}
1164
1165/* Extract from an array REGBUF containing the (raw) register state
1166 the address in which a function should return its structure value,
1167 as a CORE_ADDR (or an expression that can be used as one). */
1168static CORE_ADDR
4db73d49 1169m68hc11_extract_struct_value_address (struct regcache *regcache)
82c230c2 1170{
4db73d49
SC
1171 char buf[M68HC11_REG_SIZE];
1172
1173 regcache_cooked_read (regcache, HARD_D_REGNUM, buf);
1174 return extract_unsigned_integer (buf, M68HC11_REG_SIZE);
82c230c2
SC
1175}
1176
1177/* Function: push_return_address (pc)
1178 Set up the return address for the inferior function call.
1179 Needed for targets where we don't actually execute a JSR/BSR instruction */
1180
1181static CORE_ADDR
1182m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1183{
1184 char valbuf[2];
1185
22df305e 1186 pc = CALL_DUMMY_ADDRESS ();
82c230c2
SC
1187 sp -= 2;
1188 store_unsigned_integer (valbuf, 2, pc);
5d1a66bd 1189 write_memory (sp + STACK_CORRECTION, valbuf, 2);
82c230c2
SC
1190 return sp;
1191}
1192
7df11f59
SC
1193/* Test whether the ELF symbol corresponds to a function using rtc or
1194 rti to return. */
1195
1196static void
1197m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1198{
1199 unsigned char flags;
1200
1201 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1202 if (flags & STO_M68HC12_FAR)
1203 MSYMBOL_SET_RTC (msym);
1204 if (flags & STO_M68HC12_INTERRUPT)
1205 MSYMBOL_SET_RTI (msym);
1206}
1207
ea3881d9
SC
1208static int
1209gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1210{
1211 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1212 return print_insn_m68hc11 (memaddr, info);
1213 else
1214 return print_insn_m68hc12 (memaddr, info);
1215}
1216
b631436b
SC
1217\f
1218
1219/* 68HC11/68HC12 register groups.
1220 Identify real hard registers and soft registers used by gcc. */
1221
1222static struct reggroup *m68hc11_soft_reggroup;
1223static struct reggroup *m68hc11_hard_reggroup;
1224
1225static void
1226m68hc11_init_reggroups (void)
1227{
1228 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1229 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1230}
1231
1232static void
1233m68hc11_add_reggroups (struct gdbarch *gdbarch)
1234{
1235 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1236 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1237 reggroup_add (gdbarch, general_reggroup);
1238 reggroup_add (gdbarch, float_reggroup);
1239 reggroup_add (gdbarch, all_reggroup);
1240 reggroup_add (gdbarch, save_reggroup);
1241 reggroup_add (gdbarch, restore_reggroup);
1242 reggroup_add (gdbarch, vector_reggroup);
1243 reggroup_add (gdbarch, system_reggroup);
1244}
1245
1246static int
1247m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1248 struct reggroup *group)
1249{
1250 /* We must save the real hard register as well as gcc
1251 soft registers including the frame pointer. */
1252 if (group == save_reggroup || group == restore_reggroup)
1253 {
1254 return (regnum <= gdbarch_num_regs (gdbarch)
1255 || ((regnum == SOFT_FP_REGNUM
1256 || regnum == SOFT_TMP_REGNUM
1257 || regnum == SOFT_ZS_REGNUM
1258 || regnum == SOFT_XY_REGNUM)
1259 && m68hc11_register_name (regnum)));
1260 }
1261
1262 /* Group to identify gcc soft registers (d1..dN). */
1263 if (group == m68hc11_soft_reggroup)
1264 {
1265 return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
1266 }
1267
1268 if (group == m68hc11_hard_reggroup)
1269 {
1270 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1271 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1272 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1273 }
1274 return default_register_reggroup_p (gdbarch, regnum, group);
1275}
1276
82c230c2
SC
1277static struct gdbarch *
1278m68hc11_gdbarch_init (struct gdbarch_info info,
1279 struct gdbarch_list *arches)
1280{
1281 static LONGEST m68hc11_call_dummy_words[] =
1282 {0};
1283 struct gdbarch *gdbarch;
1284 struct gdbarch_tdep *tdep;
81967506 1285 int elf_flags;
82c230c2
SC
1286
1287 soft_reg_initialized = 0;
81967506
SC
1288
1289 /* Extract the elf_flags if available. */
1290 if (info.abfd != NULL
1291 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1292 elf_flags = elf_elfheader (info.abfd)->e_flags;
1293 else
1294 elf_flags = 0;
1295
82c230c2
SC
1296 /* try to find a pre-existing architecture */
1297 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1298 arches != NULL;
1299 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1300 {
81967506
SC
1301 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1302 continue;
1303
82c230c2
SC
1304 return arches->gdbarch;
1305 }
1306
1307 /* Need a new architecture. Fill in a target specific vector. */
1308 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1309 gdbarch = gdbarch_alloc (&info, tdep);
81967506 1310 tdep->elf_flags = elf_flags;
ed99b3d0 1311
a5afb99f
AC
1312 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1313 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1314 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1315
5d1a66bd
SC
1316 switch (info.bfd_arch_info->arch)
1317 {
1318 case bfd_arch_m68hc11:
1319 tdep->stack_correction = 1;
7df11f59 1320 tdep->use_page_register = 0;
908f682f 1321 tdep->prologue = m6811_prologue;
548bcbec
SC
1322 set_gdbarch_addr_bit (gdbarch, 16);
1323 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1324 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1325 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
5d1a66bd 1326 break;
82c230c2 1327
5d1a66bd
SC
1328 case bfd_arch_m68hc12:
1329 tdep->stack_correction = 0;
7df11f59 1330 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
908f682f 1331 tdep->prologue = m6812_prologue;
548bcbec
SC
1332 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1333 set_gdbarch_num_pseudo_regs (gdbarch,
1334 elf_flags & E_M68HC12_BANKS
1335 ? M68HC12_NUM_PSEUDO_REGS
1336 : M68HC11_NUM_PSEUDO_REGS);
1337 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1338 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1339 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1340 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
5d1a66bd
SC
1341 break;
1342
1343 default:
1344 break;
1345 }
7d32ba20
SC
1346
1347 /* Initially set everything according to the ABI.
1348 Use 16-bit integers since it will be the case for most
1349 programs. The size of these types should normally be set
1350 according to the dwarf2 debug information. */
82c230c2 1351 set_gdbarch_short_bit (gdbarch, 16);
81967506 1352 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
82c230c2 1353 set_gdbarch_float_bit (gdbarch, 32);
81967506 1354 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
2417dd25 1355 set_gdbarch_long_double_bit (gdbarch, 64);
82c230c2
SC
1356 set_gdbarch_long_bit (gdbarch, 32);
1357 set_gdbarch_ptr_bit (gdbarch, 16);
1358 set_gdbarch_long_long_bit (gdbarch, 64);
1359
b2a02dda
SC
1360 /* Characters are unsigned. */
1361 set_gdbarch_char_signed (gdbarch, 0);
1362
82c230c2
SC
1363 /* Set register info. */
1364 set_gdbarch_fp0_regnum (gdbarch, -1);
f30ee0bc 1365 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
82c230c2
SC
1366 set_gdbarch_frame_args_skip (gdbarch, 0);
1367
82c230c2 1368 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
b46e02f6 1369 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
82c230c2 1370
82c230c2 1371 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
0ba6dca9 1372 set_gdbarch_deprecated_fp_regnum (gdbarch, SOFT_FP_REGNUM);
82c230c2 1373 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
4db73d49 1374 set_gdbarch_register_type (gdbarch, m68hc11_register_type);
46ce284d
AC
1375 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1376 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
82c230c2 1377
b1e29e33
AC
1378 set_gdbarch_deprecated_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
1379 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (m68hc11_call_dummy_words));
129c1cd6 1380 set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
ef2b8fcd 1381 set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
b81774d8 1382 set_gdbarch_deprecated_push_arguments (gdbarch, m68hc11_push_arguments);
28f617b3 1383 set_gdbarch_deprecated_push_return_address (gdbarch, m68hc11_push_return_address);
82c230c2
SC
1384 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1385
4183d812 1386 set_gdbarch_deprecated_store_struct_return (gdbarch, m68hc11_store_struct_return);
4db73d49
SC
1387 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1388 set_gdbarch_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
82c230c2 1389
618ce49f 1390 set_gdbarch_deprecated_frame_chain (gdbarch, m68hc11_frame_chain);
8bedc050 1391 set_gdbarch_deprecated_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
42efa47a 1392 set_gdbarch_deprecated_frame_args_address (gdbarch, m68hc11_frame_args_address);
6913c89a 1393 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
82c230c2 1394
129c1cd6 1395 set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
82c230c2 1396
4183d812 1397 set_gdbarch_deprecated_store_struct_return (gdbarch, m68hc11_store_struct_return);
ebba8386 1398 set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value);
26e9b323 1399 set_gdbarch_deprecated_extract_struct_value_address
82c230c2
SC
1400 (gdbarch, m68hc11_extract_struct_value_address);
1401 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
e9582e71 1402 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
749b82f6 1403 set_gdbarch_deprecated_pop_frame (gdbarch, m68hc11_pop_frame);
82c230c2
SC
1404 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1405 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1406 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1407 set_gdbarch_function_start_offset (gdbarch, 0);
1408 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
22df305e 1409 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
f933a9c5 1410 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch, 1);
70ed8774 1411 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
82c230c2 1412
b631436b
SC
1413 m68hc11_add_reggroups (gdbarch);
1414 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1415
7df11f59
SC
1416 /* Minsymbol frobbing. */
1417 set_gdbarch_elf_make_msymbol_special (gdbarch,
1418 m68hc11_elf_make_msymbol_special);
1419
82c230c2 1420 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
82c230c2
SC
1421
1422 return gdbarch;
78073dd8
AC
1423}
1424
a78f21af
AC
1425extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
1426
78073dd8 1427void
fba45db2 1428_initialize_m68hc11_tdep (void)
78073dd8 1429{
82c230c2 1430 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
ea3881d9 1431 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
b631436b 1432 m68hc11_init_reggroups ();
78073dd8
AC
1433
1434 add_com ("regs", class_vars, show_regs, "Print all registers");
1435}
1436
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