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* i387-tdep.c (i387_fill_fsave, i387_fill_fxsave): Remove.
[deliverable/binutils-gdb.git] / gdb / mips-linux-tdep.c
CommitLineData
75c9abc6 1/* Target-dependent code for GNU/Linux on MIPS processors.
a094c6fb 2
6aba47ca 3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007
76a9d10f 4 Free Software Foundation, Inc.
2aa830e4
DJ		 5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
197e01b6
EZ		 20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
2aa830e4
DJ		 22
23#include "defs.h"
24#include "gdbcore.h"
25#include "target.h"
26#include "solib-svr4.h"
19ed69dd 27#include "osabi.h"
96f026fc 28#include "mips-tdep.h"
19ed69dd 29#include "gdb_string.h"
96f026fc 30#include "gdb_assert.h"
6de918a6 31#include "frame.h"
2fdf551c 32#include "regcache.h"
5792a79b
DJ		 33#include "trad-frame.h"
34#include "tramp-frame.h"
e6bb342a 35#include "gdbtypes.h"
5ea03926 36#include "solib.h"
982e9687 37#include "symtab.h"
d37eb719 38#include "mips-linux-tdep.h"
2aa830e4
DJ		 39
40/* Figure out where the longjmp will land.
295093a4
MS		 41 We expect the first arg to be a pointer to the jmp_buf structure
42 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
43 at. The pc is copied into PC. This routine returns 1 on
44 success. */
2aa830e4 45
19ed69dd
KB		 46#define MIPS_LINUX_JB_ELEMENT_SIZE 4
47#define MIPS_LINUX_JB_PC 0
48
49static int
2aa830e4
DJ		 50mips_linux_get_longjmp_target (CORE_ADDR *pc)
51{
52 CORE_ADDR jb_addr;
53 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
54
613e114f 55 jb_addr = read_register (MIPS_A0_REGNUM);
2aa830e4 56
bf072999
DJ		 57 if (target_read_memory (jb_addr
58 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
59 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
2aa830e4
DJ		 60 return 0;
61
7c0b4a20 62 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
2aa830e4
DJ		 63
64 return 1;
65}
66
4246e332 67/* Transform the bits comprising a 32-bit register to the right size
23a6d369
AC		 68 for regcache_raw_supply(). This is needed when mips_isa_regsize()
69 is 8. */
96f026fc
KB		 70
71static void
72supply_32bit_reg (int regnum, const void *addr)
73{
d37eb719 74 gdb_byte buf[MAX_REGISTER_SIZE];
3acba339 75 store_signed_integer (buf, register_size (current_gdbarch, regnum),
96f026fc 76 extract_signed_integer (addr, 4));
23a6d369 77 regcache_raw_supply (current_regcache, regnum, buf);
96f026fc
KB		 78}
79
2aa830e4
DJ		 80/* Unpack an elf_gregset_t into GDB's register cache. */
81
d37eb719
DJ		 82void
83mips_supply_gregset (mips_elf_gregset_t *gregsetp)
2aa830e4
DJ		 84{
85 int regi;
d37eb719 86 mips_elf_greg_t *regp = *gregsetp;
d9d9c31f 87 char zerobuf[MAX_REGISTER_SIZE];
bf072999 88
d9d9c31f 89 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4
DJ		 90
91 for (regi = EF_REG0; regi <= EF_REG31; regi++)
96f026fc 92 supply_32bit_reg ((regi - EF_REG0), (char *)(regp + regi));
2aa830e4 93
56cea623
AC		 94 supply_32bit_reg (mips_regnum (current_gdbarch)->lo,
95 (char *)(regp + EF_LO));
96 supply_32bit_reg (mips_regnum (current_gdbarch)->hi,
97 (char *)(regp + EF_HI));
98
99 supply_32bit_reg (mips_regnum (current_gdbarch)->pc,
100 (char *)(regp + EF_CP0_EPC));
101 supply_32bit_reg (mips_regnum (current_gdbarch)->badvaddr,
102 (char *)(regp + EF_CP0_BADVADDR));
24e05951 103 supply_32bit_reg (MIPS_PS_REGNUM, (char *)(regp + EF_CP0_STATUS));
56cea623
AC		 104 supply_32bit_reg (mips_regnum (current_gdbarch)->cause,
105 (char *)(regp + EF_CP0_CAUSE));
2aa830e4
DJ		 106
107 /* Fill inaccessible registers with zero. */
613e114f 108 regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
295093a4
MS		 109 for (regi = MIPS_FIRST_EMBED_REGNUM;
110 regi < MIPS_LAST_EMBED_REGNUM;
111 regi++)
23a6d369 112 regcache_raw_supply (current_regcache, regi, zerobuf);
2aa830e4
DJ		 113}
114
115/* Pack our registers (or one register) into an elf_gregset_t. */
116
d37eb719
DJ		 117void
118mips_fill_gregset (mips_elf_gregset_t *gregsetp, int regno)
2aa830e4
DJ		 119{
120 int regaddr, regi;
d37eb719 121 mips_elf_greg_t *regp = *gregsetp;
96f026fc 122 void *dst;
2aa830e4
DJ		 123
124 if (regno == -1)
125 {
d37eb719 126 memset (regp, 0, sizeof (mips_elf_gregset_t));
2aa830e4 127 for (regi = 0; regi < 32; regi++)
9f62d0e2
DJ		 128 mips_fill_gregset (gregsetp, regi);
129 mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
130 mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
131 mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
132 mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
133 mips_fill_gregset (gregsetp, MIPS_PS_REGNUM);
134 mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
2aa830e4
DJ		 135
136 return;
137 }
138
139 if (regno < 32)
140 {
2aa830e4 141 dst = regp + regno + EF_REG0;
822c9732 142 regcache_raw_collect (current_regcache, regno, dst);
2aa830e4
DJ		 143 return;
144 }
145
56cea623
AC		 146 if (regno == mips_regnum (current_gdbarch)->lo)
147 regaddr = EF_LO;
148 else if (regno == mips_regnum (current_gdbarch)->hi)
149 regaddr = EF_HI;
150 else if (regno == mips_regnum (current_gdbarch)->pc)
151 regaddr = EF_CP0_EPC;
152 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
153 regaddr = EF_CP0_BADVADDR;
24e05951 154 else if (regno == MIPS_PS_REGNUM)
56cea623
AC		 155 regaddr = EF_CP0_STATUS;
156 else if (regno == mips_regnum (current_gdbarch)->cause)
157 regaddr = EF_CP0_CAUSE;
158 else
159 regaddr = -1;
2aa830e4
DJ		 160
161 if (regaddr != -1)
162 {
2aa830e4 163 dst = regp + regaddr;
822c9732 164 regcache_raw_collect (current_regcache, regno, dst);
2aa830e4
DJ		 165 }
166}
167
168/* Likewise, unpack an elf_fpregset_t. */
169
d37eb719
DJ		 170void
171mips_supply_fpregset (mips_elf_fpregset_t *fpregsetp)
2aa830e4 172{
52f0bd74 173 int regi;
d9d9c31f 174 char zerobuf[MAX_REGISTER_SIZE];
bf072999 175
d9d9c31f 176 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4
DJ		 177
178 for (regi = 0; regi < 32; regi++)
23a6d369
AC		 179 regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
180 (char *)(*fpregsetp + regi));
2aa830e4 181
23a6d369
AC		 182 regcache_raw_supply (current_regcache,
183 mips_regnum (current_gdbarch)->fp_control_status,
184 (char *)(*fpregsetp + 32));
2aa830e4 185
295093a4 186 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
23a6d369
AC		 187 regcache_raw_supply (current_regcache,
188 mips_regnum (current_gdbarch)->fp_implementation_revision,
189 zerobuf);
2aa830e4
DJ		 190}
191
192/* Likewise, pack one or all floating point registers into an
193 elf_fpregset_t. */
194
d37eb719
DJ		 195void
196mips_fill_fpregset (mips_elf_fpregset_t *fpregsetp, int regno)
2aa830e4
DJ		 197{
198 char *from, *to;
199
200 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
201 {
2aa830e4 202 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
2fdf551c 203 regcache_raw_collect (current_regcache, regno, to);
2aa830e4 204 }
56cea623 205 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
2aa830e4 206 {
2aa830e4 207 to = (char *) (*fpregsetp + 32);
2fdf551c 208 regcache_raw_collect (current_regcache, regno, to);
2aa830e4
DJ		 209 }
210 else if (regno == -1)
211 {
212 int regi;
213
214 for (regi = 0; regi < 32; regi++)
9f62d0e2
DJ		 215 mips_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
216 mips_fill_fpregset (fpregsetp,
217 mips_regnum (current_gdbarch)->fp_control_status);
2aa830e4
DJ		 218 }
219}
220
96f026fc
KB		 221/* Support for 64-bit ABIs. */
222
96f026fc 223/* Figure out where the longjmp will land.
295093a4
MS		 224 We expect the first arg to be a pointer to the jmp_buf structure
225 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
226 at. The pc is copied into PC. This routine returns 1 on
227 success. */
96f026fc
KB		 228
229/* Details about jmp_buf. */
230
231#define MIPS64_LINUX_JB_PC 0
232
233static int
234mips64_linux_get_longjmp_target (CORE_ADDR *pc)
235{
236 CORE_ADDR jb_addr;
237 void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
238 int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
239
613e114f 240 jb_addr = read_register (MIPS_A0_REGNUM);
96f026fc
KB		 241
242 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
243 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
244 return 0;
245
7c0b4a20 246 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
96f026fc
KB		 247
248 return 1;
249}
250
d37eb719
DJ		 251/* Register set support functions. These operate on standard 64-bit
252 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
253 target will still use the 64-bit format for PTRACE_GETREGS. */
254
255/* Supply a 64-bit register. */
96f026fc 256
d37eb719
DJ		 257void
258supply_64bit_reg (int regnum, const gdb_byte *buf)
259{
260 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
261 && register_size (current_gdbarch, regnum) == 4)
262 regcache_raw_supply (current_regcache, regnum, buf + 4);
263 else
264 regcache_raw_supply (current_regcache, regnum, buf);
265}
266
267/* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
268
269void
96f026fc
KB		 270mips64_supply_gregset (mips64_elf_gregset_t *gregsetp)
271{
272 int regi;
273 mips64_elf_greg_t *regp = *gregsetp;
d37eb719 274 gdb_byte zerobuf[MAX_REGISTER_SIZE];
96f026fc 275
d9d9c31f 276 memset (zerobuf, 0, MAX_REGISTER_SIZE);
96f026fc
KB		 277
278 for (regi = MIPS64_EF_REG0; regi <= MIPS64_EF_REG31; regi++)
d37eb719
DJ		 279 supply_64bit_reg (regi - MIPS64_EF_REG0, (gdb_byte *)(regp + regi));
280
281 supply_64bit_reg (mips_regnum (current_gdbarch)->lo,
282 (gdb_byte *) (regp + MIPS64_EF_LO));
283 supply_64bit_reg (mips_regnum (current_gdbarch)->hi,
284 (gdb_byte *) (regp + MIPS64_EF_HI));
285
286 supply_64bit_reg (mips_regnum (current_gdbarch)->pc,
287 (gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
288 supply_64bit_reg (mips_regnum (current_gdbarch)->badvaddr,
289 (gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
290 supply_64bit_reg (MIPS_PS_REGNUM,
291 (gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
292 supply_64bit_reg (mips_regnum (current_gdbarch)->cause,
293 (gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
96f026fc
KB		 294
295 /* Fill inaccessible registers with zero. */
613e114f 296 regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
295093a4
MS		 297 for (regi = MIPS_FIRST_EMBED_REGNUM;
298 regi < MIPS_LAST_EMBED_REGNUM;
299 regi++)
23a6d369 300 regcache_raw_supply (current_regcache, regi, zerobuf);
96f026fc
KB		 301}
302
d37eb719 303/* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
96f026fc 304
d37eb719 305void
96f026fc
KB		 306mips64_fill_gregset (mips64_elf_gregset_t *gregsetp, int regno)
307{
308 int regaddr, regi;
309 mips64_elf_greg_t *regp = *gregsetp;
310 void *src, *dst;
311
312 if (regno == -1)
313 {
314 memset (regp, 0, sizeof (mips64_elf_gregset_t));
315 for (regi = 0; regi < 32; regi++)
316 mips64_fill_gregset (gregsetp, regi);
56cea623
AC		 317 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
318 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
319 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
295093a4
MS		 320 mips64_fill_gregset (gregsetp,
321 mips_regnum (current_gdbarch)->badvaddr);
24e05951 322 mips64_fill_gregset (gregsetp, MIPS_PS_REGNUM);
295093a4
MS		 323 mips64_fill_gregset (gregsetp,
324 mips_regnum (current_gdbarch)->cause);
96f026fc
KB		 325
326 return;
327 }
328
329 if (regno < 32)
d37eb719
DJ		 330 regaddr = regno + MIPS64_EF_REG0;
331 else if (regno == mips_regnum (current_gdbarch)->lo)
56cea623
AC		 332 regaddr = MIPS64_EF_LO;
333 else if (regno == mips_regnum (current_gdbarch)->hi)
334 regaddr = MIPS64_EF_HI;
335 else if (regno == mips_regnum (current_gdbarch)->pc)
336 regaddr = MIPS64_EF_CP0_EPC;
337 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
338 regaddr = MIPS64_EF_CP0_BADVADDR;
24e05951 339 else if (regno == MIPS_PS_REGNUM)
56cea623
AC		 340 regaddr = MIPS64_EF_CP0_STATUS;
341 else if (regno == mips_regnum (current_gdbarch)->cause)
342 regaddr = MIPS64_EF_CP0_CAUSE;
343 else
344 regaddr = -1;
96f026fc
KB		 345
346 if (regaddr != -1)
347 {
d37eb719
DJ		 348 gdb_byte buf[MAX_REGISTER_SIZE];
349 LONGEST val;
350
351 regcache_raw_collect (current_regcache, regno, buf);
352 val = extract_signed_integer (buf,
353 register_size (current_gdbarch, regno));
96f026fc 354 dst = regp + regaddr;
d37eb719 355 store_signed_integer (dst, 8, val);
96f026fc
KB		 356 }
357}
358
359/* Likewise, unpack an elf_fpregset_t. */
360
d37eb719 361void
96f026fc
KB		 362mips64_supply_fpregset (mips64_elf_fpregset_t *fpregsetp)
363{
52f0bd74 364 int regi;
96f026fc 365
d37eb719
DJ		 366 /* See mips_linux_o32_sigframe_init for a description of the
367 peculiar FP register layout. */
368 if (register_size (current_gdbarch, FP0_REGNUM) == 4)
369 for (regi = 0; regi < 32; regi++)
370 {
371 gdb_byte *reg_ptr = (gdb_byte *) (*fpregsetp + (regi & ~1));
372 if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
373 reg_ptr += 4;
374 regcache_raw_supply (current_regcache, FP0_REGNUM + regi, reg_ptr);
375 }
376 else
377 for (regi = 0; regi < 32; regi++)
378 regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
379 (char *)(*fpregsetp + regi));
380
381 supply_32bit_reg (mips_regnum (current_gdbarch)->fp_control_status,
382 (gdb_byte *)(*fpregsetp + 32));
383
384 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
385 include it - but the result of PTRACE_GETFPREGS does. The best we
386 can do is to assume that its value is present. */
387 supply_32bit_reg (mips_regnum (current_gdbarch)->fp_implementation_revision,
388 (gdb_byte *)(*fpregsetp + 32) + 4);
96f026fc
KB		 389}
390
391/* Likewise, pack one or all floating point registers into an
392 elf_fpregset_t. */
393
d37eb719 394void
96f026fc
KB		 395mips64_fill_fpregset (mips64_elf_fpregset_t *fpregsetp, int regno)
396{
d37eb719 397 gdb_byte *to;
96f026fc
KB		 398
399 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
400 {
d37eb719
DJ		 401 /* See mips_linux_o32_sigframe_init for a description of the
402 peculiar FP register layout. */
403 if (register_size (current_gdbarch, regno) == 4)
404 {
405 int regi = regno - FP0_REGNUM;
406
407 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
408 if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
409 to += 4;
410 regcache_raw_collect (current_regcache, regno, to);
411 }
412 else
413 {
414 to = (gdb_byte *) (*fpregsetp + regno - FP0_REGNUM);
415 regcache_raw_collect (current_regcache, regno, to);
416 }
96f026fc 417 }
56cea623 418 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
96f026fc 419 {
d37eb719
DJ		 420 gdb_byte buf[MAX_REGISTER_SIZE];
421 LONGEST val;
422
423 regcache_raw_collect (current_regcache, regno, buf);
424 val = extract_signed_integer (buf,
425 register_size (current_gdbarch, regno));
426 to = (gdb_byte *) (*fpregsetp + 32);
427 store_signed_integer (to, 4, val);
428 }
429 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
430 {
431 gdb_byte buf[MAX_REGISTER_SIZE];
432 LONGEST val;
433
434 regcache_raw_collect (current_regcache, regno, buf);
435 val = extract_signed_integer (buf,
436 register_size (current_gdbarch, regno));
437 to = (gdb_byte *) (*fpregsetp + 32) + 4;
438 store_signed_integer (to, 4, val);
96f026fc
KB		 439 }
440 else if (regno == -1)
441 {
442 int regi;
443
444 for (regi = 0; regi < 32; regi++)
445 mips64_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
d37eb719
DJ		 446 mips64_fill_fpregset (fpregsetp,
447 mips_regnum (current_gdbarch)->fp_control_status);
448 mips64_fill_fpregset (fpregsetp, (mips_regnum (current_gdbarch)
449 ->fp_implementation_revision));
96f026fc
KB		 450 }
451}
452
453
2aa830e4
DJ		 454/* Use a local version of this function to get the correct types for
455 regsets, until multi-arch core support is ready. */
456
457static void
458fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
459 int which, CORE_ADDR reg_addr)
460{
d37eb719
DJ		 461 mips_elf_gregset_t gregset;
462 mips_elf_fpregset_t fpregset;
96f026fc
KB		 463 mips64_elf_gregset_t gregset64;
464 mips64_elf_fpregset_t fpregset64;
2aa830e4
DJ		 465
466 if (which == 0)
467 {
96f026fc 468 if (core_reg_size == sizeof (gregset))
2aa830e4 469 {
96f026fc 470 memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
9f62d0e2 471 mips_supply_gregset (&gregset);
96f026fc
KB		 472 }
473 else if (core_reg_size == sizeof (gregset64))
474 {
475 memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
476 mips64_supply_gregset (&gregset64);
2aa830e4
DJ		 477 }
478 else
479 {
8a3fe4f8 480 warning (_("wrong size gregset struct in core file"));
2aa830e4
DJ		 481 }
482 }
483 else if (which == 2)
484 {
96f026fc 485 if (core_reg_size == sizeof (fpregset))
2aa830e4 486 {
96f026fc 487 memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
9f62d0e2 488 mips_supply_fpregset (&fpregset);
96f026fc
KB		 489 }
490 else if (core_reg_size == sizeof (fpregset64))
491 {
295093a4
MS		 492 memcpy ((char *) &fpregset64, core_reg_sect,
493 sizeof (fpregset64));
96f026fc 494 mips64_supply_fpregset (&fpregset64);
2aa830e4
DJ		 495 }
496 else
497 {
8a3fe4f8 498 warning (_("wrong size fpregset struct in core file"));
2aa830e4
DJ		 499 }
500 }
501}
502
503/* Register that we are able to handle ELF file formats using standard
504 procfs "regset" structures. */
505
506static struct core_fns regset_core_fns =
507{
508 bfd_target_elf_flavour, /* core_flavour */
509 default_check_format, /* check_format */
510 default_core_sniffer, /* core_sniffer */
511 fetch_core_registers, /* core_read_registers */
512 NULL /* next */
513};
514
96f026fc 515
295093a4
MS		 516/* Check the code at PC for a dynamic linker lazy resolution stub.
517 Because they aren't in the .plt section, we pattern-match on the
518 code generated by GNU ld. They look like this:
6de918a6
DJ		 519
520 lw t9,0x8010(gp)
521 addu t7,ra
522 jalr t9,ra
523 addiu t8,zero,INDEX
524
295093a4
MS		 525 (with the appropriate doubleword instructions for N64). Also
526 return the dynamic symbol index used in the last instruction. */
6de918a6
DJ		 527
528static int
529mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
530{
531 unsigned char buf[28], *p;
532 ULONGEST insn, insn1;
533 int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
534
535 read_memory (pc - 12, buf, 28);
536
537 if (n64)
538 {
539 /* ld t9,0x8010(gp) */
540 insn1 = 0xdf998010;
541 }
542 else
543 {
544 /* lw t9,0x8010(gp) */
545 insn1 = 0x8f998010;
546 }
547
548 p = buf + 12;
549 while (p >= buf)
550 {
551 insn = extract_unsigned_integer (p, 4);
552 if (insn == insn1)
553 break;
554 p -= 4;
555 }
556 if (p < buf)
557 return 0;
558
559 insn = extract_unsigned_integer (p + 4, 4);
560 if (n64)
561 {
562 /* daddu t7,ra */
563 if (insn != 0x03e0782d)
564 return 0;
565 }
566 else
567 {
568 /* addu t7,ra */
569 if (insn != 0x03e07821)
570 return 0;
571 }
295093a4 572
6de918a6
DJ		 573 insn = extract_unsigned_integer (p + 8, 4);
574 /* jalr t9,ra */
575 if (insn != 0x0320f809)
576 return 0;
577
578 insn = extract_unsigned_integer (p + 12, 4);
579 if (n64)
580 {
581 /* daddiu t8,zero,0 */
582 if ((insn & 0xffff0000) != 0x64180000)
583 return 0;
584 }
585 else
586 {
587 /* addiu t8,zero,0 */
588 if ((insn & 0xffff0000) != 0x24180000)
589 return 0;
590 }
591
592 return (insn & 0xffff);
593}
594
295093a4
MS		 595/* Return non-zero iff PC belongs to the dynamic linker resolution
596 code or to a stub. */
6de918a6
DJ		 597
598int
599mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
600{
295093a4
MS		 601 /* Check whether PC is in the dynamic linker. This also checks
602 whether it is in the .plt section, which MIPS does not use. */
6de918a6
DJ		 603 if (in_solib_dynsym_resolve_code (pc))
604 return 1;
605
295093a4
MS		 606 /* Pattern match for the stub. It would be nice if there were a
607 more efficient way to avoid this check. */
6de918a6
DJ		 608 if (mips_linux_in_dynsym_stub (pc, NULL))
609 return 1;
610
611 return 0;
612}
613
614/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
615 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
616 implementation of this triggers at "fixup" from the same objfile as
c4c5b7ba
AC		 617 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
618 "__dl_runtime_resolve" directly. An unresolved PLT entry will
619 point to _dl_runtime_resolve, which will first call
620 __dl_runtime_resolve, and then pass control to the resolved
621 function. */
6de918a6
DJ		 622
623static CORE_ADDR
624mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
625{
626 struct minimal_symbol *resolver;
627
628 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
629
630 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
295093a4 631 return frame_pc_unwind (get_current_frame ());
6de918a6
DJ		 632
633 return 0;
295093a4 634}
6de918a6 635
5792a79b
DJ		 636/* Signal trampoline support. There are four supported layouts for a
637 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
638 n64 rt_sigframe. We handle them all independently; not the most
639 efficient way, but simplest. First, declare all the unwinders. */
640
641static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
642 struct frame_info *next_frame,
643 struct trad_frame_cache *this_cache,
644 CORE_ADDR func);
645
646static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
647 struct frame_info *next_frame,
648 struct trad_frame_cache *this_cache,
649 CORE_ADDR func);
650
651#define MIPS_NR_LINUX 4000
652#define MIPS_NR_N64_LINUX 5000
653#define MIPS_NR_N32_LINUX 6000
654
655#define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
656#define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
657#define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
658#define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
659
660#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
661#define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
662#define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
663#define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
664#define MIPS_INST_SYSCALL 0x0000000c
665
2cd8546d
AC		 666static const struct tramp_frame mips_linux_o32_sigframe = {
667 SIGTRAMP_FRAME,
5792a79b 668 4,
2cd8546d
AC		 669 {
670 { MIPS_INST_LI_V0_SIGRETURN, -1 },
671 { MIPS_INST_SYSCALL, -1 },
672 { TRAMP_SENTINEL_INSN, -1 }
673 },
5792a79b
DJ		 674 mips_linux_o32_sigframe_init
675};
676
2cd8546d
AC		 677static const struct tramp_frame mips_linux_o32_rt_sigframe = {
678 SIGTRAMP_FRAME,
5792a79b 679 4,
2cd8546d
AC		 680 {
681 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
682 { MIPS_INST_SYSCALL, -1 },
683 { TRAMP_SENTINEL_INSN, -1 } },
5792a79b
DJ		 684 mips_linux_o32_sigframe_init
685};
686
2cd8546d
AC		 687static const struct tramp_frame mips_linux_n32_rt_sigframe = {
688 SIGTRAMP_FRAME,
5792a79b 689 4,
2cd8546d
AC		 690 {
691 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
692 { MIPS_INST_SYSCALL, -1 },
693 { TRAMP_SENTINEL_INSN, -1 }
694 },
5792a79b
DJ		 695 mips_linux_n32n64_sigframe_init
696};
697
2cd8546d
AC		 698static const struct tramp_frame mips_linux_n64_rt_sigframe = {
699 SIGTRAMP_FRAME,
5792a79b 700 4,
fcbd8a5c
TS		 701 {
702 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
703 { MIPS_INST_SYSCALL, -1 },
704 { TRAMP_SENTINEL_INSN, -1 }
705 },
5792a79b
DJ		 706 mips_linux_n32n64_sigframe_init
707};
708
709/* *INDENT-OFF* */
710/* The unwinder for o32 signal frames. The legacy structures look
711 like this:
712
713 struct sigframe {
714 u32 sf_ass[4]; [argument save space for o32]
715 u32 sf_code[2]; [signal trampoline]
716 struct sigcontext sf_sc;
717 sigset_t sf_mask;
718 };
719
720 struct sigcontext {
721 unsigned int sc_regmask; [Unused]
722 unsigned int sc_status;
723 unsigned long long sc_pc;
724 unsigned long long sc_regs[32];
725 unsigned long long sc_fpregs[32];
726 unsigned int sc_ownedfp;
727 unsigned int sc_fpc_csr;
728 unsigned int sc_fpc_eir; [Unused]
729 unsigned int sc_used_math;
730 unsigned int sc_ssflags; [Unused]
731 [Alignment hole of four bytes]
732 unsigned long long sc_mdhi;
733 unsigned long long sc_mdlo;
734
735 unsigned int sc_cause; [Unused]
736 unsigned int sc_badvaddr; [Unused]
737
738 unsigned long sc_sigset[4]; [kernel's sigset_t]
739 };
740
741 The RT signal frames look like this:
742
743 struct rt_sigframe {
744 u32 rs_ass[4]; [argument save space for o32]
745 u32 rs_code[2] [signal trampoline]
746 struct siginfo rs_info;
747 struct ucontext rs_uc;
748 };
749
750 struct ucontext {
751 unsigned long uc_flags;
752 struct ucontext *uc_link;
753 stack_t uc_stack;
754 [Alignment hole of four bytes]
755 struct sigcontext uc_mcontext;
756 sigset_t uc_sigmask;
757 }; */
758/* *INDENT-ON* */
759
760#define SIGFRAME_CODE_OFFSET (4 * 4)
761#define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
762
763#define RTSIGFRAME_SIGINFO_SIZE 128
764#define STACK_T_SIZE (3 * 4)
765#define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
766#define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
767 + RTSIGFRAME_SIGINFO_SIZE \
768 + UCONTEXT_SIGCONTEXT_OFFSET)
769
770#define SIGCONTEXT_PC (1 * 8)
771#define SIGCONTEXT_REGS (2 * 8)
772#define SIGCONTEXT_FPREGS (34 * 8)
773#define SIGCONTEXT_FPCSR (66 * 8 + 4)
774#define SIGCONTEXT_HI (69 * 8)
775#define SIGCONTEXT_LO (70 * 8)
776#define SIGCONTEXT_CAUSE (71 * 8 + 0)
777#define SIGCONTEXT_BADVADDR (71 * 8 + 4)
778
779#define SIGCONTEXT_REG_SIZE 8
780
781static void
782mips_linux_o32_sigframe_init (const struct tramp_frame *self,
783 struct frame_info *next_frame,
784 struct trad_frame_cache *this_cache,
785 CORE_ADDR func)
786{
787 int ireg, reg_position;
788 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
789 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
37c4d197 790 CORE_ADDR regs_base;
5792a79b
DJ		 791
792 if (self == &mips_linux_o32_sigframe)
793 sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
794 else
795 sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
295093a4
MS		 796
797 /* I'm not proud of this hack. Eventually we will have the
798 infrastructure to indicate the size of saved registers on a
799 per-frame basis, but right now we don't; the kernel saves eight
37c4d197
DJ		 800 bytes but we only want four. Use regs_base to access any
801 64-bit fields. */
5792a79b 802 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
37c4d197
DJ		 803 regs_base = sigcontext_base + 4;
804 else
805 regs_base = sigcontext_base;
5792a79b
DJ		 806
807#if 0
808 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
37c4d197 809 regs_base + SIGCONTEXT_REGS);
5792a79b
DJ		 810#endif
811
812 for (ireg = 1; ireg < 32; ireg++)
295093a4
MS		 813 trad_frame_set_reg_addr (this_cache,
814 ireg + MIPS_ZERO_REGNUM + NUM_REGS,
37c4d197 815 regs_base + SIGCONTEXT_REGS
5792a79b
DJ		 816 + ireg * SIGCONTEXT_REG_SIZE);
817
37c4d197
DJ		 818 /* The way that floating point registers are saved, unfortunately,
819 depends on the architecture the kernel is built for. For the r3000 and
820 tx39, four bytes of each register are at the beginning of each of the
821 32 eight byte slots. For everything else, the registers are saved
822 using double precision; only the even-numbered slots are initialized,
823 and the high bits are the odd-numbered register. Assume the latter
824 layout, since we can't tell, and it's much more common. Which bits are
825 the "high" bits depends on endianness. */
5792a79b 826 for (ireg = 0; ireg < 32; ireg++)
37c4d197
DJ		 827 if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
828 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
829 sigcontext_base + SIGCONTEXT_FPREGS + 4
830 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
831 else
832 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
833 sigcontext_base + SIGCONTEXT_FPREGS
834 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
5792a79b
DJ		 835
836 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
37c4d197 837 regs_base + SIGCONTEXT_PC);
5792a79b 838
295093a4
MS		 839 trad_frame_set_reg_addr (this_cache,
840 regs->fp_control_status + NUM_REGS,
5792a79b
DJ		 841 sigcontext_base + SIGCONTEXT_FPCSR);
842 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
37c4d197 843 regs_base + SIGCONTEXT_HI);
5792a79b 844 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
37c4d197 845 regs_base + SIGCONTEXT_LO);
5792a79b
DJ		 846 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
847 sigcontext_base + SIGCONTEXT_CAUSE);
848 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
849 sigcontext_base + SIGCONTEXT_BADVADDR);
850
851 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
852 trad_frame_set_id (this_cache,
295093a4
MS		 853 frame_id_build (func - SIGFRAME_CODE_OFFSET,
854 func));
5792a79b
DJ		 855}
856
857/* *INDENT-OFF* */
858/* For N32/N64 things look different. There is no non-rt signal frame.
859
860 struct rt_sigframe_n32 {
861 u32 rs_ass[4]; [ argument save space for o32 ]
862 u32 rs_code[2]; [ signal trampoline ]
863 struct siginfo rs_info;
864 struct ucontextn32 rs_uc;
865 };
866
867 struct ucontextn32 {
868 u32 uc_flags;
869 s32 uc_link;
870 stack32_t uc_stack;
871 struct sigcontext uc_mcontext;
872 sigset_t uc_sigmask; [ mask last for extensibility ]
873 };
295093a4 874
5792a79b
DJ		 875 struct rt_sigframe_n32 {
876 u32 rs_ass[4]; [ argument save space for o32 ]
877 u32 rs_code[2]; [ signal trampoline ]
878 struct siginfo rs_info;
879 struct ucontext rs_uc;
880 };
881
882 struct ucontext {
883 unsigned long uc_flags;
884 struct ucontext *uc_link;
885 stack_t uc_stack;
886 struct sigcontext uc_mcontext;
887 sigset_t uc_sigmask; [ mask last for extensibility ]
888 };
889
890 And the sigcontext is different (this is for both n32 and n64):
891
892 struct sigcontext {
893 unsigned long long sc_regs[32];
894 unsigned long long sc_fpregs[32];
895 unsigned long long sc_mdhi;
896 unsigned long long sc_mdlo;
897 unsigned long long sc_pc;
898 unsigned int sc_status;
899 unsigned int sc_fpc_csr;
900 unsigned int sc_fpc_eir;
901 unsigned int sc_used_math;
902 unsigned int sc_cause;
903 unsigned int sc_badvaddr;
904 }; */
905/* *INDENT-ON* */
906
907#define N32_STACK_T_SIZE STACK_T_SIZE
908#define N64_STACK_T_SIZE (2 * 8 + 4)
909#define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
910#define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
911#define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
912 + RTSIGFRAME_SIGINFO_SIZE \
913 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
914#define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
915 + RTSIGFRAME_SIGINFO_SIZE \
916 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
917
918#define N64_SIGCONTEXT_REGS (0 * 8)
919#define N64_SIGCONTEXT_FPREGS (32 * 8)
920#define N64_SIGCONTEXT_HI (64 * 8)
921#define N64_SIGCONTEXT_LO (65 * 8)
922#define N64_SIGCONTEXT_PC (66 * 8)
923#define N64_SIGCONTEXT_FPCSR (67 * 8 + 1 * 4)
924#define N64_SIGCONTEXT_FIR (67 * 8 + 2 * 4)
925#define N64_SIGCONTEXT_CAUSE (67 * 8 + 4 * 4)
926#define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
927
928#define N64_SIGCONTEXT_REG_SIZE 8
295093a4 929
5792a79b
DJ		 930static void
931mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
932 struct frame_info *next_frame,
933 struct trad_frame_cache *this_cache,
934 CORE_ADDR func)
935{
936 int ireg, reg_position;
937 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
938 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
939
940 if (self == &mips_linux_n32_rt_sigframe)
941 sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
942 else
943 sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
295093a4 944
5792a79b
DJ		 945#if 0
946 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
947 sigcontext_base + N64_SIGCONTEXT_REGS);
948#endif
949
950 for (ireg = 1; ireg < 32; ireg++)
295093a4
MS		 951 trad_frame_set_reg_addr (this_cache,
952 ireg + MIPS_ZERO_REGNUM + NUM_REGS,
5792a79b
DJ		 953 sigcontext_base + N64_SIGCONTEXT_REGS
954 + ireg * N64_SIGCONTEXT_REG_SIZE);
955
956 for (ireg = 0; ireg < 32; ireg++)
957 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
958 sigcontext_base + N64_SIGCONTEXT_FPREGS
959 + ireg * N64_SIGCONTEXT_REG_SIZE);
960
961 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
962 sigcontext_base + N64_SIGCONTEXT_PC);
963
295093a4
MS		 964 trad_frame_set_reg_addr (this_cache,
965 regs->fp_control_status + NUM_REGS,
5792a79b
DJ		 966 sigcontext_base + N64_SIGCONTEXT_FPCSR);
967 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
968 sigcontext_base + N64_SIGCONTEXT_HI);
969 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
970 sigcontext_base + N64_SIGCONTEXT_LO);
971 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
972 sigcontext_base + N64_SIGCONTEXT_CAUSE);
973 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
974 sigcontext_base + N64_SIGCONTEXT_BADVADDR);
975
976 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
977 trad_frame_set_id (this_cache,
295093a4
MS		 978 frame_id_build (func - SIGFRAME_CODE_OFFSET,
979 func));
5792a79b
DJ		 980}
981
9f62d0e2 982
5792a79b
DJ		 983/* Initialize one of the GNU/Linux OS ABIs. */
984
19ed69dd 985static void
295093a4
MS		 986mips_linux_init_abi (struct gdbarch_info info,
987 struct gdbarch *gdbarch)
19ed69dd 988{
96f026fc
KB		 989 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
990 enum mips_abi abi = mips_abi (gdbarch);
991
992 switch (abi)
993 {
994 case MIPS_ABI_O32:
995 set_gdbarch_get_longjmp_target (gdbarch,
996 mips_linux_get_longjmp_target);
997 set_solib_svr4_fetch_link_map_offsets
76a9d10f 998 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
fb2be677
AC		 999 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1000 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
96f026fc
KB		 1001 break;
1002 case MIPS_ABI_N32:
1003 set_gdbarch_get_longjmp_target (gdbarch,
1004 mips_linux_get_longjmp_target);
1005 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1006 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
d05f6826
DJ		 1007 set_gdbarch_long_double_bit (gdbarch, 128);
1008 /* These floatformats should probably be renamed. MIPS uses
1009 the same 128-bit IEEE floating point format that IA-64 uses,
1010 except that the quiet/signalling NaN bit is reversed (GDB
1011 does not distinguish between quiet and signalling NaNs). */
8da61cc4 1012 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
fb2be677 1013 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
96f026fc
KB		 1014 break;
1015 case MIPS_ABI_N64:
1016 set_gdbarch_get_longjmp_target (gdbarch,
1017 mips64_linux_get_longjmp_target);
1018 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1019 (gdbarch, svr4_lp64_fetch_link_map_offsets);
d05f6826
DJ		 1020 set_gdbarch_long_double_bit (gdbarch, 128);
1021 /* These floatformats should probably be renamed. MIPS uses
1022 the same 128-bit IEEE floating point format that IA-64 uses,
1023 except that the quiet/signalling NaN bit is reversed (GDB
1024 does not distinguish between quiet and signalling NaNs). */
8da61cc4 1025 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
fb2be677 1026 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
96f026fc
KB		 1027 break;
1028 default:
e2e0b3e5 1029 internal_error (__FILE__, __LINE__, _("can't handle ABI"));
96f026fc
KB		 1030 break;
1031 }
6de918a6 1032
982e9687 1033 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
6de918a6
DJ		 1034 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1035
0d0266c6 1036 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
b2756930
KB		 1037
1038 /* Enable TLS support. */
1039 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1040 svr4_fetch_objfile_link_map);
19ed69dd
KB		 1041}
1042
2aa830e4 1043void
d1bacddc 1044_initialize_mips_linux_tdep (void)
2aa830e4 1045{
96f026fc
KB		 1046 const struct bfd_arch_info *arch_info;
1047
96f026fc
KB		 1048 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1049 arch_info != NULL;
1050 arch_info = arch_info->next)
1051 {
295093a4
MS		 1052 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1053 GDB_OSABI_LINUX,
96f026fc
KB		 1054 mips_linux_init_abi);
1055 }
1056
00e32a35 1057 deprecated_add_core_fns (&regset_core_fns);
2aa830e4 1058}
GDB Binutils - Deliverables
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