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Check R_386_GOT32/R_386_GOT32X without base register
[deliverable/binutils-gdb.git] / gdb / mips-linux-tdep.c
CommitLineData
75c9abc6 1/* Target-dependent code for GNU/Linux on MIPS processors.
a094c6fb 2
32d0add0 3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
2aa830e4
DJ		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
2aa830e4
DJ		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
2aa830e4
DJ		 19
20#include "defs.h"
21#include "gdbcore.h"
22#include "target.h"
23#include "solib-svr4.h"
19ed69dd 24#include "osabi.h"
96f026fc 25#include "mips-tdep.h"
6de918a6 26#include "frame.h"
2fdf551c 27#include "regcache.h"
5792a79b
DJ		 28#include "trad-frame.h"
29#include "tramp-frame.h"
e6bb342a 30#include "gdbtypes.h"
3e5d3a5a 31#include "objfiles.h"
5ea03926 32#include "solib.h"
7d522c90 33#include "solist.h"
982e9687 34#include "symtab.h"
822b6570 35#include "target-descriptions.h"
50e8a0d5 36#include "regset.h"
d37eb719 37#include "mips-linux-tdep.h"
db5f024e 38#include "glibc-tdep.h"
a5ee0f0c 39#include "linux-tdep.h"
385203ed 40#include "xml-syscall.h"
232b8704 41#include "gdb_signals.h"
2aa830e4 42
7d522c90
DJ		 43static struct target_so_ops mips_svr4_so_ops;
44
eb14d406
SDJ		 45/* This enum represents the signals' numbers on the MIPS
46 architecture. It just contains the signal definitions which are
47 different from the generic implementation.
48
49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
50 from the Linux kernel tree. */
51
52enum
53 {
54 MIPS_LINUX_SIGEMT = 7,
55 MIPS_LINUX_SIGBUS = 10,
56 MIPS_LINUX_SIGSYS = 12,
57 MIPS_LINUX_SIGUSR1 = 16,
58 MIPS_LINUX_SIGUSR2 = 17,
59 MIPS_LINUX_SIGCHLD = 18,
60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
61 MIPS_LINUX_SIGPWR = 19,
62 MIPS_LINUX_SIGWINCH = 20,
63 MIPS_LINUX_SIGURG = 21,
64 MIPS_LINUX_SIGIO = 22,
65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
66 MIPS_LINUX_SIGSTOP = 23,
67 MIPS_LINUX_SIGTSTP = 24,
68 MIPS_LINUX_SIGCONT = 25,
69 MIPS_LINUX_SIGTTIN = 26,
70 MIPS_LINUX_SIGTTOU = 27,
71 MIPS_LINUX_SIGVTALRM = 28,
72 MIPS_LINUX_SIGPROF = 29,
73 MIPS_LINUX_SIGXCPU = 30,
74 MIPS_LINUX_SIGXFSZ = 31,
75
76 MIPS_LINUX_SIGRTMIN = 32,
77 MIPS_LINUX_SIGRT64 = 64,
78 MIPS_LINUX_SIGRTMAX = 127,
79 };
80
2aa830e4 81/* Figure out where the longjmp will land.
295093a4
MS		 82 We expect the first arg to be a pointer to the jmp_buf structure
83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
84 at. The pc is copied into PC. This routine returns 1 on
85 success. */
2aa830e4 86
19ed69dd
KB		 87#define MIPS_LINUX_JB_ELEMENT_SIZE 4
88#define MIPS_LINUX_JB_PC 0
89
90static int
60ade65d 91mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
2aa830e4
DJ		 92{
93 CORE_ADDR jb_addr;
2eb4d78b 94 struct gdbarch *gdbarch = get_frame_arch (frame);
e17a4113 95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
2aa830e4 97
60ade65d 98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
2aa830e4 99
7d266584
MR		 100 if (target_read_memory ((jb_addr
101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
2eb4d78b 102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
2aa830e4
DJ		 103 return 0;
104
819844ad 105 *pc = extract_unsigned_integer (buf,
e17a4113
UW		 106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
107 byte_order);
2aa830e4
DJ		 108
109 return 1;
110}
111
4246e332 112/* Transform the bits comprising a 32-bit register to the right size
23a6d369
AC		 113 for regcache_raw_supply(). This is needed when mips_isa_regsize()
114 is 8. */
96f026fc
KB		 115
116static void
28f5035f 117supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
96f026fc 118{
e17a4113
UW		 119 struct gdbarch *gdbarch = get_regcache_arch (regcache);
120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d37eb719 121 gdb_byte buf[MAX_REGISTER_SIZE];
e17a4113 122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
709476c3
SM		 123 extract_signed_integer ((const gdb_byte *) addr, 4,
124 byte_order));
28f5035f 125 regcache_raw_supply (regcache, regnum, buf);
96f026fc
KB		 126}
127
2aa830e4
DJ		 128/* Unpack an elf_gregset_t into GDB's register cache. */
129
d37eb719 130void
28f5035f
UW		 131mips_supply_gregset (struct regcache *regcache,
132 const mips_elf_gregset_t *gregsetp)
2aa830e4
DJ		 133{
134 int regi;
28f5035f 135 const mips_elf_greg_t *regp = *gregsetp;
d9d9c31f 136 char zerobuf[MAX_REGISTER_SIZE];
2eb4d78b 137 struct gdbarch *gdbarch = get_regcache_arch (regcache);
bf072999 138
d9d9c31f 139 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4 140
822b6570 141 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
28f5035f 142 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
2aa830e4 143
2eb4d78b 144 if (mips_linux_restart_reg_p (gdbarch))
822b6570
DJ		 145 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
146
2eb4d78b
UW		 147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
148 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
56cea623 149
2eb4d78b 150 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
28f5035f 151 regp + EF_CP0_EPC);
2eb4d78b 152 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
28f5035f
UW		 153 regp + EF_CP0_BADVADDR);
154 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
2eb4d78b 155 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
28f5035f 156 regp + EF_CP0_CAUSE);
2aa830e4 157
1faeff08 158 /* Fill the inaccessible zero register with zero. */
822b6570 159 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
2aa830e4
DJ		 160}
161
50e8a0d5
HZ		 162static void
163mips_supply_gregset_wrapper (const struct regset *regset,
7d266584
MR		 164 struct regcache *regcache,
165 int regnum, const void *gregs, size_t len)
50e8a0d5 166{
1528345d 167 gdb_assert (len >= sizeof (mips_elf_gregset_t));
50e8a0d5
HZ		 168
169 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
170}
171
2aa830e4
DJ		 172/* Pack our registers (or one register) into an elf_gregset_t. */
173
d37eb719 174void
28f5035f
UW		 175mips_fill_gregset (const struct regcache *regcache,
176 mips_elf_gregset_t *gregsetp, int regno)
2aa830e4 177{
2eb4d78b 178 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2aa830e4 179 int regaddr, regi;
d37eb719 180 mips_elf_greg_t *regp = *gregsetp;
96f026fc 181 void *dst;
2aa830e4
DJ		 182
183 if (regno == -1)
184 {
d37eb719 185 memset (regp, 0, sizeof (mips_elf_gregset_t));
822b6570 186 for (regi = 1; regi < 32; regi++)
28f5035f 187 mips_fill_gregset (regcache, gregsetp, regi);
2eb4d78b
UW		 188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
191 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
28f5035f 192 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
2eb4d78b 193 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
822b6570 194 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
2aa830e4
DJ		 195 return;
196 }
197
822b6570 198 if (regno > 0 && regno < 32)
2aa830e4 199 {
2aa830e4 200 dst = regp + regno + EF_REG0;
28f5035f 201 regcache_raw_collect (regcache, regno, dst);
2aa830e4
DJ		 202 return;
203 }
204
2eb4d78b
UW		 205 if (regno == mips_regnum (gdbarch)->lo)
206 regaddr = EF_LO;
207 else if (regno == mips_regnum (gdbarch)->hi)
56cea623 208 regaddr = EF_HI;
2eb4d78b 209 else if (regno == mips_regnum (gdbarch)->pc)
56cea623 210 regaddr = EF_CP0_EPC;
2eb4d78b 211 else if (regno == mips_regnum (gdbarch)->badvaddr)
56cea623 212 regaddr = EF_CP0_BADVADDR;
24e05951 213 else if (regno == MIPS_PS_REGNUM)
56cea623 214 regaddr = EF_CP0_STATUS;
2eb4d78b 215 else if (regno == mips_regnum (gdbarch)->cause)
56cea623 216 regaddr = EF_CP0_CAUSE;
2eb4d78b 217 else if (mips_linux_restart_reg_p (gdbarch)
822b6570
DJ		 218 && regno == MIPS_RESTART_REGNUM)
219 regaddr = EF_REG0;
56cea623
AC		 220 else
221 regaddr = -1;
2aa830e4
DJ		 222
223 if (regaddr != -1)
224 {
2aa830e4 225 dst = regp + regaddr;
28f5035f 226 regcache_raw_collect (regcache, regno, dst);
2aa830e4
DJ		 227 }
228}
229
50e8a0d5
HZ		 230static void
231mips_fill_gregset_wrapper (const struct regset *regset,
232 const struct regcache *regcache,
233 int regnum, void *gregs, size_t len)
234{
1528345d 235 gdb_assert (len >= sizeof (mips_elf_gregset_t));
50e8a0d5
HZ		 236
237 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
238}
239
2aa830e4
DJ		 240/* Likewise, unpack an elf_fpregset_t. */
241
d37eb719 242void
28f5035f
UW		 243mips_supply_fpregset (struct regcache *regcache,
244 const mips_elf_fpregset_t *fpregsetp)
2aa830e4 245{
2eb4d78b 246 struct gdbarch *gdbarch = get_regcache_arch (regcache);
52f0bd74 247 int regi;
d9d9c31f 248 char zerobuf[MAX_REGISTER_SIZE];
bf072999 249
d9d9c31f 250 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4
DJ		 251
252 for (regi = 0; regi < 32; regi++)
3e8c568d 253 regcache_raw_supply (regcache,
2eb4d78b 254 gdbarch_fp0_regnum (gdbarch) + regi,
3e8c568d 255 *fpregsetp + regi);
2aa830e4 256
28f5035f 257 regcache_raw_supply (regcache,
2eb4d78b 258 mips_regnum (gdbarch)->fp_control_status,
28f5035f 259 *fpregsetp + 32);
2aa830e4 260
295093a4 261 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
28f5035f 262 regcache_raw_supply (regcache,
2eb4d78b 263 mips_regnum (gdbarch)->fp_implementation_revision,
23a6d369 264 zerobuf);
2aa830e4
DJ		 265}
266
50e8a0d5
HZ		 267static void
268mips_supply_fpregset_wrapper (const struct regset *regset,
7d266584
MR		 269 struct regcache *regcache,
270 int regnum, const void *gregs, size_t len)
50e8a0d5 271{
1528345d 272 gdb_assert (len >= sizeof (mips_elf_fpregset_t));
50e8a0d5
HZ		 273
274 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
275}
276
2aa830e4
DJ		 277/* Likewise, pack one or all floating point registers into an
278 elf_fpregset_t. */
279
d37eb719 280void
28f5035f
UW		 281mips_fill_fpregset (const struct regcache *regcache,
282 mips_elf_fpregset_t *fpregsetp, int regno)
2aa830e4 283{
2eb4d78b 284 struct gdbarch *gdbarch = get_regcache_arch (regcache);
22e048c9 285 char *to;
2aa830e4 286
2eb4d78b
UW		 287 if ((regno >= gdbarch_fp0_regnum (gdbarch))
288 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
2aa830e4 289 {
2eb4d78b 290 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
28f5035f 291 regcache_raw_collect (regcache, regno, to);
2aa830e4 292 }
2eb4d78b 293 else if (regno == mips_regnum (gdbarch)->fp_control_status)
2aa830e4 294 {
2aa830e4 295 to = (char *) (*fpregsetp + 32);
28f5035f 296 regcache_raw_collect (regcache, regno, to);
2aa830e4
DJ		 297 }
298 else if (regno == -1)
299 {
300 int regi;
301
302 for (regi = 0; regi < 32; regi++)
3e8c568d 303 mips_fill_fpregset (regcache, fpregsetp,
2eb4d78b 304 gdbarch_fp0_regnum (gdbarch) + regi);
28f5035f 305 mips_fill_fpregset (regcache, fpregsetp,
2eb4d78b 306 mips_regnum (gdbarch)->fp_control_status);
2aa830e4
DJ		 307 }
308}
309
50e8a0d5
HZ		 310static void
311mips_fill_fpregset_wrapper (const struct regset *regset,
312 const struct regcache *regcache,
313 int regnum, void *gregs, size_t len)
314{
1528345d 315 gdb_assert (len >= sizeof (mips_elf_fpregset_t));
50e8a0d5
HZ		 316
317 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
318}
319
96f026fc
KB		 320/* Support for 64-bit ABIs. */
321
96f026fc 322/* Figure out where the longjmp will land.
295093a4
MS		 323 We expect the first arg to be a pointer to the jmp_buf structure
324 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
325 at. The pc is copied into PC. This routine returns 1 on
326 success. */
96f026fc
KB		 327
328/* Details about jmp_buf. */
329
330#define MIPS64_LINUX_JB_PC 0
331
332static int
60ade65d 333mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
96f026fc
KB		 334{
335 CORE_ADDR jb_addr;
2eb4d78b 336 struct gdbarch *gdbarch = get_frame_arch (frame);
e17a4113 337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
709476c3
SM		 338 gdb_byte *buf
339 = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
2eb4d78b 340 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
96f026fc 341
60ade65d 342 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
96f026fc
KB		 343
344 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
819844ad 345 buf,
2eb4d78b 346 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
96f026fc
KB		 347 return 0;
348
819844ad 349 *pc = extract_unsigned_integer (buf,
e17a4113
UW		 350 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
351 byte_order);
96f026fc
KB		 352
353 return 1;
354}
355
d37eb719
DJ		 356/* Register set support functions. These operate on standard 64-bit
357 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
358 target will still use the 64-bit format for PTRACE_GETREGS. */
359
360/* Supply a 64-bit register. */
96f026fc 361
63807e1d 362static void
28f5035f
UW		 363supply_64bit_reg (struct regcache *regcache, int regnum,
364 const gdb_byte *buf)
d37eb719 365{
2eb4d78b
UW		 366 struct gdbarch *gdbarch = get_regcache_arch (regcache);
367 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
368 && register_size (gdbarch, regnum) == 4)
28f5035f 369 regcache_raw_supply (regcache, regnum, buf + 4);
d37eb719 370 else
28f5035f 371 regcache_raw_supply (regcache, regnum, buf);
d37eb719
DJ		 372}
373
374/* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
375
376void
28f5035f
UW		 377mips64_supply_gregset (struct regcache *regcache,
378 const mips64_elf_gregset_t *gregsetp)
96f026fc
KB		 379{
380 int regi;
28f5035f 381 const mips64_elf_greg_t *regp = *gregsetp;
d37eb719 382 gdb_byte zerobuf[MAX_REGISTER_SIZE];
2eb4d78b 383 struct gdbarch *gdbarch = get_regcache_arch (regcache);
96f026fc 384
d9d9c31f 385 memset (zerobuf, 0, MAX_REGISTER_SIZE);
96f026fc 386
822b6570 387 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
28f5035f 388 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
7d266584 389 (const gdb_byte *) (regp + regi));
28f5035f 390
2eb4d78b 391 if (mips_linux_restart_reg_p (gdbarch))
822b6570 392 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
7d266584 393 (const gdb_byte *) (regp + MIPS64_EF_REG0));
822b6570 394
2eb4d78b 395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
28f5035f 396 (const gdb_byte *) (regp + MIPS64_EF_LO));
2eb4d78b 397 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
28f5035f
UW		 398 (const gdb_byte *) (regp + MIPS64_EF_HI));
399
2eb4d78b 400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
28f5035f 401 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
2eb4d78b 402 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
28f5035f
UW		 403 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
404 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
405 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
2eb4d78b 406 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
28f5035f 407 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
96f026fc 408
1faeff08 409 /* Fill the inaccessible zero register with zero. */
822b6570 410 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
96f026fc
KB		 411}
412
50e8a0d5
HZ		 413static void
414mips64_supply_gregset_wrapper (const struct regset *regset,
7d266584
MR		 415 struct regcache *regcache,
416 int regnum, const void *gregs, size_t len)
50e8a0d5 417{
1528345d 418 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
50e8a0d5
HZ		 419
420 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
421}
422
d37eb719 423/* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
96f026fc 424
d37eb719 425void
28f5035f
UW		 426mips64_fill_gregset (const struct regcache *regcache,
427 mips64_elf_gregset_t *gregsetp, int regno)
96f026fc 428{
2eb4d78b 429 struct gdbarch *gdbarch = get_regcache_arch (regcache);
e17a4113 430 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
96f026fc
KB		 431 int regaddr, regi;
432 mips64_elf_greg_t *regp = *gregsetp;
2ba93934 433 void *dst;
96f026fc
KB		 434
435 if (regno == -1)
436 {
437 memset (regp, 0, sizeof (mips64_elf_gregset_t));
822b6570 438 for (regi = 1; regi < 32; regi++)
7d266584 439 mips64_fill_gregset (regcache, gregsetp, regi);
2eb4d78b
UW		 440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
441 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
442 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
025bb325
MS		 443 mips64_fill_gregset (regcache, gregsetp,
444 mips_regnum (gdbarch)->badvaddr);
28f5035f 445 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
2eb4d78b 446 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
822b6570 447 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
96f026fc
KB		 448 return;
449 }
450
822b6570 451 if (regno > 0 && regno < 32)
d37eb719 452 regaddr = regno + MIPS64_EF_REG0;
2eb4d78b 453 else if (regno == mips_regnum (gdbarch)->lo)
56cea623 454 regaddr = MIPS64_EF_LO;
2eb4d78b 455 else if (regno == mips_regnum (gdbarch)->hi)
56cea623 456 regaddr = MIPS64_EF_HI;
2eb4d78b 457 else if (regno == mips_regnum (gdbarch)->pc)
56cea623 458 regaddr = MIPS64_EF_CP0_EPC;
2eb4d78b 459 else if (regno == mips_regnum (gdbarch)->badvaddr)
56cea623 460 regaddr = MIPS64_EF_CP0_BADVADDR;
24e05951 461 else if (regno == MIPS_PS_REGNUM)
56cea623 462 regaddr = MIPS64_EF_CP0_STATUS;
2eb4d78b 463 else if (regno == mips_regnum (gdbarch)->cause)
56cea623 464 regaddr = MIPS64_EF_CP0_CAUSE;
2eb4d78b 465 else if (mips_linux_restart_reg_p (gdbarch)
822b6570
DJ		 466 && regno == MIPS_RESTART_REGNUM)
467 regaddr = MIPS64_EF_REG0;
56cea623
AC		 468 else
469 regaddr = -1;
96f026fc
KB		 470
471 if (regaddr != -1)
472 {
d37eb719
DJ		 473 gdb_byte buf[MAX_REGISTER_SIZE];
474 LONGEST val;
475
28f5035f 476 regcache_raw_collect (regcache, regno, buf);
e17a4113
UW		 477 val = extract_signed_integer (buf, register_size (gdbarch, regno),
478 byte_order);
96f026fc 479 dst = regp + regaddr;
709476c3 480 store_signed_integer ((gdb_byte *) dst, 8, byte_order, val);
96f026fc
KB		 481 }
482}
483
50e8a0d5
HZ		 484static void
485mips64_fill_gregset_wrapper (const struct regset *regset,
486 const struct regcache *regcache,
487 int regnum, void *gregs, size_t len)
488{
1528345d 489 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
50e8a0d5
HZ		 490
491 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
492}
493
96f026fc
KB		 494/* Likewise, unpack an elf_fpregset_t. */
495
d37eb719 496void
28f5035f
UW		 497mips64_supply_fpregset (struct regcache *regcache,
498 const mips64_elf_fpregset_t *fpregsetp)
96f026fc 499{
2eb4d78b 500 struct gdbarch *gdbarch = get_regcache_arch (regcache);
52f0bd74 501 int regi;
96f026fc 502
d37eb719
DJ		 503 /* See mips_linux_o32_sigframe_init for a description of the
504 peculiar FP register layout. */
2eb4d78b 505 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
d37eb719
DJ		 506 for (regi = 0; regi < 32; regi++)
507 {
7d266584
MR		 508 const gdb_byte *reg_ptr
509 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
2eb4d78b 510 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
d37eb719 511 reg_ptr += 4;
3e8c568d 512 regcache_raw_supply (regcache,
2eb4d78b 513 gdbarch_fp0_regnum (gdbarch) + regi,
3e8c568d 514 reg_ptr);
d37eb719
DJ		 515 }
516 else
517 for (regi = 0; regi < 32; regi++)
3e8c568d 518 regcache_raw_supply (regcache,
2eb4d78b 519 gdbarch_fp0_regnum (gdbarch) + regi,
7d266584 520 (const char *) (*fpregsetp + regi));
d37eb719 521
2eb4d78b 522 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
7d266584 523 (const gdb_byte *) (*fpregsetp + 32));
d37eb719
DJ		 524
525 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
526 include it - but the result of PTRACE_GETFPREGS does. The best we
527 can do is to assume that its value is present. */
28f5035f 528 supply_32bit_reg (regcache,
2eb4d78b 529 mips_regnum (gdbarch)->fp_implementation_revision,
7d266584 530 (const gdb_byte *) (*fpregsetp + 32) + 4);
96f026fc
KB		 531}
532
50e8a0d5
HZ		 533static void
534mips64_supply_fpregset_wrapper (const struct regset *regset,
7d266584
MR		 535 struct regcache *regcache,
536 int regnum, const void *gregs, size_t len)
50e8a0d5 537{
1528345d 538 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
50e8a0d5
HZ		 539
540 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
541}
542
96f026fc
KB		 543/* Likewise, pack one or all floating point registers into an
544 elf_fpregset_t. */
545
d37eb719 546void
28f5035f
UW		 547mips64_fill_fpregset (const struct regcache *regcache,
548 mips64_elf_fpregset_t *fpregsetp, int regno)
96f026fc 549{
2eb4d78b 550 struct gdbarch *gdbarch = get_regcache_arch (regcache);
e17a4113 551 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d37eb719 552 gdb_byte *to;
96f026fc 553
2eb4d78b
UW		 554 if ((regno >= gdbarch_fp0_regnum (gdbarch))
555 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
96f026fc 556 {
d37eb719
DJ		 557 /* See mips_linux_o32_sigframe_init for a description of the
558 peculiar FP register layout. */
2eb4d78b 559 if (register_size (gdbarch, regno) == 4)
d37eb719 560 {
2eb4d78b 561 int regi = regno - gdbarch_fp0_regnum (gdbarch);
d37eb719
DJ		 562
563 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
2eb4d78b 564 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
d37eb719 565 to += 4;
28f5035f 566 regcache_raw_collect (regcache, regno, to);
d37eb719
DJ		 567 }
568 else
569 {
025bb325
MS		 570 to = (gdb_byte *) (*fpregsetp + regno
571 - gdbarch_fp0_regnum (gdbarch));
28f5035f 572 regcache_raw_collect (regcache, regno, to);
d37eb719 573 }
96f026fc 574 }
2eb4d78b 575 else if (regno == mips_regnum (gdbarch)->fp_control_status)
96f026fc 576 {
d37eb719
DJ		 577 gdb_byte buf[MAX_REGISTER_SIZE];
578 LONGEST val;
579
28f5035f 580 regcache_raw_collect (regcache, regno, buf);
e17a4113
UW		 581 val = extract_signed_integer (buf, register_size (gdbarch, regno),
582 byte_order);
d37eb719 583 to = (gdb_byte *) (*fpregsetp + 32);
e17a4113 584 store_signed_integer (to, 4, byte_order, val);
d37eb719 585 }
2eb4d78b 586 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
d37eb719
DJ		 587 {
588 gdb_byte buf[MAX_REGISTER_SIZE];
589 LONGEST val;
590
28f5035f 591 regcache_raw_collect (regcache, regno, buf);
e17a4113
UW		 592 val = extract_signed_integer (buf, register_size (gdbarch, regno),
593 byte_order);
d37eb719 594 to = (gdb_byte *) (*fpregsetp + 32) + 4;
e17a4113 595 store_signed_integer (to, 4, byte_order, val);
96f026fc
KB		 596 }
597 else if (regno == -1)
598 {
599 int regi;
600
601 for (regi = 0; regi < 32; regi++)
3e8c568d 602 mips64_fill_fpregset (regcache, fpregsetp,
2eb4d78b 603 gdbarch_fp0_regnum (gdbarch) + regi);
28f5035f 604 mips64_fill_fpregset (regcache, fpregsetp,
2eb4d78b 605 mips_regnum (gdbarch)->fp_control_status);
28f5035f 606 mips64_fill_fpregset (regcache, fpregsetp,
7d266584 607 mips_regnum (gdbarch)->fp_implementation_revision);
96f026fc
KB		 608 }
609}
610
50e8a0d5
HZ		 611static void
612mips64_fill_fpregset_wrapper (const struct regset *regset,
613 const struct regcache *regcache,
614 int regnum, void *gregs, size_t len)
615{
1528345d 616 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
96f026fc 617
50e8a0d5
HZ		 618 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
619}
2aa830e4 620
b7195f27
AA		 621static const struct regset mips_linux_gregset =
622 {
623 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
624 };
625
626static const struct regset mips64_linux_gregset =
627 {
628 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
629 };
630
631static const struct regset mips_linux_fpregset =
632 {
633 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper
634 };
635
636static const struct regset mips64_linux_fpregset =
637 {
638 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
639 };
640
d4036235
AA		 641static void
642mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
643 iterate_over_regset_sections_cb *cb,
644 void *cb_data,
645 const struct regcache *regcache)
2aa830e4 646{
d4036235 647 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
2aa830e4 648 {
d4036235
AA		 649 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset,
650 NULL, cb_data);
651 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset,
652 NULL, cb_data);
2aa830e4 653 }
d4036235 654 else
2aa830e4 655 {
d4036235
AA		 656 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset,
657 NULL, cb_data);
658 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
659 NULL, cb_data);
2aa830e4 660 }
50e8a0d5 661}
2aa830e4 662
4eb0ad19
DJ		 663static const struct target_desc *
664mips_linux_core_read_description (struct gdbarch *gdbarch,
665 struct target_ops *target,
666 bfd *abfd)
667{
668 asection *section = bfd_get_section_by_name (abfd, ".reg");
669 if (! section)
670 return NULL;
671
672 switch (bfd_section_size (abfd, section))
673 {
674 case sizeof (mips_elf_gregset_t):
675 return mips_tdesc_gp32;
676
677 case sizeof (mips64_elf_gregset_t):
678 return mips_tdesc_gp64;
679
680 default:
681 return NULL;
682 }
683}
684
96f026fc 685
295093a4 686/* Check the code at PC for a dynamic linker lazy resolution stub.
3e5d3a5a
MR		 687 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
688 section uniformly since version 2.15. If the pc is in that section,
689 then we are in such a stub. Before that ".stub" was used in 32-bit
690 ELF binaries, however we do not bother checking for that since we
691 have never had and that case should be extremely rare these days.
692 Instead we pattern-match on the code generated by GNU ld. They look
693 like this:
6de918a6
DJ		 694
695 lw t9,0x8010(gp)
696 addu t7,ra
697 jalr t9,ra
698 addiu t8,zero,INDEX
699
3e5d3a5a
MR		 700 (with the appropriate doubleword instructions for N64). As any lazy
701 resolution stubs in microMIPS binaries will always be in a
702 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
6de918a6
DJ		 703
704static int
3e5d3a5a 705mips_linux_in_dynsym_stub (CORE_ADDR pc)
6de918a6 706{
e362b510 707 gdb_byte buf[28], *p;
6de918a6 708 ULONGEST insn, insn1;
f5656ead
TT		 709 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
710 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
6de918a6 711
3e5d3a5a
MR		 712 if (in_mips_stubs_section (pc))
713 return 1;
714
6de918a6
DJ		 715 read_memory (pc - 12, buf, 28);
716
717 if (n64)
718 {
719 /* ld t9,0x8010(gp) */
720 insn1 = 0xdf998010;
721 }
722 else
723 {
724 /* lw t9,0x8010(gp) */
725 insn1 = 0x8f998010;
726 }
727
728 p = buf + 12;
729 while (p >= buf)
730 {
e17a4113 731 insn = extract_unsigned_integer (p, 4, byte_order);
6de918a6
DJ		 732 if (insn == insn1)
733 break;
734 p -= 4;
735 }
736 if (p < buf)
737 return 0;
738
e17a4113 739 insn = extract_unsigned_integer (p + 4, 4, byte_order);
6de918a6
DJ		 740 if (n64)
741 {
742 /* daddu t7,ra */
743 if (insn != 0x03e0782d)
744 return 0;
745 }
746 else
747 {
748 /* addu t7,ra */
749 if (insn != 0x03e07821)
750 return 0;
751 }
295093a4 752
e17a4113 753 insn = extract_unsigned_integer (p + 8, 4, byte_order);
6de918a6
DJ		 754 /* jalr t9,ra */
755 if (insn != 0x0320f809)
756 return 0;
757
e17a4113 758 insn = extract_unsigned_integer (p + 12, 4, byte_order);
6de918a6
DJ		 759 if (n64)
760 {
761 /* daddiu t8,zero,0 */
762 if ((insn & 0xffff0000) != 0x64180000)
763 return 0;
764 }
765 else
766 {
767 /* addiu t8,zero,0 */
768 if ((insn & 0xffff0000) != 0x24180000)
769 return 0;
770 }
771
3e5d3a5a 772 return 1;
6de918a6
DJ		 773}
774
295093a4 775/* Return non-zero iff PC belongs to the dynamic linker resolution
db5f024e 776 code, a PLT entry, or a lazy binding stub. */
6de918a6 777
7d522c90 778static int
6de918a6
DJ		 779mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
780{
295093a4 781 /* Check whether PC is in the dynamic linker. This also checks
db5f024e 782 whether it is in the .plt section, used by non-PIC executables. */
7d522c90 783 if (svr4_in_dynsym_resolve_code (pc))
6de918a6
DJ		 784 return 1;
785
3e5d3a5a
MR		 786 /* Likewise for the stubs. They live in the .MIPS.stubs section these
787 days, so we check if the PC is within, than fall back to a pattern
788 match. */
789 if (mips_linux_in_dynsym_stub (pc))
6de918a6
DJ		 790 return 1;
791
792 return 0;
793}
794
795/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
796 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
797 implementation of this triggers at "fixup" from the same objfile as
c4c5b7ba 798 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
db5f024e
DJ		 799 "__dl_runtime_resolve" directly. An unresolved lazy binding
800 stub will point to _dl_runtime_resolve, which will first call
c4c5b7ba
AC		 801 __dl_runtime_resolve, and then pass control to the resolved
802 function. */
6de918a6
DJ		 803
804static CORE_ADDR
805mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
806{
3b7344d5 807 struct bound_minimal_symbol resolver;
6de918a6
DJ		 808
809 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
810
77e371c0 811 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
c7ce8faa 812 return frame_unwind_caller_pc (get_current_frame ());
6de918a6 813
db5f024e 814 return glibc_skip_solib_resolver (gdbarch, pc);
295093a4 815}
6de918a6 816
5792a79b
DJ		 817/* Signal trampoline support. There are four supported layouts for a
818 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
819 n64 rt_sigframe. We handle them all independently; not the most
820 efficient way, but simplest. First, declare all the unwinders. */
821
822static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
b8a22b94 823 struct frame_info *this_frame,
5792a79b
DJ		 824 struct trad_frame_cache *this_cache,
825 CORE_ADDR func);
826
827static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
b8a22b94 828 struct frame_info *this_frame,
5792a79b
DJ		 829 struct trad_frame_cache *this_cache,
830 CORE_ADDR func);
831
858339f2
MR		 832static int mips_linux_sigframe_validate (const struct tramp_frame *self,
833 struct frame_info *this_frame,
834 CORE_ADDR *pc);
835
836static int micromips_linux_sigframe_validate (const struct tramp_frame *self,
837 struct frame_info *this_frame,
838 CORE_ADDR *pc);
839
5792a79b
DJ		 840#define MIPS_NR_LINUX 4000
841#define MIPS_NR_N64_LINUX 5000
842#define MIPS_NR_N32_LINUX 6000
843
844#define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
845#define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
846#define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
847#define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
848
849#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
850#define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
851#define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
852#define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
853#define MIPS_INST_SYSCALL 0x0000000c
854
858339f2
MR		 855#define MICROMIPS_INST_LI_V0 0x3040
856#define MICROMIPS_INST_POOL32A 0x0000
857#define MICROMIPS_INST_SYSCALL 0x8b7c
858
2cd8546d
AC		 859static const struct tramp_frame mips_linux_o32_sigframe = {
860 SIGTRAMP_FRAME,
5792a79b 861 4,
2cd8546d
AC		 862 {
863 { MIPS_INST_LI_V0_SIGRETURN, -1 },
864 { MIPS_INST_SYSCALL, -1 },
865 { TRAMP_SENTINEL_INSN, -1 }
866 },
858339f2
MR		 867 mips_linux_o32_sigframe_init,
868 mips_linux_sigframe_validate
5792a79b
DJ		 869};
870
2cd8546d
AC		 871static const struct tramp_frame mips_linux_o32_rt_sigframe = {
872 SIGTRAMP_FRAME,
5792a79b 873 4,
2cd8546d
AC		 874 {
875 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
876 { MIPS_INST_SYSCALL, -1 },
877 { TRAMP_SENTINEL_INSN, -1 } },
858339f2
MR		 878 mips_linux_o32_sigframe_init,
879 mips_linux_sigframe_validate
5792a79b
DJ		 880};
881
2cd8546d
AC		 882static const struct tramp_frame mips_linux_n32_rt_sigframe = {
883 SIGTRAMP_FRAME,
5792a79b 884 4,
2cd8546d
AC		 885 {
886 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
887 { MIPS_INST_SYSCALL, -1 },
888 { TRAMP_SENTINEL_INSN, -1 }
889 },
858339f2
MR		 890 mips_linux_n32n64_sigframe_init,
891 mips_linux_sigframe_validate
5792a79b
DJ		 892};
893
2cd8546d
AC		 894static const struct tramp_frame mips_linux_n64_rt_sigframe = {
895 SIGTRAMP_FRAME,
5792a79b 896 4,
fcbd8a5c
TS		 897 {
898 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
899 { MIPS_INST_SYSCALL, -1 },
900 { TRAMP_SENTINEL_INSN, -1 }
901 },
858339f2
MR		 902 mips_linux_n32n64_sigframe_init,
903 mips_linux_sigframe_validate
904};
905
906static const struct tramp_frame micromips_linux_o32_sigframe = {
907 SIGTRAMP_FRAME,
908 2,
909 {
910 { MICROMIPS_INST_LI_V0, -1 },
911 { MIPS_NR_sigreturn, -1 },
912 { MICROMIPS_INST_POOL32A, -1 },
913 { MICROMIPS_INST_SYSCALL, -1 },
914 { TRAMP_SENTINEL_INSN, -1 }
915 },
916 mips_linux_o32_sigframe_init,
917 micromips_linux_sigframe_validate
918};
919
920static const struct tramp_frame micromips_linux_o32_rt_sigframe = {
921 SIGTRAMP_FRAME,
922 2,
923 {
924 { MICROMIPS_INST_LI_V0, -1 },
925 { MIPS_NR_rt_sigreturn, -1 },
926 { MICROMIPS_INST_POOL32A, -1 },
927 { MICROMIPS_INST_SYSCALL, -1 },
928 { TRAMP_SENTINEL_INSN, -1 }
929 },
930 mips_linux_o32_sigframe_init,
931 micromips_linux_sigframe_validate
932};
933
934static const struct tramp_frame micromips_linux_n32_rt_sigframe = {
935 SIGTRAMP_FRAME,
936 2,
937 {
938 { MICROMIPS_INST_LI_V0, -1 },
939 { MIPS_NR_N32_rt_sigreturn, -1 },
940 { MICROMIPS_INST_POOL32A, -1 },
941 { MICROMIPS_INST_SYSCALL, -1 },
942 { TRAMP_SENTINEL_INSN, -1 }
943 },
944 mips_linux_n32n64_sigframe_init,
945 micromips_linux_sigframe_validate
946};
947
948static const struct tramp_frame micromips_linux_n64_rt_sigframe = {
949 SIGTRAMP_FRAME,
950 2,
951 {
952 { MICROMIPS_INST_LI_V0, -1 },
953 { MIPS_NR_N64_rt_sigreturn, -1 },
954 { MICROMIPS_INST_POOL32A, -1 },
955 { MICROMIPS_INST_SYSCALL, -1 },
956 { TRAMP_SENTINEL_INSN, -1 }
957 },
958 mips_linux_n32n64_sigframe_init,
959 micromips_linux_sigframe_validate
5792a79b
DJ		 960};
961
962/* *INDENT-OFF* */
963/* The unwinder for o32 signal frames. The legacy structures look
964 like this:
965
966 struct sigframe {
967 u32 sf_ass[4]; [argument save space for o32]
eb195664 968 u32 sf_code[2]; [signal trampoline or fill]
5792a79b
DJ		 969 struct sigcontext sf_sc;
970 sigset_t sf_mask;
971 };
972
d0e64392
MR		 973 Pre-2.6.12 sigcontext:
974
5792a79b
DJ		 975 struct sigcontext {
976 unsigned int sc_regmask; [Unused]
977 unsigned int sc_status;
978 unsigned long long sc_pc;
979 unsigned long long sc_regs[32];
980 unsigned long long sc_fpregs[32];
981 unsigned int sc_ownedfp;
982 unsigned int sc_fpc_csr;
983 unsigned int sc_fpc_eir; [Unused]
984 unsigned int sc_used_math;
985 unsigned int sc_ssflags; [Unused]
986 [Alignment hole of four bytes]
987 unsigned long long sc_mdhi;
988 unsigned long long sc_mdlo;
989
990 unsigned int sc_cause; [Unused]
991 unsigned int sc_badvaddr; [Unused]
992
993 unsigned long sc_sigset[4]; [kernel's sigset_t]
994 };
995
d0e64392
MR		 996 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
997
998 struct sigcontext {
999 unsigned int sc_regmask; [Unused]
1000 unsigned int sc_status; [Unused]
1001 unsigned long long sc_pc;
1002 unsigned long long sc_regs[32];
1003 unsigned long long sc_fpregs[32];
1004 unsigned int sc_acx;
1005 unsigned int sc_fpc_csr;
1006 unsigned int sc_fpc_eir; [Unused]
1007 unsigned int sc_used_math;
1008 unsigned int sc_dsp;
1009 [Alignment hole of four bytes]
1010 unsigned long long sc_mdhi;
1011 unsigned long long sc_mdlo;
1012 unsigned long sc_hi1;
1013 unsigned long sc_lo1;
1014 unsigned long sc_hi2;
1015 unsigned long sc_lo2;
1016 unsigned long sc_hi3;
1017 unsigned long sc_lo3;
1018 };
1019
5792a79b
DJ		 1020 The RT signal frames look like this:
1021
1022 struct rt_sigframe {
1023 u32 rs_ass[4]; [argument save space for o32]
eb195664 1024 u32 rs_code[2] [signal trampoline or fill]
5792a79b
DJ		 1025 struct siginfo rs_info;
1026 struct ucontext rs_uc;
1027 };
1028
1029 struct ucontext {
1030 unsigned long uc_flags;
1031 struct ucontext *uc_link;
1032 stack_t uc_stack;
1033 [Alignment hole of four bytes]
1034 struct sigcontext uc_mcontext;
1035 sigset_t uc_sigmask;
1036 }; */
1037/* *INDENT-ON* */
1038
5792a79b
DJ		 1039#define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
1040
1041#define RTSIGFRAME_SIGINFO_SIZE 128
1042#define STACK_T_SIZE (3 * 4)
1043#define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
1044#define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1045 + RTSIGFRAME_SIGINFO_SIZE \
1046 + UCONTEXT_SIGCONTEXT_OFFSET)
1047
1048#define SIGCONTEXT_PC (1 * 8)
1049#define SIGCONTEXT_REGS (2 * 8)
1050#define SIGCONTEXT_FPREGS (34 * 8)
1051#define SIGCONTEXT_FPCSR (66 * 8 + 4)
d0e64392 1052#define SIGCONTEXT_DSPCTL (68 * 8 + 0)
5792a79b
DJ		 1053#define SIGCONTEXT_HI (69 * 8)
1054#define SIGCONTEXT_LO (70 * 8)
1055#define SIGCONTEXT_CAUSE (71 * 8 + 0)
1056#define SIGCONTEXT_BADVADDR (71 * 8 + 4)
d0e64392
MR		 1057#define SIGCONTEXT_HI1 (71 * 8 + 0)
1058#define SIGCONTEXT_LO1 (71 * 8 + 4)
1059#define SIGCONTEXT_HI2 (72 * 8 + 0)
1060#define SIGCONTEXT_LO2 (72 * 8 + 4)
1061#define SIGCONTEXT_HI3 (73 * 8 + 0)
1062#define SIGCONTEXT_LO3 (73 * 8 + 4)
5792a79b
DJ		 1063
1064#define SIGCONTEXT_REG_SIZE 8
1065
1066static void
1067mips_linux_o32_sigframe_init (const struct tramp_frame *self,
b8a22b94 1068 struct frame_info *this_frame,
5792a79b
DJ		 1069 struct trad_frame_cache *this_cache,
1070 CORE_ADDR func)
1071{
b8a22b94 1072 struct gdbarch *gdbarch = get_frame_arch (this_frame);
22e048c9 1073 int ireg;
eb195664
DD		 1074 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1075 CORE_ADDR sigcontext_base;
2eb4d78b 1076 const struct mips_regnum *regs = mips_regnum (gdbarch);
37c4d197 1077 CORE_ADDR regs_base;
5792a79b 1078
858339f2
MR		 1079 if (self == &mips_linux_o32_sigframe
1080 || self == &micromips_linux_o32_sigframe)
eb195664 1081 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
5792a79b 1082 else
eb195664 1083 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
295093a4
MS		 1084
1085 /* I'm not proud of this hack. Eventually we will have the
1086 infrastructure to indicate the size of saved registers on a
1087 per-frame basis, but right now we don't; the kernel saves eight
37c4d197
DJ		 1088 bytes but we only want four. Use regs_base to access any
1089 64-bit fields. */
2eb4d78b 1090 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
37c4d197
DJ		 1091 regs_base = sigcontext_base + 4;
1092 else
1093 regs_base = sigcontext_base;
5792a79b 1094
2eb4d78b 1095 if (mips_linux_restart_reg_p (gdbarch))
822b6570
DJ		 1096 trad_frame_set_reg_addr (this_cache,
1097 (MIPS_RESTART_REGNUM
2eb4d78b 1098 + gdbarch_num_regs (gdbarch)),
822b6570 1099 regs_base + SIGCONTEXT_REGS);
5792a79b
DJ		 1100
1101 for (ireg = 1; ireg < 32; ireg++)
295093a4 1102 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1103 (ireg + MIPS_ZERO_REGNUM
1104 + gdbarch_num_regs (gdbarch)),
1105 (regs_base + SIGCONTEXT_REGS
1106 + ireg * SIGCONTEXT_REG_SIZE));
5792a79b 1107
37c4d197
DJ		 1108 /* The way that floating point registers are saved, unfortunately,
1109 depends on the architecture the kernel is built for. For the r3000 and
1110 tx39, four bytes of each register are at the beginning of each of the
1111 32 eight byte slots. For everything else, the registers are saved
1112 using double precision; only the even-numbered slots are initialized,
1113 and the high bits are the odd-numbered register. Assume the latter
1114 layout, since we can't tell, and it's much more common. Which bits are
1115 the "high" bits depends on endianness. */
5792a79b 1116 for (ireg = 0; ireg < 32; ireg++)
2eb4d78b 1117 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
f57d151a 1118 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1119 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1120 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1121 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
37c4d197 1122 else
f57d151a 1123 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1124 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1125 (sigcontext_base + SIGCONTEXT_FPREGS
1126 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
5792a79b 1127
f57d151a 1128 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1129 regs->pc + gdbarch_num_regs (gdbarch),
37c4d197 1130 regs_base + SIGCONTEXT_PC);
5792a79b 1131
295093a4 1132 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1133 (regs->fp_control_status
1134 + gdbarch_num_regs (gdbarch)),
5792a79b 1135 sigcontext_base + SIGCONTEXT_FPCSR);
d0e64392
MR		 1136
1137 if (regs->dspctl != -1)
1138 trad_frame_set_reg_addr (this_cache,
1139 regs->dspctl + gdbarch_num_regs (gdbarch),
1140 sigcontext_base + SIGCONTEXT_DSPCTL);
1141
f57d151a 1142 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1143 regs->hi + gdbarch_num_regs (gdbarch),
37c4d197 1144 regs_base + SIGCONTEXT_HI);
f57d151a 1145 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1146 regs->lo + gdbarch_num_regs (gdbarch),
37c4d197 1147 regs_base + SIGCONTEXT_LO);
d0e64392
MR		 1148
1149 if (regs->dspacc != -1)
1150 {
1151 trad_frame_set_reg_addr (this_cache,
1152 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1153 sigcontext_base + SIGCONTEXT_HI1);
1154 trad_frame_set_reg_addr (this_cache,
1155 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1156 sigcontext_base + SIGCONTEXT_LO1);
1157 trad_frame_set_reg_addr (this_cache,
1158 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1159 sigcontext_base + SIGCONTEXT_HI2);
1160 trad_frame_set_reg_addr (this_cache,
1161 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1162 sigcontext_base + SIGCONTEXT_LO2);
1163 trad_frame_set_reg_addr (this_cache,
1164 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1165 sigcontext_base + SIGCONTEXT_HI3);
1166 trad_frame_set_reg_addr (this_cache,
1167 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1168 sigcontext_base + SIGCONTEXT_LO3);
1169 }
1170 else
1171 {
1172 trad_frame_set_reg_addr (this_cache,
1173 regs->cause + gdbarch_num_regs (gdbarch),
1174 sigcontext_base + SIGCONTEXT_CAUSE);
1175 trad_frame_set_reg_addr (this_cache,
1176 regs->badvaddr + gdbarch_num_regs (gdbarch),
1177 sigcontext_base + SIGCONTEXT_BADVADDR);
1178 }
5792a79b
DJ		 1179
1180 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
eb195664 1181 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
5792a79b
DJ		 1182}
1183
1184/* *INDENT-OFF* */
1185/* For N32/N64 things look different. There is no non-rt signal frame.
1186
1187 struct rt_sigframe_n32 {
1188 u32 rs_ass[4]; [ argument save space for o32 ]
eb195664 1189 u32 rs_code[2]; [ signal trampoline or fill ]
5792a79b
DJ		 1190 struct siginfo rs_info;
1191 struct ucontextn32 rs_uc;
1192 };
1193
1194 struct ucontextn32 {
1195 u32 uc_flags;
1196 s32 uc_link;
1197 stack32_t uc_stack;
1198 struct sigcontext uc_mcontext;
1199 sigset_t uc_sigmask; [ mask last for extensibility ]
1200 };
295093a4 1201
e741f4d4 1202 struct rt_sigframe {
5792a79b
DJ		 1203 u32 rs_ass[4]; [ argument save space for o32 ]
1204 u32 rs_code[2]; [ signal trampoline ]
1205 struct siginfo rs_info;
1206 struct ucontext rs_uc;
1207 };
1208
1209 struct ucontext {
1210 unsigned long uc_flags;
1211 struct ucontext *uc_link;
1212 stack_t uc_stack;
1213 struct sigcontext uc_mcontext;
1214 sigset_t uc_sigmask; [ mask last for extensibility ]
1215 };
1216
1217 And the sigcontext is different (this is for both n32 and n64):
1218
1219 struct sigcontext {
1220 unsigned long long sc_regs[32];
1221 unsigned long long sc_fpregs[32];
1222 unsigned long long sc_mdhi;
e741f4d4
DJ		 1223 unsigned long long sc_hi1;
1224 unsigned long long sc_hi2;
1225 unsigned long long sc_hi3;
5792a79b 1226 unsigned long long sc_mdlo;
e741f4d4
DJ		 1227 unsigned long long sc_lo1;
1228 unsigned long long sc_lo2;
1229 unsigned long long sc_lo3;
5792a79b 1230 unsigned long long sc_pc;
5792a79b 1231 unsigned int sc_fpc_csr;
5792a79b 1232 unsigned int sc_used_math;
e741f4d4
DJ		 1233 unsigned int sc_dsp;
1234 unsigned int sc_reserved;
1235 };
1236
1237 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1238 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1239 included too. */
5792a79b
DJ		 1240/* *INDENT-ON* */
1241
1242#define N32_STACK_T_SIZE STACK_T_SIZE
1243#define N64_STACK_T_SIZE (2 * 8 + 4)
1244#define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1245#define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1246#define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1247 + RTSIGFRAME_SIGINFO_SIZE \
1248 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1249#define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1250 + RTSIGFRAME_SIGINFO_SIZE \
1251 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1252
1253#define N64_SIGCONTEXT_REGS (0 * 8)
1254#define N64_SIGCONTEXT_FPREGS (32 * 8)
1255#define N64_SIGCONTEXT_HI (64 * 8)
d0e64392
MR		 1256#define N64_SIGCONTEXT_HI1 (65 * 8)
1257#define N64_SIGCONTEXT_HI2 (66 * 8)
1258#define N64_SIGCONTEXT_HI3 (67 * 8)
e741f4d4 1259#define N64_SIGCONTEXT_LO (68 * 8)
d0e64392
MR		 1260#define N64_SIGCONTEXT_LO1 (69 * 8)
1261#define N64_SIGCONTEXT_LO2 (70 * 8)
1262#define N64_SIGCONTEXT_LO3 (71 * 8)
e741f4d4 1263#define N64_SIGCONTEXT_PC (72 * 8)
d0e64392
MR		 1264#define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1265#define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
5792a79b
DJ		 1266
1267#define N64_SIGCONTEXT_REG_SIZE 8
295093a4 1268
5792a79b
DJ		 1269static void
1270mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
b8a22b94 1271 struct frame_info *this_frame,
5792a79b
DJ		 1272 struct trad_frame_cache *this_cache,
1273 CORE_ADDR func)
1274{
b8a22b94 1275 struct gdbarch *gdbarch = get_frame_arch (this_frame);
22e048c9 1276 int ireg;
eb195664
DD		 1277 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1278 CORE_ADDR sigcontext_base;
2eb4d78b 1279 const struct mips_regnum *regs = mips_regnum (gdbarch);
5792a79b 1280
858339f2
MR		 1281 if (self == &mips_linux_n32_rt_sigframe
1282 || self == &micromips_linux_n32_rt_sigframe)
eb195664 1283 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
5792a79b 1284 else
eb195664 1285 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
295093a4 1286
2eb4d78b 1287 if (mips_linux_restart_reg_p (gdbarch))
822b6570
DJ		 1288 trad_frame_set_reg_addr (this_cache,
1289 (MIPS_RESTART_REGNUM
2eb4d78b 1290 + gdbarch_num_regs (gdbarch)),
822b6570 1291 sigcontext_base + N64_SIGCONTEXT_REGS);
5792a79b
DJ		 1292
1293 for (ireg = 1; ireg < 32; ireg++)
295093a4 1294 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1295 (ireg + MIPS_ZERO_REGNUM
1296 + gdbarch_num_regs (gdbarch)),
1297 (sigcontext_base + N64_SIGCONTEXT_REGS
1298 + ireg * N64_SIGCONTEXT_REG_SIZE));
5792a79b
DJ		 1299
1300 for (ireg = 0; ireg < 32; ireg++)
f57d151a 1301 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1302 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1303 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1304 + ireg * N64_SIGCONTEXT_REG_SIZE));
5792a79b 1305
f57d151a 1306 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1307 regs->pc + gdbarch_num_regs (gdbarch),
5792a79b
DJ		 1308 sigcontext_base + N64_SIGCONTEXT_PC);
1309
295093a4 1310 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1311 (regs->fp_control_status
1312 + gdbarch_num_regs (gdbarch)),
5792a79b 1313 sigcontext_base + N64_SIGCONTEXT_FPCSR);
d0e64392 1314
f57d151a 1315 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1316 regs->hi + gdbarch_num_regs (gdbarch),
5792a79b 1317 sigcontext_base + N64_SIGCONTEXT_HI);
f57d151a 1318 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1319 regs->lo + gdbarch_num_regs (gdbarch),
5792a79b 1320 sigcontext_base + N64_SIGCONTEXT_LO);
5792a79b 1321
d0e64392
MR		 1322 if (regs->dspacc != -1)
1323 {
1324 trad_frame_set_reg_addr (this_cache,
1325 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1326 sigcontext_base + N64_SIGCONTEXT_HI1);
1327 trad_frame_set_reg_addr (this_cache,
1328 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1329 sigcontext_base + N64_SIGCONTEXT_LO1);
1330 trad_frame_set_reg_addr (this_cache,
1331 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1332 sigcontext_base + N64_SIGCONTEXT_HI2);
1333 trad_frame_set_reg_addr (this_cache,
1334 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1335 sigcontext_base + N64_SIGCONTEXT_LO2);
1336 trad_frame_set_reg_addr (this_cache,
1337 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1338 sigcontext_base + N64_SIGCONTEXT_HI3);
1339 trad_frame_set_reg_addr (this_cache,
1340 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1341 sigcontext_base + N64_SIGCONTEXT_LO3);
1342 }
1343 if (regs->dspctl != -1)
1344 trad_frame_set_reg_addr (this_cache,
1345 regs->dspctl + gdbarch_num_regs (gdbarch),
1346 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1347
5792a79b 1348 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
eb195664 1349 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
5792a79b
DJ		 1350}
1351
858339f2
MR		 1352/* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1353
1354static int
1355mips_linux_sigframe_validate (const struct tramp_frame *self,
1356 struct frame_info *this_frame,
1357 CORE_ADDR *pc)
1358{
1359 return mips_pc_is_mips (*pc);
1360}
1361
1362/* Implement struct tramp_frame's "validate" method for microMIPS code. */
1363
1364static int
1365micromips_linux_sigframe_validate (const struct tramp_frame *self,
1366 struct frame_info *this_frame,
1367 CORE_ADDR *pc)
1368{
3e29f34a
MR		 1369 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc))
1370 {
1371 *pc = mips_unmake_compact_addr (*pc);
1372 return 1;
1373 }
1374 else
1375 return 0;
858339f2
MR		 1376}
1377
5a439849
MR		 1378/* Implement the "write_pc" gdbarch method. */
1379
822b6570 1380static void
61a1198a 1381mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
822b6570 1382{
2eb4d78b 1383 struct gdbarch *gdbarch = get_regcache_arch (regcache);
5a439849
MR		 1384
1385 mips_write_pc (regcache, pc);
822b6570
DJ		 1386
1387 /* Clear the syscall restart flag. */
2eb4d78b 1388 if (mips_linux_restart_reg_p (gdbarch))
61a1198a 1389 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
822b6570
DJ		 1390}
1391
1392/* Return 1 if MIPS_RESTART_REGNUM is usable. */
1393
1394int
1395mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1396{
1397 /* If we do not have a target description with registers, then
1398 MIPS_RESTART_REGNUM will not be included in the register set. */
1399 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1400 return 0;
1401
1402 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1403 either be GPR-sized or missing. */
1404 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1405}
9f62d0e2 1406
e38d4e1a
DJ		 1407/* When FRAME is at a syscall instruction, return the PC of the next
1408 instruction to be executed. */
1409
63807e1d 1410static CORE_ADDR
e38d4e1a
DJ		 1411mips_linux_syscall_next_pc (struct frame_info *frame)
1412{
1413 CORE_ADDR pc = get_frame_pc (frame);
1414 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1415
1416 /* If we are about to make a sigreturn syscall, use the unwinder to
1417 decode the signal frame. */
1418 if (v0 == MIPS_NR_sigreturn
1419 || v0 == MIPS_NR_rt_sigreturn
1420 || v0 == MIPS_NR_N64_rt_sigreturn
1421 || v0 == MIPS_NR_N32_rt_sigreturn)
c7ce8faa 1422 return frame_unwind_caller_pc (get_current_frame ());
e38d4e1a
DJ		 1423
1424 return pc + 4;
1425}
1426
385203ed
DD		 1427/* Return the current system call's number present in the
1428 v0 register. When the function fails, it returns -1. */
1429
1430static LONGEST
1431mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1432 ptid_t ptid)
1433{
1434 struct regcache *regcache = get_thread_regcache (ptid);
1435 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1436 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1437 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1438 /* The content of a register */
1439 gdb_byte buf[8];
1440 /* The result */
1441 LONGEST ret;
1442
1443 /* Make sure we're in a known ABI */
1444 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1445 || tdep->mips_abi == MIPS_ABI_N32
1446 || tdep->mips_abi == MIPS_ABI_N64);
1447
1448 gdb_assert (regsize <= sizeof (buf));
1449
1450 /* Getting the system call number from the register.
1451 syscall number is in v0 or $2. */
1452 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1453
1454 ret = extract_signed_integer (buf, regsize, byte_order);
1455
1456 return ret;
1457}
1458
eb14d406
SDJ		 1459/* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1460 gdbarch.h. */
1461
1462static int
1463mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1464 enum gdb_signal signal)
1465{
1466 switch (signal)
1467 {
1468 case GDB_SIGNAL_EMT:
1469 return MIPS_LINUX_SIGEMT;
1470
1471 case GDB_SIGNAL_BUS:
1472 return MIPS_LINUX_SIGBUS;
1473
1474 case GDB_SIGNAL_SYS:
1475 return MIPS_LINUX_SIGSYS;
1476
1477 case GDB_SIGNAL_USR1:
1478 return MIPS_LINUX_SIGUSR1;
1479
1480 case GDB_SIGNAL_USR2:
1481 return MIPS_LINUX_SIGUSR2;
1482
1483 case GDB_SIGNAL_CHLD:
1484 return MIPS_LINUX_SIGCHLD;
1485
1486 case GDB_SIGNAL_PWR:
1487 return MIPS_LINUX_SIGPWR;
1488
1489 case GDB_SIGNAL_WINCH:
1490 return MIPS_LINUX_SIGWINCH;
1491
1492 case GDB_SIGNAL_URG:
1493 return MIPS_LINUX_SIGURG;
1494
1495 case GDB_SIGNAL_IO:
1496 return MIPS_LINUX_SIGIO;
1497
1498 case GDB_SIGNAL_POLL:
1499 return MIPS_LINUX_SIGPOLL;
1500
1501 case GDB_SIGNAL_STOP:
1502 return MIPS_LINUX_SIGSTOP;
1503
1504 case GDB_SIGNAL_TSTP:
1505 return MIPS_LINUX_SIGTSTP;
1506
1507 case GDB_SIGNAL_CONT:
1508 return MIPS_LINUX_SIGCONT;
1509
1510 case GDB_SIGNAL_TTIN:
1511 return MIPS_LINUX_SIGTTIN;
1512
1513 case GDB_SIGNAL_TTOU:
1514 return MIPS_LINUX_SIGTTOU;
1515
1516 case GDB_SIGNAL_VTALRM:
1517 return MIPS_LINUX_SIGVTALRM;
1518
1519 case GDB_SIGNAL_PROF:
1520 return MIPS_LINUX_SIGPROF;
1521
1522 case GDB_SIGNAL_XCPU:
1523 return MIPS_LINUX_SIGXCPU;
1524
1525 case GDB_SIGNAL_XFSZ:
1526 return MIPS_LINUX_SIGXFSZ;
1527
1528 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1529 therefore we have to handle it here. */
1530 case GDB_SIGNAL_REALTIME_32:
1531 return MIPS_LINUX_SIGRTMIN;
1532 }
1533
1534 if (signal >= GDB_SIGNAL_REALTIME_33
1535 && signal <= GDB_SIGNAL_REALTIME_63)
1536 {
1537 int offset = signal - GDB_SIGNAL_REALTIME_33;
1538
1539 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1540 }
1541 else if (signal >= GDB_SIGNAL_REALTIME_64
1542 && signal <= GDB_SIGNAL_REALTIME_127)
1543 {
1544 int offset = signal - GDB_SIGNAL_REALTIME_64;
1545
1546 return MIPS_LINUX_SIGRT64 + offset;
1547 }
1548
1549 return linux_gdb_signal_to_target (gdbarch, signal);
1550}
1551
7d266584 1552/* Translate signals based on MIPS signal values.
232b8704
ME		 1553 Adapted from gdb/common/signals.c. */
1554
1555static enum gdb_signal
eb14d406 1556mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
232b8704 1557{
eb14d406 1558 switch (signal)
232b8704 1559 {
eb14d406 1560 case MIPS_LINUX_SIGEMT:
232b8704 1561 return GDB_SIGNAL_EMT;
eb14d406
SDJ		 1562
1563 case MIPS_LINUX_SIGBUS:
232b8704 1564 return GDB_SIGNAL_BUS;
eb14d406
SDJ		 1565
1566 case MIPS_LINUX_SIGSYS:
232b8704 1567 return GDB_SIGNAL_SYS;
eb14d406
SDJ		 1568
1569 case MIPS_LINUX_SIGUSR1:
232b8704 1570 return GDB_SIGNAL_USR1;
eb14d406
SDJ		 1571
1572 case MIPS_LINUX_SIGUSR2:
232b8704 1573 return GDB_SIGNAL_USR2;
eb14d406
SDJ		 1574
1575 case MIPS_LINUX_SIGCHLD:
232b8704 1576 return GDB_SIGNAL_CHLD;
eb14d406
SDJ		 1577
1578 case MIPS_LINUX_SIGPWR:
232b8704 1579 return GDB_SIGNAL_PWR;
eb14d406
SDJ		 1580
1581 case MIPS_LINUX_SIGWINCH:
232b8704 1582 return GDB_SIGNAL_WINCH;
eb14d406
SDJ		 1583
1584 case MIPS_LINUX_SIGURG:
232b8704 1585 return GDB_SIGNAL_URG;
eb14d406
SDJ		 1586
1587 /* No way to differentiate between SIGIO and SIGPOLL.
1588 Therefore, we just handle the first one. */
1589 case MIPS_LINUX_SIGIO:
1590 return GDB_SIGNAL_IO;
1591
1592 case MIPS_LINUX_SIGSTOP:
232b8704 1593 return GDB_SIGNAL_STOP;
eb14d406
SDJ		 1594
1595 case MIPS_LINUX_SIGTSTP:
232b8704 1596 return GDB_SIGNAL_TSTP;
eb14d406
SDJ		 1597
1598 case MIPS_LINUX_SIGCONT:
232b8704 1599 return GDB_SIGNAL_CONT;
eb14d406
SDJ		 1600
1601 case MIPS_LINUX_SIGTTIN:
232b8704 1602 return GDB_SIGNAL_TTIN;
eb14d406
SDJ		 1603
1604 case MIPS_LINUX_SIGTTOU:
232b8704 1605 return GDB_SIGNAL_TTOU;
eb14d406
SDJ		 1606
1607 case MIPS_LINUX_SIGVTALRM:
232b8704 1608 return GDB_SIGNAL_VTALRM;
eb14d406
SDJ		 1609
1610 case MIPS_LINUX_SIGPROF:
232b8704 1611 return GDB_SIGNAL_PROF;
eb14d406
SDJ		 1612
1613 case MIPS_LINUX_SIGXCPU:
232b8704 1614 return GDB_SIGNAL_XCPU;
eb14d406
SDJ		 1615
1616 case MIPS_LINUX_SIGXFSZ:
232b8704 1617 return GDB_SIGNAL_XFSZ;
eb14d406 1618 }
232b8704 1619
eb14d406 1620 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
232b8704
ME		 1621 {
1622 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1623 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
eb14d406
SDJ		 1624 int offset = signal - MIPS_LINUX_SIGRTMIN;
1625
1626 if (offset == 0)
232b8704 1627 return GDB_SIGNAL_REALTIME_32;
eb14d406
SDJ		 1628 else if (offset < 32)
1629 return (enum gdb_signal) (offset - 1
1630 + (int) GDB_SIGNAL_REALTIME_33);
232b8704 1631 else
eb14d406
SDJ		 1632 return (enum gdb_signal) (offset - 32
1633 + (int) GDB_SIGNAL_REALTIME_64);
232b8704
ME		 1634 }
1635
eb14d406 1636 return linux_gdb_signal_from_target (gdbarch, signal);
232b8704
ME		 1637}
1638
5792a79b
DJ		 1639/* Initialize one of the GNU/Linux OS ABIs. */
1640
19ed69dd 1641static void
295093a4
MS		 1642mips_linux_init_abi (struct gdbarch_info info,
1643 struct gdbarch *gdbarch)
19ed69dd 1644{
96f026fc
KB		 1645 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1646 enum mips_abi abi = mips_abi (gdbarch);
19ba03f4
SM		 1647 struct tdesc_arch_data *tdesc_data
1648 = (struct tdesc_arch_data *) info.tdep_info;
96f026fc 1649
a5ee0f0c
PA		 1650 linux_init_abi (info, gdbarch);
1651
385203ed
DD		 1652 /* Get the syscall number from the arch's register. */
1653 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1654
96f026fc
KB		 1655 switch (abi)
1656 {
1657 case MIPS_ABI_O32:
1658 set_gdbarch_get_longjmp_target (gdbarch,
7d266584 1659 mips_linux_get_longjmp_target);
96f026fc 1660 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1661 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
858339f2
MR		 1662 tramp_frame_prepend_unwinder (gdbarch, &micromips_linux_o32_sigframe);
1663 tramp_frame_prepend_unwinder (gdbarch,
1664 &micromips_linux_o32_rt_sigframe);
fb2be677
AC		 1665 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1666 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
458c8db8 1667 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
96f026fc
KB		 1668 break;
1669 case MIPS_ABI_N32:
1670 set_gdbarch_get_longjmp_target (gdbarch,
7d266584 1671 mips_linux_get_longjmp_target);
96f026fc 1672 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1673 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
d05f6826
DJ		 1674 set_gdbarch_long_double_bit (gdbarch, 128);
1675 /* These floatformats should probably be renamed. MIPS uses
1676 the same 128-bit IEEE floating point format that IA-64 uses,
1677 except that the quiet/signalling NaN bit is reversed (GDB
1678 does not distinguish between quiet and signalling NaNs). */
8da61cc4 1679 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
858339f2
MR		 1680 tramp_frame_prepend_unwinder (gdbarch,
1681 &micromips_linux_n32_rt_sigframe);
fb2be677 1682 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
458c8db8 1683 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
96f026fc
KB		 1684 break;
1685 case MIPS_ABI_N64:
1686 set_gdbarch_get_longjmp_target (gdbarch,
7d266584 1687 mips64_linux_get_longjmp_target);
96f026fc 1688 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1689 (gdbarch, svr4_lp64_fetch_link_map_offsets);
d05f6826
DJ		 1690 set_gdbarch_long_double_bit (gdbarch, 128);
1691 /* These floatformats should probably be renamed. MIPS uses
1692 the same 128-bit IEEE floating point format that IA-64 uses,
1693 except that the quiet/signalling NaN bit is reversed (GDB
1694 does not distinguish between quiet and signalling NaNs). */
8da61cc4 1695 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
858339f2
MR		 1696 tramp_frame_prepend_unwinder (gdbarch,
1697 &micromips_linux_n64_rt_sigframe);
fb2be677 1698 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
458c8db8 1699 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
96f026fc
KB		 1700 break;
1701 default:
96f026fc
KB		 1702 break;
1703 }
6de918a6
DJ		 1704
1705 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1706
0d0266c6 1707 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
b2756930
KB		 1708
1709 /* Enable TLS support. */
1710 set_gdbarch_fetch_tls_load_module_address (gdbarch,
7d266584 1711 svr4_fetch_objfile_link_map);
7d522c90
DJ		 1712
1713 /* Initialize this lazily, to avoid an initialization order
1714 dependency on solib-svr4.c's _initialize routine. */
1715 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1716 {
1717 mips_svr4_so_ops = svr4_so_ops;
1718 mips_svr4_so_ops.in_dynsym_resolve_code
1719 = mips_linux_in_dynsym_resolve_code;
1720 }
1721 set_solib_ops (gdbarch, &mips_svr4_so_ops);
822b6570
DJ		 1722
1723 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1724
4eb0ad19
DJ		 1725 set_gdbarch_core_read_description (gdbarch,
1726 mips_linux_core_read_description);
1727
d4036235
AA		 1728 set_gdbarch_iterate_over_regset_sections
1729 (gdbarch, mips_linux_iterate_over_regset_sections);
50e8a0d5 1730
232b8704
ME		 1731 set_gdbarch_gdb_signal_from_target (gdbarch,
1732 mips_gdb_signal_from_target);
1733
eb14d406
SDJ		 1734 set_gdbarch_gdb_signal_to_target (gdbarch,
1735 mips_gdb_signal_to_target);
1736
e38d4e1a
DJ		 1737 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1738
822b6570
DJ		 1739 if (tdesc_data)
1740 {
1741 const struct tdesc_feature *feature;
1742
1743 /* If we have target-described registers, then we can safely
1744 reserve a number for MIPS_RESTART_REGNUM (whether it is
1745 described or not). */
1746 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1747 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
cf233303 1748 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
822b6570
DJ		 1749
1750 /* If it's present, then assign it to the reserved number. */
1751 feature = tdesc_find_feature (info.target_desc,
1752 "org.gnu.gdb.mips.linux");
1753 if (feature != NULL)
1754 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1755 "restart");
1756 }
19ed69dd
KB		 1757}
1758
63807e1d
PA		 1759/* Provide a prototype to silence -Wmissing-prototypes. */
1760extern initialize_file_ftype _initialize_mips_linux_tdep;
1761
2aa830e4 1762void
d1bacddc 1763_initialize_mips_linux_tdep (void)
2aa830e4 1764{
96f026fc
KB		 1765 const struct bfd_arch_info *arch_info;
1766
96f026fc
KB		 1767 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1768 arch_info != NULL;
1769 arch_info = arch_info->next)
1770 {
295093a4
MS		 1771 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1772 GDB_OSABI_LINUX,
96f026fc
KB		 1773 mips_linux_init_abi);
1774 }
2aa830e4 1775}
GDB Binutils - Deliverables
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