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Pass -flto-partition=none to the PR ld/12365 test
[deliverable/binutils-gdb.git] / gdb / mips-linux-tdep.c
CommitLineData
75c9abc6 1/* Target-dependent code for GNU/Linux on MIPS processors.
a094c6fb 2
32d0add0 3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
2aa830e4
DJ		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
2aa830e4
DJ		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
2aa830e4
DJ		 19
20#include "defs.h"
21#include "gdbcore.h"
22#include "target.h"
23#include "solib-svr4.h"
19ed69dd 24#include "osabi.h"
96f026fc 25#include "mips-tdep.h"
6de918a6 26#include "frame.h"
2fdf551c 27#include "regcache.h"
5792a79b
DJ		 28#include "trad-frame.h"
29#include "tramp-frame.h"
e6bb342a 30#include "gdbtypes.h"
3e5d3a5a 31#include "objfiles.h"
5ea03926 32#include "solib.h"
7d522c90 33#include "solist.h"
982e9687 34#include "symtab.h"
822b6570 35#include "target-descriptions.h"
50e8a0d5 36#include "regset.h"
d37eb719 37#include "mips-linux-tdep.h"
db5f024e 38#include "glibc-tdep.h"
a5ee0f0c 39#include "linux-tdep.h"
385203ed 40#include "xml-syscall.h"
232b8704 41#include "gdb_signals.h"
2aa830e4 42
7d522c90
DJ		 43static struct target_so_ops mips_svr4_so_ops;
44
eb14d406
SDJ		 45/* This enum represents the signals' numbers on the MIPS
46 architecture. It just contains the signal definitions which are
47 different from the generic implementation.
48
49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
50 from the Linux kernel tree. */
51
52enum
53 {
54 MIPS_LINUX_SIGEMT = 7,
55 MIPS_LINUX_SIGBUS = 10,
56 MIPS_LINUX_SIGSYS = 12,
57 MIPS_LINUX_SIGUSR1 = 16,
58 MIPS_LINUX_SIGUSR2 = 17,
59 MIPS_LINUX_SIGCHLD = 18,
60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
61 MIPS_LINUX_SIGPWR = 19,
62 MIPS_LINUX_SIGWINCH = 20,
63 MIPS_LINUX_SIGURG = 21,
64 MIPS_LINUX_SIGIO = 22,
65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
66 MIPS_LINUX_SIGSTOP = 23,
67 MIPS_LINUX_SIGTSTP = 24,
68 MIPS_LINUX_SIGCONT = 25,
69 MIPS_LINUX_SIGTTIN = 26,
70 MIPS_LINUX_SIGTTOU = 27,
71 MIPS_LINUX_SIGVTALRM = 28,
72 MIPS_LINUX_SIGPROF = 29,
73 MIPS_LINUX_SIGXCPU = 30,
74 MIPS_LINUX_SIGXFSZ = 31,
75
76 MIPS_LINUX_SIGRTMIN = 32,
77 MIPS_LINUX_SIGRT64 = 64,
78 MIPS_LINUX_SIGRTMAX = 127,
79 };
80
2aa830e4 81/* Figure out where the longjmp will land.
295093a4
MS		 82 We expect the first arg to be a pointer to the jmp_buf structure
83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
84 at. The pc is copied into PC. This routine returns 1 on
85 success. */
2aa830e4 86
19ed69dd
KB		 87#define MIPS_LINUX_JB_ELEMENT_SIZE 4
88#define MIPS_LINUX_JB_PC 0
89
90static int
60ade65d 91mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
2aa830e4
DJ		 92{
93 CORE_ADDR jb_addr;
2eb4d78b 94 struct gdbarch *gdbarch = get_frame_arch (frame);
e17a4113 95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
2aa830e4 97
60ade65d 98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
2aa830e4 99
7d266584
MR		 100 if (target_read_memory ((jb_addr
101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
2eb4d78b 102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
2aa830e4
DJ		 103 return 0;
104
819844ad 105 *pc = extract_unsigned_integer (buf,
e17a4113
UW		 106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
107 byte_order);
2aa830e4
DJ		 108
109 return 1;
110}
111
4246e332 112/* Transform the bits comprising a 32-bit register to the right size
23a6d369
AC		 113 for regcache_raw_supply(). This is needed when mips_isa_regsize()
114 is 8. */
96f026fc
KB		 115
116static void
28f5035f 117supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
96f026fc 118{
e17a4113
UW		 119 struct gdbarch *gdbarch = get_regcache_arch (regcache);
120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d37eb719 121 gdb_byte buf[MAX_REGISTER_SIZE];
e17a4113 122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
7d266584 123 extract_signed_integer (addr, 4, byte_order));
28f5035f 124 regcache_raw_supply (regcache, regnum, buf);
96f026fc
KB		 125}
126
2aa830e4
DJ		 127/* Unpack an elf_gregset_t into GDB's register cache. */
128
d37eb719 129void
28f5035f
UW		 130mips_supply_gregset (struct regcache *regcache,
131 const mips_elf_gregset_t *gregsetp)
2aa830e4
DJ		 132{
133 int regi;
28f5035f 134 const mips_elf_greg_t *regp = *gregsetp;
d9d9c31f 135 char zerobuf[MAX_REGISTER_SIZE];
2eb4d78b 136 struct gdbarch *gdbarch = get_regcache_arch (regcache);
bf072999 137
d9d9c31f 138 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4 139
822b6570 140 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
28f5035f 141 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
2aa830e4 142
2eb4d78b 143 if (mips_linux_restart_reg_p (gdbarch))
822b6570
DJ		 144 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
145
2eb4d78b
UW		 146 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
56cea623 148
2eb4d78b 149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
28f5035f 150 regp + EF_CP0_EPC);
2eb4d78b 151 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
28f5035f
UW		 152 regp + EF_CP0_BADVADDR);
153 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
2eb4d78b 154 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
28f5035f 155 regp + EF_CP0_CAUSE);
2aa830e4 156
1faeff08 157 /* Fill the inaccessible zero register with zero. */
822b6570 158 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
2aa830e4
DJ		 159}
160
50e8a0d5
HZ		 161static void
162mips_supply_gregset_wrapper (const struct regset *regset,
7d266584
MR		 163 struct regcache *regcache,
164 int regnum, const void *gregs, size_t len)
50e8a0d5
HZ		 165{
166 gdb_assert (len == sizeof (mips_elf_gregset_t));
167
168 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
169}
170
2aa830e4
DJ		 171/* Pack our registers (or one register) into an elf_gregset_t. */
172
d37eb719 173void
28f5035f
UW		 174mips_fill_gregset (const struct regcache *regcache,
175 mips_elf_gregset_t *gregsetp, int regno)
2aa830e4 176{
2eb4d78b 177 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2aa830e4 178 int regaddr, regi;
d37eb719 179 mips_elf_greg_t *regp = *gregsetp;
96f026fc 180 void *dst;
2aa830e4
DJ		 181
182 if (regno == -1)
183 {
d37eb719 184 memset (regp, 0, sizeof (mips_elf_gregset_t));
822b6570 185 for (regi = 1; regi < 32; regi++)
28f5035f 186 mips_fill_gregset (regcache, gregsetp, regi);
2eb4d78b
UW		 187 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
28f5035f 191 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
2eb4d78b 192 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
822b6570 193 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
2aa830e4
DJ		 194 return;
195 }
196
822b6570 197 if (regno > 0 && regno < 32)
2aa830e4 198 {
2aa830e4 199 dst = regp + regno + EF_REG0;
28f5035f 200 regcache_raw_collect (regcache, regno, dst);
2aa830e4
DJ		 201 return;
202 }
203
2eb4d78b
UW		 204 if (regno == mips_regnum (gdbarch)->lo)
205 regaddr = EF_LO;
206 else if (regno == mips_regnum (gdbarch)->hi)
56cea623 207 regaddr = EF_HI;
2eb4d78b 208 else if (regno == mips_regnum (gdbarch)->pc)
56cea623 209 regaddr = EF_CP0_EPC;
2eb4d78b 210 else if (regno == mips_regnum (gdbarch)->badvaddr)
56cea623 211 regaddr = EF_CP0_BADVADDR;
24e05951 212 else if (regno == MIPS_PS_REGNUM)
56cea623 213 regaddr = EF_CP0_STATUS;
2eb4d78b 214 else if (regno == mips_regnum (gdbarch)->cause)
56cea623 215 regaddr = EF_CP0_CAUSE;
2eb4d78b 216 else if (mips_linux_restart_reg_p (gdbarch)
822b6570
DJ		 217 && regno == MIPS_RESTART_REGNUM)
218 regaddr = EF_REG0;
56cea623
AC		 219 else
220 regaddr = -1;
2aa830e4
DJ		 221
222 if (regaddr != -1)
223 {
2aa830e4 224 dst = regp + regaddr;
28f5035f 225 regcache_raw_collect (regcache, regno, dst);
2aa830e4
DJ		 226 }
227}
228
50e8a0d5
HZ		 229static void
230mips_fill_gregset_wrapper (const struct regset *regset,
231 const struct regcache *regcache,
232 int regnum, void *gregs, size_t len)
233{
234 gdb_assert (len == sizeof (mips_elf_gregset_t));
235
236 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
237}
238
2aa830e4
DJ		 239/* Likewise, unpack an elf_fpregset_t. */
240
d37eb719 241void
28f5035f
UW		 242mips_supply_fpregset (struct regcache *regcache,
243 const mips_elf_fpregset_t *fpregsetp)
2aa830e4 244{
2eb4d78b 245 struct gdbarch *gdbarch = get_regcache_arch (regcache);
52f0bd74 246 int regi;
d9d9c31f 247 char zerobuf[MAX_REGISTER_SIZE];
bf072999 248
d9d9c31f 249 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4
DJ		 250
251 for (regi = 0; regi < 32; regi++)
3e8c568d 252 regcache_raw_supply (regcache,
2eb4d78b 253 gdbarch_fp0_regnum (gdbarch) + regi,
3e8c568d 254 *fpregsetp + regi);
2aa830e4 255
28f5035f 256 regcache_raw_supply (regcache,
2eb4d78b 257 mips_regnum (gdbarch)->fp_control_status,
28f5035f 258 *fpregsetp + 32);
2aa830e4 259
295093a4 260 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
28f5035f 261 regcache_raw_supply (regcache,
2eb4d78b 262 mips_regnum (gdbarch)->fp_implementation_revision,
23a6d369 263 zerobuf);
2aa830e4
DJ		 264}
265
50e8a0d5
HZ		 266static void
267mips_supply_fpregset_wrapper (const struct regset *regset,
7d266584
MR		 268 struct regcache *regcache,
269 int regnum, const void *gregs, size_t len)
50e8a0d5
HZ		 270{
271 gdb_assert (len == sizeof (mips_elf_fpregset_t));
272
273 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
274}
275
2aa830e4
DJ		 276/* Likewise, pack one or all floating point registers into an
277 elf_fpregset_t. */
278
d37eb719 279void
28f5035f
UW		 280mips_fill_fpregset (const struct regcache *regcache,
281 mips_elf_fpregset_t *fpregsetp, int regno)
2aa830e4 282{
2eb4d78b 283 struct gdbarch *gdbarch = get_regcache_arch (regcache);
22e048c9 284 char *to;
2aa830e4 285
2eb4d78b
UW		 286 if ((regno >= gdbarch_fp0_regnum (gdbarch))
287 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
2aa830e4 288 {
2eb4d78b 289 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
28f5035f 290 regcache_raw_collect (regcache, regno, to);
2aa830e4 291 }
2eb4d78b 292 else if (regno == mips_regnum (gdbarch)->fp_control_status)
2aa830e4 293 {
2aa830e4 294 to = (char *) (*fpregsetp + 32);
28f5035f 295 regcache_raw_collect (regcache, regno, to);
2aa830e4
DJ		 296 }
297 else if (regno == -1)
298 {
299 int regi;
300
301 for (regi = 0; regi < 32; regi++)
3e8c568d 302 mips_fill_fpregset (regcache, fpregsetp,
2eb4d78b 303 gdbarch_fp0_regnum (gdbarch) + regi);
28f5035f 304 mips_fill_fpregset (regcache, fpregsetp,
2eb4d78b 305 mips_regnum (gdbarch)->fp_control_status);
2aa830e4
DJ		 306 }
307}
308
50e8a0d5
HZ		 309static void
310mips_fill_fpregset_wrapper (const struct regset *regset,
311 const struct regcache *regcache,
312 int regnum, void *gregs, size_t len)
313{
314 gdb_assert (len == sizeof (mips_elf_fpregset_t));
315
316 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
317}
318
96f026fc
KB		 319/* Support for 64-bit ABIs. */
320
96f026fc 321/* Figure out where the longjmp will land.
295093a4
MS		 322 We expect the first arg to be a pointer to the jmp_buf structure
323 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
324 at. The pc is copied into PC. This routine returns 1 on
325 success. */
96f026fc
KB		 326
327/* Details about jmp_buf. */
328
329#define MIPS64_LINUX_JB_PC 0
330
331static int
60ade65d 332mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
96f026fc
KB		 333{
334 CORE_ADDR jb_addr;
2eb4d78b 335 struct gdbarch *gdbarch = get_frame_arch (frame);
e17a4113 336 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2eb4d78b
UW		 337 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
338 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
96f026fc 339
60ade65d 340 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
96f026fc
KB		 341
342 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
819844ad 343 buf,
2eb4d78b 344 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
96f026fc
KB		 345 return 0;
346
819844ad 347 *pc = extract_unsigned_integer (buf,
e17a4113
UW		 348 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
349 byte_order);
96f026fc
KB		 350
351 return 1;
352}
353
d37eb719
DJ		 354/* Register set support functions. These operate on standard 64-bit
355 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
356 target will still use the 64-bit format for PTRACE_GETREGS. */
357
358/* Supply a 64-bit register. */
96f026fc 359
63807e1d 360static void
28f5035f
UW		 361supply_64bit_reg (struct regcache *regcache, int regnum,
362 const gdb_byte *buf)
d37eb719 363{
2eb4d78b
UW		 364 struct gdbarch *gdbarch = get_regcache_arch (regcache);
365 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
366 && register_size (gdbarch, regnum) == 4)
28f5035f 367 regcache_raw_supply (regcache, regnum, buf + 4);
d37eb719 368 else
28f5035f 369 regcache_raw_supply (regcache, regnum, buf);
d37eb719
DJ		 370}
371
372/* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
373
374void
28f5035f
UW		 375mips64_supply_gregset (struct regcache *regcache,
376 const mips64_elf_gregset_t *gregsetp)
96f026fc
KB		 377{
378 int regi;
28f5035f 379 const mips64_elf_greg_t *regp = *gregsetp;
d37eb719 380 gdb_byte zerobuf[MAX_REGISTER_SIZE];
2eb4d78b 381 struct gdbarch *gdbarch = get_regcache_arch (regcache);
96f026fc 382
d9d9c31f 383 memset (zerobuf, 0, MAX_REGISTER_SIZE);
96f026fc 384
822b6570 385 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
28f5035f 386 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
7d266584 387 (const gdb_byte *) (regp + regi));
28f5035f 388
2eb4d78b 389 if (mips_linux_restart_reg_p (gdbarch))
822b6570 390 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
7d266584 391 (const gdb_byte *) (regp + MIPS64_EF_REG0));
822b6570 392
2eb4d78b 393 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
28f5035f 394 (const gdb_byte *) (regp + MIPS64_EF_LO));
2eb4d78b 395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
28f5035f
UW		 396 (const gdb_byte *) (regp + MIPS64_EF_HI));
397
2eb4d78b 398 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
28f5035f 399 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
2eb4d78b 400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
28f5035f
UW		 401 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
402 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
403 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
2eb4d78b 404 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
28f5035f 405 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
96f026fc 406
1faeff08 407 /* Fill the inaccessible zero register with zero. */
822b6570 408 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
96f026fc
KB		 409}
410
50e8a0d5
HZ		 411static void
412mips64_supply_gregset_wrapper (const struct regset *regset,
7d266584
MR		 413 struct regcache *regcache,
414 int regnum, const void *gregs, size_t len)
50e8a0d5
HZ		 415{
416 gdb_assert (len == sizeof (mips64_elf_gregset_t));
417
418 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
419}
420
d37eb719 421/* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
96f026fc 422
d37eb719 423void
28f5035f
UW		 424mips64_fill_gregset (const struct regcache *regcache,
425 mips64_elf_gregset_t *gregsetp, int regno)
96f026fc 426{
2eb4d78b 427 struct gdbarch *gdbarch = get_regcache_arch (regcache);
e17a4113 428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
96f026fc
KB		 429 int regaddr, regi;
430 mips64_elf_greg_t *regp = *gregsetp;
2ba93934 431 void *dst;
96f026fc
KB		 432
433 if (regno == -1)
434 {
435 memset (regp, 0, sizeof (mips64_elf_gregset_t));
822b6570 436 for (regi = 1; regi < 32; regi++)
7d266584 437 mips64_fill_gregset (regcache, gregsetp, regi);
2eb4d78b
UW		 438 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
439 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
025bb325
MS		 441 mips64_fill_gregset (regcache, gregsetp,
442 mips_regnum (gdbarch)->badvaddr);
28f5035f 443 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
2eb4d78b 444 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
822b6570 445 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
96f026fc
KB		 446 return;
447 }
448
822b6570 449 if (regno > 0 && regno < 32)
d37eb719 450 regaddr = regno + MIPS64_EF_REG0;
2eb4d78b 451 else if (regno == mips_regnum (gdbarch)->lo)
56cea623 452 regaddr = MIPS64_EF_LO;
2eb4d78b 453 else if (regno == mips_regnum (gdbarch)->hi)
56cea623 454 regaddr = MIPS64_EF_HI;
2eb4d78b 455 else if (regno == mips_regnum (gdbarch)->pc)
56cea623 456 regaddr = MIPS64_EF_CP0_EPC;
2eb4d78b 457 else if (regno == mips_regnum (gdbarch)->badvaddr)
56cea623 458 regaddr = MIPS64_EF_CP0_BADVADDR;
24e05951 459 else if (regno == MIPS_PS_REGNUM)
56cea623 460 regaddr = MIPS64_EF_CP0_STATUS;
2eb4d78b 461 else if (regno == mips_regnum (gdbarch)->cause)
56cea623 462 regaddr = MIPS64_EF_CP0_CAUSE;
2eb4d78b 463 else if (mips_linux_restart_reg_p (gdbarch)
822b6570
DJ		 464 && regno == MIPS_RESTART_REGNUM)
465 regaddr = MIPS64_EF_REG0;
56cea623
AC		 466 else
467 regaddr = -1;
96f026fc
KB		 468
469 if (regaddr != -1)
470 {
d37eb719
DJ		 471 gdb_byte buf[MAX_REGISTER_SIZE];
472 LONGEST val;
473
28f5035f 474 regcache_raw_collect (regcache, regno, buf);
e17a4113
UW		 475 val = extract_signed_integer (buf, register_size (gdbarch, regno),
476 byte_order);
96f026fc 477 dst = regp + regaddr;
e17a4113 478 store_signed_integer (dst, 8, byte_order, val);
96f026fc
KB		 479 }
480}
481
50e8a0d5
HZ		 482static void
483mips64_fill_gregset_wrapper (const struct regset *regset,
484 const struct regcache *regcache,
485 int regnum, void *gregs, size_t len)
486{
487 gdb_assert (len == sizeof (mips64_elf_gregset_t));
488
489 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
490}
491
96f026fc
KB		 492/* Likewise, unpack an elf_fpregset_t. */
493
d37eb719 494void
28f5035f
UW		 495mips64_supply_fpregset (struct regcache *regcache,
496 const mips64_elf_fpregset_t *fpregsetp)
96f026fc 497{
2eb4d78b 498 struct gdbarch *gdbarch = get_regcache_arch (regcache);
52f0bd74 499 int regi;
96f026fc 500
d37eb719
DJ		 501 /* See mips_linux_o32_sigframe_init for a description of the
502 peculiar FP register layout. */
2eb4d78b 503 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
d37eb719
DJ		 504 for (regi = 0; regi < 32; regi++)
505 {
7d266584
MR		 506 const gdb_byte *reg_ptr
507 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
2eb4d78b 508 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
d37eb719 509 reg_ptr += 4;
3e8c568d 510 regcache_raw_supply (regcache,
2eb4d78b 511 gdbarch_fp0_regnum (gdbarch) + regi,
3e8c568d 512 reg_ptr);
d37eb719
DJ		 513 }
514 else
515 for (regi = 0; regi < 32; regi++)
3e8c568d 516 regcache_raw_supply (regcache,
2eb4d78b 517 gdbarch_fp0_regnum (gdbarch) + regi,
7d266584 518 (const char *) (*fpregsetp + regi));
d37eb719 519
2eb4d78b 520 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
7d266584 521 (const gdb_byte *) (*fpregsetp + 32));
d37eb719
DJ		 522
523 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
524 include it - but the result of PTRACE_GETFPREGS does. The best we
525 can do is to assume that its value is present. */
28f5035f 526 supply_32bit_reg (regcache,
2eb4d78b 527 mips_regnum (gdbarch)->fp_implementation_revision,
7d266584 528 (const gdb_byte *) (*fpregsetp + 32) + 4);
96f026fc
KB		 529}
530
50e8a0d5
HZ		 531static void
532mips64_supply_fpregset_wrapper (const struct regset *regset,
7d266584
MR		 533 struct regcache *regcache,
534 int regnum, const void *gregs, size_t len)
50e8a0d5
HZ		 535{
536 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
537
538 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
539}
540
96f026fc
KB		 541/* Likewise, pack one or all floating point registers into an
542 elf_fpregset_t. */
543
d37eb719 544void
28f5035f
UW		 545mips64_fill_fpregset (const struct regcache *regcache,
546 mips64_elf_fpregset_t *fpregsetp, int regno)
96f026fc 547{
2eb4d78b 548 struct gdbarch *gdbarch = get_regcache_arch (regcache);
e17a4113 549 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d37eb719 550 gdb_byte *to;
96f026fc 551
2eb4d78b
UW		 552 if ((regno >= gdbarch_fp0_regnum (gdbarch))
553 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
96f026fc 554 {
d37eb719
DJ		 555 /* See mips_linux_o32_sigframe_init for a description of the
556 peculiar FP register layout. */
2eb4d78b 557 if (register_size (gdbarch, regno) == 4)
d37eb719 558 {
2eb4d78b 559 int regi = regno - gdbarch_fp0_regnum (gdbarch);
d37eb719
DJ		 560
561 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
2eb4d78b 562 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
d37eb719 563 to += 4;
28f5035f 564 regcache_raw_collect (regcache, regno, to);
d37eb719
DJ		 565 }
566 else
567 {
025bb325
MS		 568 to = (gdb_byte *) (*fpregsetp + regno
569 - gdbarch_fp0_regnum (gdbarch));
28f5035f 570 regcache_raw_collect (regcache, regno, to);
d37eb719 571 }
96f026fc 572 }
2eb4d78b 573 else if (regno == mips_regnum (gdbarch)->fp_control_status)
96f026fc 574 {
d37eb719
DJ		 575 gdb_byte buf[MAX_REGISTER_SIZE];
576 LONGEST val;
577
28f5035f 578 regcache_raw_collect (regcache, regno, buf);
e17a4113
UW		 579 val = extract_signed_integer (buf, register_size (gdbarch, regno),
580 byte_order);
d37eb719 581 to = (gdb_byte *) (*fpregsetp + 32);
e17a4113 582 store_signed_integer (to, 4, byte_order, val);
d37eb719 583 }
2eb4d78b 584 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
d37eb719
DJ		 585 {
586 gdb_byte buf[MAX_REGISTER_SIZE];
587 LONGEST val;
588
28f5035f 589 regcache_raw_collect (regcache, regno, buf);
e17a4113
UW		 590 val = extract_signed_integer (buf, register_size (gdbarch, regno),
591 byte_order);
d37eb719 592 to = (gdb_byte *) (*fpregsetp + 32) + 4;
e17a4113 593 store_signed_integer (to, 4, byte_order, val);
96f026fc
KB		 594 }
595 else if (regno == -1)
596 {
597 int regi;
598
599 for (regi = 0; regi < 32; regi++)
3e8c568d 600 mips64_fill_fpregset (regcache, fpregsetp,
2eb4d78b 601 gdbarch_fp0_regnum (gdbarch) + regi);
28f5035f 602 mips64_fill_fpregset (regcache, fpregsetp,
2eb4d78b 603 mips_regnum (gdbarch)->fp_control_status);
28f5035f 604 mips64_fill_fpregset (regcache, fpregsetp,
7d266584 605 mips_regnum (gdbarch)->fp_implementation_revision);
96f026fc
KB		 606 }
607}
608
50e8a0d5
HZ		 609static void
610mips64_fill_fpregset_wrapper (const struct regset *regset,
611 const struct regcache *regcache,
612 int regnum, void *gregs, size_t len)
613{
614 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
96f026fc 615
50e8a0d5
HZ		 616 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
617}
2aa830e4 618
b7195f27
AA		 619static const struct regset mips_linux_gregset =
620 {
621 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
622 };
623
624static const struct regset mips64_linux_gregset =
625 {
626 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
627 };
628
629static const struct regset mips_linux_fpregset =
630 {
631 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper
632 };
633
634static const struct regset mips64_linux_fpregset =
635 {
636 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
637 };
638
d4036235
AA		 639static void
640mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
641 iterate_over_regset_sections_cb *cb,
642 void *cb_data,
643 const struct regcache *regcache)
2aa830e4 644{
d4036235 645 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
2aa830e4 646 {
d4036235
AA		 647 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset,
648 NULL, cb_data);
649 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset,
650 NULL, cb_data);
2aa830e4 651 }
d4036235 652 else
2aa830e4 653 {
d4036235
AA		 654 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset,
655 NULL, cb_data);
656 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
657 NULL, cb_data);
2aa830e4 658 }
50e8a0d5 659}
2aa830e4 660
4eb0ad19
DJ		 661static const struct target_desc *
662mips_linux_core_read_description (struct gdbarch *gdbarch,
663 struct target_ops *target,
664 bfd *abfd)
665{
666 asection *section = bfd_get_section_by_name (abfd, ".reg");
667 if (! section)
668 return NULL;
669
670 switch (bfd_section_size (abfd, section))
671 {
672 case sizeof (mips_elf_gregset_t):
673 return mips_tdesc_gp32;
674
675 case sizeof (mips64_elf_gregset_t):
676 return mips_tdesc_gp64;
677
678 default:
679 return NULL;
680 }
681}
682
96f026fc 683
295093a4 684/* Check the code at PC for a dynamic linker lazy resolution stub.
3e5d3a5a
MR		 685 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
686 section uniformly since version 2.15. If the pc is in that section,
687 then we are in such a stub. Before that ".stub" was used in 32-bit
688 ELF binaries, however we do not bother checking for that since we
689 have never had and that case should be extremely rare these days.
690 Instead we pattern-match on the code generated by GNU ld. They look
691 like this:
6de918a6
DJ		 692
693 lw t9,0x8010(gp)
694 addu t7,ra
695 jalr t9,ra
696 addiu t8,zero,INDEX
697
3e5d3a5a
MR		 698 (with the appropriate doubleword instructions for N64). As any lazy
699 resolution stubs in microMIPS binaries will always be in a
700 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
6de918a6
DJ		 701
702static int
3e5d3a5a 703mips_linux_in_dynsym_stub (CORE_ADDR pc)
6de918a6 704{
e362b510 705 gdb_byte buf[28], *p;
6de918a6 706 ULONGEST insn, insn1;
f5656ead
TT		 707 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
708 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
6de918a6 709
3e5d3a5a
MR		 710 if (in_mips_stubs_section (pc))
711 return 1;
712
6de918a6
DJ		 713 read_memory (pc - 12, buf, 28);
714
715 if (n64)
716 {
717 /* ld t9,0x8010(gp) */
718 insn1 = 0xdf998010;
719 }
720 else
721 {
722 /* lw t9,0x8010(gp) */
723 insn1 = 0x8f998010;
724 }
725
726 p = buf + 12;
727 while (p >= buf)
728 {
e17a4113 729 insn = extract_unsigned_integer (p, 4, byte_order);
6de918a6
DJ		 730 if (insn == insn1)
731 break;
732 p -= 4;
733 }
734 if (p < buf)
735 return 0;
736
e17a4113 737 insn = extract_unsigned_integer (p + 4, 4, byte_order);
6de918a6
DJ		 738 if (n64)
739 {
740 /* daddu t7,ra */
741 if (insn != 0x03e0782d)
742 return 0;
743 }
744 else
745 {
746 /* addu t7,ra */
747 if (insn != 0x03e07821)
748 return 0;
749 }
295093a4 750
e17a4113 751 insn = extract_unsigned_integer (p + 8, 4, byte_order);
6de918a6
DJ		 752 /* jalr t9,ra */
753 if (insn != 0x0320f809)
754 return 0;
755
e17a4113 756 insn = extract_unsigned_integer (p + 12, 4, byte_order);
6de918a6
DJ		 757 if (n64)
758 {
759 /* daddiu t8,zero,0 */
760 if ((insn & 0xffff0000) != 0x64180000)
761 return 0;
762 }
763 else
764 {
765 /* addiu t8,zero,0 */
766 if ((insn & 0xffff0000) != 0x24180000)
767 return 0;
768 }
769
3e5d3a5a 770 return 1;
6de918a6
DJ		 771}
772
295093a4 773/* Return non-zero iff PC belongs to the dynamic linker resolution
db5f024e 774 code, a PLT entry, or a lazy binding stub. */
6de918a6 775
7d522c90 776static int
6de918a6
DJ		 777mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
778{
295093a4 779 /* Check whether PC is in the dynamic linker. This also checks
db5f024e 780 whether it is in the .plt section, used by non-PIC executables. */
7d522c90 781 if (svr4_in_dynsym_resolve_code (pc))
6de918a6
DJ		 782 return 1;
783
3e5d3a5a
MR		 784 /* Likewise for the stubs. They live in the .MIPS.stubs section these
785 days, so we check if the PC is within, than fall back to a pattern
786 match. */
787 if (mips_linux_in_dynsym_stub (pc))
6de918a6
DJ		 788 return 1;
789
790 return 0;
791}
792
793/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
794 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
795 implementation of this triggers at "fixup" from the same objfile as
c4c5b7ba 796 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
db5f024e
DJ		 797 "__dl_runtime_resolve" directly. An unresolved lazy binding
798 stub will point to _dl_runtime_resolve, which will first call
c4c5b7ba
AC		 799 __dl_runtime_resolve, and then pass control to the resolved
800 function. */
6de918a6
DJ		 801
802static CORE_ADDR
803mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
804{
3b7344d5 805 struct bound_minimal_symbol resolver;
6de918a6
DJ		 806
807 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
808
77e371c0 809 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
c7ce8faa 810 return frame_unwind_caller_pc (get_current_frame ());
6de918a6 811
db5f024e 812 return glibc_skip_solib_resolver (gdbarch, pc);
295093a4 813}
6de918a6 814
5792a79b
DJ		 815/* Signal trampoline support. There are four supported layouts for a
816 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
817 n64 rt_sigframe. We handle them all independently; not the most
818 efficient way, but simplest. First, declare all the unwinders. */
819
820static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
b8a22b94 821 struct frame_info *this_frame,
5792a79b
DJ		 822 struct trad_frame_cache *this_cache,
823 CORE_ADDR func);
824
825static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
b8a22b94 826 struct frame_info *this_frame,
5792a79b
DJ		 827 struct trad_frame_cache *this_cache,
828 CORE_ADDR func);
829
858339f2
MR		 830static int mips_linux_sigframe_validate (const struct tramp_frame *self,
831 struct frame_info *this_frame,
832 CORE_ADDR *pc);
833
834static int micromips_linux_sigframe_validate (const struct tramp_frame *self,
835 struct frame_info *this_frame,
836 CORE_ADDR *pc);
837
5792a79b
DJ		 838#define MIPS_NR_LINUX 4000
839#define MIPS_NR_N64_LINUX 5000
840#define MIPS_NR_N32_LINUX 6000
841
842#define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
843#define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
844#define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
845#define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
846
847#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
848#define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
849#define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
850#define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
851#define MIPS_INST_SYSCALL 0x0000000c
852
858339f2
MR		 853#define MICROMIPS_INST_LI_V0 0x3040
854#define MICROMIPS_INST_POOL32A 0x0000
855#define MICROMIPS_INST_SYSCALL 0x8b7c
856
2cd8546d
AC		 857static const struct tramp_frame mips_linux_o32_sigframe = {
858 SIGTRAMP_FRAME,
5792a79b 859 4,
2cd8546d
AC		 860 {
861 { MIPS_INST_LI_V0_SIGRETURN, -1 },
862 { MIPS_INST_SYSCALL, -1 },
863 { TRAMP_SENTINEL_INSN, -1 }
864 },
858339f2
MR		 865 mips_linux_o32_sigframe_init,
866 mips_linux_sigframe_validate
5792a79b
DJ		 867};
868
2cd8546d
AC		 869static const struct tramp_frame mips_linux_o32_rt_sigframe = {
870 SIGTRAMP_FRAME,
5792a79b 871 4,
2cd8546d
AC		 872 {
873 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
874 { MIPS_INST_SYSCALL, -1 },
875 { TRAMP_SENTINEL_INSN, -1 } },
858339f2
MR		 876 mips_linux_o32_sigframe_init,
877 mips_linux_sigframe_validate
5792a79b
DJ		 878};
879
2cd8546d
AC		 880static const struct tramp_frame mips_linux_n32_rt_sigframe = {
881 SIGTRAMP_FRAME,
5792a79b 882 4,
2cd8546d
AC		 883 {
884 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
885 { MIPS_INST_SYSCALL, -1 },
886 { TRAMP_SENTINEL_INSN, -1 }
887 },
858339f2
MR		 888 mips_linux_n32n64_sigframe_init,
889 mips_linux_sigframe_validate
5792a79b
DJ		 890};
891
2cd8546d
AC		 892static const struct tramp_frame mips_linux_n64_rt_sigframe = {
893 SIGTRAMP_FRAME,
5792a79b 894 4,
fcbd8a5c
TS		 895 {
896 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
897 { MIPS_INST_SYSCALL, -1 },
898 { TRAMP_SENTINEL_INSN, -1 }
899 },
858339f2
MR		 900 mips_linux_n32n64_sigframe_init,
901 mips_linux_sigframe_validate
902};
903
904static const struct tramp_frame micromips_linux_o32_sigframe = {
905 SIGTRAMP_FRAME,
906 2,
907 {
908 { MICROMIPS_INST_LI_V0, -1 },
909 { MIPS_NR_sigreturn, -1 },
910 { MICROMIPS_INST_POOL32A, -1 },
911 { MICROMIPS_INST_SYSCALL, -1 },
912 { TRAMP_SENTINEL_INSN, -1 }
913 },
914 mips_linux_o32_sigframe_init,
915 micromips_linux_sigframe_validate
916};
917
918static const struct tramp_frame micromips_linux_o32_rt_sigframe = {
919 SIGTRAMP_FRAME,
920 2,
921 {
922 { MICROMIPS_INST_LI_V0, -1 },
923 { MIPS_NR_rt_sigreturn, -1 },
924 { MICROMIPS_INST_POOL32A, -1 },
925 { MICROMIPS_INST_SYSCALL, -1 },
926 { TRAMP_SENTINEL_INSN, -1 }
927 },
928 mips_linux_o32_sigframe_init,
929 micromips_linux_sigframe_validate
930};
931
932static const struct tramp_frame micromips_linux_n32_rt_sigframe = {
933 SIGTRAMP_FRAME,
934 2,
935 {
936 { MICROMIPS_INST_LI_V0, -1 },
937 { MIPS_NR_N32_rt_sigreturn, -1 },
938 { MICROMIPS_INST_POOL32A, -1 },
939 { MICROMIPS_INST_SYSCALL, -1 },
940 { TRAMP_SENTINEL_INSN, -1 }
941 },
942 mips_linux_n32n64_sigframe_init,
943 micromips_linux_sigframe_validate
944};
945
946static const struct tramp_frame micromips_linux_n64_rt_sigframe = {
947 SIGTRAMP_FRAME,
948 2,
949 {
950 { MICROMIPS_INST_LI_V0, -1 },
951 { MIPS_NR_N64_rt_sigreturn, -1 },
952 { MICROMIPS_INST_POOL32A, -1 },
953 { MICROMIPS_INST_SYSCALL, -1 },
954 { TRAMP_SENTINEL_INSN, -1 }
955 },
956 mips_linux_n32n64_sigframe_init,
957 micromips_linux_sigframe_validate
5792a79b
DJ		 958};
959
960/* *INDENT-OFF* */
961/* The unwinder for o32 signal frames. The legacy structures look
962 like this:
963
964 struct sigframe {
965 u32 sf_ass[4]; [argument save space for o32]
eb195664 966 u32 sf_code[2]; [signal trampoline or fill]
5792a79b
DJ		 967 struct sigcontext sf_sc;
968 sigset_t sf_mask;
969 };
970
d0e64392
MR		 971 Pre-2.6.12 sigcontext:
972
5792a79b
DJ		 973 struct sigcontext {
974 unsigned int sc_regmask; [Unused]
975 unsigned int sc_status;
976 unsigned long long sc_pc;
977 unsigned long long sc_regs[32];
978 unsigned long long sc_fpregs[32];
979 unsigned int sc_ownedfp;
980 unsigned int sc_fpc_csr;
981 unsigned int sc_fpc_eir; [Unused]
982 unsigned int sc_used_math;
983 unsigned int sc_ssflags; [Unused]
984 [Alignment hole of four bytes]
985 unsigned long long sc_mdhi;
986 unsigned long long sc_mdlo;
987
988 unsigned int sc_cause; [Unused]
989 unsigned int sc_badvaddr; [Unused]
990
991 unsigned long sc_sigset[4]; [kernel's sigset_t]
992 };
993
d0e64392
MR		 994 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
995
996 struct sigcontext {
997 unsigned int sc_regmask; [Unused]
998 unsigned int sc_status; [Unused]
999 unsigned long long sc_pc;
1000 unsigned long long sc_regs[32];
1001 unsigned long long sc_fpregs[32];
1002 unsigned int sc_acx;
1003 unsigned int sc_fpc_csr;
1004 unsigned int sc_fpc_eir; [Unused]
1005 unsigned int sc_used_math;
1006 unsigned int sc_dsp;
1007 [Alignment hole of four bytes]
1008 unsigned long long sc_mdhi;
1009 unsigned long long sc_mdlo;
1010 unsigned long sc_hi1;
1011 unsigned long sc_lo1;
1012 unsigned long sc_hi2;
1013 unsigned long sc_lo2;
1014 unsigned long sc_hi3;
1015 unsigned long sc_lo3;
1016 };
1017
5792a79b
DJ		 1018 The RT signal frames look like this:
1019
1020 struct rt_sigframe {
1021 u32 rs_ass[4]; [argument save space for o32]
eb195664 1022 u32 rs_code[2] [signal trampoline or fill]
5792a79b
DJ		 1023 struct siginfo rs_info;
1024 struct ucontext rs_uc;
1025 };
1026
1027 struct ucontext {
1028 unsigned long uc_flags;
1029 struct ucontext *uc_link;
1030 stack_t uc_stack;
1031 [Alignment hole of four bytes]
1032 struct sigcontext uc_mcontext;
1033 sigset_t uc_sigmask;
1034 }; */
1035/* *INDENT-ON* */
1036
5792a79b
DJ		 1037#define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
1038
1039#define RTSIGFRAME_SIGINFO_SIZE 128
1040#define STACK_T_SIZE (3 * 4)
1041#define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
1042#define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1043 + RTSIGFRAME_SIGINFO_SIZE \
1044 + UCONTEXT_SIGCONTEXT_OFFSET)
1045
1046#define SIGCONTEXT_PC (1 * 8)
1047#define SIGCONTEXT_REGS (2 * 8)
1048#define SIGCONTEXT_FPREGS (34 * 8)
1049#define SIGCONTEXT_FPCSR (66 * 8 + 4)
d0e64392 1050#define SIGCONTEXT_DSPCTL (68 * 8 + 0)
5792a79b
DJ		 1051#define SIGCONTEXT_HI (69 * 8)
1052#define SIGCONTEXT_LO (70 * 8)
1053#define SIGCONTEXT_CAUSE (71 * 8 + 0)
1054#define SIGCONTEXT_BADVADDR (71 * 8 + 4)
d0e64392
MR		 1055#define SIGCONTEXT_HI1 (71 * 8 + 0)
1056#define SIGCONTEXT_LO1 (71 * 8 + 4)
1057#define SIGCONTEXT_HI2 (72 * 8 + 0)
1058#define SIGCONTEXT_LO2 (72 * 8 + 4)
1059#define SIGCONTEXT_HI3 (73 * 8 + 0)
1060#define SIGCONTEXT_LO3 (73 * 8 + 4)
5792a79b
DJ		 1061
1062#define SIGCONTEXT_REG_SIZE 8
1063
1064static void
1065mips_linux_o32_sigframe_init (const struct tramp_frame *self,
b8a22b94 1066 struct frame_info *this_frame,
5792a79b
DJ		 1067 struct trad_frame_cache *this_cache,
1068 CORE_ADDR func)
1069{
b8a22b94 1070 struct gdbarch *gdbarch = get_frame_arch (this_frame);
22e048c9 1071 int ireg;
eb195664
DD		 1072 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1073 CORE_ADDR sigcontext_base;
2eb4d78b 1074 const struct mips_regnum *regs = mips_regnum (gdbarch);
37c4d197 1075 CORE_ADDR regs_base;
5792a79b 1076
858339f2
MR		 1077 if (self == &mips_linux_o32_sigframe
1078 || self == &micromips_linux_o32_sigframe)
eb195664 1079 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
5792a79b 1080 else
eb195664 1081 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
295093a4
MS		 1082
1083 /* I'm not proud of this hack. Eventually we will have the
1084 infrastructure to indicate the size of saved registers on a
1085 per-frame basis, but right now we don't; the kernel saves eight
37c4d197
DJ		 1086 bytes but we only want four. Use regs_base to access any
1087 64-bit fields. */
2eb4d78b 1088 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
37c4d197
DJ		 1089 regs_base = sigcontext_base + 4;
1090 else
1091 regs_base = sigcontext_base;
5792a79b 1092
2eb4d78b 1093 if (mips_linux_restart_reg_p (gdbarch))
822b6570
DJ		 1094 trad_frame_set_reg_addr (this_cache,
1095 (MIPS_RESTART_REGNUM
2eb4d78b 1096 + gdbarch_num_regs (gdbarch)),
822b6570 1097 regs_base + SIGCONTEXT_REGS);
5792a79b
DJ		 1098
1099 for (ireg = 1; ireg < 32; ireg++)
295093a4 1100 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1101 (ireg + MIPS_ZERO_REGNUM
1102 + gdbarch_num_regs (gdbarch)),
1103 (regs_base + SIGCONTEXT_REGS
1104 + ireg * SIGCONTEXT_REG_SIZE));
5792a79b 1105
37c4d197
DJ		 1106 /* The way that floating point registers are saved, unfortunately,
1107 depends on the architecture the kernel is built for. For the r3000 and
1108 tx39, four bytes of each register are at the beginning of each of the
1109 32 eight byte slots. For everything else, the registers are saved
1110 using double precision; only the even-numbered slots are initialized,
1111 and the high bits are the odd-numbered register. Assume the latter
1112 layout, since we can't tell, and it's much more common. Which bits are
1113 the "high" bits depends on endianness. */
5792a79b 1114 for (ireg = 0; ireg < 32; ireg++)
2eb4d78b 1115 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
f57d151a 1116 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1117 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1118 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1119 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
37c4d197 1120 else
f57d151a 1121 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1122 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1123 (sigcontext_base + SIGCONTEXT_FPREGS
1124 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
5792a79b 1125
f57d151a 1126 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1127 regs->pc + gdbarch_num_regs (gdbarch),
37c4d197 1128 regs_base + SIGCONTEXT_PC);
5792a79b 1129
295093a4 1130 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1131 (regs->fp_control_status
1132 + gdbarch_num_regs (gdbarch)),
5792a79b 1133 sigcontext_base + SIGCONTEXT_FPCSR);
d0e64392
MR		 1134
1135 if (regs->dspctl != -1)
1136 trad_frame_set_reg_addr (this_cache,
1137 regs->dspctl + gdbarch_num_regs (gdbarch),
1138 sigcontext_base + SIGCONTEXT_DSPCTL);
1139
f57d151a 1140 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1141 regs->hi + gdbarch_num_regs (gdbarch),
37c4d197 1142 regs_base + SIGCONTEXT_HI);
f57d151a 1143 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1144 regs->lo + gdbarch_num_regs (gdbarch),
37c4d197 1145 regs_base + SIGCONTEXT_LO);
d0e64392
MR		 1146
1147 if (regs->dspacc != -1)
1148 {
1149 trad_frame_set_reg_addr (this_cache,
1150 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1151 sigcontext_base + SIGCONTEXT_HI1);
1152 trad_frame_set_reg_addr (this_cache,
1153 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1154 sigcontext_base + SIGCONTEXT_LO1);
1155 trad_frame_set_reg_addr (this_cache,
1156 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1157 sigcontext_base + SIGCONTEXT_HI2);
1158 trad_frame_set_reg_addr (this_cache,
1159 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1160 sigcontext_base + SIGCONTEXT_LO2);
1161 trad_frame_set_reg_addr (this_cache,
1162 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1163 sigcontext_base + SIGCONTEXT_HI3);
1164 trad_frame_set_reg_addr (this_cache,
1165 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1166 sigcontext_base + SIGCONTEXT_LO3);
1167 }
1168 else
1169 {
1170 trad_frame_set_reg_addr (this_cache,
1171 regs->cause + gdbarch_num_regs (gdbarch),
1172 sigcontext_base + SIGCONTEXT_CAUSE);
1173 trad_frame_set_reg_addr (this_cache,
1174 regs->badvaddr + gdbarch_num_regs (gdbarch),
1175 sigcontext_base + SIGCONTEXT_BADVADDR);
1176 }
5792a79b
DJ		 1177
1178 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
eb195664 1179 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
5792a79b
DJ		 1180}
1181
1182/* *INDENT-OFF* */
1183/* For N32/N64 things look different. There is no non-rt signal frame.
1184
1185 struct rt_sigframe_n32 {
1186 u32 rs_ass[4]; [ argument save space for o32 ]
eb195664 1187 u32 rs_code[2]; [ signal trampoline or fill ]
5792a79b
DJ		 1188 struct siginfo rs_info;
1189 struct ucontextn32 rs_uc;
1190 };
1191
1192 struct ucontextn32 {
1193 u32 uc_flags;
1194 s32 uc_link;
1195 stack32_t uc_stack;
1196 struct sigcontext uc_mcontext;
1197 sigset_t uc_sigmask; [ mask last for extensibility ]
1198 };
295093a4 1199
e741f4d4 1200 struct rt_sigframe {
5792a79b
DJ		 1201 u32 rs_ass[4]; [ argument save space for o32 ]
1202 u32 rs_code[2]; [ signal trampoline ]
1203 struct siginfo rs_info;
1204 struct ucontext rs_uc;
1205 };
1206
1207 struct ucontext {
1208 unsigned long uc_flags;
1209 struct ucontext *uc_link;
1210 stack_t uc_stack;
1211 struct sigcontext uc_mcontext;
1212 sigset_t uc_sigmask; [ mask last for extensibility ]
1213 };
1214
1215 And the sigcontext is different (this is for both n32 and n64):
1216
1217 struct sigcontext {
1218 unsigned long long sc_regs[32];
1219 unsigned long long sc_fpregs[32];
1220 unsigned long long sc_mdhi;
e741f4d4
DJ		 1221 unsigned long long sc_hi1;
1222 unsigned long long sc_hi2;
1223 unsigned long long sc_hi3;
5792a79b 1224 unsigned long long sc_mdlo;
e741f4d4
DJ		 1225 unsigned long long sc_lo1;
1226 unsigned long long sc_lo2;
1227 unsigned long long sc_lo3;
5792a79b 1228 unsigned long long sc_pc;
5792a79b 1229 unsigned int sc_fpc_csr;
5792a79b 1230 unsigned int sc_used_math;
e741f4d4
DJ		 1231 unsigned int sc_dsp;
1232 unsigned int sc_reserved;
1233 };
1234
1235 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1236 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1237 included too. */
5792a79b
DJ		 1238/* *INDENT-ON* */
1239
1240#define N32_STACK_T_SIZE STACK_T_SIZE
1241#define N64_STACK_T_SIZE (2 * 8 + 4)
1242#define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1243#define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1244#define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1245 + RTSIGFRAME_SIGINFO_SIZE \
1246 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1247#define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1248 + RTSIGFRAME_SIGINFO_SIZE \
1249 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1250
1251#define N64_SIGCONTEXT_REGS (0 * 8)
1252#define N64_SIGCONTEXT_FPREGS (32 * 8)
1253#define N64_SIGCONTEXT_HI (64 * 8)
d0e64392
MR		 1254#define N64_SIGCONTEXT_HI1 (65 * 8)
1255#define N64_SIGCONTEXT_HI2 (66 * 8)
1256#define N64_SIGCONTEXT_HI3 (67 * 8)
e741f4d4 1257#define N64_SIGCONTEXT_LO (68 * 8)
d0e64392
MR		 1258#define N64_SIGCONTEXT_LO1 (69 * 8)
1259#define N64_SIGCONTEXT_LO2 (70 * 8)
1260#define N64_SIGCONTEXT_LO3 (71 * 8)
e741f4d4 1261#define N64_SIGCONTEXT_PC (72 * 8)
d0e64392
MR		 1262#define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1263#define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
5792a79b
DJ		 1264
1265#define N64_SIGCONTEXT_REG_SIZE 8
295093a4 1266
5792a79b
DJ		 1267static void
1268mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
b8a22b94 1269 struct frame_info *this_frame,
5792a79b
DJ		 1270 struct trad_frame_cache *this_cache,
1271 CORE_ADDR func)
1272{
b8a22b94 1273 struct gdbarch *gdbarch = get_frame_arch (this_frame);
22e048c9 1274 int ireg;
eb195664
DD		 1275 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1276 CORE_ADDR sigcontext_base;
2eb4d78b 1277 const struct mips_regnum *regs = mips_regnum (gdbarch);
5792a79b 1278
858339f2
MR		 1279 if (self == &mips_linux_n32_rt_sigframe
1280 || self == &micromips_linux_n32_rt_sigframe)
eb195664 1281 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
5792a79b 1282 else
eb195664 1283 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
295093a4 1284
2eb4d78b 1285 if (mips_linux_restart_reg_p (gdbarch))
822b6570
DJ		 1286 trad_frame_set_reg_addr (this_cache,
1287 (MIPS_RESTART_REGNUM
2eb4d78b 1288 + gdbarch_num_regs (gdbarch)),
822b6570 1289 sigcontext_base + N64_SIGCONTEXT_REGS);
5792a79b
DJ		 1290
1291 for (ireg = 1; ireg < 32; ireg++)
295093a4 1292 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1293 (ireg + MIPS_ZERO_REGNUM
1294 + gdbarch_num_regs (gdbarch)),
1295 (sigcontext_base + N64_SIGCONTEXT_REGS
1296 + ireg * N64_SIGCONTEXT_REG_SIZE));
5792a79b
DJ		 1297
1298 for (ireg = 0; ireg < 32; ireg++)
f57d151a 1299 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1300 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1301 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1302 + ireg * N64_SIGCONTEXT_REG_SIZE));
5792a79b 1303
f57d151a 1304 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1305 regs->pc + gdbarch_num_regs (gdbarch),
5792a79b
DJ		 1306 sigcontext_base + N64_SIGCONTEXT_PC);
1307
295093a4 1308 trad_frame_set_reg_addr (this_cache,
7d266584
MR		 1309 (regs->fp_control_status
1310 + gdbarch_num_regs (gdbarch)),
5792a79b 1311 sigcontext_base + N64_SIGCONTEXT_FPCSR);
d0e64392 1312
f57d151a 1313 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1314 regs->hi + gdbarch_num_regs (gdbarch),
5792a79b 1315 sigcontext_base + N64_SIGCONTEXT_HI);
f57d151a 1316 trad_frame_set_reg_addr (this_cache,
2eb4d78b 1317 regs->lo + gdbarch_num_regs (gdbarch),
5792a79b 1318 sigcontext_base + N64_SIGCONTEXT_LO);
5792a79b 1319
d0e64392
MR		 1320 if (regs->dspacc != -1)
1321 {
1322 trad_frame_set_reg_addr (this_cache,
1323 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1324 sigcontext_base + N64_SIGCONTEXT_HI1);
1325 trad_frame_set_reg_addr (this_cache,
1326 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1327 sigcontext_base + N64_SIGCONTEXT_LO1);
1328 trad_frame_set_reg_addr (this_cache,
1329 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1330 sigcontext_base + N64_SIGCONTEXT_HI2);
1331 trad_frame_set_reg_addr (this_cache,
1332 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1333 sigcontext_base + N64_SIGCONTEXT_LO2);
1334 trad_frame_set_reg_addr (this_cache,
1335 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1336 sigcontext_base + N64_SIGCONTEXT_HI3);
1337 trad_frame_set_reg_addr (this_cache,
1338 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1339 sigcontext_base + N64_SIGCONTEXT_LO3);
1340 }
1341 if (regs->dspctl != -1)
1342 trad_frame_set_reg_addr (this_cache,
1343 regs->dspctl + gdbarch_num_regs (gdbarch),
1344 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1345
5792a79b 1346 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
eb195664 1347 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
5792a79b
DJ		 1348}
1349
858339f2
MR		 1350/* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1351
1352static int
1353mips_linux_sigframe_validate (const struct tramp_frame *self,
1354 struct frame_info *this_frame,
1355 CORE_ADDR *pc)
1356{
1357 return mips_pc_is_mips (*pc);
1358}
1359
1360/* Implement struct tramp_frame's "validate" method for microMIPS code. */
1361
1362static int
1363micromips_linux_sigframe_validate (const struct tramp_frame *self,
1364 struct frame_info *this_frame,
1365 CORE_ADDR *pc)
1366{
3e29f34a
MR		 1367 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc))
1368 {
1369 *pc = mips_unmake_compact_addr (*pc);
1370 return 1;
1371 }
1372 else
1373 return 0;
858339f2
MR		 1374}
1375
5a439849
MR		 1376/* Implement the "write_pc" gdbarch method. */
1377
822b6570 1378static void
61a1198a 1379mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
822b6570 1380{
2eb4d78b 1381 struct gdbarch *gdbarch = get_regcache_arch (regcache);
5a439849
MR		 1382
1383 mips_write_pc (regcache, pc);
822b6570
DJ		 1384
1385 /* Clear the syscall restart flag. */
2eb4d78b 1386 if (mips_linux_restart_reg_p (gdbarch))
61a1198a 1387 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
822b6570
DJ		 1388}
1389
1390/* Return 1 if MIPS_RESTART_REGNUM is usable. */
1391
1392int
1393mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1394{
1395 /* If we do not have a target description with registers, then
1396 MIPS_RESTART_REGNUM will not be included in the register set. */
1397 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1398 return 0;
1399
1400 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1401 either be GPR-sized or missing. */
1402 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1403}
9f62d0e2 1404
e38d4e1a
DJ		 1405/* When FRAME is at a syscall instruction, return the PC of the next
1406 instruction to be executed. */
1407
63807e1d 1408static CORE_ADDR
e38d4e1a
DJ		 1409mips_linux_syscall_next_pc (struct frame_info *frame)
1410{
1411 CORE_ADDR pc = get_frame_pc (frame);
1412 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1413
1414 /* If we are about to make a sigreturn syscall, use the unwinder to
1415 decode the signal frame. */
1416 if (v0 == MIPS_NR_sigreturn
1417 || v0 == MIPS_NR_rt_sigreturn
1418 || v0 == MIPS_NR_N64_rt_sigreturn
1419 || v0 == MIPS_NR_N32_rt_sigreturn)
c7ce8faa 1420 return frame_unwind_caller_pc (get_current_frame ());
e38d4e1a
DJ		 1421
1422 return pc + 4;
1423}
1424
385203ed
DD		 1425/* Return the current system call's number present in the
1426 v0 register. When the function fails, it returns -1. */
1427
1428static LONGEST
1429mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1430 ptid_t ptid)
1431{
1432 struct regcache *regcache = get_thread_regcache (ptid);
1433 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1434 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1435 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1436 /* The content of a register */
1437 gdb_byte buf[8];
1438 /* The result */
1439 LONGEST ret;
1440
1441 /* Make sure we're in a known ABI */
1442 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1443 || tdep->mips_abi == MIPS_ABI_N32
1444 || tdep->mips_abi == MIPS_ABI_N64);
1445
1446 gdb_assert (regsize <= sizeof (buf));
1447
1448 /* Getting the system call number from the register.
1449 syscall number is in v0 or $2. */
1450 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1451
1452 ret = extract_signed_integer (buf, regsize, byte_order);
1453
1454 return ret;
1455}
1456
eb14d406
SDJ		 1457/* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1458 gdbarch.h. */
1459
1460static int
1461mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1462 enum gdb_signal signal)
1463{
1464 switch (signal)
1465 {
1466 case GDB_SIGNAL_EMT:
1467 return MIPS_LINUX_SIGEMT;
1468
1469 case GDB_SIGNAL_BUS:
1470 return MIPS_LINUX_SIGBUS;
1471
1472 case GDB_SIGNAL_SYS:
1473 return MIPS_LINUX_SIGSYS;
1474
1475 case GDB_SIGNAL_USR1:
1476 return MIPS_LINUX_SIGUSR1;
1477
1478 case GDB_SIGNAL_USR2:
1479 return MIPS_LINUX_SIGUSR2;
1480
1481 case GDB_SIGNAL_CHLD:
1482 return MIPS_LINUX_SIGCHLD;
1483
1484 case GDB_SIGNAL_PWR:
1485 return MIPS_LINUX_SIGPWR;
1486
1487 case GDB_SIGNAL_WINCH:
1488 return MIPS_LINUX_SIGWINCH;
1489
1490 case GDB_SIGNAL_URG:
1491 return MIPS_LINUX_SIGURG;
1492
1493 case GDB_SIGNAL_IO:
1494 return MIPS_LINUX_SIGIO;
1495
1496 case GDB_SIGNAL_POLL:
1497 return MIPS_LINUX_SIGPOLL;
1498
1499 case GDB_SIGNAL_STOP:
1500 return MIPS_LINUX_SIGSTOP;
1501
1502 case GDB_SIGNAL_TSTP:
1503 return MIPS_LINUX_SIGTSTP;
1504
1505 case GDB_SIGNAL_CONT:
1506 return MIPS_LINUX_SIGCONT;
1507
1508 case GDB_SIGNAL_TTIN:
1509 return MIPS_LINUX_SIGTTIN;
1510
1511 case GDB_SIGNAL_TTOU:
1512 return MIPS_LINUX_SIGTTOU;
1513
1514 case GDB_SIGNAL_VTALRM:
1515 return MIPS_LINUX_SIGVTALRM;
1516
1517 case GDB_SIGNAL_PROF:
1518 return MIPS_LINUX_SIGPROF;
1519
1520 case GDB_SIGNAL_XCPU:
1521 return MIPS_LINUX_SIGXCPU;
1522
1523 case GDB_SIGNAL_XFSZ:
1524 return MIPS_LINUX_SIGXFSZ;
1525
1526 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1527 therefore we have to handle it here. */
1528 case GDB_SIGNAL_REALTIME_32:
1529 return MIPS_LINUX_SIGRTMIN;
1530 }
1531
1532 if (signal >= GDB_SIGNAL_REALTIME_33
1533 && signal <= GDB_SIGNAL_REALTIME_63)
1534 {
1535 int offset = signal - GDB_SIGNAL_REALTIME_33;
1536
1537 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1538 }
1539 else if (signal >= GDB_SIGNAL_REALTIME_64
1540 && signal <= GDB_SIGNAL_REALTIME_127)
1541 {
1542 int offset = signal - GDB_SIGNAL_REALTIME_64;
1543
1544 return MIPS_LINUX_SIGRT64 + offset;
1545 }
1546
1547 return linux_gdb_signal_to_target (gdbarch, signal);
1548}
1549
7d266584 1550/* Translate signals based on MIPS signal values.
232b8704
ME		 1551 Adapted from gdb/common/signals.c. */
1552
1553static enum gdb_signal
eb14d406 1554mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
232b8704 1555{
eb14d406 1556 switch (signal)
232b8704 1557 {
eb14d406 1558 case MIPS_LINUX_SIGEMT:
232b8704 1559 return GDB_SIGNAL_EMT;
eb14d406
SDJ		 1560
1561 case MIPS_LINUX_SIGBUS:
232b8704 1562 return GDB_SIGNAL_BUS;
eb14d406
SDJ		 1563
1564 case MIPS_LINUX_SIGSYS:
232b8704 1565 return GDB_SIGNAL_SYS;
eb14d406
SDJ		 1566
1567 case MIPS_LINUX_SIGUSR1:
232b8704 1568 return GDB_SIGNAL_USR1;
eb14d406
SDJ		 1569
1570 case MIPS_LINUX_SIGUSR2:
232b8704 1571 return GDB_SIGNAL_USR2;
eb14d406
SDJ		 1572
1573 case MIPS_LINUX_SIGCHLD:
232b8704 1574 return GDB_SIGNAL_CHLD;
eb14d406
SDJ		 1575
1576 case MIPS_LINUX_SIGPWR:
232b8704 1577 return GDB_SIGNAL_PWR;
eb14d406
SDJ		 1578
1579 case MIPS_LINUX_SIGWINCH:
232b8704 1580 return GDB_SIGNAL_WINCH;
eb14d406
SDJ		 1581
1582 case MIPS_LINUX_SIGURG:
232b8704 1583 return GDB_SIGNAL_URG;
eb14d406
SDJ		 1584
1585 /* No way to differentiate between SIGIO and SIGPOLL.
1586 Therefore, we just handle the first one. */
1587 case MIPS_LINUX_SIGIO:
1588 return GDB_SIGNAL_IO;
1589
1590 case MIPS_LINUX_SIGSTOP:
232b8704 1591 return GDB_SIGNAL_STOP;
eb14d406
SDJ		 1592
1593 case MIPS_LINUX_SIGTSTP:
232b8704 1594 return GDB_SIGNAL_TSTP;
eb14d406
SDJ		 1595
1596 case MIPS_LINUX_SIGCONT:
232b8704 1597 return GDB_SIGNAL_CONT;
eb14d406
SDJ		 1598
1599 case MIPS_LINUX_SIGTTIN:
232b8704 1600 return GDB_SIGNAL_TTIN;
eb14d406
SDJ		 1601
1602 case MIPS_LINUX_SIGTTOU:
232b8704 1603 return GDB_SIGNAL_TTOU;
eb14d406
SDJ		 1604
1605 case MIPS_LINUX_SIGVTALRM:
232b8704 1606 return GDB_SIGNAL_VTALRM;
eb14d406
SDJ		 1607
1608 case MIPS_LINUX_SIGPROF:
232b8704 1609 return GDB_SIGNAL_PROF;
eb14d406
SDJ		 1610
1611 case MIPS_LINUX_SIGXCPU:
232b8704 1612 return GDB_SIGNAL_XCPU;
eb14d406
SDJ		 1613
1614 case MIPS_LINUX_SIGXFSZ:
232b8704 1615 return GDB_SIGNAL_XFSZ;
eb14d406 1616 }
232b8704 1617
eb14d406 1618 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
232b8704
ME		 1619 {
1620 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1621 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
eb14d406
SDJ		 1622 int offset = signal - MIPS_LINUX_SIGRTMIN;
1623
1624 if (offset == 0)
232b8704 1625 return GDB_SIGNAL_REALTIME_32;
eb14d406
SDJ		 1626 else if (offset < 32)
1627 return (enum gdb_signal) (offset - 1
1628 + (int) GDB_SIGNAL_REALTIME_33);
232b8704 1629 else
eb14d406
SDJ		 1630 return (enum gdb_signal) (offset - 32
1631 + (int) GDB_SIGNAL_REALTIME_64);
232b8704
ME		 1632 }
1633
eb14d406 1634 return linux_gdb_signal_from_target (gdbarch, signal);
232b8704
ME		 1635}
1636
5792a79b
DJ		 1637/* Initialize one of the GNU/Linux OS ABIs. */
1638
19ed69dd 1639static void
295093a4
MS		 1640mips_linux_init_abi (struct gdbarch_info info,
1641 struct gdbarch *gdbarch)
19ed69dd 1642{
96f026fc
KB		 1643 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1644 enum mips_abi abi = mips_abi (gdbarch);
822b6570 1645 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
96f026fc 1646
a5ee0f0c
PA		 1647 linux_init_abi (info, gdbarch);
1648
385203ed
DD		 1649 /* Get the syscall number from the arch's register. */
1650 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1651
96f026fc
KB		 1652 switch (abi)
1653 {
1654 case MIPS_ABI_O32:
1655 set_gdbarch_get_longjmp_target (gdbarch,
7d266584 1656 mips_linux_get_longjmp_target);
96f026fc 1657 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1658 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
858339f2
MR		 1659 tramp_frame_prepend_unwinder (gdbarch, &micromips_linux_o32_sigframe);
1660 tramp_frame_prepend_unwinder (gdbarch,
1661 &micromips_linux_o32_rt_sigframe);
fb2be677
AC		 1662 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1663 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
458c8db8 1664 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
96f026fc
KB		 1665 break;
1666 case MIPS_ABI_N32:
1667 set_gdbarch_get_longjmp_target (gdbarch,
7d266584 1668 mips_linux_get_longjmp_target);
96f026fc 1669 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1670 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
d05f6826
DJ		 1671 set_gdbarch_long_double_bit (gdbarch, 128);
1672 /* These floatformats should probably be renamed. MIPS uses
1673 the same 128-bit IEEE floating point format that IA-64 uses,
1674 except that the quiet/signalling NaN bit is reversed (GDB
1675 does not distinguish between quiet and signalling NaNs). */
8da61cc4 1676 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
858339f2
MR		 1677 tramp_frame_prepend_unwinder (gdbarch,
1678 &micromips_linux_n32_rt_sigframe);
fb2be677 1679 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
458c8db8 1680 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
96f026fc
KB		 1681 break;
1682 case MIPS_ABI_N64:
1683 set_gdbarch_get_longjmp_target (gdbarch,
7d266584 1684 mips64_linux_get_longjmp_target);
96f026fc 1685 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1686 (gdbarch, svr4_lp64_fetch_link_map_offsets);
d05f6826
DJ		 1687 set_gdbarch_long_double_bit (gdbarch, 128);
1688 /* These floatformats should probably be renamed. MIPS uses
1689 the same 128-bit IEEE floating point format that IA-64 uses,
1690 except that the quiet/signalling NaN bit is reversed (GDB
1691 does not distinguish between quiet and signalling NaNs). */
8da61cc4 1692 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
858339f2
MR		 1693 tramp_frame_prepend_unwinder (gdbarch,
1694 &micromips_linux_n64_rt_sigframe);
fb2be677 1695 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
458c8db8 1696 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
96f026fc
KB		 1697 break;
1698 default:
96f026fc
KB		 1699 break;
1700 }
6de918a6
DJ		 1701
1702 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1703
0d0266c6 1704 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
b2756930
KB		 1705
1706 /* Enable TLS support. */
1707 set_gdbarch_fetch_tls_load_module_address (gdbarch,
7d266584 1708 svr4_fetch_objfile_link_map);
7d522c90
DJ		 1709
1710 /* Initialize this lazily, to avoid an initialization order
1711 dependency on solib-svr4.c's _initialize routine. */
1712 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1713 {
1714 mips_svr4_so_ops = svr4_so_ops;
1715 mips_svr4_so_ops.in_dynsym_resolve_code
1716 = mips_linux_in_dynsym_resolve_code;
1717 }
1718 set_solib_ops (gdbarch, &mips_svr4_so_ops);
822b6570
DJ		 1719
1720 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1721
4eb0ad19
DJ		 1722 set_gdbarch_core_read_description (gdbarch,
1723 mips_linux_core_read_description);
1724
d4036235
AA		 1725 set_gdbarch_iterate_over_regset_sections
1726 (gdbarch, mips_linux_iterate_over_regset_sections);
50e8a0d5 1727
232b8704
ME		 1728 set_gdbarch_gdb_signal_from_target (gdbarch,
1729 mips_gdb_signal_from_target);
1730
eb14d406
SDJ		 1731 set_gdbarch_gdb_signal_to_target (gdbarch,
1732 mips_gdb_signal_to_target);
1733
e38d4e1a
DJ		 1734 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1735
822b6570
DJ		 1736 if (tdesc_data)
1737 {
1738 const struct tdesc_feature *feature;
1739
1740 /* If we have target-described registers, then we can safely
1741 reserve a number for MIPS_RESTART_REGNUM (whether it is
1742 described or not). */
1743 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1744 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
cf233303 1745 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
822b6570
DJ		 1746
1747 /* If it's present, then assign it to the reserved number. */
1748 feature = tdesc_find_feature (info.target_desc,
1749 "org.gnu.gdb.mips.linux");
1750 if (feature != NULL)
1751 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1752 "restart");
1753 }
19ed69dd
KB		 1754}
1755
63807e1d
PA		 1756/* Provide a prototype to silence -Wmissing-prototypes. */
1757extern initialize_file_ftype _initialize_mips_linux_tdep;
1758
2aa830e4 1759void
d1bacddc 1760_initialize_mips_linux_tdep (void)
2aa830e4 1761{
96f026fc
KB		 1762 const struct bfd_arch_info *arch_info;
1763
96f026fc
KB		 1764 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1765 arch_info != NULL;
1766 arch_info = arch_info->next)
1767 {
295093a4
MS		 1768 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1769 GDB_OSABI_LINUX,
96f026fc
KB		 1770 mips_linux_init_abi);
1771 }
2aa830e4 1772}
GDB Binutils - Deliverables
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