[deliverable/binutils-gdb.git] / gdb / mipsnbsd-tdep.c

/* Target-dependent code for NetBSD/mips.

   Copyright (C) 2002-2014 Free Software Foundation, Inc.

   Contributed by Wasabi Systems, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "regset.h"
#include "target.h"
#include "value.h"
#include "osabi.h"

#include "gdb_assert.h"
#include <string.h>

#include "nbsd-tdep.h"
#include "mipsnbsd-tdep.h"
#include "mips-tdep.h"

#include "solib-svr4.h"

/* Shorthand for some register numbers used below.  */
#define MIPS_PC_REGNUM  MIPS_EMBED_PC_REGNUM
#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32

/* Core file support.  */

/* Number of registers in `struct reg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_GREGS	38

/* Number of registers in `struct fpreg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_FPREGS	33

/* Supply register REGNUM from the buffer specified by FPREGS and LEN
   in the floating-point register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_fpregset (const struct regset *regset,
			  struct regcache *regcache,
			  int regnum, const void *fpregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = fpregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);

  for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i,
			     regs + (i - MIPS_FP0_REGNUM) * regsize);
    }
}

/* Supply register REGNUM from the buffer specified by GREGS and LEN
   in the general-purpose register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_gregset (const struct regset *regset,
			 struct regcache *regcache, int regnum,
			 const void *gregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = gregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);

  for (i = 0; i <= MIPS_PC_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i, regs + i * regsize);
    }

  if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
    {
      regs += MIPSNBSD_NUM_GREGS * regsize;
      len -= MIPSNBSD_NUM_GREGS * regsize;
      mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
    }
}

/* NetBSD/mips register sets.  */

static struct regset mipsnbsd_gregset =
{
  NULL,
  mipsnbsd_supply_gregset
};

static struct regset mipsnbsd_fpregset =
{
  NULL,
  mipsnbsd_supply_fpregset
};

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */

static const struct regset *
mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
				   const char *sect_name, size_t sect_size)
{
  size_t regsize = mips_isa_regsize (gdbarch);
  
  if (strcmp (sect_name, ".reg") == 0
      && sect_size >= MIPSNBSD_NUM_GREGS * regsize)
    return &mipsnbsd_gregset;

  if (strcmp (sect_name, ".reg2") == 0
      && sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
    return &mipsnbsd_fpregset;

  return NULL;
}
\f

/* Conveniently, GDB uses the same register numbering as the
   ptrace register structure used by NetBSD/mips.  */

void
mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 regs + (i * mips_isa_regsize (gdbarch)));
        }
    }
}

void
mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
    if ((regno == i || regno == -1)
	&& ! gdbarch_cannot_store_register (gdbarch, i))
      regcache_raw_collect (regcache, i,
			    regs + (i * mips_isa_regsize (gdbarch)));
}

void
mipsnbsd_supply_fpreg (struct regcache *regcache,
		       const char *fpregs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = gdbarch_fp0_regnum (gdbarch);
       i <= mips_regnum (gdbarch)->fp_implementation_revision;
       i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 fpregs 
				 + ((i - gdbarch_fp0_regnum (gdbarch))
				    * mips_isa_regsize (gdbarch)));
	}
    }
}

void
mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = gdbarch_fp0_regnum (gdbarch);
       i <= mips_regnum (gdbarch)->fp_control_status;
       i++)
    if ((regno == i || regno == -1) 
	&& ! gdbarch_cannot_store_register (gdbarch, i))
      regcache_raw_collect (regcache, i,
			    fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
			      * mips_isa_regsize (gdbarch)));
}

#if 0

/* Under NetBSD/mips, signal handler invocations can be identified by the
   designated code sequence that is used to return from a signal handler.
   In particular, the return address of a signal handler points to the
   following code sequence:

	addu	a0, sp, 16
	li	v0, 295			# __sigreturn14
	syscall
   
   Each instruction has a unique encoding, so we simply attempt to match
   the instruction the PC is pointing to with any of the above instructions.
   If there is a hit, we know the offset to the start of the designated
   sequence and can then check whether we really are executing in the
   signal trampoline.  If not, -1 is returned, otherwise the offset from the
   start of the return sequence is returned.  */

#define RETCODE_NWORDS	3
#define RETCODE_SIZE	(RETCODE_NWORDS * 4)

static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
{
  0x10, 0x00, 0xa4, 0x27,	/* addu a0, sp, 16 */
  0x27, 0x01, 0x02, 0x24,	/* li v0, 295 */
  0x0c, 0x00, 0x00, 0x00,	/* syscall */
};

static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
{
  0x27, 0xa4, 0x00, 0x10,	/* addu a0, sp, 16 */
  0x24, 0x02, 0x01, 0x27,	/* li v0, 295 */
  0x00, 0x00, 0x00, 0x0c,	/* syscall */
};

#endif

/* Figure out where the longjmp will land.  We expect that we have
   just entered longjmp and haven't yet setup the stack frame, so the
   args are still in the argument regs.  MIPS_A0_REGNUM points at the
   jmp_buf structure from which we extract the PC that we will land
   at.  The PC is copied into *pc.  This routine returns true on
   success.  */

#define NBSD_MIPS_JB_PC			(2 * 4)
#define NBSD_MIPS_JB_ELEMENT_SIZE(gdbarch)	mips_isa_regsize (gdbarch)
#define NBSD_MIPS_JB_OFFSET(gdbarch)		(NBSD_MIPS_JB_PC * \
					 NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch))

static int
mipsnbsd_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
{
  struct gdbarch *gdbarch = get_frame_arch (frame);
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  CORE_ADDR jb_addr;
  gdb_byte *buf;

  buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));

  jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);

  if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET (gdbarch), buf,
  			  NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch)))
    return 0;

  *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch),
				  byte_order);
  return 1;
}

static int
mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (gdbarch)->fp_implementation_revision);
}

static int
mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (gdbarch)->fp_implementation_revision);
}

/* Shared library support.  */

/* NetBSD/mips uses a slightly different `struct link_map' than the
   other NetBSD platforms.  */

static struct link_map_offsets *
mipsnbsd_ilp32_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL) 
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 4;
      lmo.r_brk_offset = 8;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 24 bytes.  */
      lmo.link_map_size = 24;
      lmo.l_addr_offset = 4;
      lmo.l_name_offset = 8;
      lmo.l_ld_offset = 12;
      lmo.l_next_offset = 16;
      lmo.l_prev_offset = 20;
    }

  return lmp;
}

static struct link_map_offsets *
mipsnbsd_lp64_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL)
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 8;
      lmo.r_brk_offset = 16;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 40 bytes.  */
      lmo.link_map_size = 48;
      lmo.l_addr_offset = 0;
      lmo.l_name_offset = 16; 
      lmo.l_ld_offset = 24;
      lmo.l_next_offset = 32;
      lmo.l_prev_offset = 40;
    }

  return lmp;
}
\f

static void
mipsnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
{
  set_gdbarch_regset_from_core_section
    (gdbarch, mipsnbsd_regset_from_core_section);

  set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);

  set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
  set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);

  set_gdbarch_software_single_step (gdbarch, mips_software_single_step);

  /* NetBSD/mips has SVR4-style shared libraries.  */
  set_solib_svr4_fetch_link_map_offsets
    (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	       mipsnbsd_ilp32_fetch_link_map_offsets :
	       mipsnbsd_lp64_fetch_link_map_offsets));
}
\f

/* Provide a prototype to silence -Wmissing-prototypes.  */
extern initialize_file_ftype _initialize_mipsnbsd_tdep;

void
_initialize_mipsnbsd_tdep (void)
{
  gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
			  mipsnbsd_init_abi);
}
Commit	Line	Data
d1180b0f MK	1	/* Target-dependent code for NetBSD/mips.
d1180b0f MK	2
ecd75fc8	3	Copyright (C) 2002-2014 Free Software Foundation, Inc.
e4cd0d6a	4
45888261 JT	5	Contributed by Wasabi Systems, Inc.
	6
	7	This file is part of GDB.
	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
a9762ec7	11	the Free Software Foundation; either version 3 of the License, or
45888261 JT	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
a9762ec7	20	along with this program. If not, see <http://www.gnu.org/licenses/>. */
45888261 JT	21
	22	#include "defs.h"
	23	#include "gdbcore.h"
	24	#include "regcache.h"
d1180b0f	25	#include "regset.h"
45888261 JT	26	#include "target.h"
	27	#include "value.h"
	28	#include "osabi.h"
	29
d1180b0f	30	#include "gdb_assert.h"
0e9f083f	31	#include <string.h>
4c7d22cb	32
3d9b49b0	33	#include "nbsd-tdep.h"
45888261	34	#include "mipsnbsd-tdep.h"
1777c7b4	35	#include "mips-tdep.h"
45888261 JT	36
	37	#include "solib-svr4.h"
	38
d1180b0f MK	39	/* Shorthand for some register numbers used below. */
	40	#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
	41	#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
	42	#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
	43
	44	/* Core file support. */
	45
	46	/* Number of registers in `struct reg' from <machine/reg.h>. */
	47	#define MIPSNBSD_NUM_GREGS 38
	48
	49	/* Number of registers in `struct fpreg' from <machine/reg.h>. */
	50	#define MIPSNBSD_NUM_FPREGS 33
	51
	52	/* Supply register REGNUM from the buffer specified by FPREGS and LEN
	53	in the floating-point register set REGSET to register cache
	54	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	55
	56	static void
	57	mipsnbsd_supply_fpregset (const struct regset *regset,
	58	struct regcache *regcache,
	59	int regnum, const void *fpregs, size_t len)
	60	{
	61	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	62	const char *regs = fpregs;
	63	int i;
	64
	65	gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
	66
	67	for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
	68	{
	69	if (regnum == i \|\| regnum == -1)
	70	regcache_raw_supply (regcache, i,
	71	regs + (i - MIPS_FP0_REGNUM) * regsize);
	72	}
	73	}
	74
	75	/* Supply register REGNUM from the buffer specified by GREGS and LEN
	76	in the general-purpose register set REGSET to register cache
	77	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	78
	79	static void
	80	mipsnbsd_supply_gregset (const struct regset *regset,
	81	struct regcache *regcache, int regnum,
	82	const void *gregs, size_t len)
	83	{
	84	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	85	const char *regs = gregs;
	86	int i;
	87
	88	gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
	89
	90	for (i = 0; i <= MIPS_PC_REGNUM; i++)
	91	{
	92	if (regnum == i \|\| regnum == -1)
	93	regcache_raw_supply (regcache, i, regs + i * regsize);
	94	}
	95
	96	if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
	97	{
	98	regs += MIPSNBSD_NUM_GREGS * regsize;
	99	len -= MIPSNBSD_NUM_GREGS * regsize;
	100	mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
	101	}
	102	}
103
104	/* NetBSD/mips register sets. */
105
106	static struct regset mipsnbsd_gregset =
107	{
108	NULL,
109	mipsnbsd_supply_gregset
110	};
111
112	static struct regset mipsnbsd_fpregset =
113	{
114	NULL,
115	mipsnbsd_supply_fpregset
116	};
117
118	/* Return the appropriate register set for the core section identified
119	by SECT_NAME and SECT_SIZE. */
120
121	static const struct regset *
122	mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
123	const char *sect_name, size_t sect_size)
124	{
125	size_t regsize = mips_isa_regsize (gdbarch);
126
127	if (strcmp (sect_name, ".reg") == 0
128	&& sect_size >= MIPSNBSD_NUM_GREGS * regsize)
129	return &mipsnbsd_gregset;
130
131	if (strcmp (sect_name, ".reg2") == 0
132	&& sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
133	return &mipsnbsd_fpregset;
134
135	return NULL;
136	}
137	\f
138
45888261 JT	139	/* Conveniently, GDB uses the same register numbering as the
	140	ptrace register structure used by NetBSD/mips. */
	141
	142	void
28f5035f	143	mipsnbsd_supply_reg (struct regcache regcache, const char regs, int regno)
45888261	144	{
2eb4d78b	145	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	146	int i;
45888261 JT	147
2eb4d78b	148	for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
45888261 JT	149	{
	150	if (regno == i \|\| regno == -1)
	151	{
2eb4d78b	152	if (gdbarch_cannot_fetch_register (gdbarch, i))
28f5035f	153	regcache_raw_supply (regcache, i, NULL);
45888261	154	else
28f5035f	155	regcache_raw_supply (regcache, i,
2eb4d78b	156	regs + (i * mips_isa_regsize (gdbarch)));
45888261 JT	157	}
	158	}
	159	}
	160
	161	void
28f5035f	162	mipsnbsd_fill_reg (const struct regcache regcache, char regs, int regno)
45888261	163	{
2eb4d78b	164	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	165	int i;
45888261 JT	166
2eb4d78b	167	for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
8d4c1ba3	168	if ((regno == i \|\| regno == -1)
2eb4d78b	169	&& ! gdbarch_cannot_store_register (gdbarch, i))
28f5035f	170	regcache_raw_collect (regcache, i,
2eb4d78b	171	regs + (i * mips_isa_regsize (gdbarch)));
45888261 JT	172	}
	173
	174	void
025bb325 MS	175	mipsnbsd_supply_fpreg (struct regcache *regcache,
025bb325 MS	176	const char *fpregs, int regno)
45888261	177	{
2eb4d78b	178	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	179	int i;
45888261 JT	180
2eb4d78b UW	181	for (i = gdbarch_fp0_regnum (gdbarch);
2eb4d78b UW	182	i <= mips_regnum (gdbarch)->fp_implementation_revision;
56cea623	183	i++)
45888261 JT	184	{
	185	if (regno == i \|\| regno == -1)
	186	{
2eb4d78b	187	if (gdbarch_cannot_fetch_register (gdbarch, i))
28f5035f	188	regcache_raw_supply (regcache, i, NULL);
45888261	189	else
28f5035f	190	regcache_raw_supply (regcache, i,
3e8c568d	191	fpregs
2eb4d78b UW	192	+ ((i - gdbarch_fp0_regnum (gdbarch))
2eb4d78b UW	193	* mips_isa_regsize (gdbarch)));
45888261 JT	194	}
	195	}
	196	}
	197
	198	void
28f5035f	199	mipsnbsd_fill_fpreg (const struct regcache regcache, char fpregs, int regno)
45888261	200	{
2eb4d78b	201	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	202	int i;
45888261 JT	203
2eb4d78b UW	204	for (i = gdbarch_fp0_regnum (gdbarch);
2eb4d78b UW	205	i <= mips_regnum (gdbarch)->fp_control_status;
56cea623	206	i++)
8d4c1ba3	207	if ((regno == i \|\| regno == -1)
2eb4d78b	208	&& ! gdbarch_cannot_store_register (gdbarch, i))
28f5035f	209	regcache_raw_collect (regcache, i,
2eb4d78b UW	210	fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
2eb4d78b UW	211	* mips_isa_regsize (gdbarch)));
45888261 JT	212	}
45888261 JT	213
ac61d2db SA	214	#if 0
ac61d2db SA	215
45888261 JT	216	/* Under NetBSD/mips, signal handler invocations can be identified by the
	217	designated code sequence that is used to return from a signal handler.
	218	In particular, the return address of a signal handler points to the
	219	following code sequence:
	220
	221	addu a0, sp, 16
	222	li v0, 295 # __sigreturn14
	223	syscall
	224
	225	Each instruction has a unique encoding, so we simply attempt to match
	226	the instruction the PC is pointing to with any of the above instructions.
	227	If there is a hit, we know the offset to the start of the designated
	228	sequence and can then check whether we really are executing in the
	229	signal trampoline. If not, -1 is returned, otherwise the offset from the
	230	start of the return sequence is returned. */
	231
	232	#define RETCODE_NWORDS 3
	233	#define RETCODE_SIZE (RETCODE_NWORDS * 4)
	234
	235	static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
	236	{
	237	0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
	238	0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
	239	0x0c, 0x00, 0x00, 0x00, /* syscall */
	240	};
	241
	242	static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
	243	{
	244	0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
	245	0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
	246	0x00, 0x00, 0x00, 0x0c, /* syscall */
	247	};
	248
ac61d2db SA	249	#endif
ac61d2db SA	250
45888261	251	/* Figure out where the longjmp will land. We expect that we have
4c7d22cb MK	252	just entered longjmp and haven't yet setup the stack frame, so the
4c7d22cb MK	253	args are still in the argument regs. MIPS_A0_REGNUM points at the
45888261 JT	254	jmp_buf structure from which we extract the PC that we will land
	255	at. The PC is copied into *pc. This routine returns true on
	256	success. */
	257
	258	#define NBSD_MIPS_JB_PC (2 * 4)
74ed0bb4 MD	259	#define NBSD_MIPS_JB_ELEMENT_SIZE(gdbarch) mips_isa_regsize (gdbarch)
	260	#define NBSD_MIPS_JB_OFFSET(gdbarch) (NBSD_MIPS_JB_PC * \
	261	NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch))
45888261 JT	262
45888261 JT	263	static int
60ade65d	264	mipsnbsd_get_longjmp_target (struct frame_info frame, CORE_ADDR pc)
45888261	265	{
74ed0bb4	266	struct gdbarch *gdbarch = get_frame_arch (frame);
e17a4113	267	enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
45888261	268	CORE_ADDR jb_addr;
948f8e3d	269	gdb_byte *buf;
45888261	270
74ed0bb4	271	buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));
45888261	272
60ade65d	273	jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
45888261	274
74ed0bb4 MD	275	if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET (gdbarch), buf,
74ed0bb4 MD	276	NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch)))
45888261 JT	277	return 0;
45888261 JT	278
e17a4113 UW	279	*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch),
e17a4113 UW	280	byte_order);
45888261 JT	281	return 1;
	282	}
	283
	284	static int
64a3914f	285	mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
45888261	286	{
4c7d22cb	287	return (regno == MIPS_ZERO_REGNUM
64a3914f	288	\|\| regno == mips_regnum (gdbarch)->fp_implementation_revision);
45888261 JT	289	}
	290
	291	static int
64a3914f	292	mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
45888261	293	{
4c7d22cb	294	return (regno == MIPS_ZERO_REGNUM
64a3914f	295	\|\| regno == mips_regnum (gdbarch)->fp_implementation_revision);
45888261 JT	296	}
45888261 JT	297
fabe86c8 MK	298	/* Shared library support. */
	299
	300	/* NetBSD/mips uses a slightly different `struct link_map' than the
45888261	301	other NetBSD platforms. */
fabe86c8	302
45888261	303	static struct link_map_offsets *
fabe86c8	304	mipsnbsd_ilp32_fetch_link_map_offsets (void)
45888261 JT	305	{
	306	static struct link_map_offsets lmo;
	307	static struct link_map_offsets *lmp = NULL;
	308
	309	if (lmp == NULL)
	310	{
	311	lmp = &lmo;
	312
e4cd0d6a MK	313	lmo.r_version_offset = 0;
e4cd0d6a MK	314	lmo.r_version_size = 4;
45888261	315	lmo.r_map_offset = 4;
7cd25cfc	316	lmo.r_brk_offset = 8;
e4cd0d6a	317	lmo.r_ldsomap_offset = -1;
45888261	318
fabe86c8	319	/* Everything we need is in the first 24 bytes. */
45888261	320	lmo.link_map_size = 24;
4c7d22cb	321	lmo.l_addr_offset = 4;
45888261	322	lmo.l_name_offset = 8;
cc10cae3	323	lmo.l_ld_offset = 12;
45888261	324	lmo.l_next_offset = 16;
45888261	325	lmo.l_prev_offset = 20;
45888261 JT	326	}
	327
	328	return lmp;
	329	}
	330
	331	static struct link_map_offsets *
fabe86c8	332	mipsnbsd_lp64_fetch_link_map_offsets (void)
45888261 JT	333	{
	334	static struct link_map_offsets lmo;
	335	static struct link_map_offsets *lmp = NULL;
	336
	337	if (lmp == NULL)
	338	{
	339	lmp = &lmo;
	340
e4cd0d6a MK	341	lmo.r_version_offset = 0;
	342	lmo.r_version_size = 4;
	343	lmo.r_map_offset = 8;
7cd25cfc	344	lmo.r_brk_offset = 16;
e4cd0d6a	345	lmo.r_ldsomap_offset = -1;
45888261	346
fabe86c8	347	/* Everything we need is in the first 40 bytes. */
45888261	348	lmo.link_map_size = 48;
45888261	349	lmo.l_addr_offset = 0;
45888261	350	lmo.l_name_offset = 16;
cc10cae3	351	lmo.l_ld_offset = 24;
45888261	352	lmo.l_next_offset = 32;
45888261	353	lmo.l_prev_offset = 40;
45888261 JT	354	}
	355
	356	return lmp;
	357	}
fabe86c8	358	\f
45888261 JT	359
	360	static void
	361	mipsnbsd_init_abi (struct gdbarch_info info,
	362	struct gdbarch *gdbarch)
	363	{
d1180b0f MK	364	set_gdbarch_regset_from_core_section
	365	(gdbarch, mipsnbsd_regset_from_core_section);
	366
45888261 JT	367	set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
	368
	369	set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
	370	set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
	371
	372	set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
	373
fabe86c8 MK	374	/* NetBSD/mips has SVR4-style shared libraries. */
	375	set_solib_svr4_fetch_link_map_offsets
	376	(gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	377	mipsnbsd_ilp32_fetch_link_map_offsets :
	378	mipsnbsd_lp64_fetch_link_map_offsets));
45888261	379	}
d1180b0f MK	380	\f
d1180b0f MK	381
63807e1d PA	382	/* Provide a prototype to silence -Wmissing-prototypes. */
	383	extern initialize_file_ftype _initialize_mipsnbsd_tdep;
	384
45888261 JT	385	void
	386	_initialize_mipsnbsd_tdep (void)
	387	{
05816f70	388	gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
45888261	389	mipsnbsd_init_abi);
45888261	390	}