[deliverable/binutils-gdb.git] / gdb / mipsnbsd-tdep.c

/* Target-dependent code for NetBSD/mips.

   Copyright (C) 2002-2014 Free Software Foundation, Inc.

   Contributed by Wasabi Systems, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "regset.h"
#include "target.h"
#include "value.h"
#include "osabi.h"

#include "nbsd-tdep.h"
#include "mipsnbsd-tdep.h"
#include "mips-tdep.h"

#include "solib-svr4.h"

/* Shorthand for some register numbers used below.  */
#define MIPS_PC_REGNUM  MIPS_EMBED_PC_REGNUM
#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32

/* Core file support.  */

/* Number of registers in `struct reg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_GREGS	38

/* Number of registers in `struct fpreg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_FPREGS	33

/* Supply register REGNUM from the buffer specified by FPREGS and LEN
   in the floating-point register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_fpregset (const struct regset *regset,
			  struct regcache *regcache,
			  int regnum, const void *fpregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = fpregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);

  for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i,
			     regs + (i - MIPS_FP0_REGNUM) * regsize);
    }
}

/* Supply register REGNUM from the buffer specified by GREGS and LEN
   in the general-purpose register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_gregset (const struct regset *regset,
			 struct regcache *regcache, int regnum,
			 const void *gregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = gregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);

  for (i = 0; i <= MIPS_PC_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i, regs + i * regsize);
    }

  if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
    {
      regs += MIPSNBSD_NUM_GREGS * regsize;
      len -= MIPSNBSD_NUM_GREGS * regsize;
      mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
    }
}

/* NetBSD/mips register sets.  */

static const struct regset mipsnbsd_gregset =
{
  NULL,
  mipsnbsd_supply_gregset
};

static const struct regset mipsnbsd_fpregset =
{
  NULL,
  mipsnbsd_supply_fpregset
};

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */

static const struct regset *
mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
				   const char *sect_name, size_t sect_size)
{
  size_t regsize = mips_isa_regsize (gdbarch);
  
  if (strcmp (sect_name, ".reg") == 0
      && sect_size >= MIPSNBSD_NUM_GREGS * regsize)
    return &mipsnbsd_gregset;

  if (strcmp (sect_name, ".reg2") == 0
      && sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
    return &mipsnbsd_fpregset;

  return NULL;
}
\f

/* Conveniently, GDB uses the same register numbering as the
   ptrace register structure used by NetBSD/mips.  */

void
mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 regs + (i * mips_isa_regsize (gdbarch)));
        }
    }
}

void
mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
    if ((regno == i || regno == -1)
	&& ! gdbarch_cannot_store_register (gdbarch, i))
      regcache_raw_collect (regcache, i,
			    regs + (i * mips_isa_regsize (gdbarch)));
}

void
mipsnbsd_supply_fpreg (struct regcache *regcache,
		       const char *fpregs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = gdbarch_fp0_regnum (gdbarch);
       i <= mips_regnum (gdbarch)->fp_implementation_revision;
       i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 fpregs 
				 + ((i - gdbarch_fp0_regnum (gdbarch))
				    * mips_isa_regsize (gdbarch)));
	}
    }
}

void
mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = gdbarch_fp0_regnum (gdbarch);
       i <= mips_regnum (gdbarch)->fp_control_status;
       i++)
    if ((regno == i || regno == -1) 
	&& ! gdbarch_cannot_store_register (gdbarch, i))
      regcache_raw_collect (regcache, i,
			    fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
			      * mips_isa_regsize (gdbarch)));
}

#if 0

/* Under NetBSD/mips, signal handler invocations can be identified by the
   designated code sequence that is used to return from a signal handler.
   In particular, the return address of a signal handler points to the
   following code sequence:

	addu	a0, sp, 16
	li	v0, 295			# __sigreturn14
	syscall
   
   Each instruction has a unique encoding, so we simply attempt to match
   the instruction the PC is pointing to with any of the above instructions.
   If there is a hit, we know the offset to the start of the designated
   sequence and can then check whether we really are executing in the
   signal trampoline.  If not, -1 is returned, otherwise the offset from the
   start of the return sequence is returned.  */

#define RETCODE_NWORDS	3
#define RETCODE_SIZE	(RETCODE_NWORDS * 4)

static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
{
  0x10, 0x00, 0xa4, 0x27,	/* addu a0, sp, 16 */
  0x27, 0x01, 0x02, 0x24,	/* li v0, 295 */
  0x0c, 0x00, 0x00, 0x00,	/* syscall */
};

static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
{
  0x27, 0xa4, 0x00, 0x10,	/* addu a0, sp, 16 */
  0x24, 0x02, 0x01, 0x27,	/* li v0, 295 */
  0x00, 0x00, 0x00, 0x0c,	/* syscall */
};

#endif

/* Figure out where the longjmp will land.  We expect that we have
   just entered longjmp and haven't yet setup the stack frame, so the
   args are still in the argument regs.  MIPS_A0_REGNUM points at the
   jmp_buf structure from which we extract the PC that we will land
   at.  The PC is copied into *pc.  This routine returns true on
   success.  */

#define NBSD_MIPS_JB_PC			(2 * 4)
#define NBSD_MIPS_JB_ELEMENT_SIZE(gdbarch)	mips_isa_regsize (gdbarch)
#define NBSD_MIPS_JB_OFFSET(gdbarch)		(NBSD_MIPS_JB_PC * \
					 NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch))

static int
mipsnbsd_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
{
  struct gdbarch *gdbarch = get_frame_arch (frame);
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  CORE_ADDR jb_addr;
  gdb_byte *buf;

  buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));

  jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);

  if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET (gdbarch), buf,
  			  NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch)))
    return 0;

  *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch),
				  byte_order);
  return 1;
}

static int
mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (gdbarch)->fp_implementation_revision);
}

static int
mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (gdbarch)->fp_implementation_revision);
}

/* Shared library support.  */

/* NetBSD/mips uses a slightly different `struct link_map' than the
   other NetBSD platforms.  */

static struct link_map_offsets *
mipsnbsd_ilp32_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL) 
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 4;
      lmo.r_brk_offset = 8;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 24 bytes.  */
      lmo.link_map_size = 24;
      lmo.l_addr_offset = 4;
      lmo.l_name_offset = 8;
      lmo.l_ld_offset = 12;
      lmo.l_next_offset = 16;
      lmo.l_prev_offset = 20;
    }

  return lmp;
}

static struct link_map_offsets *
mipsnbsd_lp64_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL)
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 8;
      lmo.r_brk_offset = 16;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 40 bytes.  */
      lmo.link_map_size = 48;
      lmo.l_addr_offset = 0;
      lmo.l_name_offset = 16; 
      lmo.l_ld_offset = 24;
      lmo.l_next_offset = 32;
      lmo.l_prev_offset = 40;
    }

  return lmp;
}
\f

static void
mipsnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
{
  set_gdbarch_regset_from_core_section
    (gdbarch, mipsnbsd_regset_from_core_section);

  set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);

  set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
  set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);

  set_gdbarch_software_single_step (gdbarch, mips_software_single_step);

  /* NetBSD/mips has SVR4-style shared libraries.  */
  set_solib_svr4_fetch_link_map_offsets
    (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	       mipsnbsd_ilp32_fetch_link_map_offsets :
	       mipsnbsd_lp64_fetch_link_map_offsets));
}
\f

/* Provide a prototype to silence -Wmissing-prototypes.  */
extern initialize_file_ftype _initialize_mipsnbsd_tdep;

void
_initialize_mipsnbsd_tdep (void)
{
  gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
			  mipsnbsd_init_abi);
}
Commit	Line	Data
d1180b0f MK	1	/* Target-dependent code for NetBSD/mips.
d1180b0f MK	2
ecd75fc8	3	Copyright (C) 2002-2014 Free Software Foundation, Inc.
e4cd0d6a	4
45888261 JT	5	Contributed by Wasabi Systems, Inc.
	6
	7	This file is part of GDB.
	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
a9762ec7	11	the Free Software Foundation; either version 3 of the License, or
45888261 JT	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
a9762ec7	20	along with this program. If not, see <http://www.gnu.org/licenses/>. */
45888261 JT	21
	22	#include "defs.h"
	23	#include "gdbcore.h"
	24	#include "regcache.h"
d1180b0f	25	#include "regset.h"
45888261 JT	26	#include "target.h"
	27	#include "value.h"
	28	#include "osabi.h"
	29
3d9b49b0	30	#include "nbsd-tdep.h"
45888261	31	#include "mipsnbsd-tdep.h"
1777c7b4	32	#include "mips-tdep.h"
45888261 JT	33
	34	#include "solib-svr4.h"
	35
d1180b0f MK	36	/* Shorthand for some register numbers used below. */
	37	#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
	38	#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
	39	#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
	40
	41	/* Core file support. */
	42
	43	/* Number of registers in `struct reg' from <machine/reg.h>. */
	44	#define MIPSNBSD_NUM_GREGS 38
	45
	46	/* Number of registers in `struct fpreg' from <machine/reg.h>. */
	47	#define MIPSNBSD_NUM_FPREGS 33
	48
	49	/* Supply register REGNUM from the buffer specified by FPREGS and LEN
	50	in the floating-point register set REGSET to register cache
	51	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	52
	53	static void
	54	mipsnbsd_supply_fpregset (const struct regset *regset,
	55	struct regcache *regcache,
	56	int regnum, const void *fpregs, size_t len)
	57	{
	58	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	59	const char *regs = fpregs;
	60	int i;
	61
	62	gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
	63
	64	for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
	65	{
	66	if (regnum == i \|\| regnum == -1)
	67	regcache_raw_supply (regcache, i,
	68	regs + (i - MIPS_FP0_REGNUM) * regsize);
	69	}
	70	}
	71
	72	/* Supply register REGNUM from the buffer specified by GREGS and LEN
	73	in the general-purpose register set REGSET to register cache
	74	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	75
	76	static void
	77	mipsnbsd_supply_gregset (const struct regset *regset,
	78	struct regcache *regcache, int regnum,
	79	const void *gregs, size_t len)
	80	{
	81	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	82	const char *regs = gregs;
	83	int i;
	84
	85	gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
	86
	87	for (i = 0; i <= MIPS_PC_REGNUM; i++)
	88	{
	89	if (regnum == i \|\| regnum == -1)
	90	regcache_raw_supply (regcache, i, regs + i * regsize);
	91	}
	92
	93	if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
	94	{
	95	regs += MIPSNBSD_NUM_GREGS * regsize;
	96	len -= MIPSNBSD_NUM_GREGS * regsize;
	97	mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
	98	}
	99	}
100
101	/* NetBSD/mips register sets. */
102
3ca7dae4	103	static const struct regset mipsnbsd_gregset =
d1180b0f MK	104	{
	105	NULL,
	106	mipsnbsd_supply_gregset
	107	};
	108
3ca7dae4	109	static const struct regset mipsnbsd_fpregset =
d1180b0f MK	110	{
	111	NULL,
	112	mipsnbsd_supply_fpregset
	113	};
	114
	115	/* Return the appropriate register set for the core section identified
	116	by SECT_NAME and SECT_SIZE. */
	117
	118	static const struct regset *
	119	mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
	120	const char *sect_name, size_t sect_size)
	121	{
	122	size_t regsize = mips_isa_regsize (gdbarch);
	123
	124	if (strcmp (sect_name, ".reg") == 0
	125	&& sect_size >= MIPSNBSD_NUM_GREGS * regsize)
	126	return &mipsnbsd_gregset;
	127
	128	if (strcmp (sect_name, ".reg2") == 0
	129	&& sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
	130	return &mipsnbsd_fpregset;
	131
	132	return NULL;
	133	}
	134	\f
	135
45888261 JT	136	/* Conveniently, GDB uses the same register numbering as the
	137	ptrace register structure used by NetBSD/mips. */
	138
	139	void
28f5035f	140	mipsnbsd_supply_reg (struct regcache regcache, const char regs, int regno)
45888261	141	{
2eb4d78b	142	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	143	int i;
45888261 JT	144
2eb4d78b	145	for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
45888261 JT	146	{
	147	if (regno == i \|\| regno == -1)
	148	{
2eb4d78b	149	if (gdbarch_cannot_fetch_register (gdbarch, i))
28f5035f	150	regcache_raw_supply (regcache, i, NULL);
45888261	151	else
28f5035f	152	regcache_raw_supply (regcache, i,
2eb4d78b	153	regs + (i * mips_isa_regsize (gdbarch)));
45888261 JT	154	}
	155	}
	156	}
	157
	158	void
28f5035f	159	mipsnbsd_fill_reg (const struct regcache regcache, char regs, int regno)
45888261	160	{
2eb4d78b	161	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	162	int i;
45888261 JT	163
2eb4d78b	164	for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
8d4c1ba3	165	if ((regno == i \|\| regno == -1)
2eb4d78b	166	&& ! gdbarch_cannot_store_register (gdbarch, i))
28f5035f	167	regcache_raw_collect (regcache, i,
2eb4d78b	168	regs + (i * mips_isa_regsize (gdbarch)));
45888261 JT	169	}
	170
	171	void
025bb325 MS	172	mipsnbsd_supply_fpreg (struct regcache *regcache,
025bb325 MS	173	const char *fpregs, int regno)
45888261	174	{
2eb4d78b	175	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	176	int i;
45888261 JT	177
2eb4d78b UW	178	for (i = gdbarch_fp0_regnum (gdbarch);
2eb4d78b UW	179	i <= mips_regnum (gdbarch)->fp_implementation_revision;
56cea623	180	i++)
45888261 JT	181	{
	182	if (regno == i \|\| regno == -1)
	183	{
2eb4d78b	184	if (gdbarch_cannot_fetch_register (gdbarch, i))
28f5035f	185	regcache_raw_supply (regcache, i, NULL);
45888261	186	else
28f5035f	187	regcache_raw_supply (regcache, i,
3e8c568d	188	fpregs
2eb4d78b UW	189	+ ((i - gdbarch_fp0_regnum (gdbarch))
2eb4d78b UW	190	* mips_isa_regsize (gdbarch)));
45888261 JT	191	}
	192	}
	193	}
	194
	195	void
28f5035f	196	mipsnbsd_fill_fpreg (const struct regcache regcache, char fpregs, int regno)
45888261	197	{
2eb4d78b	198	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	199	int i;
45888261 JT	200
2eb4d78b UW	201	for (i = gdbarch_fp0_regnum (gdbarch);
2eb4d78b UW	202	i <= mips_regnum (gdbarch)->fp_control_status;
56cea623	203	i++)
8d4c1ba3	204	if ((regno == i \|\| regno == -1)
2eb4d78b	205	&& ! gdbarch_cannot_store_register (gdbarch, i))
28f5035f	206	regcache_raw_collect (regcache, i,
2eb4d78b UW	207	fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
2eb4d78b UW	208	* mips_isa_regsize (gdbarch)));
45888261 JT	209	}
45888261 JT	210
ac61d2db SA	211	#if 0
ac61d2db SA	212
45888261 JT	213	/* Under NetBSD/mips, signal handler invocations can be identified by the
	214	designated code sequence that is used to return from a signal handler.
	215	In particular, the return address of a signal handler points to the
	216	following code sequence:
	217
	218	addu a0, sp, 16
	219	li v0, 295 # __sigreturn14
	220	syscall
	221
	222	Each instruction has a unique encoding, so we simply attempt to match
	223	the instruction the PC is pointing to with any of the above instructions.
	224	If there is a hit, we know the offset to the start of the designated
	225	sequence and can then check whether we really are executing in the
	226	signal trampoline. If not, -1 is returned, otherwise the offset from the
	227	start of the return sequence is returned. */
	228
	229	#define RETCODE_NWORDS 3
	230	#define RETCODE_SIZE (RETCODE_NWORDS * 4)
	231
	232	static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
	233	{
	234	0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
	235	0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
	236	0x0c, 0x00, 0x00, 0x00, /* syscall */
	237	};
	238
	239	static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
	240	{
	241	0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
	242	0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
	243	0x00, 0x00, 0x00, 0x0c, /* syscall */
	244	};
	245
ac61d2db SA	246	#endif
ac61d2db SA	247
45888261	248	/* Figure out where the longjmp will land. We expect that we have
4c7d22cb MK	249	just entered longjmp and haven't yet setup the stack frame, so the
4c7d22cb MK	250	args are still in the argument regs. MIPS_A0_REGNUM points at the
45888261 JT	251	jmp_buf structure from which we extract the PC that we will land
	252	at. The PC is copied into *pc. This routine returns true on
	253	success. */
	254
	255	#define NBSD_MIPS_JB_PC (2 * 4)
74ed0bb4 MD	256	#define NBSD_MIPS_JB_ELEMENT_SIZE(gdbarch) mips_isa_regsize (gdbarch)
	257	#define NBSD_MIPS_JB_OFFSET(gdbarch) (NBSD_MIPS_JB_PC * \
	258	NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch))
45888261 JT	259
45888261 JT	260	static int
60ade65d	261	mipsnbsd_get_longjmp_target (struct frame_info frame, CORE_ADDR pc)
45888261	262	{
74ed0bb4	263	struct gdbarch *gdbarch = get_frame_arch (frame);
e17a4113	264	enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
45888261	265	CORE_ADDR jb_addr;
948f8e3d	266	gdb_byte *buf;
45888261	267
74ed0bb4	268	buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));
45888261	269
60ade65d	270	jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
45888261	271
74ed0bb4 MD	272	if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET (gdbarch), buf,
74ed0bb4 MD	273	NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch)))
45888261 JT	274	return 0;
45888261 JT	275
e17a4113 UW	276	*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch),
e17a4113 UW	277	byte_order);
45888261 JT	278	return 1;
	279	}
	280
	281	static int
64a3914f	282	mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
45888261	283	{
4c7d22cb	284	return (regno == MIPS_ZERO_REGNUM
64a3914f	285	\|\| regno == mips_regnum (gdbarch)->fp_implementation_revision);
45888261 JT	286	}
	287
	288	static int
64a3914f	289	mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
45888261	290	{
4c7d22cb	291	return (regno == MIPS_ZERO_REGNUM
64a3914f	292	\|\| regno == mips_regnum (gdbarch)->fp_implementation_revision);
45888261 JT	293	}
45888261 JT	294
fabe86c8 MK	295	/* Shared library support. */
	296
	297	/* NetBSD/mips uses a slightly different `struct link_map' than the
45888261	298	other NetBSD platforms. */
fabe86c8	299
45888261	300	static struct link_map_offsets *
fabe86c8	301	mipsnbsd_ilp32_fetch_link_map_offsets (void)
45888261 JT	302	{
	303	static struct link_map_offsets lmo;
	304	static struct link_map_offsets *lmp = NULL;
	305
	306	if (lmp == NULL)
	307	{
	308	lmp = &lmo;
	309
e4cd0d6a MK	310	lmo.r_version_offset = 0;
e4cd0d6a MK	311	lmo.r_version_size = 4;
45888261	312	lmo.r_map_offset = 4;
7cd25cfc	313	lmo.r_brk_offset = 8;
e4cd0d6a	314	lmo.r_ldsomap_offset = -1;
45888261	315
fabe86c8	316	/* Everything we need is in the first 24 bytes. */
45888261	317	lmo.link_map_size = 24;
4c7d22cb	318	lmo.l_addr_offset = 4;
45888261	319	lmo.l_name_offset = 8;
cc10cae3	320	lmo.l_ld_offset = 12;
45888261	321	lmo.l_next_offset = 16;
45888261	322	lmo.l_prev_offset = 20;
45888261 JT	323	}
	324
	325	return lmp;
	326	}
	327
	328	static struct link_map_offsets *
fabe86c8	329	mipsnbsd_lp64_fetch_link_map_offsets (void)
45888261 JT	330	{
	331	static struct link_map_offsets lmo;
	332	static struct link_map_offsets *lmp = NULL;
	333
	334	if (lmp == NULL)
	335	{
	336	lmp = &lmo;
	337
e4cd0d6a MK	338	lmo.r_version_offset = 0;
	339	lmo.r_version_size = 4;
	340	lmo.r_map_offset = 8;
7cd25cfc	341	lmo.r_brk_offset = 16;
e4cd0d6a	342	lmo.r_ldsomap_offset = -1;
45888261	343
fabe86c8	344	/* Everything we need is in the first 40 bytes. */
45888261	345	lmo.link_map_size = 48;
45888261	346	lmo.l_addr_offset = 0;
45888261	347	lmo.l_name_offset = 16;
cc10cae3	348	lmo.l_ld_offset = 24;
45888261	349	lmo.l_next_offset = 32;
45888261	350	lmo.l_prev_offset = 40;
45888261 JT	351	}
	352
	353	return lmp;
	354	}
fabe86c8	355	\f
45888261 JT	356
	357	static void
	358	mipsnbsd_init_abi (struct gdbarch_info info,
	359	struct gdbarch *gdbarch)
	360	{
d1180b0f MK	361	set_gdbarch_regset_from_core_section
	362	(gdbarch, mipsnbsd_regset_from_core_section);
	363
45888261 JT	364	set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
	365
	366	set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
	367	set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
	368
	369	set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
	370
fabe86c8 MK	371	/* NetBSD/mips has SVR4-style shared libraries. */
	372	set_solib_svr4_fetch_link_map_offsets
	373	(gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	374	mipsnbsd_ilp32_fetch_link_map_offsets :
	375	mipsnbsd_lp64_fetch_link_map_offsets));
45888261	376	}
d1180b0f MK	377	\f
d1180b0f MK	378
63807e1d PA	379	/* Provide a prototype to silence -Wmissing-prototypes. */
	380	extern initialize_file_ftype _initialize_mipsnbsd_tdep;
	381
45888261 JT	382	void
	383	_initialize_mipsnbsd_tdep (void)
	384	{
05816f70	385	gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
45888261	386	mipsnbsd_init_abi);
45888261	387	}