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[deliverable/binutils-gdb.git] / gdb / msp430-tdep.c
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1/* Target-dependent code for the Texas Instruments MSP430 for GDB, the
2 GNU debugger.
3
3666a048 4 Copyright (C) 2012-2021 Free Software Foundation, Inc.
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5
6 Contributed by Red Hat, Inc.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23#include "defs.h"
24#include "arch-utils.h"
25#include "prologue-value.h"
26#include "target.h"
27#include "regcache.h"
28#include "dis-asm.h"
29#include "gdbtypes.h"
30#include "frame.h"
31#include "frame-unwind.h"
32#include "frame-base.h"
33#include "value.h"
34#include "gdbcore.h"
82ca8957 35#include "dwarf2/frame.h"
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36#include "reggroups.h"
37
38#include "elf/msp430.h"
39#include "opcode/msp430-decode.h"
40#include "elf-bfd.h"
41
42/* Register Numbers. */
43
44enum
45{
46 MSP430_PC_RAW_REGNUM,
47 MSP430_SP_RAW_REGNUM,
48 MSP430_SR_RAW_REGNUM,
49 MSP430_CG_RAW_REGNUM,
50 MSP430_R4_RAW_REGNUM,
51 MSP430_R5_RAW_REGNUM,
52 MSP430_R6_RAW_REGNUM,
53 MSP430_R7_RAW_REGNUM,
54 MSP430_R8_RAW_REGNUM,
55 MSP430_R9_RAW_REGNUM,
56 MSP430_R10_RAW_REGNUM,
57 MSP430_R11_RAW_REGNUM,
58 MSP430_R12_RAW_REGNUM,
59 MSP430_R13_RAW_REGNUM,
60 MSP430_R14_RAW_REGNUM,
61 MSP430_R15_RAW_REGNUM,
62
63 MSP430_NUM_REGS,
64
65 MSP430_PC_REGNUM = MSP430_NUM_REGS,
66 MSP430_SP_REGNUM,
67 MSP430_SR_REGNUM,
68 MSP430_CG_REGNUM,
69 MSP430_R4_REGNUM,
70 MSP430_R5_REGNUM,
71 MSP430_R6_REGNUM,
72 MSP430_R7_REGNUM,
73 MSP430_R8_REGNUM,
74 MSP430_R9_REGNUM,
75 MSP430_R10_REGNUM,
76 MSP430_R11_REGNUM,
77 MSP430_R12_REGNUM,
78 MSP430_R13_REGNUM,
79 MSP430_R14_REGNUM,
80 MSP430_R15_REGNUM,
81
82 MSP430_NUM_TOTAL_REGS,
83 MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS
84};
85
86enum
87{
88 /* TI MSP430 Architecture. */
89 MSP_ISA_MSP430,
90
91 /* TI MSP430X Architecture. */
92 MSP_ISA_MSP430X
93};
94
95enum
96{
97 /* The small code model limits code addresses to 16 bits. */
98 MSP_SMALL_CODE_MODEL,
99
100 /* The large code model uses 20 bit addresses for function
101 pointers. These are stored in memory using four bytes (32 bits). */
102 MSP_LARGE_CODE_MODEL
103};
104
105/* Architecture specific data. */
106
107struct gdbarch_tdep
108{
109 /* The ELF header flags specify the multilib used. */
110 int elf_flags;
111
112 /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X. */
113 int isa;
114
115 /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL. If, at
116 some point, we support different data models too, we'll probably
117 structure things so that we can combine values using logical
118 "or". */
119 int code_model;
120};
121
122/* This structure holds the results of a prologue analysis. */
123
124struct msp430_prologue
125{
126 /* The offset from the frame base to the stack pointer --- always
127 zero or negative.
128
129 Calling this a "size" is a bit misleading, but given that the
130 stack grows downwards, using offsets for everything keeps one
131 from going completely sign-crazy: you never change anything's
132 sign for an ADD instruction; always change the second operand's
133 sign for a SUB instruction; and everything takes care of
134 itself. */
135 int frame_size;
136
137 /* Non-zero if this function has initialized the frame pointer from
138 the stack pointer, zero otherwise. */
139 int has_frame_ptr;
140
141 /* If has_frame_ptr is non-zero, this is the offset from the frame
142 base to where the frame pointer points. This is always zero or
143 negative. */
144 int frame_ptr_offset;
145
146 /* The address of the first instruction at which the frame has been
147 set up and the arguments are where the debug info says they are
148 --- as best as we can tell. */
149 CORE_ADDR prologue_end;
150
151 /* reg_offset[R] is the offset from the CFA at which register R is
152 saved, or 1 if register R has not been saved. (Real values are
153 always zero or negative.) */
154 int reg_offset[MSP430_NUM_TOTAL_REGS];
155};
156
157/* Implement the "register_type" gdbarch method. */
158
159static struct type *
160msp430_register_type (struct gdbarch *gdbarch, int reg_nr)
161{
162 if (reg_nr < MSP430_NUM_REGS)
163 return builtin_type (gdbarch)->builtin_uint32;
164 else if (reg_nr == MSP430_PC_REGNUM)
165 return builtin_type (gdbarch)->builtin_func_ptr;
166 else
167 return builtin_type (gdbarch)->builtin_uint16;
168}
169
170/* Implement another version of the "register_type" gdbarch method
171 for msp430x. */
172
173static struct type *
174msp430x_register_type (struct gdbarch *gdbarch, int reg_nr)
175{
176 if (reg_nr < MSP430_NUM_REGS)
177 return builtin_type (gdbarch)->builtin_uint32;
178 else if (reg_nr == MSP430_PC_REGNUM)
179 return builtin_type (gdbarch)->builtin_func_ptr;
180 else
181 return builtin_type (gdbarch)->builtin_uint32;
182}
183
184/* Implement the "register_name" gdbarch method. */
185
186static const char *
187msp430_register_name (struct gdbarch *gdbarch, int regnr)
188{
189 static const char *const reg_names[] = {
190 /* Raw registers. */
191 "", "", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 /* Pseudo registers. */
194 "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
196 };
197
198 return reg_names[regnr];
199}
200
201/* Implement the "register_reggroup_p" gdbarch method. */
202
203static int
204msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
205 struct reggroup *group)
206{
207 if (group == all_reggroup)
208 return 1;
209
210 /* All other registers are saved and restored. */
211 if (group == save_reggroup || group == restore_reggroup)
212 return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS);
213
214 return group == general_reggroup;
215}
216
217/* Implement the "pseudo_register_read" gdbarch method. */
218
219static enum register_status
220msp430_pseudo_register_read (struct gdbarch *gdbarch,
849d0ba8 221 readable_regcache *regcache,
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222 int regnum, gdb_byte *buffer)
223{
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224 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
225 {
845b344f 226 enum register_status status;
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227 ULONGEST val;
228 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
229 int regsize = register_size (gdbarch, regnum);
230 int raw_regnum = regnum - MSP430_NUM_REGS;
231
03f50fc8 232 status = regcache->raw_read (raw_regnum, &val);
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233 if (status == REG_VALID)
234 store_unsigned_integer (buffer, regsize, byte_order, val);
235
845b344f 236 return status;
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237 }
238 else
239 gdb_assert_not_reached ("invalid pseudo register number");
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240}
241
242/* Implement the "pseudo_register_write" gdbarch method. */
243
244static void
245msp430_pseudo_register_write (struct gdbarch *gdbarch,
246 struct regcache *regcache,
247 int regnum, const gdb_byte *buffer)
248{
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249 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
250
251 {
252 ULONGEST val;
253 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
254 int regsize = register_size (gdbarch, regnum);
255 int raw_regnum = regnum - MSP430_NUM_REGS;
256
257 val = extract_unsigned_integer (buffer, regsize, byte_order);
258 regcache_raw_write_unsigned (regcache, raw_regnum, val);
259
260 }
261 else
262 gdb_assert_not_reached ("invalid pseudo register number");
263}
264
265/* Implement the `register_sim_regno' gdbarch method. */
266
267static int
268msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum)
269{
270 gdb_assert (regnum < MSP430_NUM_REGS);
271
272 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We
273 just want to override the default here which disallows register
274 numbers which have no names. */
275 return regnum;
276}
277
04180708 278constexpr gdb_byte msp430_break_insn[] = { 0x43, 0x43 };
586cf749 279
04180708 280typedef BP_MANIPULATION (msp430_break_insn) msp430_breakpoint;
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281
282/* Define a "handle" struct for fetching the next opcode. */
283
284struct msp430_get_opcode_byte_handle
285{
286 CORE_ADDR pc;
287};
288
289/* Fetch a byte on behalf of the opcode decoder. HANDLE contains
290 the memory address of the next byte to fetch. If successful,
291 the address in the handle is updated and the byte fetched is
292 returned as the value of the function. If not successful, -1
293 is returned. */
294
295static int
296msp430_get_opcode_byte (void *handle)
297{
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298 struct msp430_get_opcode_byte_handle *opcdata
299 = (struct msp430_get_opcode_byte_handle *) handle;
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300 int status;
301 gdb_byte byte;
302
303 status = target_read_memory (opcdata->pc, &byte, 1);
304 if (status == 0)
305 {
306 opcdata->pc += 1;
307 return byte;
308 }
309 else
310 return -1;
311}
312
313/* Function for finding saved registers in a 'struct pv_area'; this
f7b7ed97 314 function is passed to pv_area::scan.
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315
316 If VALUE is a saved register, ADDR says it was saved at a constant
317 offset from the frame base, and SIZE indicates that the whole
318 register was saved, record its offset. */
319
320static void
321check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
322{
323 struct msp430_prologue *result = (struct msp430_prologue *) result_untyped;
324
325 if (value.kind == pvk_register
326 && value.k == 0
327 && pv_is_register (addr, MSP430_SP_REGNUM)
328 && size == register_size (target_gdbarch (), value.reg))
329 result->reg_offset[value.reg] = addr.k;
330}
331
332/* Analyze a prologue starting at START_PC, going no further than
333 LIMIT_PC. Fill in RESULT as appropriate. */
334
335static void
336msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
337 CORE_ADDR limit_pc, struct msp430_prologue *result)
338{
339 CORE_ADDR pc, next_pc;
340 int rn;
341 pv_t reg[MSP430_NUM_TOTAL_REGS];
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342 CORE_ADDR after_last_frame_setup_insn = start_pc;
343 int code_model = gdbarch_tdep (gdbarch)->code_model;
344 int sz;
345
346 memset (result, 0, sizeof (*result));
347
348 for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++)
349 {
350 reg[rn] = pv_register (rn, 0);
351 result->reg_offset[rn] = 1;
352 }
353
f7b7ed97 354 pv_area stack (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch));
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355
356 /* The call instruction has saved the return address on the stack. */
357 sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2;
358 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz);
f7b7ed97 359 stack.store (reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]);
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360
361 pc = start_pc;
362 while (pc < limit_pc)
363 {
364 int bytes_read;
365 struct msp430_get_opcode_byte_handle opcode_handle;
366 MSP430_Opcode_Decoded opc;
367
368 opcode_handle.pc = pc;
369 bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte,
370 &opcode_handle);
371 next_pc = pc + bytes_read;
372
373 if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register)
374 {
375 int rsrc = opc.op[0].reg;
376
377 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2);
f7b7ed97 378 stack.store (reg[MSP430_SP_REGNUM], 2, reg[rsrc]);
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379 after_last_frame_setup_insn = next_pc;
380 }
381 else if (opc.id == MSO_push /* PUSHM */
382 && opc.op[0].type == MSP430_Operand_None
383 && opc.op[1].type == MSP430_Operand_Register)
384 {
385 int rsrc = opc.op[1].reg;
386 int count = opc.repeats + 1;
387 int size = opc.size == 16 ? 2 : 4;
388
389 while (count > 0)
390 {
391 reg[MSP430_SP_REGNUM]
392 = pv_add_constant (reg[MSP430_SP_REGNUM], -size);
f7b7ed97 393 stack.store (reg[MSP430_SP_REGNUM], size, reg[rsrc]);
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394 rsrc--;
395 count--;
396 }
397 after_last_frame_setup_insn = next_pc;
398 }
399 else if (opc.id == MSO_sub
400 && opc.op[0].type == MSP430_Operand_Register
401 && opc.op[0].reg == MSR_SP
402 && opc.op[1].type == MSP430_Operand_Immediate)
403 {
404 int addend = opc.op[1].addend;
405
406 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM],
407 -addend);
408 after_last_frame_setup_insn = next_pc;
409 }
410 else if (opc.id == MSO_mov
411 && opc.op[0].type == MSP430_Operand_Immediate
412 && 12 <= opc.op[0].reg && opc.op[0].reg <= 15)
413 after_last_frame_setup_insn = next_pc;
414 else
415 {
416 /* Terminate the prologue scan. */
417 break;
418 }
419
420 pc = next_pc;
421 }
422
423 /* Is the frame size (offset, really) a known constant? */
424 if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM))
425 result->frame_size = reg[MSP430_SP_REGNUM].k;
426
427 /* Record where all the registers were saved. */
f7b7ed97 428 stack.scan (check_for_saved, result);
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429
430 result->prologue_end = after_last_frame_setup_insn;
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431}
432
433/* Implement the "skip_prologue" gdbarch method. */
434
435static CORE_ADDR
436msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
437{
438 const char *name;
439 CORE_ADDR func_addr, func_end;
440 struct msp430_prologue p;
441
442 /* Try to find the extent of the function that contains PC. */
443 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
444 return pc;
445
446 msp430_analyze_prologue (gdbarch, pc, func_end, &p);
447 return p.prologue_end;
448}
449
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450/* Given a frame described by THIS_FRAME, decode the prologue of its
451 associated function if there is not cache entry as specified by
452 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
453 return that struct as the value of this function. */
454
455static struct msp430_prologue *
456msp430_analyze_frame_prologue (struct frame_info *this_frame,
457 void **this_prologue_cache)
458{
459 if (!*this_prologue_cache)
460 {
461 CORE_ADDR func_start, stop_addr;
462
463 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue);
464
465 func_start = get_frame_func (this_frame);
466 stop_addr = get_frame_pc (this_frame);
467
468 /* If we couldn't find any function containing the PC, then
dda83cd7 469 just initialize the prologue cache, but don't do anything. */
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470 if (!func_start)
471 stop_addr = func_start;
472
473 msp430_analyze_prologue (get_frame_arch (this_frame), func_start,
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474 stop_addr,
475 (struct msp430_prologue *) *this_prologue_cache);
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476 }
477
19ba03f4 478 return (struct msp430_prologue *) *this_prologue_cache;
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479}
480
481/* Given a frame and a prologue cache, return this frame's base. */
482
483static CORE_ADDR
484msp430_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
485{
486 struct msp430_prologue *p
487 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
488 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM);
489
490 return sp - p->frame_size;
491}
492
493/* Implement the "frame_this_id" method for unwinding frames. */
494
495static void
496msp430_this_id (struct frame_info *this_frame,
497 void **this_prologue_cache, struct frame_id *this_id)
498{
499 *this_id = frame_id_build (msp430_frame_base (this_frame,
500 this_prologue_cache),
501 get_frame_func (this_frame));
502}
503
504/* Implement the "frame_prev_register" method for unwinding frames. */
505
506static struct value *
507msp430_prev_register (struct frame_info *this_frame,
508 void **this_prologue_cache, int regnum)
509{
510 struct msp430_prologue *p
511 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
512 CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache);
513
514 if (regnum == MSP430_SP_REGNUM)
515 return frame_unwind_got_constant (this_frame, regnum, frame_base);
516
517 /* If prologue analysis says we saved this register somewhere,
518 return a description of the stack slot holding it. */
519 else if (p->reg_offset[regnum] != 1)
520 {
521 struct value *rv = frame_unwind_got_memory (this_frame, regnum,
522 frame_base +
523 p->reg_offset[regnum]);
524
525 if (regnum == MSP430_PC_REGNUM)
526 {
527 ULONGEST pc = value_as_long (rv);
528
529 return frame_unwind_got_constant (this_frame, regnum, pc);
530 }
531 return rv;
532 }
533
534 /* Otherwise, presume we haven't changed the value of this
535 register, and get it from the next frame. */
536 else
537 return frame_unwind_got_register (this_frame, regnum, regnum);
538}
539
540static const struct frame_unwind msp430_unwind = {
a154d838 541 "msp430 prologue",
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542 NORMAL_FRAME,
543 default_frame_unwind_stop_reason,
544 msp430_this_id,
545 msp430_prev_register,
546 NULL,
547 default_frame_sniffer
548};
549
550/* Implement the "dwarf2_reg_to_regnum" gdbarch method. */
551
552static int
553msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
554{
0fde2c53 555 if (reg >= 0 && reg < MSP430_NUM_REGS)
586cf749 556 return reg + MSP430_NUM_REGS;
0fde2c53 557 return -1;
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558}
559
560/* Implement the "return_value" gdbarch method. */
561
562static enum return_value_convention
563msp430_return_value (struct gdbarch *gdbarch,
564 struct value *function,
565 struct type *valtype,
566 struct regcache *regcache,
567 gdb_byte *readbuf, const gdb_byte *writebuf)
568{
569 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
570 LONGEST valtype_len = TYPE_LENGTH (valtype);
571 int code_model = gdbarch_tdep (gdbarch)->code_model;
572
573 if (TYPE_LENGTH (valtype) > 8
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574 || valtype->code () == TYPE_CODE_STRUCT
575 || valtype->code () == TYPE_CODE_UNION)
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576 return RETURN_VALUE_STRUCT_CONVENTION;
577
578 if (readbuf)
579 {
580 ULONGEST u;
581 int argreg = MSP430_R12_REGNUM;
582 int offset = 0;
583
584 while (valtype_len > 0)
585 {
586 int size = 2;
587
588 if (code_model == MSP_LARGE_CODE_MODEL
78134374 589 && valtype->code () == TYPE_CODE_PTR)
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590 {
591 size = 4;
592 }
593
594 regcache_cooked_read_unsigned (regcache, argreg, &u);
595 store_unsigned_integer (readbuf + offset, size, byte_order, u);
596 valtype_len -= size;
597 offset += size;
598 argreg++;
599 }
600 }
601
602 if (writebuf)
603 {
604 ULONGEST u;
605 int argreg = MSP430_R12_REGNUM;
606 int offset = 0;
607
608 while (valtype_len > 0)
609 {
610 int size = 2;
611
612 if (code_model == MSP_LARGE_CODE_MODEL
78134374 613 && valtype->code () == TYPE_CODE_PTR)
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614 {
615 size = 4;
616 }
617
618 u = extract_unsigned_integer (writebuf + offset, size, byte_order);
619 regcache_cooked_write_unsigned (regcache, argreg, u);
620 valtype_len -= size;
621 offset += size;
622 argreg++;
623 }
624 }
625
626 return RETURN_VALUE_REGISTER_CONVENTION;
627}
628
629
630/* Implement the "frame_align" gdbarch method. */
631
632static CORE_ADDR
633msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
634{
635 return align_down (sp, 2);
636}
637
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638/* Implement the "push_dummy_call" gdbarch method. */
639
640static CORE_ADDR
641msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
642 struct regcache *regcache, CORE_ADDR bp_addr,
643 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
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644 function_call_return_method return_method,
645 CORE_ADDR struct_addr)
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646{
647 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
648 int write_pass;
649 int sp_off = 0;
650 CORE_ADDR cfa;
651 int code_model = gdbarch_tdep (gdbarch)->code_model;
652
653 struct type *func_type = value_type (function);
654
655 /* Dereference function pointer types. */
78134374 656 while (func_type->code () == TYPE_CODE_PTR)
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657 func_type = TYPE_TARGET_TYPE (func_type);
658
659 /* The end result had better be a function or a method. */
78134374
SM
660 gdb_assert (func_type->code () == TYPE_CODE_FUNC
661 || func_type->code () == TYPE_CODE_METHOD);
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662
663 /* We make two passes; the first does the stack allocation,
664 the second actually stores the arguments. */
665 for (write_pass = 0; write_pass <= 1; write_pass++)
666 {
667 int i;
668 int arg_reg = MSP430_R12_REGNUM;
669 int args_on_stack = 0;
670
671 if (write_pass)
672 sp = align_down (sp - sp_off, 4);
673 sp_off = 0;
674
cf84fa6b 675 if (return_method == return_method_struct)
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676 {
677 if (write_pass)
678 regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr);
679 arg_reg++;
680 }
681
682 /* Push the arguments. */
683 for (i = 0; i < nargs; i++)
684 {
685 struct value *arg = args[i];
686 const gdb_byte *arg_bits = value_contents_all (arg);
687 struct type *arg_type = check_typedef (value_type (arg));
688 ULONGEST arg_size = TYPE_LENGTH (arg_type);
689 int offset;
690 int current_arg_on_stack;
ef789dc4 691 gdb_byte struct_addr_buf[4];
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692
693 current_arg_on_stack = 0;
694
78134374
SM
695 if (arg_type->code () == TYPE_CODE_STRUCT
696 || arg_type->code () == TYPE_CODE_UNION)
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697 {
698 /* Aggregates of any size are passed by reference. */
ef789dc4 699 store_unsigned_integer (struct_addr_buf, 4, byte_order,
586cf749 700 value_address (arg));
ef789dc4 701 arg_bits = struct_addr_buf;
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702 arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2;
703 }
704 else
705 {
706 /* Scalars bigger than 8 bytes such as complex doubles are passed
dda83cd7 707 on the stack. */
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708 if (arg_size > 8)
709 current_arg_on_stack = 1;
710 }
711
712
713 for (offset = 0; offset < arg_size; offset += 2)
714 {
715 /* The condition below prevents 8 byte scalars from being split
dda83cd7
SM
716 between registers and memory (stack). It also prevents other
717 splits once the stack has been written to. */
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718 if (!current_arg_on_stack
719 && (arg_reg
720 + ((arg_size == 8 || args_on_stack)
721 ? ((arg_size - offset) / 2 - 1)
722 : 0) <= MSP430_R15_REGNUM))
723 {
724 int size = 2;
725
726 if (code_model == MSP_LARGE_CODE_MODEL
78134374 727 && (arg_type->code () == TYPE_CODE_PTR
dda83cd7 728 || TYPE_IS_REFERENCE (arg_type)
78134374
SM
729 || arg_type->code () == TYPE_CODE_STRUCT
730 || arg_type->code () == TYPE_CODE_UNION))
586cf749 731 {
3b1ad7d5
KB
732 /* When using the large memory model, pointer,
733 reference, struct, and union arguments are
734 passed using the entire register. (As noted
735 earlier, aggregates are always passed by
736 reference.) */
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737 if (offset != 0)
738 continue;
739 size = 4;
740 }
741
742 if (write_pass)
743 regcache_cooked_write_unsigned (regcache, arg_reg,
744 extract_unsigned_integer
745 (arg_bits + offset, size,
746 byte_order));
747
748 arg_reg++;
749 }
750 else
751 {
752 if (write_pass)
753 write_memory (sp + sp_off, arg_bits + offset, 2);
754
755 sp_off += 2;
756 args_on_stack = 1;
757 current_arg_on_stack = 1;
758 }
759 }
760 }
761 }
762
763 /* Keep track of the stack address prior to pushing the return address.
764 This is the value that we'll return. */
765 cfa = sp;
766
767 /* Push the return address. */
768 {
769 int sz = (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL)
770 ? 2 : 4;
771 sp = sp - sz;
772 write_memory_unsigned_integer (sp, sz, byte_order, bp_addr);
773 }
774
775 /* Update the stack pointer. */
776 regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp);
777
778 return cfa;
779}
780
781/* In order to keep code size small, the compiler may create epilogue
782 code through which more than one function epilogue is routed. I.e.
783 the epilogue and return may just be a branch to some common piece of
784 code which is responsible for tearing down the frame and performing
785 the return. These epilog (label) names will have the common prefix
786 defined here. */
787
788static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_";
789
790/* Implement the "in_return_stub" gdbarch method. */
791
792static int
793msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
794 const char *name)
795{
796 return (name != NULL
61012eef 797 && startswith (name, msp430_epilog_name_prefix));
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798}
799
800/* Implement the "skip_trampoline_code" gdbarch method. */
801static CORE_ADDR
802msp430_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
803{
804 struct bound_minimal_symbol bms;
805 const char *stub_name;
806 struct gdbarch *gdbarch = get_frame_arch (frame);
807
808 bms = lookup_minimal_symbol_by_pc (pc);
809 if (!bms.minsym)
810 return pc;
811
c9d95fa3 812 stub_name = bms.minsym->linkage_name ();
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813
814 if (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL
815 && msp430_in_return_stub (gdbarch, pc, stub_name))
816 {
817 CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM);
818
819 return read_memory_integer
820 (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'),
821 2, gdbarch_byte_order (gdbarch));
822 }
823
824 return pc;
825}
826
827/* Allocate and initialize a gdbarch object. */
828
829static struct gdbarch *
830msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
831{
832 struct gdbarch *gdbarch;
833 struct gdbarch_tdep *tdep;
834 int elf_flags, isa, code_model;
835
836 /* Extract the elf_flags if available. */
837 if (info.abfd != NULL
838 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
839 elf_flags = elf_elfheader (info.abfd)->e_flags;
840 else
841 elf_flags = 0;
842
843 if (info.abfd != NULL)
844 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
845 OFBA_MSPABI_Tag_ISA))
846 {
847 case 1:
848 isa = MSP_ISA_MSP430;
849 code_model = MSP_SMALL_CODE_MODEL;
850 break;
851 case 2:
852 isa = MSP_ISA_MSP430X;
853 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
854 OFBA_MSPABI_Tag_Code_Model))
855 {
856 case 1:
857 code_model = MSP_SMALL_CODE_MODEL;
858 break;
859 case 2:
860 code_model = MSP_LARGE_CODE_MODEL;
861 break;
862 default:
863 internal_error (__FILE__, __LINE__,
864 _("Unknown msp430x code memory model"));
865 break;
866 }
867 break;
868 case 0:
869 /* This can happen when loading a previously dumped data structure.
870 Use the ISA and code model from the current architecture, provided
871 it's compatible. */
872 {
873 struct gdbarch *ca = get_current_arch ();
874 if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430)
875 {
876 struct gdbarch_tdep *ca_tdep = gdbarch_tdep (ca);
877
878 elf_flags = ca_tdep->elf_flags;
879 isa = ca_tdep->isa;
880 code_model = ca_tdep->code_model;
881 break;
882 }
586cf749 883 }
86a73007 884 /* Fall through. */
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KB
885 default:
886 error (_("Unknown msp430 isa"));
887 break;
888 }
889 else
890 {
891 isa = MSP_ISA_MSP430;
892 code_model = MSP_SMALL_CODE_MODEL;
893 }
894
895
896 /* Try to find the architecture in the list of already defined
897 architectures. */
898 for (arches = gdbarch_list_lookup_by_info (arches, &info);
899 arches != NULL;
900 arches = gdbarch_list_lookup_by_info (arches->next, &info))
901 {
902 struct gdbarch_tdep *candidate_tdep = gdbarch_tdep (arches->gdbarch);
903
904 if (candidate_tdep->elf_flags != elf_flags
905 || candidate_tdep->isa != isa
906 || candidate_tdep->code_model != code_model)
907 continue;
908
909 return arches->gdbarch;
910 }
911
912 /* None found, create a new architecture from the information
913 provided. */
cdd238da 914 tdep = XCNEW (struct gdbarch_tdep);
586cf749
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915 gdbarch = gdbarch_alloc (&info, tdep);
916 tdep->elf_flags = elf_flags;
917 tdep->isa = isa;
918 tdep->code_model = code_model;
919
920 /* Registers. */
921 set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS);
922 set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS);
923 set_gdbarch_register_name (gdbarch, msp430_register_name);
924 if (isa == MSP_ISA_MSP430)
925 set_gdbarch_register_type (gdbarch, msp430_register_type);
926 else
927 set_gdbarch_register_type (gdbarch, msp430x_register_type);
928 set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM);
929 set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM);
930 set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p);
931 set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read);
932 set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write);
933 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum);
934 set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno);
935
936 /* Data types. */
937 set_gdbarch_char_signed (gdbarch, 0);
938 set_gdbarch_short_bit (gdbarch, 16);
939 set_gdbarch_int_bit (gdbarch, 16);
940 set_gdbarch_long_bit (gdbarch, 32);
941 set_gdbarch_long_long_bit (gdbarch, 64);
942 if (code_model == MSP_SMALL_CODE_MODEL)
943 {
944 set_gdbarch_ptr_bit (gdbarch, 16);
945 set_gdbarch_addr_bit (gdbarch, 16);
946 }
947 else /* MSP_LARGE_CODE_MODEL */
948 {
949 set_gdbarch_ptr_bit (gdbarch, 32);
950 set_gdbarch_addr_bit (gdbarch, 32);
951 }
952 set_gdbarch_dwarf2_addr_size (gdbarch, 4);
953 set_gdbarch_float_bit (gdbarch, 32);
954 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
955 set_gdbarch_double_bit (gdbarch, 64);
956 set_gdbarch_long_double_bit (gdbarch, 64);
957 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
958 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
959
960 /* Breakpoints. */
04180708
YQ
961 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
962 msp430_breakpoint::kind_from_pc);
963 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
964 msp430_breakpoint::bp_from_kind);
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965 set_gdbarch_decr_pc_after_break (gdbarch, 1);
966
586cf749
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967 /* Frames, prologues, etc. */
968 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
969 set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
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970 set_gdbarch_frame_align (gdbarch, msp430_frame_align);
971 dwarf2_append_unwinders (gdbarch);
972 frame_unwind_append_unwinder (gdbarch, &msp430_unwind);
973
974 /* Dummy frames, return values. */
586cf749
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975 set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call);
976 set_gdbarch_return_value (gdbarch, msp430_return_value);
977
978 /* Trampolines. */
979 set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub);
980 set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code);
981
982 /* Virtual tables. */
983 set_gdbarch_vbit_in_delta (gdbarch, 0);
984
985 return gdbarch;
986}
987
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988/* Register the initialization routine. */
989
6c265988 990void _initialize_msp430_tdep ();
586cf749 991void
6c265988 992_initialize_msp430_tdep ()
586cf749
KB
993{
994 register_gdbarch_init (bfd_arch_msp430, msp430_gdbarch_init);
995}
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