Remove regcache_cooked_read_part
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
CommitLineData
7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
e2882c85 4 Copyright (C) 2000-2018 Free Software Foundation, Inc.
7b112f9c
JT
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
7b112f9c
JT
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
7b112f9c
JT
20
21#include "defs.h"
22#include "gdbcore.h"
23#include "inferior.h"
24#include "regcache.h"
25#include "value.h"
7b112f9c 26#include "ppc-tdep.h"
6066c3de 27#include "target.h"
0a90bcdd 28#include "objfiles.h"
7d9b040b 29#include "infcall.h"
54fcddd0 30#include "dwarf2.h"
3b2ca824 31#include "target-float.h"
325fac50 32#include <algorithm>
7b112f9c 33
88aed45e
UW
34
35/* Check whether FTPYE is a (pointer to) function type that should use
36 the OpenCL vector ABI. */
37
38static int
39ppc_sysv_use_opencl_abi (struct type *ftype)
40{
41 ftype = check_typedef (ftype);
42
43 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
44 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
45
46 return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
47 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
48}
49
0df8b418 50/* Pass the arguments in either registers, or in the stack. Using the
7b112f9c
JT
51 ppc sysv ABI, the first eight words of the argument list (that might
52 be less than eight parameters if some parameters occupy more than one
53 word) are passed in r3..r10 registers. float and double parameters are
0df8b418
MS
54 passed in fpr's, in addition to that. Rest of the parameters if any
55 are passed in user stack.
7b112f9c
JT
56
57 If the function is returning a structure, then the return address is passed
58 in r3, then the first 7 words of the parametes can be passed in registers,
0df8b418 59 starting from r4. */
7b112f9c
JT
60
61CORE_ADDR
7d9b040b 62ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
63 struct regcache *regcache, CORE_ADDR bp_addr,
64 int nargs, struct value **args, CORE_ADDR sp,
65 int struct_return, CORE_ADDR struct_addr)
7b112f9c 66{
40a6adc1 67 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 68 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 69 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 70 ULONGEST saved_sp;
68856ea3
AC
71 int argspace = 0; /* 0 is an initial wrong guess. */
72 int write_pass;
7b112f9c 73
b14d30e1
JM
74 gdb_assert (tdep->wordsize == 4);
75
40a6adc1 76 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 77 &saved_sp);
fb4443d8 78
68856ea3 79 /* Go through the argument list twice.
7b112f9c 80
68856ea3
AC
81 Pass 1: Figure out how much new stack space is required for
82 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
83 ABI doesn't reserve any extra space for parameters which are put
84 in registers, but does always push structures and then pass their
85 address.
7a41266b 86
68856ea3
AC
87 Pass 2: Replay the same computation but this time also write the
88 values out to the target. */
7b112f9c 89
68856ea3
AC
90 for (write_pass = 0; write_pass < 2; write_pass++)
91 {
92 int argno;
93 /* Next available floating point register for float and double
94 arguments. */
95 int freg = 1;
96 /* Next available general register for non-float, non-vector
97 arguments. */
98 int greg = 3;
99 /* Next available vector register for vector arguments. */
100 int vreg = 2;
101 /* Arguments start above the "LR save word" and "Back chain". */
102 int argoffset = 2 * tdep->wordsize;
103 /* Structures start after the arguments. */
104 int structoffset = argoffset + argspace;
105
106 /* If the function is returning a `struct', then the first word
944fcfab
AC
107 (which will be passed in r3) is used for struct return
108 address. In that case we should advance one word and start
109 from r4 register to copy parameters. */
68856ea3 110 if (struct_return)
7b112f9c 111 {
68856ea3
AC
112 if (write_pass)
113 regcache_cooked_write_signed (regcache,
114 tdep->ppc_gp0_regnum + greg,
115 struct_addr);
116 greg++;
7b112f9c 117 }
68856ea3
AC
118
119 for (argno = 0; argno < nargs; argno++)
7b112f9c 120 {
68856ea3 121 struct value *arg = args[argno];
df407dfe 122 struct type *type = check_typedef (value_type (arg));
68856ea3 123 int len = TYPE_LENGTH (type);
0fd88904 124 const bfd_byte *val = value_contents (arg);
68856ea3 125
55eddb0f
DJ
126 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
127 && !tdep->soft_float)
7b112f9c 128 {
68856ea3 129 /* Floating point value converted to "double" then
944fcfab
AC
130 passed in an FP register, when the registers run out,
131 8 byte aligned stack is used. */
68856ea3
AC
132 if (freg <= 8)
133 {
134 if (write_pass)
135 {
136 /* Always store the floating point value using
944fcfab 137 the register's floating-point format. */
0f068fb5 138 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
68856ea3 139 struct type *regtype
366f009f 140 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
3b2ca824 141 target_float_convert (val, type, regval, regtype);
b66f5587
SM
142 regcache->cooked_write (tdep->ppc_fp0_regnum + freg,
143 regval);
68856ea3
AC
144 }
145 freg++;
146 }
7b112f9c
JT
147 else
148 {
f964a756
MK
149 /* The SysV ABI tells us to convert floats to
150 doubles before writing them to an 8 byte aligned
151 stack location. Unfortunately GCC does not do
152 that, and stores floats into 4 byte aligned
153 locations without converting them to doubles.
154 Since there is no know compiler that actually
155 follows the ABI here, we implement the GCC
156 convention. */
157
158 /* Align to 4 bytes or 8 bytes depending on the type of
159 the argument (float or double). */
160 argoffset = align_up (argoffset, len);
68856ea3 161 if (write_pass)
68856ea3 162 write_memory (sp + argoffset, val, len);
f964a756 163 argoffset += len;
7b112f9c
JT
164 }
165 }
b14d30e1
JM
166 else if (TYPE_CODE (type) == TYPE_CODE_FLT
167 && len == 16
168 && !tdep->soft_float
40a6adc1 169 && (gdbarch_long_double_format (gdbarch)
b14d30e1
JM
170 == floatformats_ibm_long_double))
171 {
172 /* IBM long double passed in two FP registers if
173 available, otherwise 8-byte aligned stack. */
174 if (freg <= 7)
175 {
176 if (write_pass)
177 {
b66f5587
SM
178 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
179 regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
180 val + 8);
b14d30e1
JM
181 }
182 freg += 2;
183 }
184 else
185 {
186 argoffset = align_up (argoffset, 8);
187 if (write_pass)
188 write_memory (sp + argoffset, val, len);
189 argoffset += 16;
190 }
191 }
55eddb0f
DJ
192 else if (len == 8
193 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
00fbcec4
JM
194 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
195 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
196 && tdep->soft_float)))
7b112f9c 197 {
00fbcec4
JM
198 /* "long long" or soft-float "double" or "_Decimal64"
199 passed in an odd/even register pair with the low
200 addressed word in the odd register and the high
201 addressed word in the even register, or when the
202 registers run out an 8 byte aligned stack
203 location. */
68856ea3
AC
204 if (greg > 9)
205 {
206 /* Just in case GREG was 10. */
207 greg = 11;
208 argoffset = align_up (argoffset, 8);
209 if (write_pass)
210 write_memory (sp + argoffset, val, len);
211 argoffset += 8;
212 }
68856ea3
AC
213 else
214 {
215 /* Must start on an odd register - r3/r4 etc. */
216 if ((greg & 1) == 0)
217 greg++;
218 if (write_pass)
219 {
b66f5587
SM
220 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
221 val + 0);
222 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
223 val + 4);
68856ea3
AC
224 }
225 greg += 2;
226 }
7b112f9c 227 }
00fbcec4
JM
228 else if (len == 16
229 && ((TYPE_CODE (type) == TYPE_CODE_FLT
230 && (gdbarch_long_double_format (gdbarch)
231 == floatformats_ibm_long_double))
232 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
233 && tdep->soft_float)))
b14d30e1 234 {
00fbcec4
JM
235 /* Soft-float IBM long double or _Decimal128 passed in
236 four consecutive registers, or on the stack. The
237 registers are not necessarily odd/even pairs. */
b14d30e1
JM
238 if (greg > 7)
239 {
240 greg = 11;
241 argoffset = align_up (argoffset, 8);
242 if (write_pass)
243 write_memory (sp + argoffset, val, len);
244 argoffset += 16;
245 }
246 else
247 {
248 if (write_pass)
249 {
b66f5587
SM
250 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
251 val + 0);
252 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
253 val + 4);
254 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 2,
255 val + 8);
256 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 3,
257 val + 12);
b14d30e1
JM
258 }
259 greg += 4;
260 }
261 }
1300a2f4
TJB
262 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
263 && !tdep->soft_float)
264 {
265 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
266 end up in memory. */
267
268 if (freg <= 8)
269 {
270 if (write_pass)
271 {
0f068fb5 272 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
273 const gdb_byte *p;
274
275 /* 32-bit decimal floats are right aligned in the
276 doubleword. */
277 if (TYPE_LENGTH (type) == 4)
278 {
279 memcpy (regval + 4, val, 4);
280 p = regval;
281 }
282 else
283 p = val;
284
b66f5587 285 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, p);
1300a2f4
TJB
286 }
287
288 freg++;
289 }
290 else
291 {
292 argoffset = align_up (argoffset, len);
293
294 if (write_pass)
295 /* Write value in the stack's parameter save area. */
296 write_memory (sp + argoffset, val, len);
297
298 argoffset += len;
299 }
300 }
301 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
302 && !tdep->soft_float)
303 {
304 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
305 pairs. They can end up in memory, using two doublewords. */
306
307 if (freg <= 6)
308 {
309 /* Make sure freg is even. */
310 freg += freg & 1;
311
312 if (write_pass)
313 {
b66f5587
SM
314 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
315 regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
316 val + 8);
1300a2f4
TJB
317 }
318 }
319 else
320 {
321 argoffset = align_up (argoffset, 8);
322
323 if (write_pass)
324 write_memory (sp + argoffset, val, 16);
325
326 argoffset += 16;
327 }
328
329 /* If a 128-bit decimal float goes to the stack because only f7
330 and f8 are free (thus there's no even/odd register pair
331 available), these registers should be marked as occupied.
332 Hence we increase freg even when writing to memory. */
333 freg += 2;
334 }
54fcddd0
UW
335 else if (len < 16
336 && TYPE_CODE (type) == TYPE_CODE_ARRAY
337 && TYPE_VECTOR (type)
338 && opencl_abi)
339 {
340 /* OpenCL vectors shorter than 16 bytes are passed as if
341 a series of independent scalars. */
342 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
343 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
344
345 for (i = 0; i < nelt; i++)
346 {
347 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
348
349 if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
350 {
351 if (freg <= 8)
352 {
353 if (write_pass)
354 {
355 int regnum = tdep->ppc_fp0_regnum + freg;
0f068fb5 356 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
357 struct type *regtype
358 = register_type (gdbarch, regnum);
3b2ca824
UW
359 target_float_convert (elval, eltype,
360 regval, regtype);
b66f5587 361 regcache->cooked_write (regnum, regval);
54fcddd0
UW
362 }
363 freg++;
364 }
365 else
366 {
367 argoffset = align_up (argoffset, len);
368 if (write_pass)
369 write_memory (sp + argoffset, val, len);
370 argoffset += len;
371 }
372 }
373 else if (TYPE_LENGTH (eltype) == 8)
374 {
375 if (greg > 9)
376 {
377 /* Just in case GREG was 10. */
378 greg = 11;
379 argoffset = align_up (argoffset, 8);
380 if (write_pass)
381 write_memory (sp + argoffset, elval,
382 TYPE_LENGTH (eltype));
383 argoffset += 8;
384 }
385 else
386 {
387 /* Must start on an odd register - r3/r4 etc. */
388 if ((greg & 1) == 0)
389 greg++;
390 if (write_pass)
391 {
392 int regnum = tdep->ppc_gp0_regnum + greg;
b66f5587
SM
393 regcache->cooked_write (regnum + 0, elval + 0);
394 regcache->cooked_write (regnum + 1, elval + 4);
54fcddd0
UW
395 }
396 greg += 2;
397 }
398 }
399 else
400 {
0f068fb5 401 gdb_byte word[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
402 store_unsigned_integer (word, tdep->wordsize, byte_order,
403 unpack_long (eltype, elval));
404
405 if (greg <= 10)
406 {
407 if (write_pass)
b66f5587
SM
408 regcache->cooked_write (tdep->ppc_gp0_regnum + greg,
409 word);
54fcddd0
UW
410 greg++;
411 }
412 else
413 {
414 argoffset = align_up (argoffset, tdep->wordsize);
415 if (write_pass)
416 write_memory (sp + argoffset, word, tdep->wordsize);
417 argoffset += tdep->wordsize;
418 }
419 }
420 }
421 }
422 else if (len >= 16
423 && TYPE_CODE (type) == TYPE_CODE_ARRAY
424 && TYPE_VECTOR (type)
425 && opencl_abi)
426 {
427 /* OpenCL vectors 16 bytes or longer are passed as if
428 a series of AltiVec vectors. */
429 int i;
430
431 for (i = 0; i < len / 16; i++)
432 {
433 const gdb_byte *elval = val + i * 16;
434
435 if (vreg <= 13)
436 {
437 if (write_pass)
b66f5587
SM
438 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg,
439 elval);
54fcddd0
UW
440 vreg++;
441 }
442 else
443 {
444 argoffset = align_up (argoffset, 16);
445 if (write_pass)
446 write_memory (sp + argoffset, elval, 16);
447 argoffset += 16;
448 }
449 }
450 }
68856ea3
AC
451 else if (len == 16
452 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
453 && TYPE_VECTOR (type)
454 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
7b112f9c 455 {
68856ea3 456 /* Vector parameter passed in an Altivec register, or
944fcfab 457 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
458 if (vreg <= 13)
459 {
68856ea3 460 if (write_pass)
b66f5587 461 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val);
7b112f9c
JT
462 vreg++;
463 }
464 else
465 {
68856ea3
AC
466 argoffset = align_up (argoffset, 16);
467 if (write_pass)
468 write_memory (sp + argoffset, val, 16);
7b112f9c
JT
469 argoffset += 16;
470 }
471 }
944fcfab 472 else if (len == 8
0a613259 473 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
474 && TYPE_VECTOR (type)
475 && tdep->vector_abi == POWERPC_VEC_SPE)
944fcfab 476 {
68856ea3 477 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
478 that runs out, 8 byte aligned stack location. Note
479 that since e500 vector and general purpose registers
480 both map onto the same underlying register set, a
481 "greg" and not a "vreg" is consumed here. A cooked
482 write stores the value in the correct locations
483 within the raw register cache. */
484 if (greg <= 10)
485 {
68856ea3 486 if (write_pass)
b66f5587 487 regcache->cooked_write (tdep->ppc_ev0_regnum + greg, val);
944fcfab
AC
488 greg++;
489 }
490 else
491 {
68856ea3
AC
492 argoffset = align_up (argoffset, 8);
493 if (write_pass)
494 write_memory (sp + argoffset, val, 8);
944fcfab
AC
495 argoffset += 8;
496 }
497 }
68856ea3
AC
498 else
499 {
500 /* Reduce the parameter down to something that fits in a
944fcfab 501 "word". */
0f068fb5
AH
502 gdb_byte word[PPC_MAX_REGISTER_SIZE];
503 memset (word, 0, PPC_MAX_REGISTER_SIZE);
68856ea3
AC
504 if (len > tdep->wordsize
505 || TYPE_CODE (type) == TYPE_CODE_STRUCT
506 || TYPE_CODE (type) == TYPE_CODE_UNION)
507 {
55eddb0f 508 /* Structs and large values are put in an
0df8b418 509 aligned stack slot ... */
55eddb0f
DJ
510 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
511 && TYPE_VECTOR (type)
512 && len >= 16)
513 structoffset = align_up (structoffset, 16);
514 else
515 structoffset = align_up (structoffset, 8);
516
68856ea3
AC
517 if (write_pass)
518 write_memory (sp + structoffset, val, len);
519 /* ... and then a "word" pointing to that address is
944fcfab 520 passed as the parameter. */
e17a4113 521 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
522 sp + structoffset);
523 structoffset += len;
524 }
525 else if (TYPE_CODE (type) == TYPE_CODE_INT)
526 /* Sign or zero extend the "int" into a "word". */
e17a4113 527 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
528 unpack_long (type, val));
529 else
530 /* Always goes in the low address. */
531 memcpy (word, val, len);
532 /* Store that "word" in a register, or on the stack.
944fcfab 533 The words have "4" byte alignment. */
68856ea3
AC
534 if (greg <= 10)
535 {
536 if (write_pass)
b66f5587 537 regcache->cooked_write (tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
538 greg++;
539 }
540 else
541 {
542 argoffset = align_up (argoffset, tdep->wordsize);
543 if (write_pass)
544 write_memory (sp + argoffset, word, tdep->wordsize);
545 argoffset += tdep->wordsize;
546 }
547 }
548 }
549
550 /* Compute the actual stack space requirements. */
551 if (!write_pass)
552 {
553 /* Remember the amount of space needed by the arguments. */
554 argspace = argoffset;
555 /* Allocate space for both the arguments and the structures. */
556 sp -= (argoffset + structoffset);
557 /* Ensure that the stack is still 16 byte aligned. */
558 sp = align_down (sp, 16);
559 }
65ada037
MK
560
561 /* The psABI says that "A caller of a function that takes a
562 variable argument list shall set condition register bit 6 to
563 1 if it passes one or more arguments in the floating-point
0df8b418 564 registers. It is strongly recommended that the caller set the
65ada037
MK
565 bit to 0 otherwise..." Doing this for normal functions too
566 shouldn't hurt. */
567 if (write_pass)
568 {
569 ULONGEST cr;
570
571 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
572 if (freg > 1)
573 cr |= 0x02000000;
574 else
575 cr &= ~0x02000000;
576 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
577 }
7b112f9c
JT
578 }
579
68856ea3 580 /* Update %sp. */
40a6adc1 581 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
68856ea3
AC
582
583 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 584 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
68856ea3 585
e56a0ecc
AC
586 /* Point the inferior function call's return address at the dummy's
587 breakpoint. */
68856ea3 588 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 589
7b112f9c
JT
590 return sp;
591}
592
e765b44c 593/* Handle the return-value conventions for Decimal Floating Point values. */
f486487f 594static enum return_value_convention
1300a2f4
TJB
595get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
596 struct regcache *regcache, gdb_byte *readbuf,
597 const gdb_byte *writebuf)
598{
599 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
600
601 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
602
603 /* 32-bit and 64-bit decimal floats in f1. */
604 if (TYPE_LENGTH (valtype) <= 8)
605 {
606 if (writebuf != NULL)
607 {
0f068fb5 608 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
609 const gdb_byte *p;
610
611 /* 32-bit decimal float is right aligned in the doubleword. */
612 if (TYPE_LENGTH (valtype) == 4)
613 {
614 memcpy (regval + 4, writebuf, 4);
615 p = regval;
616 }
617 else
618 p = writebuf;
619
b66f5587 620 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, p);
1300a2f4
TJB
621 }
622 if (readbuf != NULL)
623 {
dca08e1f 624 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
1300a2f4
TJB
625
626 /* Left align 32-bit decimal float. */
627 if (TYPE_LENGTH (valtype) == 4)
628 memcpy (readbuf, readbuf + 4, 4);
629 }
630 }
631 /* 128-bit decimal floats in f2,f3. */
632 else if (TYPE_LENGTH (valtype) == 16)
633 {
634 if (writebuf != NULL || readbuf != NULL)
635 {
636 int i;
637
638 for (i = 0; i < 2; i++)
639 {
640 if (writebuf != NULL)
b66f5587
SM
641 regcache->cooked_write (tdep->ppc_fp0_regnum + 2 + i,
642 writebuf + i * 8);
1300a2f4 643 if (readbuf != NULL)
dca08e1f
SM
644 regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i,
645 readbuf + i * 8);
1300a2f4
TJB
646 }
647 }
648 }
649 else
650 /* Can't happen. */
9b20d036 651 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
1300a2f4
TJB
652
653 return RETURN_VALUE_REGISTER_CONVENTION;
654}
655
e754ae69
AC
656/* Handle the return-value conventions specified by the SysV 32-bit
657 PowerPC ABI (including all the supplements):
658
659 no floating-point: floating-point values returned using 32-bit
660 general-purpose registers.
661
662 Altivec: 128-bit vectors returned using vector registers.
663
664 e500: 64-bit vectors returned using the full full 64 bit EV
665 register, floating-point values returned using 32-bit
666 general-purpose registers.
667
668 GCC (broken): Small struct values right (instead of left) aligned
669 when returned in general-purpose registers. */
670
671static enum return_value_convention
54fcddd0
UW
672do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
673 struct type *type, struct regcache *regcache,
674 gdb_byte *readbuf, const gdb_byte *writebuf,
675 int broken_gcc)
e754ae69 676{
05580c65 677 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 678 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 679 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
54fcddd0 680
e754ae69 681 gdb_assert (tdep->wordsize == 4);
54fcddd0 682
e754ae69
AC
683 if (TYPE_CODE (type) == TYPE_CODE_FLT
684 && TYPE_LENGTH (type) <= 8
55eddb0f 685 && !tdep->soft_float)
e754ae69 686 {
963e2bb7 687 if (readbuf)
e754ae69
AC
688 {
689 /* Floats and doubles stored in "f1". Convert the value to
690 the required type. */
0f068fb5 691 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f
JB
692 struct type *regtype = register_type (gdbarch,
693 tdep->ppc_fp0_regnum + 1);
dca08e1f 694 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval);
3b2ca824 695 target_float_convert (regval, regtype, readbuf, type);
e754ae69 696 }
963e2bb7 697 if (writebuf)
e754ae69
AC
698 {
699 /* Floats and doubles stored in "f1". Convert the value to
700 the register's "double" type. */
0f068fb5 701 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f 702 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
3b2ca824 703 target_float_convert (writebuf, type, regval, regtype);
b66f5587 704 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
705 }
706 return RETURN_VALUE_REGISTER_CONVENTION;
707 }
b14d30e1
JM
708 if (TYPE_CODE (type) == TYPE_CODE_FLT
709 && TYPE_LENGTH (type) == 16
710 && !tdep->soft_float
0df8b418
MS
711 && (gdbarch_long_double_format (gdbarch)
712 == floatformats_ibm_long_double))
b14d30e1
JM
713 {
714 /* IBM long double stored in f1 and f2. */
715 if (readbuf)
716 {
dca08e1f
SM
717 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
718 regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8);
b14d30e1
JM
719 }
720 if (writebuf)
721 {
b66f5587
SM
722 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, writebuf);
723 regcache->cooked_write (tdep->ppc_fp0_regnum + 2, writebuf + 8);
b14d30e1
JM
724 }
725 return RETURN_VALUE_REGISTER_CONVENTION;
726 }
00fbcec4
JM
727 if (TYPE_LENGTH (type) == 16
728 && ((TYPE_CODE (type) == TYPE_CODE_FLT
0df8b418
MS
729 && (gdbarch_long_double_format (gdbarch)
730 == floatformats_ibm_long_double))
00fbcec4 731 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
b14d30e1 732 {
00fbcec4
JM
733 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
734 r5, r6. */
b14d30e1
JM
735 if (readbuf)
736 {
dca08e1f
SM
737 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf);
738 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
739 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
740 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
b14d30e1
JM
741 }
742 if (writebuf)
743 {
b66f5587
SM
744 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf);
745 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
746 regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
747 regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
b14d30e1
JM
748 }
749 return RETURN_VALUE_REGISTER_CONVENTION;
750 }
e754ae69 751 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
00fbcec4
JM
752 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
753 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
754 && tdep->soft_float))
e754ae69 755 {
963e2bb7 756 if (readbuf)
e754ae69 757 {
00fbcec4
JM
758 /* A long long, double or _Decimal64 stored in the 32 bit
759 r3/r4. */
dca08e1f
SM
760 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
761 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
e754ae69 762 }
963e2bb7 763 if (writebuf)
e754ae69 764 {
00fbcec4
JM
765 /* A long long, double or _Decimal64 stored in the 32 bit
766 r3/r4. */
b66f5587
SM
767 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
768 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
e754ae69
AC
769 }
770 return RETURN_VALUE_REGISTER_CONVENTION;
771 }
1300a2f4
TJB
772 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
773 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
774 writebuf);
f0027ce2
DJ
775 else if ((TYPE_CODE (type) == TYPE_CODE_INT
776 || TYPE_CODE (type) == TYPE_CODE_CHAR
777 || TYPE_CODE (type) == TYPE_CODE_BOOL
778 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 779 || TYPE_IS_REFERENCE (type)
f0027ce2
DJ
780 || TYPE_CODE (type) == TYPE_CODE_ENUM)
781 && TYPE_LENGTH (type) <= tdep->wordsize)
e754ae69 782 {
963e2bb7 783 if (readbuf)
e754ae69
AC
784 {
785 /* Some sort of integer stored in r3. Since TYPE isn't
786 bigger than the register, sign extension isn't a problem
787 - just do everything unsigned. */
788 ULONGEST regval;
789 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
790 &regval);
e17a4113
UW
791 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
792 regval);
e754ae69 793 }
963e2bb7 794 if (writebuf)
e754ae69
AC
795 {
796 /* Some sort of integer stored in r3. Use unpack_long since
797 that should handle any required sign extension. */
798 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 799 unpack_long (type, writebuf));
e754ae69
AC
800 }
801 return RETURN_VALUE_REGISTER_CONVENTION;
802 }
54fcddd0
UW
803 /* OpenCL vectors < 16 bytes are returned as distinct
804 scalars in f1..f2 or r3..r10. */
805 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
806 && TYPE_VECTOR (type)
807 && TYPE_LENGTH (type) < 16
808 && opencl_abi)
809 {
810 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
811 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
812
813 for (i = 0; i < nelt; i++)
814 {
815 int offset = i * TYPE_LENGTH (eltype);
816
817 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
818 {
819 int regnum = tdep->ppc_fp0_regnum + 1 + i;
0f068fb5 820 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
821 struct type *regtype = register_type (gdbarch, regnum);
822
823 if (writebuf != NULL)
824 {
3b2ca824
UW
825 target_float_convert (writebuf + offset, eltype,
826 regval, regtype);
b66f5587 827 regcache->cooked_write (regnum, regval);
54fcddd0
UW
828 }
829 if (readbuf != NULL)
830 {
dca08e1f 831 regcache->cooked_read (regnum, regval);
3b2ca824
UW
832 target_float_convert (regval, regtype,
833 readbuf + offset, eltype);
54fcddd0
UW
834 }
835 }
836 else
837 {
838 int regnum = tdep->ppc_gp0_regnum + 3 + i;
839 ULONGEST regval;
840
841 if (writebuf != NULL)
842 {
843 regval = unpack_long (eltype, writebuf + offset);
844 regcache_cooked_write_unsigned (regcache, regnum, regval);
845 }
846 if (readbuf != NULL)
847 {
848 regcache_cooked_read_unsigned (regcache, regnum, &regval);
849 store_unsigned_integer (readbuf + offset,
850 TYPE_LENGTH (eltype), byte_order,
851 regval);
852 }
853 }
854 }
855
856 return RETURN_VALUE_REGISTER_CONVENTION;
857 }
858 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
859 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
860 && TYPE_VECTOR (type)
861 && TYPE_LENGTH (type) >= 16
862 && opencl_abi)
863 {
864 int n_regs = TYPE_LENGTH (type) / 16;
865 int i;
866
867 for (i = 0; i < n_regs; i++)
868 {
869 int offset = i * 16;
870 int regnum = tdep->ppc_vr0_regnum + 2 + i;
871
872 if (writebuf != NULL)
b66f5587 873 regcache->cooked_write (regnum, writebuf + offset);
54fcddd0 874 if (readbuf != NULL)
dca08e1f 875 regcache->cooked_read (regnum, readbuf + offset);
54fcddd0
UW
876 }
877
878 return RETURN_VALUE_REGISTER_CONVENTION;
879 }
e754ae69
AC
880 if (TYPE_LENGTH (type) == 16
881 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
882 && TYPE_VECTOR (type)
883 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
e754ae69 884 {
963e2bb7 885 if (readbuf)
e754ae69
AC
886 {
887 /* Altivec places the return value in "v2". */
dca08e1f 888 regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 889 }
963e2bb7 890 if (writebuf)
e754ae69
AC
891 {
892 /* Altivec places the return value in "v2". */
b66f5587 893 regcache->cooked_write (tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
894 }
895 return RETURN_VALUE_REGISTER_CONVENTION;
896 }
55eddb0f
DJ
897 if (TYPE_LENGTH (type) == 16
898 && TYPE_CODE (type) == TYPE_CODE_ARRAY
899 && TYPE_VECTOR (type)
900 && tdep->vector_abi == POWERPC_VEC_GENERIC)
901 {
902 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
903 GCC without AltiVec returns them in memory, but it warns about
904 ABI risks in that case; we don't try to support it. */
905 if (readbuf)
906 {
dca08e1f
SM
907 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
908 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
909 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
910 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
55eddb0f
DJ
911 }
912 if (writebuf)
913 {
b66f5587
SM
914 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
915 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
916 regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
917 regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
55eddb0f
DJ
918 }
919 return RETURN_VALUE_REGISTER_CONVENTION;
920 }
e754ae69
AC
921 if (TYPE_LENGTH (type) == 8
922 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
923 && TYPE_VECTOR (type)
924 && tdep->vector_abi == POWERPC_VEC_SPE)
e754ae69
AC
925 {
926 /* The e500 ABI places return values for the 64-bit DSP types
927 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
928 corresponds to the entire r3 value for e500, whereas GDB's r3
929 only corresponds to the least significant 32-bits. So place
930 the 64-bit DSP type's value in ev3. */
963e2bb7 931 if (readbuf)
dca08e1f 932 regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf);
963e2bb7 933 if (writebuf)
b66f5587 934 regcache->cooked_write (tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
935 return RETURN_VALUE_REGISTER_CONVENTION;
936 }
937 if (broken_gcc && TYPE_LENGTH (type) <= 8)
938 {
61bf9ae0
MK
939 /* GCC screwed up for structures or unions whose size is less
940 than or equal to 8 bytes.. Instead of left-aligning, it
941 right-aligns the data into the buffer formed by r3, r4. */
0f068fb5 942 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
61bf9ae0
MK
943 int len = TYPE_LENGTH (type);
944 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
945
963e2bb7 946 if (readbuf)
e754ae69 947 {
dca08e1f
SM
948 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
949 regvals + 0 * tdep->wordsize);
61bf9ae0 950 if (len > tdep->wordsize)
dca08e1f
SM
951 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
952 regvals + 1 * tdep->wordsize);
61bf9ae0 953 memcpy (readbuf, regvals + offset, len);
e754ae69 954 }
963e2bb7 955 if (writebuf)
e754ae69 956 {
61bf9ae0
MK
957 memset (regvals, 0, sizeof regvals);
958 memcpy (regvals + offset, writebuf, len);
b66f5587
SM
959 regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
960 regvals + 0 * tdep->wordsize);
61bf9ae0 961 if (len > tdep->wordsize)
b66f5587
SM
962 regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
963 regvals + 1 * tdep->wordsize);
e754ae69 964 }
61bf9ae0 965
e754ae69
AC
966 return RETURN_VALUE_REGISTER_CONVENTION;
967 }
968 if (TYPE_LENGTH (type) <= 8)
969 {
963e2bb7 970 if (readbuf)
e754ae69
AC
971 {
972 /* This matches SVr4 PPC, it does not match GCC. */
973 /* The value is right-padded to 8 bytes and then loaded, as
974 two "words", into r3/r4. */
0f068fb5 975 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
dca08e1f
SM
976 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
977 regvals + 0 * tdep->wordsize);
e754ae69 978 if (TYPE_LENGTH (type) > tdep->wordsize)
dca08e1f
SM
979 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
980 regvals + 1 * tdep->wordsize);
963e2bb7 981 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 982 }
963e2bb7 983 if (writebuf)
e754ae69
AC
984 {
985 /* This matches SVr4 PPC, it does not match GCC. */
986 /* The value is padded out to 8 bytes and then loaded, as
987 two "words" into r3/r4. */
0f068fb5 988 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
e754ae69 989 memset (regvals, 0, sizeof regvals);
963e2bb7 990 memcpy (regvals, writebuf, TYPE_LENGTH (type));
b66f5587
SM
991 regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
992 regvals + 0 * tdep->wordsize);
e754ae69 993 if (TYPE_LENGTH (type) > tdep->wordsize)
b66f5587
SM
994 regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
995 regvals + 1 * tdep->wordsize);
e754ae69
AC
996 }
997 return RETURN_VALUE_REGISTER_CONVENTION;
998 }
999 return RETURN_VALUE_STRUCT_CONVENTION;
1000}
1001
05580c65 1002enum return_value_convention
6a3a010b 1003ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
1004 struct type *valtype, struct regcache *regcache,
1005 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1006{
6a3a010b
MR
1007 return do_ppc_sysv_return_value (gdbarch,
1008 function ? value_type (function) : NULL,
1009 valtype, regcache, readbuf, writebuf, 0);
e754ae69
AC
1010}
1011
05580c65 1012enum return_value_convention
963e2bb7 1013ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
6a3a010b 1014 struct value *function,
963e2bb7
AC
1015 struct type *valtype,
1016 struct regcache *regcache,
50fd1280 1017 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1018{
6a3a010b
MR
1019 return do_ppc_sysv_return_value (gdbarch,
1020 function ? value_type (function) : NULL,
1021 valtype, regcache, readbuf, writebuf, 1);
944fcfab 1022}
afd48b75 1023
b6e1c027
AC
1024/* The helper function for 64-bit SYSV push_dummy_call. Converts the
1025 function's code address back into the function's descriptor
1026 address.
1027
1028 Find a value for the TOC register. Every symbol should have both
1029 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1030 FN's descriptor, while ".FN" points at the entry point (which
1031 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1032 FN's descriptor address (while at the same time being careful to
1033 find "FN" in the same object file as ".FN"). */
1034
1035static int
1036convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1037{
1038 struct obj_section *dot_fn_section;
7cbd4a93 1039 struct bound_minimal_symbol dot_fn;
3b7344d5 1040 struct bound_minimal_symbol fn;
7cbd4a93 1041
b6e1c027
AC
1042 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1043 have a name of the form ".FN"). */
1044 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
efd66ac6 1045 if (dot_fn.minsym == NULL || MSYMBOL_LINKAGE_NAME (dot_fn.minsym)[0] != '.')
b6e1c027
AC
1046 return 0;
1047 /* Get the section that contains CODE_ADDR. Need this for the
1048 "objfile" that it contains. */
1049 dot_fn_section = find_pc_section (code_addr);
1050 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1051 return 0;
1052 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1053 address. Only look for the minimal symbol in ".FN"'s object file
1054 - avoids problems when two object files (i.e., shared libraries)
1055 contain a minimal symbol with the same name. */
efd66ac6 1056 fn = lookup_minimal_symbol (MSYMBOL_LINKAGE_NAME (dot_fn.minsym) + 1, NULL,
b6e1c027 1057 dot_fn_section->objfile);
3b7344d5 1058 if (fn.minsym == NULL)
b6e1c027
AC
1059 return 0;
1060 /* Found a descriptor. */
77e371c0 1061 (*desc_addr) = BMSYMBOL_VALUE_ADDRESS (fn);
b6e1c027
AC
1062 return 1;
1063}
1064
cc0e89c5
UW
1065/* Walk down the type tree of TYPE counting consecutive base elements.
1066 If *FIELD_TYPE is NULL, then set it to the first valid floating point
1067 or vector type. If a non-floating point or vector type is found, or
1068 if a floating point or vector type that doesn't match a non-NULL
1069 *FIELD_TYPE is found, then return -1, otherwise return the count in the
1070 sub-tree. */
1071
1072static LONGEST
1073ppc64_aggregate_candidate (struct type *type,
1074 struct type **field_type)
1075{
1076 type = check_typedef (type);
1077
1078 switch (TYPE_CODE (type))
1079 {
1080 case TYPE_CODE_FLT:
1081 case TYPE_CODE_DECFLOAT:
1082 if (!*field_type)
1083 *field_type = type;
1084 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1085 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1086 return 1;
1087 break;
1088
1089 case TYPE_CODE_COMPLEX:
1090 type = TYPE_TARGET_TYPE (type);
1091 if (TYPE_CODE (type) == TYPE_CODE_FLT
1092 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1093 {
1094 if (!*field_type)
1095 *field_type = type;
1096 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1097 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1098 return 2;
1099 }
1100 break;
1101
1102 case TYPE_CODE_ARRAY:
1103 if (TYPE_VECTOR (type))
1104 {
1105 if (!*field_type)
1106 *field_type = type;
1107 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1108 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1109 return 1;
1110 }
1111 else
1112 {
1113 LONGEST count, low_bound, high_bound;
1114
1115 count = ppc64_aggregate_candidate
1116 (TYPE_TARGET_TYPE (type), field_type);
1117 if (count == -1)
1118 return -1;
1119
1120 if (!get_array_bounds (type, &low_bound, &high_bound))
1121 return -1;
1122 count *= high_bound - low_bound;
1123
1124 /* There must be no padding. */
1125 if (count == 0)
1126 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1127 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1128 return -1;
1129
1130 return count;
1131 }
1132 break;
1133
1134 case TYPE_CODE_STRUCT:
1135 case TYPE_CODE_UNION:
1136 {
1137 LONGEST count = 0;
1138 int i;
1139
1140 for (i = 0; i < TYPE_NFIELDS (type); i++)
1141 {
1142 LONGEST sub_count;
1143
1144 if (field_is_static (&TYPE_FIELD (type, i)))
1145 continue;
1146
1147 sub_count = ppc64_aggregate_candidate
1148 (TYPE_FIELD_TYPE (type, i), field_type);
1149 if (sub_count == -1)
1150 return -1;
1151
1152 if (TYPE_CODE (type) == TYPE_CODE_STRUCT)
1153 count += sub_count;
1154 else
325fac50 1155 count = std::max (count, sub_count);
cc0e89c5
UW
1156 }
1157
1158 /* There must be no padding. */
1159 if (count == 0)
1160 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1161 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1162 return -1;
1163
1164 return count;
1165 }
1166 break;
1167
1168 default:
1169 break;
1170 }
1171
1172 return -1;
1173}
1174
1175/* If an argument of type TYPE is a homogeneous float or vector aggregate
1176 that shall be passed in FP/vector registers according to the ELFv2 ABI,
1177 return the homogeneous element type in *ELT_TYPE and the number of
1178 elements in *N_ELTS, and return non-zero. Otherwise, return zero. */
1179
1180static int
1181ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
1182 struct type **elt_type, int *n_elts)
1183{
1184 /* Complex types at the top level are treated separately. However,
1185 complex types can be elements of homogeneous aggregates. */
1186 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1187 || TYPE_CODE (type) == TYPE_CODE_UNION
1188 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && !TYPE_VECTOR (type)))
1189 {
1190 struct type *field_type = NULL;
1191 LONGEST field_count = ppc64_aggregate_candidate (type, &field_type);
1192
1193 if (field_count > 0)
1194 {
1195 int n_regs = ((TYPE_CODE (field_type) == TYPE_CODE_FLT
1196 || TYPE_CODE (field_type) == TYPE_CODE_DECFLOAT)?
1197 (TYPE_LENGTH (field_type) + 7) >> 3 : 1);
1198
1199 /* The ELFv2 ABI allows homogeneous aggregates to occupy
1200 up to 8 registers. */
1201 if (field_count * n_regs <= 8)
1202 {
1203 if (elt_type)
1204 *elt_type = field_type;
1205 if (n_elts)
1206 *n_elts = (int) field_count;
1207 /* Note that field_count is LONGEST since it may hold the size
1208 of an array, while *n_elts is int since its value is bounded
1209 by the number of registers used for argument passing. The
1210 cast cannot overflow due to the bounds checking above. */
1211 return 1;
1212 }
1213 }
1214 }
1215
1216 return 0;
1217}
1218
e765b44c
UW
1219/* Structure holding the next argument position. */
1220struct ppc64_sysv_argpos
1221 {
1222 /* Register cache holding argument registers. If this is NULL,
1223 we only simulate argument processing without actually updating
1224 any registers or memory. */
1225 struct regcache *regcache;
1226 /* Next available general-purpose argument register. */
1227 int greg;
1228 /* Next available floating-point argument register. */
1229 int freg;
1230 /* Next available vector argument register. */
1231 int vreg;
1232 /* The address, at which the next general purpose parameter
1233 (integer, struct, float, vector, ...) should be saved. */
1234 CORE_ADDR gparam;
1235 /* The address, at which the next by-reference parameter
1236 (non-Altivec vector, variably-sized type) should be saved. */
1237 CORE_ADDR refparam;
1238 };
1239
1240/* VAL is a value of length LEN. Store it into the argument area on the
1241 stack and load it into the corresponding general-purpose registers
1242 required by the ABI, and update ARGPOS.
1243
1244 If ALIGN is nonzero, it specifies the minimum alignment required
1245 for the on-stack copy of the argument. */
d81e75c0 1246
e765b44c
UW
1247static void
1248ppc64_sysv_abi_push_val (struct gdbarch *gdbarch,
1249 const bfd_byte *val, int len, int align,
1250 struct ppc64_sysv_argpos *argpos)
1251{
1252 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1253 int offset = 0;
1254
1255 /* Enforce alignment of stack location, if requested. */
1256 if (align > tdep->wordsize)
1257 {
1258 CORE_ADDR aligned_gparam = align_up (argpos->gparam, align);
1259
1260 argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize;
1261 argpos->gparam = aligned_gparam;
1262 }
1263
1264 /* The ABI (version 1.9) specifies that values smaller than one
1265 doubleword are right-aligned and those larger are left-aligned.
1266 GCC versions before 3.4 implemented this incorrectly; see
1267 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
d63167af
UW
1268 if (len < tdep->wordsize
1269 && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
e765b44c
UW
1270 offset = tdep->wordsize - len;
1271
1272 if (argpos->regcache)
1273 write_memory (argpos->gparam + offset, val, len);
1274 argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize);
1275
1276 while (len >= tdep->wordsize)
1277 {
1278 if (argpos->regcache && argpos->greg <= 10)
b66f5587
SM
1279 argpos->regcache->cooked_write (tdep->ppc_gp0_regnum + argpos->greg,
1280 val);
e765b44c
UW
1281 argpos->greg++;
1282 len -= tdep->wordsize;
1283 val += tdep->wordsize;
1284 }
1285
1286 if (len > 0)
1287 {
1288 if (argpos->regcache && argpos->greg <= 10)
1289 regcache_cooked_write_part (argpos->regcache,
1290 tdep->ppc_gp0_regnum + argpos->greg,
1291 offset, len, val);
1292 argpos->greg++;
1293 }
1294}
1295
1296/* The same as ppc64_sysv_abi_push_val, but using a single-word integer
1297 value VAL as argument. */
d81e75c0
TD
1298
1299static void
e765b44c
UW
1300ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val,
1301 struct ppc64_sysv_argpos *argpos)
d81e75c0 1302{
e765b44c
UW
1303 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1304 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0f068fb5 1305 gdb_byte buf[PPC_MAX_REGISTER_SIZE];
d81e75c0 1306
e765b44c
UW
1307 if (argpos->regcache)
1308 store_unsigned_integer (buf, tdep->wordsize, byte_order, val);
1309 ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos);
1310}
1311
1312/* VAL is a value of TYPE, a (binary or decimal) floating-point type.
1313 Load it into a floating-point register if required by the ABI,
1314 and update ARGPOS. */
1315
1316static void
1317ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch,
1318 struct type *type, const bfd_byte *val,
1319 struct ppc64_sysv_argpos *argpos)
1320{
1321 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1322 if (tdep->soft_float)
1323 return;
1324
1325 if (TYPE_LENGTH (type) <= 8
1326 && TYPE_CODE (type) == TYPE_CODE_FLT)
d81e75c0 1327 {
e765b44c
UW
1328 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1329 to double first. */
1330 if (argpos->regcache && argpos->freg <= 13)
1331 {
1332 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1333 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1334 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
d81e75c0 1335
3b2ca824 1336 target_float_convert (val, type, regval, regtype);
b66f5587 1337 argpos->regcache->cooked_write (regnum, regval);
e765b44c 1338 }
d81e75c0 1339
e765b44c
UW
1340 argpos->freg++;
1341 }
1342 else if (TYPE_LENGTH (type) <= 8
1343 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1344 {
1345 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1346 placed in the least significant word. */
1347 if (argpos->regcache && argpos->freg <= 13)
1348 {
1349 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
5b757e5d
UW
1350 int offset = 0;
1351
1352 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1353 offset = 8 - TYPE_LENGTH (type);
d81e75c0 1354
e765b44c
UW
1355 regcache_cooked_write_part (argpos->regcache, regnum,
1356 offset, TYPE_LENGTH (type), val);
1357 }
d81e75c0 1358
e765b44c
UW
1359 argpos->freg++;
1360 }
1361 else if (TYPE_LENGTH (type) == 16
1362 && TYPE_CODE (type) == TYPE_CODE_FLT
1363 && (gdbarch_long_double_format (gdbarch)
1364 == floatformats_ibm_long_double))
1365 {
1366 /* IBM long double stored in two consecutive FPRs. */
1367 if (argpos->regcache && argpos->freg <= 13)
d81e75c0 1368 {
e765b44c
UW
1369 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1370
b66f5587 1371 argpos->regcache->cooked_write (regnum, val);
e765b44c 1372 if (argpos->freg <= 12)
b66f5587 1373 argpos->regcache->cooked_write (regnum + 1, val + 8);
d81e75c0 1374 }
d81e75c0 1375
e765b44c
UW
1376 argpos->freg += 2;
1377 }
1378 else if (TYPE_LENGTH (type) == 16
1379 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1380 {
1381 /* 128-bit decimal floating-point values are stored in and even/odd
1382 pair of FPRs, with the even FPR holding the most significant half. */
1383 argpos->freg += argpos->freg & 1;
d81e75c0 1384
e765b44c 1385 if (argpos->regcache && argpos->freg <= 12)
d81e75c0 1386 {
e765b44c 1387 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
0ff3e01f
UW
1388 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1389 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
d81e75c0 1390
b66f5587
SM
1391 argpos->regcache->cooked_write (regnum, val + hipart);
1392 argpos->regcache->cooked_write (regnum + 1, val + lopart);
d81e75c0 1393 }
e765b44c
UW
1394
1395 argpos->freg += 2;
d81e75c0 1396 }
e765b44c
UW
1397}
1398
1399/* VAL is a value of AltiVec vector type. Load it into a vector register
1400 if required by the ABI, and update ARGPOS. */
1401
1402static void
1403ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val,
1404 struct ppc64_sysv_argpos *argpos)
1405{
1406 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1407
1408 if (argpos->regcache && argpos->vreg <= 13)
b66f5587 1409 argpos->regcache->cooked_write (tdep->ppc_vr0_regnum + argpos->vreg, val);
e765b44c
UW
1410
1411 argpos->vreg++;
1412}
1413
1414/* VAL is a value of TYPE. Load it into memory and/or registers
1415 as required by the ABI, and update ARGPOS. */
1416
1417static void
1418ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
1419 struct type *type, const bfd_byte *val,
1420 struct ppc64_sysv_argpos *argpos)
1421{
1422 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1423
1424 if (TYPE_CODE (type) == TYPE_CODE_FLT
1425 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1426 {
1427 /* Floating-point scalars are passed in floating-point registers. */
1428 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1429 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1430 }
1431 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1432 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1433 && TYPE_LENGTH (type) == 16)
1434 {
1435 /* AltiVec vectors are passed aligned, and in vector registers. */
1436 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 16, argpos);
1437 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1438 }
1439 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1440 && TYPE_LENGTH (type) >= 16)
d81e75c0 1441 {
e765b44c
UW
1442 /* Non-Altivec vectors are passed by reference. */
1443
1444 /* Copy value onto the stack ... */
1445 CORE_ADDR addr = align_up (argpos->refparam, 16);
1446 if (argpos->regcache)
1447 write_memory (addr, val, TYPE_LENGTH (type));
1448 argpos->refparam = align_up (addr + TYPE_LENGTH (type), tdep->wordsize);
1449
1450 /* ... and pass a pointer to the copy as parameter. */
1451 ppc64_sysv_abi_push_integer (gdbarch, addr, argpos);
1452 }
1453 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1454 || TYPE_CODE (type) == TYPE_CODE_ENUM
1455 || TYPE_CODE (type) == TYPE_CODE_BOOL
1456 || TYPE_CODE (type) == TYPE_CODE_CHAR
1457 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 1458 || TYPE_IS_REFERENCE (type))
e765b44c
UW
1459 && TYPE_LENGTH (type) <= tdep->wordsize)
1460 {
1461 ULONGEST word = 0;
1462
1463 if (argpos->regcache)
d81e75c0 1464 {
e765b44c
UW
1465 /* Sign extend the value, then store it unsigned. */
1466 word = unpack_long (type, val);
1467
1468 /* Convert any function code addresses into descriptors. */
d4094b6a
UW
1469 if (tdep->elf_abi == POWERPC_ELF_V1
1470 && (TYPE_CODE (type) == TYPE_CODE_PTR
1471 || TYPE_CODE (type) == TYPE_CODE_REF))
e765b44c
UW
1472 {
1473 struct type *target_type
1474 = check_typedef (TYPE_TARGET_TYPE (type));
1475
1476 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1477 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1478 {
1479 CORE_ADDR desc = word;
1480
1481 convert_code_addr_to_desc_addr (word, &desc);
1482 word = desc;
1483 }
1484 }
d81e75c0 1485 }
e765b44c
UW
1486
1487 ppc64_sysv_abi_push_integer (gdbarch, word, argpos);
1488 }
1489 else
1490 {
1491 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1492
1493 /* The ABI (version 1.9) specifies that structs containing a
1494 single floating-point value, at any level of nesting of
1495 single-member structs, are passed in floating-point registers. */
1496 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1497 && TYPE_NFIELDS (type) == 1)
d81e75c0 1498 {
e765b44c
UW
1499 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1500 && TYPE_NFIELDS (type) == 1)
1501 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1502
1503 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1504 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
d81e75c0 1505 }
cc0e89c5
UW
1506
1507 /* In the ELFv2 ABI, homogeneous floating-point or vector
1508 aggregates are passed in a series of registers. */
1509 if (tdep->elf_abi == POWERPC_ELF_V2)
1510 {
1511 struct type *eltype;
1512 int i, nelt;
1513
1514 if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt))
1515 for (i = 0; i < nelt; i++)
1516 {
1517 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1518
1519 if (TYPE_CODE (eltype) == TYPE_CODE_FLT
1520 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT)
1521 ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos);
1522 else if (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
1523 && TYPE_VECTOR (eltype)
1524 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1525 && TYPE_LENGTH (eltype) == 16)
1526 ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
1527 }
1528 }
d81e75c0
TD
1529 }
1530}
1531
0df8b418 1532/* Pass the arguments in either registers, or in the stack. Using the
8be9034a
AC
1533 ppc 64 bit SysV ABI.
1534
1535 This implements a dumbed down version of the ABI. It always writes
1536 values to memory, GPR and FPR, even when not necessary. Doing this
0df8b418 1537 greatly simplifies the logic. */
8be9034a
AC
1538
1539CORE_ADDR
0df8b418
MS
1540ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1541 struct value *function,
8be9034a
AC
1542 struct regcache *regcache, CORE_ADDR bp_addr,
1543 int nargs, struct value **args, CORE_ADDR sp,
1544 int struct_return, CORE_ADDR struct_addr)
1545{
7d9b040b 1546 CORE_ADDR func_addr = find_function_addr (function, NULL);
40a6adc1 1547 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 1548 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 1549 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 1550 ULONGEST back_chain;
8be9034a
AC
1551 /* See for-loop comment below. */
1552 int write_pass;
24e9cda0
UW
1553 /* Size of the by-reference parameter copy region, the final value is
1554 computed in the for-loop below. */
1555 LONGEST refparam_size = 0;
8be9034a
AC
1556 /* Size of the general parameter region, the final value is computed
1557 in the for-loop below. */
1558 LONGEST gparam_size = 0;
1559 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
0df8b418 1560 calls to align_up(), align_down(), etc. because this makes it
8be9034a
AC
1561 easier to reuse this code (in a copy/paste sense) in the future,
1562 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1563 at some point makes it easier to verify that this function is
1564 correct without having to do a non-local analysis to figure out
1565 the possible values of tdep->wordsize. */
1566 gdb_assert (tdep->wordsize == 8);
1567
55eddb0f
DJ
1568 /* This function exists to support a calling convention that
1569 requires floating-point registers. It shouldn't be used on
1570 processors that lack them. */
1571 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1572
fb4443d8
UW
1573 /* By this stage in the proceedings, SP has been decremented by "red
1574 zone size" + "struct return size". Fetch the stack-pointer from
1575 before this and use that as the BACK_CHAIN. */
40a6adc1 1576 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 1577 &back_chain);
fb4443d8 1578
8be9034a
AC
1579 /* Go through the argument list twice.
1580
1581 Pass 1: Compute the function call's stack space and register
1582 requirements.
1583
1584 Pass 2: Replay the same computation but this time also write the
1585 values out to the target. */
1586
1587 for (write_pass = 0; write_pass < 2; write_pass++)
1588 {
1589 int argno;
e765b44c
UW
1590
1591 struct ppc64_sysv_argpos argpos;
1592 argpos.greg = 3;
1593 argpos.freg = 1;
1594 argpos.vreg = 2;
8be9034a
AC
1595
1596 if (!write_pass)
1597 {
24e9cda0
UW
1598 /* During the first pass, GPARAM and REFPARAM are more like
1599 offsets (start address zero) than addresses. That way
1600 they accumulate the total stack space each region
1601 requires. */
e765b44c
UW
1602 argpos.regcache = NULL;
1603 argpos.gparam = 0;
1604 argpos.refparam = 0;
8be9034a
AC
1605 }
1606 else
1607 {
24e9cda0
UW
1608 /* Decrement the stack pointer making space for the Altivec
1609 and general on-stack parameters. Set refparam and gparam
1610 to their corresponding regions. */
e765b44c
UW
1611 argpos.regcache = regcache;
1612 argpos.refparam = align_down (sp - refparam_size, 16);
1613 argpos.gparam = align_down (argpos.refparam - gparam_size, 16);
52f548e4
UW
1614 /* Add in space for the TOC, link editor double word (v1 only),
1615 compiler double word (v1 only), LR save area, CR save area,
1616 and backchain. */
1617 if (tdep->elf_abi == POWERPC_ELF_V1)
1618 sp = align_down (argpos.gparam - 48, 16);
1619 else
1620 sp = align_down (argpos.gparam - 32, 16);
8be9034a
AC
1621 }
1622
1623 /* If the function is returning a `struct', then there is an
1624 extra hidden parameter (which will be passed in r3)
1625 containing the address of that struct.. In that case we
1626 should advance one word and start from r4 register to copy
1627 parameters. This also consumes one on-stack parameter slot. */
1628 if (struct_return)
e765b44c 1629 ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos);
8be9034a
AC
1630
1631 for (argno = 0; argno < nargs; argno++)
1632 {
1633 struct value *arg = args[argno];
df407dfe 1634 struct type *type = check_typedef (value_type (arg));
0fd88904 1635 const bfd_byte *val = value_contents (arg);
ce0451ad 1636
e765b44c 1637 if (TYPE_CODE (type) == TYPE_CODE_COMPLEX)
8be9034a 1638 {
e765b44c
UW
1639 /* Complex types are passed as if two independent scalars. */
1640 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1300a2f4 1641
e765b44c
UW
1642 ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos);
1643 ppc64_sysv_abi_push_param (gdbarch, eltype,
1644 val + TYPE_LENGTH (eltype), &argpos);
1300a2f4 1645 }
e765b44c 1646 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
54fcddd0
UW
1647 && opencl_abi)
1648 {
1649 /* OpenCL vectors shorter than 16 bytes are passed as if
e765b44c
UW
1650 a series of independent scalars; OpenCL vectors 16 bytes
1651 or longer are passed as if a series of AltiVec vectors. */
1652 struct type *eltype;
1653 int i, nelt;
54fcddd0 1654
e765b44c
UW
1655 if (TYPE_LENGTH (type) < 16)
1656 eltype = check_typedef (TYPE_TARGET_TYPE (type));
1657 else
1658 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1659
1660 nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
54fcddd0
UW
1661 for (i = 0; i < nelt; i++)
1662 {
1663 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1664
e765b44c 1665 ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos);
8be9034a 1666 }
8be9034a
AC
1667 }
1668 else
1669 {
e765b44c
UW
1670 /* All other types are passed as single arguments. */
1671 ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos);
8be9034a
AC
1672 }
1673 }
1674
1675 if (!write_pass)
1676 {
24e9cda0 1677 /* Save the true region sizes ready for the second pass. */
e765b44c 1678 refparam_size = argpos.refparam;
24e9cda0 1679 /* Make certain that the general parameter save area is at
8be9034a 1680 least the minimum 8 registers (or doublewords) in size. */
e765b44c 1681 if (argpos.greg < 8)
8be9034a
AC
1682 gparam_size = 8 * tdep->wordsize;
1683 else
e765b44c 1684 gparam_size = argpos.gparam;
8be9034a
AC
1685 }
1686 }
1687
1688 /* Update %sp. */
40a6adc1 1689 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
8be9034a
AC
1690
1691 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 1692 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
8be9034a
AC
1693
1694 /* Point the inferior function call's return address at the dummy's
1695 breakpoint. */
1696 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1697
d4094b6a
UW
1698 /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use
1699 that to find the TOC. If we're calling via a function pointer,
1700 the pointer itself identifies the descriptor. */
1701 if (tdep->elf_abi == POWERPC_ELF_V1)
1702 {
1703 struct type *ftype = check_typedef (value_type (function));
1704 CORE_ADDR desc_addr = value_as_address (function);
1705
1706 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1707 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1708 {
1709 /* The TOC is the second double word in the descriptor. */
1710 CORE_ADDR toc =
1711 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1712 tdep->wordsize, byte_order);
1713
1714 regcache_cooked_write_unsigned (regcache,
1715 tdep->ppc_gp0_regnum + 2, toc);
1716 }
1717 }
1718
1719 /* In the ELFv2 ABI, we need to pass the target address in r12 since
1720 we may be calling a global entry point. */
1721 if (tdep->elf_abi == POWERPC_ELF_V2)
1722 regcache_cooked_write_unsigned (regcache,
1723 tdep->ppc_gp0_regnum + 12, func_addr);
8be9034a
AC
1724
1725 return sp;
1726}
1727
e765b44c
UW
1728/* Subroutine of ppc64_sysv_abi_return_value that handles "base" types:
1729 integer, floating-point, and AltiVec vector types.
afd48b75 1730
e765b44c
UW
1731 This routine also handles components of aggregate return types;
1732 INDEX describes which part of the aggregate is to be handled.
afd48b75 1733
e765b44c
UW
1734 Returns true if VALTYPE is some such base type that could be handled,
1735 false otherwise. */
1736static int
1737ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
1738 struct regcache *regcache, gdb_byte *readbuf,
1739 const gdb_byte *writebuf, int index)
afd48b75 1740{
05580c65 1741 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152 1742
e765b44c 1743 /* Integers live in GPRs starting at r3. */
b6e1c027 1744 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
93d4208d
UW
1745 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1746 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1747 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
b6e1c027 1748 && TYPE_LENGTH (valtype) <= 8)
afd48b75 1749 {
e765b44c
UW
1750 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1751
963e2bb7 1752 if (writebuf != NULL)
afd48b75
AC
1753 {
1754 /* Be careful to sign extend the value. */
e765b44c 1755 regcache_cooked_write_unsigned (regcache, regnum,
963e2bb7 1756 unpack_long (valtype, writebuf));
afd48b75 1757 }
963e2bb7 1758 if (readbuf != NULL)
afd48b75 1759 {
e765b44c 1760 /* Extract the integer from GPR. Since this is truncating the
afd48b75
AC
1761 value, there isn't a sign extension problem. */
1762 ULONGEST regval;
e765b44c
UW
1763
1764 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1765 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype),
1766 gdbarch_byte_order (gdbarch), regval);
afd48b75 1767 }
e765b44c 1768 return 1;
afd48b75 1769 }
e765b44c
UW
1770
1771 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1772 to double first. */
1773 if (TYPE_LENGTH (valtype) <= 8
1774 && TYPE_CODE (valtype) == TYPE_CODE_FLT)
afd48b75 1775 {
e765b44c
UW
1776 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1777 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1778 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
e765b44c 1779
963e2bb7 1780 if (writebuf != NULL)
e765b44c 1781 {
3b2ca824 1782 target_float_convert (writebuf, valtype, regval, regtype);
b66f5587 1783 regcache->cooked_write (regnum, regval);
e765b44c 1784 }
963e2bb7 1785 if (readbuf != NULL)
e765b44c 1786 {
dca08e1f 1787 regcache->cooked_read (regnum, regval);
3b2ca824 1788 target_float_convert (regval, regtype, readbuf, valtype);
e765b44c
UW
1789 }
1790 return 1;
afd48b75 1791 }
54fcddd0 1792
e765b44c
UW
1793 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1794 placed in the least significant word. */
1795 if (TYPE_LENGTH (valtype) <= 8
1796 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1797 {
1798 int regnum = tdep->ppc_fp0_regnum + 1 + index;
5b757e5d
UW
1799 int offset = 0;
1800
1801 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1802 offset = 8 - TYPE_LENGTH (valtype);
54fcddd0 1803
e765b44c
UW
1804 if (writebuf != NULL)
1805 regcache_cooked_write_part (regcache, regnum,
1806 offset, TYPE_LENGTH (valtype), writebuf);
1807 if (readbuf != NULL)
73bb0000
SM
1808 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1809 readbuf);
e765b44c
UW
1810 return 1;
1811 }
54fcddd0 1812
e765b44c
UW
1813 /* IBM long double stored in two consecutive FPRs. */
1814 if (TYPE_LENGTH (valtype) == 16
1815 && TYPE_CODE (valtype) == TYPE_CODE_FLT
1816 && (gdbarch_long_double_format (gdbarch)
1817 == floatformats_ibm_long_double))
1818 {
1819 int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index;
54fcddd0 1820
e765b44c
UW
1821 if (writebuf != NULL)
1822 {
b66f5587
SM
1823 regcache->cooked_write (regnum, writebuf);
1824 regcache->cooked_write (regnum + 1, writebuf + 8);
54fcddd0 1825 }
e765b44c
UW
1826 if (readbuf != NULL)
1827 {
dca08e1f
SM
1828 regcache->cooked_read (regnum, readbuf);
1829 regcache->cooked_read (regnum + 1, readbuf + 8);
e765b44c
UW
1830 }
1831 return 1;
54fcddd0 1832 }
e765b44c
UW
1833
1834 /* 128-bit decimal floating-point values are stored in an even/odd
1835 pair of FPRs, with the even FPR holding the most significant half. */
1836 if (TYPE_LENGTH (valtype) == 16
1837 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
54fcddd0 1838 {
e765b44c 1839 int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index;
0ff3e01f
UW
1840 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1841 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
54fcddd0 1842
e765b44c 1843 if (writebuf != NULL)
54fcddd0 1844 {
b66f5587
SM
1845 regcache->cooked_write (regnum, writebuf + hipart);
1846 regcache->cooked_write (regnum + 1, writebuf + lopart);
54fcddd0 1847 }
e765b44c
UW
1848 if (readbuf != NULL)
1849 {
dca08e1f
SM
1850 regcache->cooked_read (regnum, readbuf + hipart);
1851 regcache->cooked_read (regnum + 1, readbuf + lopart);
e765b44c
UW
1852 }
1853 return 1;
54fcddd0 1854 }
e765b44c
UW
1855
1856 /* AltiVec vectors are returned in VRs starting at v2. */
a1da2672
UW
1857 if (TYPE_LENGTH (valtype) == 16
1858 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
e765b44c 1859 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
afd48b75 1860 {
e765b44c
UW
1861 int regnum = tdep->ppc_vr0_regnum + 2 + index;
1862
1863 if (writebuf != NULL)
b66f5587 1864 regcache->cooked_write (regnum, writebuf);
e765b44c 1865 if (readbuf != NULL)
dca08e1f 1866 regcache->cooked_read (regnum, readbuf);
e765b44c 1867 return 1;
afd48b75 1868 }
e765b44c 1869
a1da2672
UW
1870 /* Short vectors are returned in GPRs starting at r3. */
1871 if (TYPE_LENGTH (valtype) <= 8
1872 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype))
1873 {
1874 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1875 int offset = 0;
1876
1877 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1878 offset = 8 - TYPE_LENGTH (valtype);
1879
1880 if (writebuf != NULL)
1881 regcache_cooked_write_part (regcache, regnum,
1882 offset, TYPE_LENGTH (valtype), writebuf);
1883 if (readbuf != NULL)
73bb0000
SM
1884 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1885 readbuf);
a1da2672
UW
1886 return 1;
1887 }
1888
e765b44c
UW
1889 return 0;
1890}
1891
1892/* The 64 bit ABI return value convention.
1893
1894 Return non-zero if the return-value is stored in a register, return
1895 0 if the return-value is instead stored on the stack (a.k.a.,
1896 struct return convention).
1897
1898 For a return-value stored in a register: when WRITEBUF is non-NULL,
1899 copy the buffer to the corresponding register return-value location
1900 location; when READBUF is non-NULL, fill the buffer from the
1901 corresponding register return-value location. */
1902enum return_value_convention
1903ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1904 struct type *valtype, struct regcache *regcache,
1905 gdb_byte *readbuf, const gdb_byte *writebuf)
1906{
1907 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1908 struct type *func_type = function ? value_type (function) : NULL;
1909 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1910 struct type *eltype;
1911 int nelt, i, ok;
1912
1913 /* This function exists to support a calling convention that
1914 requires floating-point registers. It shouldn't be used on
1915 processors that lack them. */
1916 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1917
1918 /* Complex types are returned as if two independent scalars. */
1919 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX)
afd48b75 1920 {
e765b44c
UW
1921 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1922
1923 for (i = 0; i < 2; i++)
afd48b75 1924 {
e765b44c
UW
1925 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1926 readbuf, writebuf, i);
1927 gdb_assert (ok);
1928
1929 if (readbuf)
1930 readbuf += TYPE_LENGTH (eltype);
1931 if (writebuf)
1932 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1933 }
1934 return RETURN_VALUE_REGISTER_CONVENTION;
1935 }
e765b44c
UW
1936
1937 /* OpenCL vectors shorter than 16 bytes are returned as if
1938 a series of independent scalars; OpenCL vectors 16 bytes
1939 or longer are returned as if a series of AltiVec vectors. */
1940 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
1941 && opencl_abi)
afd48b75 1942 {
e765b44c
UW
1943 if (TYPE_LENGTH (valtype) < 16)
1944 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1945 else
1946 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1947
1948 nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
1949 for (i = 0; i < nelt; i++)
afd48b75 1950 {
e765b44c
UW
1951 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1952 readbuf, writebuf, i);
1953 gdb_assert (ok);
1954
1955 if (readbuf)
1956 readbuf += TYPE_LENGTH (eltype);
1957 if (writebuf)
1958 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1959 }
1960 return RETURN_VALUE_REGISTER_CONVENTION;
1961 }
e765b44c
UW
1962
1963 /* All pointers live in r3. */
aa006118 1964 if (TYPE_CODE (valtype) == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype))
afd48b75 1965 {
e765b44c
UW
1966 int regnum = tdep->ppc_gp0_regnum + 3;
1967
1968 if (writebuf != NULL)
b66f5587 1969 regcache->cooked_write (regnum, writebuf);
e765b44c 1970 if (readbuf != NULL)
dca08e1f 1971 regcache->cooked_read (regnum, readbuf);
afd48b75
AC
1972 return RETURN_VALUE_REGISTER_CONVENTION;
1973 }
e765b44c
UW
1974
1975 /* Small character arrays are returned, right justified, in r3. */
1976 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
a1da2672 1977 && !TYPE_VECTOR (valtype)
e765b44c
UW
1978 && TYPE_LENGTH (valtype) <= 8
1979 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1980 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1981 {
1982 int regnum = tdep->ppc_gp0_regnum + 3;
1983 int offset = (register_size (gdbarch, regnum) - TYPE_LENGTH (valtype));
1984
1985 if (writebuf != NULL)
1986 regcache_cooked_write_part (regcache, regnum,
1987 offset, TYPE_LENGTH (valtype), writebuf);
1988 if (readbuf != NULL)
73bb0000
SM
1989 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1990 readbuf);
e765b44c
UW
1991 return RETURN_VALUE_REGISTER_CONVENTION;
1992 }
1993
cc0e89c5
UW
1994 /* In the ELFv2 ABI, homogeneous floating-point or vector
1995 aggregates are returned in registers. */
1996 if (tdep->elf_abi == POWERPC_ELF_V2
a1da2672
UW
1997 && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt)
1998 && (TYPE_CODE (eltype) == TYPE_CODE_FLT
1999 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT
2000 || (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
2001 && TYPE_VECTOR (eltype)
2002 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
2003 && TYPE_LENGTH (eltype) == 16)))
cc0e89c5
UW
2004 {
2005 for (i = 0; i < nelt; i++)
2006 {
2007 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
2008 readbuf, writebuf, i);
2009 gdb_assert (ok);
2010
2011 if (readbuf)
2012 readbuf += TYPE_LENGTH (eltype);
2013 if (writebuf)
2014 writebuf += TYPE_LENGTH (eltype);
2015 }
2016
2017 return RETURN_VALUE_REGISTER_CONVENTION;
2018 }
2019
2020 /* In the ELFv2 ABI, aggregate types of up to 16 bytes are
2021 returned in registers r3:r4. */
2022 if (tdep->elf_abi == POWERPC_ELF_V2
2023 && TYPE_LENGTH (valtype) <= 16
2024 && (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
2025 || TYPE_CODE (valtype) == TYPE_CODE_UNION
2026 || (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
2027 && !TYPE_VECTOR (valtype))))
2028 {
2029 int n_regs = ((TYPE_LENGTH (valtype) + tdep->wordsize - 1)
2030 / tdep->wordsize);
2031 int i;
2032
2033 for (i = 0; i < n_regs; i++)
2034 {
0f068fb5 2035 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
cc0e89c5
UW
2036 int regnum = tdep->ppc_gp0_regnum + 3 + i;
2037 int offset = i * tdep->wordsize;
2038 int len = TYPE_LENGTH (valtype) - offset;
2039
2040 if (len > tdep->wordsize)
2041 len = tdep->wordsize;
2042
2043 if (writebuf != NULL)
2044 {
2045 memset (regval, 0, sizeof regval);
2046 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2047 && offset == 0)
2048 memcpy (regval + tdep->wordsize - len, writebuf, len);
2049 else
2050 memcpy (regval, writebuf + offset, len);
b66f5587 2051 regcache->cooked_write (regnum, regval);
cc0e89c5
UW
2052 }
2053 if (readbuf != NULL)
2054 {
dca08e1f 2055 regcache->cooked_read (regnum, regval);
cc0e89c5
UW
2056 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2057 && offset == 0)
2058 memcpy (readbuf, regval + tdep->wordsize - len, len);
2059 else
2060 memcpy (readbuf + offset, regval, len);
2061 }
2062 }
2063 return RETURN_VALUE_REGISTER_CONVENTION;
2064 }
2065
e765b44c
UW
2066 /* Handle plain base types. */
2067 if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache,
2068 readbuf, writebuf, 0))
2069 return RETURN_VALUE_REGISTER_CONVENTION;
2070
afd48b75
AC
2071 return RETURN_VALUE_STRUCT_CONVENTION;
2072}
2073
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