[deliverable/binutils-gdb.git] / gdb / ppc-tdep.h

/* Target-dependent code for GDB, the GNU debugger.

   Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007
   Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef PPC_TDEP_H
#define PPC_TDEP_H

struct gdbarch;
struct frame_info;
struct value;
struct regcache;
struct type;

/* From ppc-linux-tdep.c... */
enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
							struct type *valtype,
							struct regcache *regcache,
							gdb_byte *readbuf,
							const gdb_byte *writebuf);
enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
							       struct type *valtype,
							       struct regcache *regcache,
							       gdb_byte *readbuf,
							       const gdb_byte *writebuf);
CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
					struct value *function,
					struct regcache *regcache,
					CORE_ADDR bp_addr, int nargs,
					struct value **args, CORE_ADDR sp,
					int struct_return,
					CORE_ADDR struct_addr);
CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
					  struct value *function,
					  struct regcache *regcache,
					  CORE_ADDR bp_addr, int nargs,
					  struct value **args, CORE_ADDR sp,
					  int struct_return,
					  CORE_ADDR struct_addr);
CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
						    CORE_ADDR bpaddr);
int ppc_linux_memory_remove_breakpoint (struct bp_target_info *bp_tgt);
struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void);
const struct regset *ppc_linux_gregset (int);
const struct regset *ppc_linux_fpregset (void);

enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
							  struct type *valtype,
							  struct regcache *regcache,
							  gdb_byte *readbuf,
							  const gdb_byte *writebuf);

/* From rs6000-tdep.c... */
int altivec_register_p (int regno);
int spe_register_p (int regno);

/* Return non-zero if the architecture described by GDBARCH has
   floating-point registers (f0 --- f31 and fpscr).  */
int ppc_floating_point_unit_p (struct gdbarch *gdbarch);

/* Register set description.  */

struct ppc_reg_offsets
{
  /* General-purpose registers.  */
  int r0_offset;
  int gpr_size; /* size for r0-31, pc, ps, lr, ctr.  */
  int xr_size;  /* size for cr, xer, mq.  */
  int pc_offset;
  int ps_offset;
  int cr_offset;
  int lr_offset;
  int ctr_offset;
  int xer_offset;
  int mq_offset;

  /* Floating-point registers.  */
  int f0_offset;
  int fpscr_offset;
  int fpscr_size;

  /* AltiVec registers.  */
  int vr0_offset;
  int vscr_offset;
  int vrsave_offset;
};

/* Supply register REGNUM in the general-purpose register set REGSET
   from the buffer specified by GREGS and LEN to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

extern void ppc_supply_gregset (const struct regset *regset,
				struct regcache *regcache,
				int regnum, const void *gregs, size_t len);

/* Supply register REGNUM in the floating-point register set REGSET
   from the buffer specified by FPREGS and LEN to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

extern void ppc_supply_fpregset (const struct regset *regset,
				 struct regcache *regcache,
				 int regnum, const void *fpregs, size_t len);

/* Collect register REGNUM in the general-purpose register set
   REGSET. from register cache REGCACHE into the buffer specified by
   GREGS and LEN.  If REGNUM is -1, do this for all registers in
   REGSET.  */

extern void ppc_collect_gregset (const struct regset *regset,
				 const struct regcache *regcache,
				 int regnum, void *gregs, size_t len);

/* Collect register REGNUM in the floating-point register set
   REGSET. from register cache REGCACHE into the buffer specified by
   FPREGS and LEN.  If REGNUM is -1, do this for all registers in
   REGSET.  */

extern void ppc_collect_fpregset (const struct regset *regset,
				  const struct regcache *regcache,
				  int regnum, void *fpregs, size_t len);

/* Private data that this module attaches to struct gdbarch. */

struct gdbarch_tdep
  {
    int wordsize;              /* size in bytes of fixed-point word */
    int ppc_gp0_regnum;		/* GPR register 0 */
    int ppc_toc_regnum;		/* TOC register */
    int ppc_ps_regnum;	        /* Processor (or machine) status (%msr) */
    int ppc_cr_regnum;		/* Condition register */
    int ppc_lr_regnum;		/* Link register */
    int ppc_ctr_regnum;		/* Count register */
    int ppc_xer_regnum;		/* Integer exception register */

    /* Not all PPC and RS6000 variants will have the registers
       represented below.  A -1 is used to indicate that the register
       is not present in this variant.  */

    /* Floating-point registers.  */
    int ppc_fp0_regnum;         /* floating-point register 0 */
    int ppc_fpscr_regnum;	/* fp status and condition register */

    /* Multiplier-Quotient Register (older POWER architectures only).  */
    int ppc_mq_regnum;

    /* Altivec registers.  */
    int ppc_vr0_regnum;		/* First AltiVec register */
    int ppc_vrsave_regnum;	/* Last AltiVec register */

    /* SPE registers.  */
    int ppc_ev0_upper_regnum;   /* First GPR upper half register */
    int ppc_ev0_regnum;         /* First ev register */
    int ppc_ev31_regnum;        /* Last ev register */
    int ppc_acc_regnum;         /* SPE 'acc' register */
    int ppc_spefscr_regnum;     /* SPE 'spefscr' register */

    /* Offset to ABI specific location where link register is saved.  */
    int lr_frame_offset;	

    /* An array of integers, such that sim_regno[I] is the simulator
       register number for GDB register number I, or -1 if the
       simulator does not implement that register.  */
    int *sim_regno;

    /* Minimum possible text address.  */
    CORE_ADDR text_segment_base;

    /* ISA-specific types.  */
    struct type *ppc_builtin_type_vec64;
};


/* Constants for register set sizes.  */
enum
  {
    ppc_num_gprs = 32,          /* 32 general-purpose registers */
    ppc_num_fprs = 32,          /* 32 floating-point registers */
    ppc_num_srs = 16,           /* 16 segment registers */
    ppc_num_vrs = 32            /* 32 Altivec vector registers */
  };


/* Register number constants.  These are GDB internal register
   numbers; they are not used for the simulator or remote targets.
   Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
   numbers above PPC_NUM_REGS.  So are segment registers and other
   target-defined registers.  */
enum {
  PPC_R0_REGNUM = 0,
  PPC_F0_REGNUM = 32,
  PPC_PC_REGNUM = 64,
  PPC_MSR_REGNUM = 65,
  PPC_CR_REGNUM = 66,
  PPC_LR_REGNUM = 67,
  PPC_CTR_REGNUM = 68,
  PPC_XER_REGNUM = 69,
  PPC_FPSCR_REGNUM = 70,
  PPC_MQ_REGNUM = 71,
  PPC_SPE_UPPER_GP0_REGNUM = 72,
  PPC_SPE_ACC_REGNUM = 104,
  PPC_SPE_FSCR_REGNUM = 105,
  PPC_VR0_REGNUM = 106,
  PPC_VSCR_REGNUM = 138,
  PPC_VRSAVE_REGNUM = 139,
  PPC_NUM_REGS
};


/* Instruction size.  */
#define PPC_INSN_SIZE 4

/* Estimate for the maximum number of instrctions in a function epilogue.  */
#define PPC_MAX_EPILOGUE_INSTRUCTIONS  52

extern struct target_desc *tdesc_powerpc_e500;

#endif /* ppc-tdep.h */
Commit	Line	Data
9aa1e687	1	/* Target-dependent code for GDB, the GNU debugger.
f9be684a	2
6aba47ca	3	Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007
a0c75879	4	Free Software Foundation, Inc.
9aa1e687 KB	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
a9762ec7	10	the Free Software Foundation; either version 3 of the License, or
9aa1e687 KB	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
a9762ec7	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
9aa1e687	20
3a1c5313 AC	21	#ifndef PPC_TDEP_H
	22	#define PPC_TDEP_H
	23
da3331ec	24	struct gdbarch;
3a1c5313 AC	25	struct frame_info;
3a1c5313 AC	26	struct value;
4a4b3fed	27	struct regcache;
221c12ff	28	struct type;
3a1c5313	29
9aa1e687	30	/* From ppc-linux-tdep.c... */
05580c65 AC	31	enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
	32	struct type *valtype,
	33	struct regcache *regcache,
50fd1280 AC	34	gdb_byte *readbuf,
50fd1280 AC	35	const gdb_byte *writebuf);
05580c65 AC	36	enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
	37	struct type *valtype,
	38	struct regcache *regcache,
50fd1280 AC	39	gdb_byte *readbuf,
50fd1280 AC	40	const gdb_byte *writebuf);
77b2b6d4	41	CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
7d9b040b	42	struct value *function,
77b2b6d4 AC	43	struct regcache *regcache,
	44	CORE_ADDR bp_addr, int nargs,
	45	struct value **args, CORE_ADDR sp,
	46	int struct_return,
	47	CORE_ADDR struct_addr);
8be9034a	48	CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
7d9b040b	49	struct value *function,
8be9034a AC	50	struct regcache *regcache,
	51	CORE_ADDR bp_addr, int nargs,
	52	struct value **args, CORE_ADDR sp,
	53	int struct_return,
	54	CORE_ADDR struct_addr);
6066c3de AC	55	CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
6066c3de AC	56	CORE_ADDR bpaddr);
8181d85f	57	int ppc_linux_memory_remove_breakpoint (struct bp_target_info *bp_tgt);
6ded7999	58	struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void);
f2db237a AM	59	const struct regset *ppc_linux_gregset (int);
f2db237a AM	60	const struct regset *ppc_linux_fpregset (void);
9aa1e687	61
05580c65 AC	62	enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
	63	struct type *valtype,
	64	struct regcache *regcache,
50fd1280 AC	65	gdb_byte *readbuf,
50fd1280 AC	66	const gdb_byte *writebuf);
9aa1e687 KB	67
9aa1e687 KB	68	/* From rs6000-tdep.c... */
1fcc0bb8	69	int altivec_register_p (int regno);
867e2dc5	70	int spe_register_p (int regno);
9aa1e687	71
383f0f5b JB	72	/* Return non-zero if the architecture described by GDBARCH has
383f0f5b JB	73	floating-point registers (f0 --- f31 and fpscr). */
0a613259 AC	74	int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
0a613259 AC	75
d195bc9f MK	76	/* Register set description. */
	77
	78	struct ppc_reg_offsets
	79	{
	80	/* General-purpose registers. */
	81	int r0_offset;
f2db237a AM	82	int gpr_size; /* size for r0-31, pc, ps, lr, ctr. */
f2db237a AM	83	int xr_size; /* size for cr, xer, mq. */
d195bc9f MK	84	int pc_offset;
	85	int ps_offset;
	86	int cr_offset;
	87	int lr_offset;
	88	int ctr_offset;
	89	int xer_offset;
	90	int mq_offset;
	91
	92	/* Floating-point registers. */
	93	int f0_offset;
	94	int fpscr_offset;
f2db237a	95	int fpscr_size;
d195bc9f MK	96
	97	/* AltiVec registers. */
	98	int vr0_offset;
	99	int vscr_offset;
	100	int vrsave_offset;
	101	};
	102
	103	/* Supply register REGNUM in the general-purpose register set REGSET
	104	from the buffer specified by GREGS and LEN to register cache
	105	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	106
	107	extern void ppc_supply_gregset (const struct regset *regset,
	108	struct regcache *regcache,
	109	int regnum, const void *gregs, size_t len);
	110
	111	/* Supply register REGNUM in the floating-point register set REGSET
	112	from the buffer specified by FPREGS and LEN to register cache
	113	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	114
	115	extern void ppc_supply_fpregset (const struct regset *regset,
	116	struct regcache *regcache,
	117	int regnum, const void *fpregs, size_t len);
	118
	119	/* Collect register REGNUM in the general-purpose register set
	120	REGSET. from register cache REGCACHE into the buffer specified by
	121	GREGS and LEN. If REGNUM is -1, do this for all registers in
	122	REGSET. */
	123
	124	extern void ppc_collect_gregset (const struct regset *regset,
	125	const struct regcache *regcache,
	126	int regnum, void *gregs, size_t len);
	127
	128	/* Collect register REGNUM in the floating-point register set
	129	REGSET. from register cache REGCACHE into the buffer specified by
	130	FPREGS and LEN. If REGNUM is -1, do this for all registers in
	131	REGSET. */
	132
	133	extern void ppc_collect_fpregset (const struct regset *regset,
	134	const struct regcache *regcache,
	135	int regnum, void *fpregs, size_t len);
	136
2188cbdd EZ	137	/* Private data that this module attaches to struct gdbarch. */
	138
	139	struct gdbarch_tdep
	140	{
	141	int wordsize; /* size in bytes of fixed-point word */
2188cbdd	142	int ppc_gp0_regnum; /* GPR register 0 */
2188cbdd EZ	143	int ppc_toc_regnum; /* TOC register */
	144	int ppc_ps_regnum; /* Processor (or machine) status (%msr) */
	145	int ppc_cr_regnum; /* Condition register */
	146	int ppc_lr_regnum; /* Link register */
	147	int ppc_ctr_regnum; /* Count register */
	148	int ppc_xer_regnum; /* Integer exception register */
383f0f5b	149
826d5376 PG	150	/* Not all PPC and RS6000 variants will have the registers
	151	represented below. A -1 is used to indicate that the register
	152	is not present in this variant. */
	153
	154	/* Floating-point registers. */
366f009f	155	int ppc_fp0_regnum; /* floating-point register 0 */
826d5376 PG	156	int ppc_fpscr_regnum; /* fp status and condition register */
826d5376 PG	157
826d5376 PG	158	/* Multiplier-Quotient Register (older POWER architectures only). */
826d5376 PG	159	int ppc_mq_regnum;
f86a7158	160
826d5376	161	/* Altivec registers. */
1fcc0bb8 EZ	162	int ppc_vr0_regnum; /* First AltiVec register */
1fcc0bb8 EZ	163	int ppc_vrsave_regnum; /* Last AltiVec register */
826d5376 PG	164
826d5376 PG	165	/* SPE registers. */
6ced10dd	166	int ppc_ev0_upper_regnum; /* First GPR upper half register */
c8001721 EZ	167	int ppc_ev0_regnum; /* First ev register */
c8001721 EZ	168	int ppc_ev31_regnum; /* Last ev register */
867e2dc5 JB	169	int ppc_acc_regnum; /* SPE 'acc' register */
867e2dc5 JB	170	int ppc_spefscr_regnum; /* SPE 'spefscr' register */
826d5376 PG	171
	172	/* Offset to ABI specific location where link register is saved. */
	173	int lr_frame_offset;
9f643768 JB	174
	175	/* An array of integers, such that sim_regno[I] is the simulator
	176	register number for GDB register number I, or -1 if the
	177	simulator does not implement that register. */
	178	int *sim_regno;
6f7f3f0d UW	179
	180	/* Minimum possible text address. */
	181	CORE_ADDR text_segment_base;
794ac428 UW	182
	183	/* ISA-specific types. */
	184	struct type *ppc_builtin_type_vec64;
2188cbdd	185	};
3a1c5313	186
b967e06f JB	187
	188	/* Constants for register set sizes. */
	189	enum
	190	{
8bf659e8	191	ppc_num_gprs = 32, /* 32 general-purpose registers */
cc98b5cc	192	ppc_num_fprs = 32, /* 32 floating-point registers */
8f088af7	193	ppc_num_srs = 16, /* 16 segment registers */
cc98b5cc	194	ppc_num_vrs = 32 /* 32 Altivec vector registers */
b967e06f JB	195	};
b967e06f JB	196
0ea0ec5f	197
7cc46491 DJ	198	/* Register number constants. These are GDB internal register
	199	numbers; they are not used for the simulator or remote targets.
	200	Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
	201	numbers above PPC_NUM_REGS. So are segment registers and other
	202	target-defined registers. */
	203	enum {
	204	PPC_R0_REGNUM = 0,
	205	PPC_F0_REGNUM = 32,
	206	PPC_PC_REGNUM = 64,
	207	PPC_MSR_REGNUM = 65,
	208	PPC_CR_REGNUM = 66,
	209	PPC_LR_REGNUM = 67,
	210	PPC_CTR_REGNUM = 68,
	211	PPC_XER_REGNUM = 69,
	212	PPC_FPSCR_REGNUM = 70,
	213	PPC_MQ_REGNUM = 71,
	214	PPC_SPE_UPPER_GP0_REGNUM = 72,
	215	PPC_SPE_ACC_REGNUM = 104,
	216	PPC_SPE_FSCR_REGNUM = 105,
	217	PPC_VR0_REGNUM = 106,
	218	PPC_VSCR_REGNUM = 138,
	219	PPC_VRSAVE_REGNUM = 139,
	220	PPC_NUM_REGS
	221	};
0ea0ec5f	222
0ea0ec5f	223
a0c75879 MK	224	/* Instruction size. */
	225	#define PPC_INSN_SIZE 4
	226
0d1243d9 PG	227	/* Estimate for the maximum number of instrctions in a function epilogue. */
	228	#define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
	229
310a98e1 DJ	230	extern struct target_desc *tdesc_powerpc_e500;
310a98e1 DJ	231
a0c75879	232	#endif /* ppc-tdep.h */