* Makefile.in (init.c): Drop -e option to grep. Not necessary and
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab 1/* Cache and manage the values of registers for GDB, the GNU debugger.
3fadccb3
AC
2
3 Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000,
4 2001, 2002 Free Software Foundation, Inc.
32178cab
MS
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include "defs.h"
32178cab
MS
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
705152c5 27#include "gdbcmd.h"
4e052eda 28#include "regcache.h"
61a0eb5b 29#include "gdb_assert.h"
32178cab
MS
30
31/*
32 * DATA STRUCTURE
33 *
34 * Here is the actual register cache.
35 */
36
3fadccb3
AC
37/* Per-architecture object describing the layout of a register cache.
38 Computed once when the architecture is created */
39
40struct gdbarch_data *regcache_descr_handle;
41
42struct regcache_descr
43{
44 /* The architecture this descriptor belongs to. */
45 struct gdbarch *gdbarch;
46
47 /* Is this a ``legacy'' register cache? Such caches reserve space
48 for raw and pseudo registers and allow access to both. */
49 int legacy_p;
50
51 /* The raw register cache. This should contain just [0
52 .. NUM_RAW_REGISTERS). However, for older targets, it contains
53 space for the full [0 .. NUM_RAW_REGISTERS +
54 NUM_PSEUDO_REGISTERS). */
55 int nr_raw_registers;
56 long sizeof_raw_registers;
57 long sizeof_raw_register_valid_p;
58
59 /* Offset, in bytes, of reach register in the raw register cache.
60 Pseudo registers have an offset even though they don't
61 (shouldn't) have a correspoinding space in the register cache.
62 It is to keep existing code, that relies on
63 write/write_register_bytes working. */
64 long *register_offset;
65
66 /* The cooked / frame / virtual register space. The registers in
67 the range [0..NR_RAW_REGISTERS) should be mapped directly onto
68 the corresponding raw register. The next [NR_RAW_REGISTERS
69 .. NR_REGISTERS) should have been mapped, via
70 gdbarch_register_read/write onto either raw registers or memory. */
71 int nr_registers;
72 long *sizeof_register;
73 long max_register_size;
74
75};
76
77static void *
78init_legacy_regcache_descr (struct gdbarch *gdbarch)
79{
80 int i;
81 struct regcache_descr *descr;
82 /* FIXME: cagney/2002-05-11: gdbarch_data() should take that
83 ``gdbarch'' as a parameter. */
84 gdb_assert (gdbarch != NULL);
85
86 descr = XMALLOC (struct regcache_descr);
87 descr->gdbarch = gdbarch;
88 descr->legacy_p = 1;
89
90 /* FIXME: cagney/2002-05-11: Shouldn't be including pseudo-registers
91 in the register buffer. Unfortunatly some architectures do. */
92 descr->nr_registers = NUM_REGS + NUM_PSEUDO_REGS;
93 descr->nr_raw_registers = descr->nr_registers;
94 descr->sizeof_raw_register_valid_p = descr->nr_registers;
95
96 /* FIXME: cagney/2002-05-11: Instead of using REGISTER_BYTE() this
97 code should compute the offets et.al. at runtime. This currently
98 isn't possible because some targets overlap register locations -
99 see the mess in read_register_bytes() and write_register_bytes()
100 registers. */
101 descr->sizeof_register = XCALLOC (descr->nr_registers, long);
102 descr->register_offset = XCALLOC (descr->nr_registers, long);
103 descr->max_register_size = 0;
104 for (i = 0; i < descr->nr_registers; i++)
105 {
106 descr->register_offset[i] = REGISTER_BYTE (i);
107 descr->sizeof_register[i] = REGISTER_RAW_SIZE (i);
108 if (descr->max_register_size < REGISTER_RAW_SIZE (i))
109 descr->max_register_size = REGISTER_RAW_SIZE (i);
110 }
111
112 /* Come up with the real size of the registers buffer. */
113 descr->sizeof_raw_registers = REGISTER_BYTES; /* OK use. */
114 for (i = 0; i < descr->nr_registers; i++)
115 {
116 long regend;
117 /* Keep extending the buffer so that there is always enough
118 space for all registers. The comparison is necessary since
119 legacy code is free to put registers in random places in the
120 buffer separated by holes. Once REGISTER_BYTE() is killed
121 this can be greatly simplified. */
122 /* FIXME: cagney/2001-12-04: This code shouldn't need to use
123 REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the
124 buffer out so that certain registers just happen to overlap.
125 Ulgh! New targets use gdbarch's register read/write and
126 entirely avoid this uglyness. */
127 regend = descr->register_offset[i] + descr->sizeof_register[i];
128 if (descr->sizeof_raw_registers < regend)
129 descr->sizeof_raw_registers = regend;
130 }
131 return descr;
132}
133
134static void *
135init_regcache_descr (struct gdbarch *gdbarch)
136{
137 int i;
138 struct regcache_descr *descr;
139 gdb_assert (gdbarch != NULL);
140
141 /* If an old style architecture, construct the register cache
142 description using all the register macros. */
143 if (!gdbarch_register_read_p (gdbarch)
144 && !gdbarch_register_write_p (gdbarch))
145 return init_legacy_regcache_descr (gdbarch);
146
147 descr = XMALLOC (struct regcache_descr);
148 descr->gdbarch = gdbarch;
149 descr->legacy_p = 0;
150
151 /* Total size of the register space. The raw registers should
152 directly map onto the raw register cache while the pseudo's are
153 either mapped onto raw-registers or memory. */
154 descr->nr_registers = NUM_REGS + NUM_PSEUDO_REGS;
155
156 /* Construct a strictly RAW register cache. Don't allow pseudo's
157 into the register cache. */
158 descr->nr_raw_registers = NUM_REGS;
159 descr->sizeof_raw_register_valid_p = NUM_REGS;
160
161 /* Lay out the register cache. The pseud-registers are included in
162 the layout even though their value isn't stored in the register
163 cache. Some code, via read_register_bytes() access a register
164 using an offset/length rather than a register number.
165
166 NOTE: cagney/2002-05-22: Only REGISTER_VIRTUAL_TYPE() needs to be
167 used when constructing the register cache. It is assumed that
168 register raw size, virtual size and type length of the type are
169 all the same. */
170
171 {
172 long offset = 0;
173 descr->sizeof_register = XCALLOC (descr->nr_registers, long);
174 descr->register_offset = XCALLOC (descr->nr_registers, long);
175 descr->max_register_size = 0;
176 for (i = 0; i < descr->nr_registers; i++)
177 {
178 descr->sizeof_register[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
179 descr->register_offset[i] = offset;
180 offset += descr->sizeof_register[i];
181 if (descr->max_register_size < descr->sizeof_register[i])
182 descr->max_register_size = descr->sizeof_register[i];
183 }
184 /* Set the real size of the register cache buffer. */
185 /* FIXME: cagney/2002-05-22: Should only need to allocate space
186 for the raw registers. Unfortunatly some code still accesses
187 the register array directly using the global registers[].
188 Until that code has been purged, play safe and over allocating
189 the register buffer. Ulgh! */
190 descr->sizeof_raw_registers = offset;
191 /* = descr->register_offset[descr->nr_raw_registers]; */
192 }
193
194#if 0
195 /* Sanity check. Confirm that the assumptions about gdbarch are
196 true. The REGCACHE_DESCR_HANDLE is set before doing the checks
197 so that targets using the generic methods supplied by regcache
198 don't go into infinite recursion trying to, again, create the
199 regcache. */
200 set_gdbarch_data (gdbarch, regcache_descr_handle, descr);
201 for (i = 0; i < descr->nr_registers; i++)
202 {
203 gdb_assert (descr->sizeof_register[i] == REGISTER_RAW_SIZE (i));
204 gdb_assert (descr->sizeof_register[i] == REGISTER_VIRTUAL_SIZE (i));
205 gdb_assert (descr->register_offset[i] == REGISTER_BYTE (i));
206 }
207 /* gdb_assert (descr->sizeof_raw_registers == REGISTER_BYTES (i)); */
208#endif
209
210 return descr;
211}
212
213static struct regcache_descr *
214regcache_descr (struct gdbarch *gdbarch)
215{
216 return gdbarch_data (gdbarch, regcache_descr_handle);
217}
218
219static void
220xfree_regcache_descr (struct gdbarch *gdbarch, void *ptr)
221{
222 struct regcache_descr *descr = ptr;
223 if (descr == NULL)
224 return;
225 xfree (descr->register_offset);
226 xfree (descr->sizeof_register);
227 descr->register_offset = NULL;
228 descr->sizeof_register = NULL;
229 xfree (descr);
230}
231
232/* The register cache for storing raw register values. */
233
234struct regcache
235{
236 struct regcache_descr *descr;
237 char *raw_registers;
238 char *raw_register_valid_p;
239 /* If a value isn't in the cache should the corresponding target be
240 queried for a value. */
241 int passthrough_p;
242};
243
244struct regcache *
245regcache_xmalloc (struct gdbarch *gdbarch)
246{
247 struct regcache_descr *descr;
248 struct regcache *regcache;
249 gdb_assert (gdbarch != NULL);
250 descr = regcache_descr (gdbarch);
251 regcache = XMALLOC (struct regcache);
252 regcache->descr = descr;
253 regcache->raw_registers
254 = XCALLOC (descr->sizeof_raw_registers, char);
255 regcache->raw_register_valid_p
256 = XCALLOC (descr->sizeof_raw_register_valid_p, char);
257 regcache->passthrough_p = 0;
258 return regcache;
259}
260
261void
262regcache_xfree (struct regcache *regcache)
263{
264 if (regcache == NULL)
265 return;
266 xfree (regcache->raw_registers);
267 xfree (regcache->raw_register_valid_p);
268 xfree (regcache);
269}
270
271void
272regcache_cpy (struct regcache *dst, struct regcache *src)
273{
274 int i;
275 char *buf;
276 gdb_assert (src != NULL && dst != NULL);
277 gdb_assert (src->descr->gdbarch == dst->descr->gdbarch);
278 gdb_assert (src != dst);
279 /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite.
280 It keeps the existing code working where things rely on going
281 through to the register cache. */
282 if (src == current_regcache && src->descr->legacy_p)
283 {
284 /* ULGH!!!! Old way. Use REGISTER bytes and let code below
285 untangle fetch. */
286 read_register_bytes (0, dst->raw_registers, REGISTER_BYTES);
287 return;
288 }
289 /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite.
290 It keeps the existing code working where things rely on going
291 through to the register cache. */
292 if (dst == current_regcache && dst->descr->legacy_p)
293 {
294 /* ULGH!!!! Old way. Use REGISTER bytes and let code below
295 untangle fetch. */
296 write_register_bytes (0, src->raw_registers, REGISTER_BYTES);
297 return;
298 }
299 buf = alloca (src->descr->max_register_size);
300 for (i = 0; i < src->descr->nr_raw_registers; i++)
301 {
302 /* Should we worry about the valid bit here? */
303 regcache_read (src, i, buf);
304 regcache_write (dst, i, buf);
305 }
306}
307
308void
309regcache_cpy_no_passthrough (struct regcache *dst, struct regcache *src)
310{
311 int i;
312 gdb_assert (src != NULL && dst != NULL);
313 gdb_assert (src->descr->gdbarch == dst->descr->gdbarch);
314 /* NOTE: cagney/2002-05-17: Don't let the caller do a no-passthrough
315 move of data into the current_regcache(). Doing this would be
316 silly - it would mean that valid_p would be completly invalid. */
317 gdb_assert (dst != current_regcache);
318 memcpy (dst->raw_registers, src->raw_registers,
319 dst->descr->sizeof_raw_registers);
320 memcpy (dst->raw_register_valid_p, src->raw_register_valid_p,
321 dst->descr->sizeof_raw_register_valid_p);
322}
323
324struct regcache *
325regcache_dup (struct regcache *src)
326{
327 struct regcache *newbuf;
328 gdb_assert (current_regcache != NULL);
329 newbuf = regcache_xmalloc (src->descr->gdbarch);
330 regcache_cpy (newbuf, src);
331 return newbuf;
332}
333
334struct regcache *
335regcache_dup_no_passthrough (struct regcache *src)
336{
337 struct regcache *newbuf;
338 gdb_assert (current_regcache != NULL);
339 newbuf = regcache_xmalloc (src->descr->gdbarch);
340 regcache_cpy_no_passthrough (newbuf, src);
341 return newbuf;
342}
343
344int
345regcache_valid_p (struct regcache *regcache, int regnum)
346{
347 gdb_assert (regcache != NULL);
348 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
349 return regcache->raw_register_valid_p[regnum];
350}
351
352CORE_ADDR
353regcache_read_as_address (struct regcache *regcache, int regnum)
354{
355 char *buf;
356 gdb_assert (regcache != NULL);
357 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
358 buf = alloca (regcache->descr->sizeof_register[regnum]);
359 regcache_read (regcache, regnum, buf);
360 return extract_address (buf, regcache->descr->sizeof_register[regnum]);
361}
362
363char *
364deprecated_grub_regcache_for_registers (struct regcache *regcache)
365{
366 return regcache->raw_registers;
367}
368
369char *
370deprecated_grub_regcache_for_register_valid (struct regcache *regcache)
371{
372 return regcache->raw_register_valid_p;
373}
374
375/* Global structure containing the current regcache. */
376/* FIXME: cagney/2002-05-11: The two global arrays registers[] and
377 register_valid[] currently point into this structure. */
378struct regcache *current_regcache;
379
5ebd2499 380/* NOTE: this is a write-through cache. There is no "dirty" bit for
32178cab
MS
381 recording if the register values have been changed (eg. by the
382 user). Therefore all registers must be written back to the
383 target when appropriate. */
384
385/* REGISTERS contains the cached register values (in target byte order). */
386
387char *registers;
388
389/* REGISTER_VALID is 0 if the register needs to be fetched,
390 1 if it has been fetched, and
391 -1 if the register value was not available.
c97dcfc7
AC
392
393 "Not available" indicates that the target is not not able to supply
394 the register at this state. The register may become available at a
395 later time (after the next resume). This often occures when GDB is
396 manipulating a target that contains only a snapshot of the entire
397 system being debugged - some of the registers in such a system may
398 not have been saved. */
32178cab
MS
399
400signed char *register_valid;
401
39f77062 402/* The thread/process associated with the current set of registers. */
32178cab 403
39f77062 404static ptid_t registers_ptid;
32178cab
MS
405
406/*
407 * FUNCTIONS:
408 */
409
410/* REGISTER_CACHED()
411
412 Returns 0 if the value is not in the cache (needs fetch).
413 >0 if the value is in the cache.
414 <0 if the value is permanently unavailable (don't ask again). */
415
416int
417register_cached (int regnum)
418{
419 return register_valid[regnum];
420}
421
7302a204
ND
422/* Record that REGNUM's value is cached if STATE is >0, uncached but
423 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
424
425void
426set_register_cached (int regnum, int state)
427{
428 register_valid[regnum] = state;
429}
430
2dc4e391
DT
431/* REGISTER_CHANGED
432
433 invalidate a single register REGNUM in the cache */
434void
435register_changed (int regnum)
436{
7302a204
ND
437 set_register_cached (regnum, 0);
438}
439
440/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
441 else return a pointer to the start of the cache buffer. */
442
193cb69f 443static char *
3fadccb3 444register_buffer (struct regcache *regcache, int regnum)
7302a204 445{
3fadccb3 446 return regcache->raw_registers + regcache->descr->register_offset[regnum];
7302a204
ND
447}
448
449/* Return whether register REGNUM is a real register. */
450
451static int
452real_register (int regnum)
453{
454 return regnum >= 0 && regnum < NUM_REGS;
455}
456
457/* Return whether register REGNUM is a pseudo register. */
458
459static int
460pseudo_register (int regnum)
461{
462 return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
463}
464
465/* Fetch register REGNUM into the cache. */
466
467static void
468fetch_register (int regnum)
469{
31e9866e
AC
470 /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store
471 pseudo-register as a way of handling registers that needed to be
472 constructed from one or more raw registers. New targets instead
473 use gdbarch register read/write. */
474 if (FETCH_PSEUDO_REGISTER_P ()
475 && pseudo_register (regnum))
7302a204 476 FETCH_PSEUDO_REGISTER (regnum);
6af4589c
MS
477 else
478 target_fetch_registers (regnum);
7302a204
ND
479}
480
481/* Write register REGNUM cached value to the target. */
482
483static void
484store_register (int regnum)
485{
31e9866e
AC
486 /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store
487 pseudo-register as a way of handling registers that needed to be
488 constructed from one or more raw registers. New targets instead
489 use gdbarch register read/write. */
490 if (STORE_PSEUDO_REGISTER_P ()
491 && pseudo_register (regnum))
7302a204 492 STORE_PSEUDO_REGISTER (regnum);
6af4589c
MS
493 else
494 target_store_registers (regnum);
2dc4e391
DT
495}
496
32178cab
MS
497/* Low level examining and depositing of registers.
498
499 The caller is responsible for making sure that the inferior is
500 stopped before calling the fetching routines, or it will get
501 garbage. (a change from GDB version 3, in which the caller got the
502 value from the last stop). */
503
504/* REGISTERS_CHANGED ()
505
506 Indicate that registers may have changed, so invalidate the cache. */
507
508void
509registers_changed (void)
510{
511 int i;
32178cab 512
39f77062 513 registers_ptid = pid_to_ptid (-1);
32178cab
MS
514
515 /* Force cleanup of any alloca areas if using C alloca instead of
516 a builtin alloca. This particular call is used to clean up
517 areas allocated by low level target code which may build up
518 during lengthy interactions between gdb and the target before
519 gdb gives control to the user (ie watchpoints). */
520 alloca (0);
521
31e9866e 522 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
7302a204 523 set_register_cached (i, 0);
32178cab
MS
524
525 if (registers_changed_hook)
526 registers_changed_hook ();
527}
528
529/* REGISTERS_FETCHED ()
530
531 Indicate that all registers have been fetched, so mark them all valid. */
532
31e9866e
AC
533/* NOTE: cagney/2001-12-04: This function does not set valid on the
534 pseudo-register range since pseudo registers are always supplied
535 using supply_register(). */
536/* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target
537 code was blatting the registers[] array and then calling this.
538 Since targets should only be using supply_register() the need for
539 this function/hack is eliminated. */
32178cab
MS
540
541void
542registers_fetched (void)
543{
544 int i;
32178cab 545
a728f042 546 for (i = 0; i < NUM_REGS; i++)
7302a204 547 set_register_cached (i, 1);
fcdc5976 548 /* Do not assume that the pseudo-regs have also been fetched.
31e9866e 549 Fetching all real regs NEVER accounts for pseudo-regs. */
32178cab
MS
550}
551
552/* read_register_bytes and write_register_bytes are generally a *BAD*
553 idea. They are inefficient because they need to check for partial
554 updates, which can only be done by scanning through all of the
555 registers and seeing if the bytes that are being read/written fall
556 inside of an invalid register. [The main reason this is necessary
557 is that register sizes can vary, so a simple index won't suffice.]
558 It is far better to call read_register_gen and write_register_gen
559 if you want to get at the raw register contents, as it only takes a
5ebd2499 560 regnum as an argument, and therefore can't do a partial register
32178cab
MS
561 update.
562
563 Prior to the recent fixes to check for partial updates, both read
564 and write_register_bytes always checked to see if any registers
565 were stale, and then called target_fetch_registers (-1) to update
566 the whole set. This caused really slowed things down for remote
567 targets. */
568
569/* Copy INLEN bytes of consecutive data from registers
570 starting with the INREGBYTE'th byte of register data
571 into memory at MYADDR. */
572
573void
61a0eb5b 574read_register_bytes (int in_start, char *in_buf, int in_len)
32178cab 575{
61a0eb5b 576 int in_end = in_start + in_len;
5ebd2499 577 int regnum;
61a0eb5b 578 char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
579
580 /* See if we are trying to read bytes from out-of-date registers. If so,
581 update just those registers. */
582
5ebd2499 583 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab 584 {
61a0eb5b
AC
585 int reg_start;
586 int reg_end;
587 int reg_len;
588 int start;
589 int end;
590 int byte;
32178cab 591
61a0eb5b
AC
592 reg_start = REGISTER_BYTE (regnum);
593 reg_len = REGISTER_RAW_SIZE (regnum);
594 reg_end = reg_start + reg_len;
32178cab 595
61a0eb5b 596 if (reg_end <= in_start || in_end <= reg_start)
5ebd2499 597 /* The range the user wants to read doesn't overlap with regnum. */
32178cab
MS
598 continue;
599
275f450c
AC
600 if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0')
601 /* Force the cache to fetch the entire register. */
602 read_register_gen (regnum, reg_buf);
603 else
604 /* Legacy note: even though this register is ``invalid'' we
605 still need to return something. It would appear that some
606 code relies on apparent gaps in the register array also
607 being returned. */
608 /* FIXME: cagney/2001-08-18: This is just silly. It defeats
609 the entire register read/write flow of control. Must
610 resist temptation to return 0xdeadbeef. */
611 memcpy (reg_buf, registers + reg_start, reg_len);
32178cab 612
61a0eb5b
AC
613 /* Legacy note: This function, for some reason, allows a NULL
614 input buffer. If the buffer is NULL, the registers are still
615 fetched, just the final transfer is skipped. */
616 if (in_buf == NULL)
617 continue;
618
619 /* start = max (reg_start, in_start) */
620 if (reg_start > in_start)
621 start = reg_start;
622 else
623 start = in_start;
624
625 /* end = min (reg_end, in_end) */
626 if (reg_end < in_end)
627 end = reg_end;
628 else
629 end = in_end;
630
631 /* Transfer just the bytes common to both IN_BUF and REG_BUF */
632 for (byte = start; byte < end; byte++)
165cd47f 633 {
61a0eb5b 634 in_buf[byte - in_start] = reg_buf[byte - reg_start];
165cd47f 635 }
32178cab 636 }
32178cab
MS
637}
638
5ebd2499
ND
639/* Read register REGNUM into memory at MYADDR, which must be large
640 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
32178cab
MS
641 register is known to be the size of a CORE_ADDR or smaller,
642 read_register can be used instead. */
643
61a0eb5b
AC
644static void
645legacy_read_register_gen (int regnum, char *myaddr)
32178cab 646{
61a0eb5b 647 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
39f77062 648 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
649 {
650 registers_changed ();
39f77062 651 registers_ptid = inferior_ptid;
32178cab
MS
652 }
653
7302a204
ND
654 if (!register_cached (regnum))
655 fetch_register (regnum);
656
3fadccb3 657 memcpy (myaddr, register_buffer (current_regcache, regnum),
5ebd2499 658 REGISTER_RAW_SIZE (regnum));
32178cab
MS
659}
660
61a0eb5b 661void
3fadccb3 662regcache_read (struct regcache *regcache, int regnum, char *buf)
61a0eb5b 663{
3fadccb3
AC
664 gdb_assert (regcache != NULL && buf != NULL);
665 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
666 if (regcache->descr->legacy_p
667 && regcache->passthrough_p)
668 {
669 gdb_assert (regcache == current_regcache);
670 /* For moment, just use underlying legacy code. Ulgh!!! This
671 silently and very indirectly updates the regcache's regcache
672 via the global register_valid[]. */
673 legacy_read_register_gen (regnum, buf);
674 return;
675 }
676 /* Make certain that the register cache is up-to-date with respect
677 to the current thread. This switching shouldn't be necessary
678 only there is still only one target side register cache. Sigh!
679 On the bright side, at least there is a regcache object. */
680 if (regcache->passthrough_p)
681 {
682 gdb_assert (regcache == current_regcache);
683 if (! ptid_equal (registers_ptid, inferior_ptid))
684 {
685 registers_changed ();
686 registers_ptid = inferior_ptid;
687 }
688 if (!register_cached (regnum))
689 fetch_register (regnum);
690 }
691 /* Copy the value directly into the register cache. */
692 memcpy (buf, (regcache->raw_registers
693 + regcache->descr->register_offset[regnum]),
694 regcache->descr->sizeof_register[regnum]);
61a0eb5b
AC
695}
696
697void
698read_register_gen (int regnum, char *buf)
699{
3fadccb3
AC
700 gdb_assert (current_regcache != NULL);
701 gdb_assert (current_regcache->descr->gdbarch == current_gdbarch);
702 if (current_regcache->descr->legacy_p)
61a0eb5b
AC
703 {
704 legacy_read_register_gen (regnum, buf);
705 return;
706 }
707 gdbarch_register_read (current_gdbarch, regnum, buf);
708}
709
710
5ebd2499
ND
711/* Write register REGNUM at MYADDR to the target. MYADDR points at
712 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
32178cab 713
61a0eb5b
AC
714static void
715legacy_write_register_gen (int regnum, char *myaddr)
32178cab
MS
716{
717 int size;
61a0eb5b 718 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
32178cab
MS
719
720 /* On the sparc, writing %g0 is a no-op, so we don't even want to
721 change the registers array if something writes to this register. */
5ebd2499 722 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
723 return;
724
39f77062 725 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
726 {
727 registers_changed ();
39f77062 728 registers_ptid = inferior_ptid;
32178cab
MS
729 }
730
5ebd2499 731 size = REGISTER_RAW_SIZE (regnum);
32178cab 732
7302a204 733 if (real_register (regnum))
1297a2f0
MS
734 {
735 /* If we have a valid copy of the register, and new value == old
736 value, then don't bother doing the actual store. */
737 if (register_cached (regnum)
3fadccb3
AC
738 && (memcmp (register_buffer (current_regcache, regnum), myaddr, size)
739 == 0))
1297a2f0
MS
740 return;
741 else
742 target_prepare_to_store ();
743 }
32178cab 744
3fadccb3 745 memcpy (register_buffer (current_regcache, regnum), myaddr, size);
32178cab 746
7302a204
ND
747 set_register_cached (regnum, 1);
748 store_register (regnum);
32178cab
MS
749}
750
61a0eb5b 751void
3fadccb3 752regcache_write (struct regcache *regcache, int regnum, char *buf)
61a0eb5b 753{
3fadccb3
AC
754 gdb_assert (regcache != NULL && buf != NULL);
755 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
756
757 if (regcache->passthrough_p
758 && regcache->descr->legacy_p)
759 {
760 /* For moment, just use underlying legacy code. Ulgh!!! This
761 silently and very indirectly updates the regcache's buffers
762 via the globals register_valid[] and registers[]. */
763 gdb_assert (regcache == current_regcache);
764 legacy_write_register_gen (regnum, buf);
765 return;
766 }
767
768 /* On the sparc, writing %g0 is a no-op, so we don't even want to
769 change the registers array if something writes to this register. */
770 if (CANNOT_STORE_REGISTER (regnum))
771 return;
772
773 /* Handle the simple case first -> not write through so just store
774 value in cache. */
775 if (!regcache->passthrough_p)
776 {
777 memcpy ((regcache->raw_registers
778 + regcache->descr->register_offset[regnum]), buf,
779 regcache->descr->sizeof_register[regnum]);
780 regcache->raw_register_valid_p[regnum] = 1;
781 return;
782 }
783
784 /* Make certain that the correct cache is selected. */
785 gdb_assert (regcache == current_regcache);
786 if (! ptid_equal (registers_ptid, inferior_ptid))
787 {
788 registers_changed ();
789 registers_ptid = inferior_ptid;
790 }
791
792 /* If we have a valid copy of the register, and new value == old
793 value, then don't bother doing the actual store. */
794 if (regcache_valid_p (regcache, regnum)
795 && (memcmp (register_buffer (regcache, regnum), buf,
796 regcache->descr->sizeof_register[regnum]) == 0))
797 return;
798
799 target_prepare_to_store ();
800 memcpy (register_buffer (regcache, regnum), buf,
801 regcache->descr->sizeof_register[regnum]);
802 regcache->raw_register_valid_p[regnum] = 1;
803 store_register (regnum);
61a0eb5b
AC
804}
805
806void
807write_register_gen (int regnum, char *buf)
808{
3fadccb3
AC
809 gdb_assert (current_regcache != NULL);
810 gdb_assert (current_regcache->descr->gdbarch == current_gdbarch);
811 if (current_regcache->descr->legacy_p)
61a0eb5b
AC
812 {
813 legacy_write_register_gen (regnum, buf);
814 return;
815 }
816 gdbarch_register_write (current_gdbarch, regnum, buf);
817}
818
32178cab
MS
819/* Copy INLEN bytes of consecutive data from memory at MYADDR
820 into registers starting with the MYREGSTART'th byte of register data. */
821
822void
823write_register_bytes (int myregstart, char *myaddr, int inlen)
824{
825 int myregend = myregstart + inlen;
5ebd2499 826 int regnum;
32178cab
MS
827
828 target_prepare_to_store ();
829
830 /* Scan through the registers updating any that are covered by the
831 range myregstart<=>myregend using write_register_gen, which does
832 nice things like handling threads, and avoiding updates when the
833 new and old contents are the same. */
834
5ebd2499 835 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
836 {
837 int regstart, regend;
838
5ebd2499
ND
839 regstart = REGISTER_BYTE (regnum);
840 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
841
842 /* Is this register completely outside the range the user is writing? */
843 if (myregend <= regstart || regend <= myregstart)
844 /* do nothing */ ;
845
846 /* Is this register completely within the range the user is writing? */
847 else if (myregstart <= regstart && regend <= myregend)
5ebd2499 848 write_register_gen (regnum, myaddr + (regstart - myregstart));
32178cab
MS
849
850 /* The register partially overlaps the range being written. */
851 else
852 {
e6cbd02a 853 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
854 /* What's the overlap between this register's bytes and
855 those the caller wants to write? */
856 int overlapstart = max (regstart, myregstart);
857 int overlapend = min (regend, myregend);
858
859 /* We may be doing a partial update of an invalid register.
860 Update it from the target before scribbling on it. */
5ebd2499 861 read_register_gen (regnum, regbuf);
32178cab
MS
862
863 memcpy (registers + overlapstart,
864 myaddr + (overlapstart - myregstart),
865 overlapend - overlapstart);
866
7302a204 867 store_register (regnum);
32178cab
MS
868 }
869 }
870}
871
872
5ebd2499 873/* Return the contents of register REGNUM as an unsigned integer. */
32178cab 874
173155e8 875ULONGEST
5ebd2499 876read_register (int regnum)
32178cab 877{
61a0eb5b
AC
878 char *buf = alloca (REGISTER_RAW_SIZE (regnum));
879 read_register_gen (regnum, buf);
880 return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
32178cab
MS
881}
882
173155e8 883ULONGEST
39f77062 884read_register_pid (int regnum, ptid_t ptid)
32178cab 885{
39f77062 886 ptid_t save_ptid;
32178cab
MS
887 int save_pid;
888 CORE_ADDR retval;
889
39f77062 890 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 891 return read_register (regnum);
32178cab 892
39f77062 893 save_ptid = inferior_ptid;
32178cab 894
39f77062 895 inferior_ptid = ptid;
32178cab 896
5ebd2499 897 retval = read_register (regnum);
32178cab 898
39f77062 899 inferior_ptid = save_ptid;
32178cab
MS
900
901 return retval;
902}
903
5ebd2499 904/* Return the contents of register REGNUM as a signed integer. */
173155e8
AC
905
906LONGEST
5ebd2499 907read_signed_register (int regnum)
173155e8 908{
61a0eb5b
AC
909 void *buf = alloca (REGISTER_RAW_SIZE (regnum));
910 read_register_gen (regnum, buf);
911 return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
173155e8
AC
912}
913
914LONGEST
39f77062 915read_signed_register_pid (int regnum, ptid_t ptid)
173155e8 916{
39f77062 917 ptid_t save_ptid;
173155e8
AC
918 LONGEST retval;
919
39f77062 920 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 921 return read_signed_register (regnum);
173155e8 922
39f77062 923 save_ptid = inferior_ptid;
173155e8 924
39f77062 925 inferior_ptid = ptid;
173155e8 926
5ebd2499 927 retval = read_signed_register (regnum);
173155e8 928
39f77062 929 inferior_ptid = save_ptid;
173155e8
AC
930
931 return retval;
932}
933
5ebd2499 934/* Store VALUE into the raw contents of register number REGNUM. */
32178cab
MS
935
936void
5ebd2499 937write_register (int regnum, LONGEST val)
32178cab 938{
61a0eb5b 939 void *buf;
32178cab 940 int size;
5ebd2499 941 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
942 buf = alloca (size);
943 store_signed_integer (buf, size, (LONGEST) val);
61a0eb5b 944 write_register_gen (regnum, buf);
32178cab
MS
945}
946
947void
39f77062 948write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
32178cab 949{
39f77062 950 ptid_t save_ptid;
32178cab 951
39f77062 952 if (ptid_equal (ptid, inferior_ptid))
32178cab 953 {
5ebd2499 954 write_register (regnum, val);
32178cab
MS
955 return;
956 }
957
39f77062 958 save_ptid = inferior_ptid;
32178cab 959
39f77062 960 inferior_ptid = ptid;
32178cab 961
5ebd2499 962 write_register (regnum, val);
32178cab 963
39f77062 964 inferior_ptid = save_ptid;
32178cab
MS
965}
966
967/* SUPPLY_REGISTER()
968
5ebd2499 969 Record that register REGNUM contains VAL. This is used when the
32178cab
MS
970 value is obtained from the inferior or core dump, so there is no
971 need to store the value there.
972
973 If VAL is a NULL pointer, then it's probably an unsupported register.
5ebd2499 974 We just set its value to all zeros. We might want to record this
32178cab
MS
975 fact, and report it to the users of read_register and friends. */
976
977void
5ebd2499 978supply_register (int regnum, char *val)
32178cab
MS
979{
980#if 1
39f77062 981 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
982 {
983 registers_changed ();
39f77062 984 registers_ptid = inferior_ptid;
32178cab
MS
985 }
986#endif
987
7302a204 988 set_register_cached (regnum, 1);
32178cab 989 if (val)
3fadccb3 990 memcpy (register_buffer (current_regcache, regnum), val,
5ebd2499 991 REGISTER_RAW_SIZE (regnum));
32178cab 992 else
3fadccb3 993 memset (register_buffer (current_regcache, regnum), '\000',
5ebd2499 994 REGISTER_RAW_SIZE (regnum));
32178cab
MS
995
996 /* On some architectures, e.g. HPPA, there are a few stray bits in
997 some registers, that the rest of the code would like to ignore. */
998
61a0eb5b
AC
999 /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
1000 going to be deprecated. Instead architectures will leave the raw
1001 register value as is and instead clean things up as they pass
1002 through the method gdbarch_register_read() clean up the
1003 values. */
1004
4ee3352d
AC
1005#ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE
1006 DEPRECATED_CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
32178cab
MS
1007#endif
1008}
1009
193cb69f
AC
1010void
1011regcache_collect (int regnum, void *buf)
1012{
3fadccb3
AC
1013 memcpy (buf, register_buffer (current_regcache, regnum),
1014 REGISTER_RAW_SIZE (regnum));
193cb69f
AC
1015}
1016
1017
8227c0ff
AC
1018/* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special
1019 handling for registers PC, SP, and FP. */
32178cab 1020
4e052eda
AC
1021/* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
1022 read_pc_pid(), read_pc(), generic_target_write_pc(),
1023 write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
8227c0ff
AC
1024 generic_target_write_sp(), write_sp(), generic_target_read_fp() and
1025 read_fp(), will eventually be moved out of the reg-cache into
1026 either frame.[hc] or to the multi-arch framework. The are not part
1027 of the raw register cache. */
4e052eda 1028
32178cab
MS
1029/* This routine is getting awfully cluttered with #if's. It's probably
1030 time to turn this into READ_PC and define it in the tm.h file.
1031 Ditto for write_pc.
1032
1033 1999-06-08: The following were re-written so that it assumes the
8e1a459b 1034 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
1035 version of that macro is made available where needed.
1036
1037 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
1038 by the multi-arch framework, it will eventually be possible to
1039 eliminate the intermediate read_pc_pid(). The client would call
1040 TARGET_READ_PC directly. (cagney). */
1041
32178cab 1042CORE_ADDR
39f77062 1043generic_target_read_pc (ptid_t ptid)
32178cab
MS
1044{
1045#ifdef PC_REGNUM
1046 if (PC_REGNUM >= 0)
1047 {
39f77062 1048 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
32178cab
MS
1049 return pc_val;
1050 }
1051#endif
8e65ff28
AC
1052 internal_error (__FILE__, __LINE__,
1053 "generic_target_read_pc");
32178cab
MS
1054 return 0;
1055}
1056
1057CORE_ADDR
39f77062 1058read_pc_pid (ptid_t ptid)
32178cab 1059{
39f77062 1060 ptid_t saved_inferior_ptid;
32178cab
MS
1061 CORE_ADDR pc_val;
1062
39f77062
KB
1063 /* In case ptid != inferior_ptid. */
1064 saved_inferior_ptid = inferior_ptid;
1065 inferior_ptid = ptid;
32178cab 1066
39f77062 1067 pc_val = TARGET_READ_PC (ptid);
32178cab 1068
39f77062 1069 inferior_ptid = saved_inferior_ptid;
32178cab
MS
1070 return pc_val;
1071}
1072
1073CORE_ADDR
1074read_pc (void)
1075{
39f77062 1076 return read_pc_pid (inferior_ptid);
32178cab
MS
1077}
1078
32178cab 1079void
39f77062 1080generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
32178cab
MS
1081{
1082#ifdef PC_REGNUM
1083 if (PC_REGNUM >= 0)
39f77062 1084 write_register_pid (PC_REGNUM, pc, ptid);
32178cab 1085 if (NPC_REGNUM >= 0)
39f77062 1086 write_register_pid (NPC_REGNUM, pc + 4, ptid);
32178cab 1087#else
8e65ff28
AC
1088 internal_error (__FILE__, __LINE__,
1089 "generic_target_write_pc");
32178cab
MS
1090#endif
1091}
1092
1093void
39f77062 1094write_pc_pid (CORE_ADDR pc, ptid_t ptid)
32178cab 1095{
39f77062 1096 ptid_t saved_inferior_ptid;
32178cab 1097
39f77062
KB
1098 /* In case ptid != inferior_ptid. */
1099 saved_inferior_ptid = inferior_ptid;
1100 inferior_ptid = ptid;
32178cab 1101
39f77062 1102 TARGET_WRITE_PC (pc, ptid);
32178cab 1103
39f77062 1104 inferior_ptid = saved_inferior_ptid;
32178cab
MS
1105}
1106
1107void
1108write_pc (CORE_ADDR pc)
1109{
39f77062 1110 write_pc_pid (pc, inferior_ptid);
32178cab
MS
1111}
1112
1113/* Cope with strage ways of getting to the stack and frame pointers */
1114
32178cab
MS
1115CORE_ADDR
1116generic_target_read_sp (void)
1117{
1118#ifdef SP_REGNUM
1119 if (SP_REGNUM >= 0)
1120 return read_register (SP_REGNUM);
1121#endif
8e65ff28
AC
1122 internal_error (__FILE__, __LINE__,
1123 "generic_target_read_sp");
32178cab
MS
1124}
1125
1126CORE_ADDR
1127read_sp (void)
1128{
1129 return TARGET_READ_SP ();
1130}
1131
32178cab
MS
1132void
1133generic_target_write_sp (CORE_ADDR val)
1134{
1135#ifdef SP_REGNUM
1136 if (SP_REGNUM >= 0)
1137 {
1138 write_register (SP_REGNUM, val);
1139 return;
1140 }
1141#endif
8e65ff28
AC
1142 internal_error (__FILE__, __LINE__,
1143 "generic_target_write_sp");
32178cab
MS
1144}
1145
1146void
1147write_sp (CORE_ADDR val)
1148{
1149 TARGET_WRITE_SP (val);
1150}
1151
32178cab
MS
1152CORE_ADDR
1153generic_target_read_fp (void)
1154{
1155#ifdef FP_REGNUM
1156 if (FP_REGNUM >= 0)
1157 return read_register (FP_REGNUM);
1158#endif
8e65ff28
AC
1159 internal_error (__FILE__, __LINE__,
1160 "generic_target_read_fp");
32178cab
MS
1161}
1162
1163CORE_ADDR
1164read_fp (void)
1165{
1166 return TARGET_READ_FP ();
1167}
1168
705152c5
MS
1169/* ARGSUSED */
1170static void
1171reg_flush_command (char *command, int from_tty)
1172{
1173 /* Force-flush the register cache. */
1174 registers_changed ();
1175 if (from_tty)
1176 printf_filtered ("Register cache flushed.\n");
1177}
1178
32178cab
MS
1179static void
1180build_regcache (void)
3fadccb3
AC
1181{
1182 current_regcache = regcache_xmalloc (current_gdbarch);
1183 current_regcache->passthrough_p = 1;
1184 registers = deprecated_grub_regcache_for_registers (current_regcache);
1185 register_valid = deprecated_grub_regcache_for_register_valid (current_regcache);
1186}
1187
32178cab
MS
1188void
1189_initialize_regcache (void)
1190{
3fadccb3
AC
1191 regcache_descr_handle = register_gdbarch_data (init_regcache_descr,
1192 xfree_regcache_descr);
1193 REGISTER_GDBARCH_SWAP (current_regcache);
32178cab
MS
1194 register_gdbarch_swap (&registers, sizeof (registers), NULL);
1195 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
1196 register_gdbarch_swap (NULL, 0, build_regcache);
705152c5
MS
1197
1198 add_com ("flushregs", class_maintenance, reg_flush_command,
1199 "Force gdb to flush its register cache (maintainer command)");
39f77062
KB
1200
1201 /* Initialize the thread/process associated with the current set of
1202 registers. For now, -1 is special, and means `no current process'. */
1203 registers_ptid = pid_to_ptid (-1);
32178cab 1204}
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