* defs.h (strlen_paddr, paddr, paddr_nz): Remove.
[deliverable/binutils-gdb.git] / gdb / rs6000-aix-tdep.c
CommitLineData
1f82754b
JB
1/* Native support code for PPC AIX, for GDB the GNU debugger.
2
0fb0cc75 3 Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
1f82754b
JB
4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
1f82754b
JB
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
1f82754b
JB
21
22#include "defs.h"
7a61a01c 23#include "gdb_string.h"
4a7622d1 24#include "gdb_assert.h"
1f82754b 25#include "osabi.h"
7a61a01c
UW
26#include "regcache.h"
27#include "regset.h"
4a7622d1
UW
28#include "gdbtypes.h"
29#include "gdbcore.h"
30#include "target.h"
31#include "value.h"
32#include "infcall.h"
33#include "objfiles.h"
34#include "breakpoint.h"
1f82754b 35#include "rs6000-tdep.h"
6f7f3f0d 36#include "ppc-tdep.h"
1f82754b 37
4a7622d1
UW
38/* Hook for determining the TOC address when calling functions in the
39 inferior under AIX. The initialization code in rs6000-nat.c sets
40 this hook to point to find_toc_address. */
41
42CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
43
44/* If the kernel has to deliver a signal, it pushes a sigcontext
45 structure on the stack and then calls the signal handler, passing
46 the address of the sigcontext in an argument register. Usually
47 the signal handler doesn't save this register, so we have to
48 access the sigcontext structure via an offset from the signal handler
49 frame.
50 The following constants were determined by experimentation on AIX 3.2. */
51#define SIG_FRAME_PC_OFFSET 96
52#define SIG_FRAME_LR_OFFSET 108
53#define SIG_FRAME_FP_OFFSET 284
54
7a61a01c
UW
55
56/* Core file support. */
57
58static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
59{
60 /* General-purpose registers. */
61 208, /* r0_offset */
f2db237a
AM
62 4, /* gpr_size */
63 4, /* xr_size */
7a61a01c
UW
64 24, /* pc_offset */
65 28, /* ps_offset */
66 32, /* cr_offset */
67 36, /* lr_offset */
68 40, /* ctr_offset */
69 44, /* xer_offset */
70 48, /* mq_offset */
71
72 /* Floating-point registers. */
73 336, /* f0_offset */
74 56, /* fpscr_offset */
f2db237a 75 4, /* fpscr_size */
7a61a01c
UW
76
77 /* AltiVec registers. */
78 -1, /* vr0_offset */
79 -1, /* vscr_offset */
80 -1 /* vrsave_offset */
81};
82
83static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
84{
85 /* General-purpose registers. */
86 0, /* r0_offset */
f2db237a
AM
87 8, /* gpr_size */
88 4, /* xr_size */
7a61a01c
UW
89 264, /* pc_offset */
90 256, /* ps_offset */
91 288, /* cr_offset */
92 272, /* lr_offset */
93 280, /* ctr_offset */
94 292, /* xer_offset */
95 -1, /* mq_offset */
96
97 /* Floating-point registers. */
98 312, /* f0_offset */
99 296, /* fpscr_offset */
f2db237a 100 4, /* fpscr_size */
7a61a01c
UW
101
102 /* AltiVec registers. */
103 -1, /* vr0_offset */
104 -1, /* vscr_offset */
105 -1 /* vrsave_offset */
106};
107
108
109/* Supply register REGNUM in the general-purpose register set REGSET
110 from the buffer specified by GREGS and LEN to register cache
111 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
112
113static void
114rs6000_aix_supply_regset (const struct regset *regset,
115 struct regcache *regcache, int regnum,
116 const void *gregs, size_t len)
117{
118 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
f2db237a 119 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
7a61a01c
UW
120}
121
122/* Collect register REGNUM in the general-purpose register set
123 REGSET. from register cache REGCACHE into the buffer specified by
124 GREGS and LEN. If REGNUM is -1, do this for all registers in
125 REGSET. */
126
127static void
128rs6000_aix_collect_regset (const struct regset *regset,
129 const struct regcache *regcache, int regnum,
130 void *gregs, size_t len)
131{
132 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
f2db237a 133 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
7a61a01c
UW
134}
135
136/* AIX register set. */
137
138static struct regset rs6000_aix32_regset =
139{
140 &rs6000_aix32_reg_offsets,
141 rs6000_aix_supply_regset,
142 rs6000_aix_collect_regset,
143};
144
145static struct regset rs6000_aix64_regset =
146{
147 &rs6000_aix64_reg_offsets,
148 rs6000_aix_supply_regset,
149 rs6000_aix_collect_regset,
150};
151
152/* Return the appropriate register set for the core section identified
153 by SECT_NAME and SECT_SIZE. */
154
155static const struct regset *
156rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
157 const char *sect_name, size_t sect_size)
158{
159 if (gdbarch_tdep (gdbarch)->wordsize == 4)
160 {
161 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
162 return &rs6000_aix32_regset;
163 }
164 else
165 {
166 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
167 return &rs6000_aix64_regset;
168 }
169
170 return NULL;
171}
172
173
4a7622d1
UW
174/* Pass the arguments in either registers, or in the stack. In RS/6000,
175 the first eight words of the argument list (that might be less than
176 eight parameters if some parameters occupy more than one word) are
177 passed in r3..r10 registers. float and double parameters are
178 passed in fpr's, in addition to that. Rest of the parameters if any
179 are passed in user stack. There might be cases in which half of the
180 parameter is copied into registers, the other half is pushed into
181 stack.
182
183 Stack must be aligned on 64-bit boundaries when synthesizing
184 function calls.
185
186 If the function is returning a structure, then the return address is passed
187 in r3, then the first 7 words of the parameters can be passed in registers,
188 starting from r4. */
189
190static CORE_ADDR
191rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
192 struct regcache *regcache, CORE_ADDR bp_addr,
193 int nargs, struct value **args, CORE_ADDR sp,
194 int struct_return, CORE_ADDR struct_addr)
195{
196 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
197 int ii;
198 int len = 0;
199 int argno; /* current argument number */
200 int argbytes; /* current argument byte */
201 gdb_byte tmp_buffer[50];
202 int f_argno = 0; /* current floating point argno */
203 int wordsize = gdbarch_tdep (gdbarch)->wordsize;
204 CORE_ADDR func_addr = find_function_addr (function, NULL);
205
206 struct value *arg = 0;
207 struct type *type;
208
209 ULONGEST saved_sp;
210
211 /* The calling convention this function implements assumes the
212 processor has floating-point registers. We shouldn't be using it
213 on PPC variants that lack them. */
214 gdb_assert (ppc_floating_point_unit_p (gdbarch));
215
216 /* The first eight words of ther arguments are passed in registers.
217 Copy them appropriately. */
218 ii = 0;
219
220 /* If the function is returning a `struct', then the first word
221 (which will be passed in r3) is used for struct return address.
222 In that case we should advance one word and start from r4
223 register to copy parameters. */
224 if (struct_return)
225 {
226 regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
227 struct_addr);
228 ii++;
229 }
230
231/*
232 effectively indirect call... gcc does...
233
234 return_val example( float, int);
235
236 eabi:
237 float in fp0, int in r3
238 offset of stack on overflow 8/16
239 for varargs, must go by type.
240 power open:
241 float in r3&r4, int in r5
242 offset of stack on overflow different
243 both:
244 return in r3 or f0. If no float, must study how gcc emulates floats;
245 pay attention to arg promotion.
246 User may have to cast\args to handle promotion correctly
247 since gdb won't know if prototype supplied or not.
248 */
249
250 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
251 {
252 int reg_size = register_size (gdbarch, ii + 3);
253
254 arg = args[argno];
255 type = check_typedef (value_type (arg));
256 len = TYPE_LENGTH (type);
257
258 if (TYPE_CODE (type) == TYPE_CODE_FLT)
259 {
260
261 /* Floating point arguments are passed in fpr's, as well as gpr's.
262 There are 13 fpr's reserved for passing parameters. At this point
263 there is no way we would run out of them. */
264
265 gdb_assert (len <= 8);
266
267 regcache_cooked_write (regcache,
268 tdep->ppc_fp0_regnum + 1 + f_argno,
269 value_contents (arg));
270 ++f_argno;
271 }
272
273 if (len > reg_size)
274 {
275
276 /* Argument takes more than one register. */
277 while (argbytes < len)
278 {
279 gdb_byte word[MAX_REGISTER_SIZE];
280 memset (word, 0, reg_size);
281 memcpy (word,
282 ((char *) value_contents (arg)) + argbytes,
283 (len - argbytes) > reg_size
284 ? reg_size : len - argbytes);
285 regcache_cooked_write (regcache,
286 tdep->ppc_gp0_regnum + 3 + ii,
287 word);
288 ++ii, argbytes += reg_size;
289
290 if (ii >= 8)
291 goto ran_out_of_registers_for_arguments;
292 }
293 argbytes = 0;
294 --ii;
295 }
296 else
297 {
298 /* Argument can fit in one register. No problem. */
299 int adj = gdbarch_byte_order (gdbarch)
300 == BFD_ENDIAN_BIG ? reg_size - len : 0;
301 gdb_byte word[MAX_REGISTER_SIZE];
302
303 memset (word, 0, reg_size);
304 memcpy (word, value_contents (arg), len);
305 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word);
306 }
307 ++argno;
308 }
309
310ran_out_of_registers_for_arguments:
311
312 regcache_cooked_read_unsigned (regcache,
313 gdbarch_sp_regnum (gdbarch),
314 &saved_sp);
315
316 /* Location for 8 parameters are always reserved. */
317 sp -= wordsize * 8;
318
319 /* Another six words for back chain, TOC register, link register, etc. */
320 sp -= wordsize * 6;
321
322 /* Stack pointer must be quadword aligned. */
323 sp &= -16;
324
325 /* If there are more arguments, allocate space for them in
326 the stack, then push them starting from the ninth one. */
327
328 if ((argno < nargs) || argbytes)
329 {
330 int space = 0, jj;
331
332 if (argbytes)
333 {
334 space += ((len - argbytes + 3) & -4);
335 jj = argno + 1;
336 }
337 else
338 jj = argno;
339
340 for (; jj < nargs; ++jj)
341 {
342 struct value *val = args[jj];
343 space += ((TYPE_LENGTH (value_type (val))) + 3) & -4;
344 }
345
346 /* Add location required for the rest of the parameters. */
347 space = (space + 15) & -16;
348 sp -= space;
349
350 /* This is another instance we need to be concerned about
351 securing our stack space. If we write anything underneath %sp
352 (r1), we might conflict with the kernel who thinks he is free
353 to use this area. So, update %sp first before doing anything
354 else. */
355
356 regcache_raw_write_signed (regcache,
357 gdbarch_sp_regnum (gdbarch), sp);
358
359 /* If the last argument copied into the registers didn't fit there
360 completely, push the rest of it into stack. */
361
362 if (argbytes)
363 {
364 write_memory (sp + 24 + (ii * 4),
365 value_contents (arg) + argbytes,
366 len - argbytes);
367 ++argno;
368 ii += ((len - argbytes + 3) & -4) / 4;
369 }
370
371 /* Push the rest of the arguments into stack. */
372 for (; argno < nargs; ++argno)
373 {
374
375 arg = args[argno];
376 type = check_typedef (value_type (arg));
377 len = TYPE_LENGTH (type);
378
379
380 /* Float types should be passed in fpr's, as well as in the
381 stack. */
382 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
383 {
384
385 gdb_assert (len <= 8);
386
387 regcache_cooked_write (regcache,
388 tdep->ppc_fp0_regnum + 1 + f_argno,
389 value_contents (arg));
390 ++f_argno;
391 }
392
393 write_memory (sp + 24 + (ii * 4), value_contents (arg), len);
394 ii += ((len + 3) & -4) / 4;
395 }
396 }
397
398 /* Set the stack pointer. According to the ABI, the SP is meant to
399 be set _before_ the corresponding stack space is used. On AIX,
400 this even applies when the target has been completely stopped!
401 Not doing this can lead to conflicts with the kernel which thinks
402 that it still has control over this not-yet-allocated stack
403 region. */
404 regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
405
406 /* Set back chain properly. */
407 store_unsigned_integer (tmp_buffer, wordsize, saved_sp);
408 write_memory (sp, tmp_buffer, wordsize);
409
410 /* Point the inferior function call's return address at the dummy's
411 breakpoint. */
412 regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
413
414 /* Set the TOC register, get the value from the objfile reader
415 which, in turn, gets it from the VMAP table. */
416 if (rs6000_find_toc_address_hook != NULL)
417 {
418 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (func_addr);
419 regcache_raw_write_signed (regcache, tdep->ppc_toc_regnum, tocvalue);
420 }
421
422 target_store_registers (regcache, -1);
423 return sp;
424}
425
426static enum return_value_convention
427rs6000_return_value (struct gdbarch *gdbarch, struct type *func_type,
428 struct type *valtype, struct regcache *regcache,
429 gdb_byte *readbuf, const gdb_byte *writebuf)
430{
431 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
432 gdb_byte buf[8];
433
434 /* The calling convention this function implements assumes the
435 processor has floating-point registers. We shouldn't be using it
436 on PowerPC variants that lack them. */
437 gdb_assert (ppc_floating_point_unit_p (gdbarch));
438
439 /* AltiVec extension: Functions that declare a vector data type as a
440 return value place that return value in VR2. */
441 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
442 && TYPE_LENGTH (valtype) == 16)
443 {
444 if (readbuf)
445 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
446 if (writebuf)
447 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
448
449 return RETURN_VALUE_REGISTER_CONVENTION;
450 }
451
452 /* If the called subprogram returns an aggregate, there exists an
453 implicit first argument, whose value is the address of a caller-
454 allocated buffer into which the callee is assumed to store its
455 return value. All explicit parameters are appropriately
456 relabeled. */
457 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
458 || TYPE_CODE (valtype) == TYPE_CODE_UNION
459 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
460 return RETURN_VALUE_STRUCT_CONVENTION;
461
462 /* Scalar floating-point values are returned in FPR1 for float or
463 double, and in FPR1:FPR2 for quadword precision. Fortran
464 complex*8 and complex*16 are returned in FPR1:FPR2, and
465 complex*32 is returned in FPR1:FPR4. */
466 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
467 && (TYPE_LENGTH (valtype) == 4 || TYPE_LENGTH (valtype) == 8))
468 {
469 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
470 gdb_byte regval[8];
471
472 /* FIXME: kettenis/2007-01-01: Add support for quadword
473 precision and complex. */
474
475 if (readbuf)
476 {
477 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
478 convert_typed_floating (regval, regtype, readbuf, valtype);
479 }
480 if (writebuf)
481 {
482 convert_typed_floating (writebuf, valtype, regval, regtype);
483 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
484 }
485
486 return RETURN_VALUE_REGISTER_CONVENTION;
487 }
488
489 /* Values of the types int, long, short, pointer, and char (length
490 is less than or equal to four bytes), as well as bit values of
491 lengths less than or equal to 32 bits, must be returned right
492 justified in GPR3 with signed values sign extended and unsigned
493 values zero extended, as necessary. */
494 if (TYPE_LENGTH (valtype) <= tdep->wordsize)
495 {
496 if (readbuf)
497 {
498 ULONGEST regval;
499
500 /* For reading we don't have to worry about sign extension. */
501 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
502 &regval);
503 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
504 }
505 if (writebuf)
506 {
507 /* For writing, use unpack_long since that should handle any
508 required sign extension. */
509 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
510 unpack_long (valtype, writebuf));
511 }
512
513 return RETURN_VALUE_REGISTER_CONVENTION;
514 }
515
516 /* Eight-byte non-floating-point scalar values must be returned in
517 GPR3:GPR4. */
518
519 if (TYPE_LENGTH (valtype) == 8)
520 {
521 gdb_assert (TYPE_CODE (valtype) != TYPE_CODE_FLT);
522 gdb_assert (tdep->wordsize == 4);
523
524 if (readbuf)
525 {
526 gdb_byte regval[8];
527
528 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, regval);
529 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
530 regval + 4);
531 memcpy (readbuf, regval, 8);
532 }
533 if (writebuf)
534 {
535 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
536 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
537 writebuf + 4);
538 }
539
540 return RETURN_VALUE_REGISTER_CONVENTION;
541 }
542
543 return RETURN_VALUE_STRUCT_CONVENTION;
544}
545
546/* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
547
548 Usually a function pointer's representation is simply the address
549 of the function. On the RS/6000 however, a function pointer is
550 represented by a pointer to an OPD entry. This OPD entry contains
551 three words, the first word is the address of the function, the
552 second word is the TOC pointer (r2), and the third word is the
553 static chain value. Throughout GDB it is currently assumed that a
554 function pointer contains the address of the function, which is not
555 easy to fix. In addition, the conversion of a function address to
556 a function pointer would require allocation of an OPD entry in the
557 inferior's memory space, with all its drawbacks. To be able to
558 call C++ virtual methods in the inferior (which are called via
559 function pointers), find_function_addr uses this function to get the
560 function address from a function pointer. */
561
562/* Return real function address if ADDR (a function pointer) is in the data
563 space and is therefore a special function pointer. */
564
565static CORE_ADDR
566rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
567 CORE_ADDR addr,
568 struct target_ops *targ)
569{
570 struct obj_section *s;
571
572 s = find_pc_section (addr);
4a7622d1 573
40adab56
JB
574 /* Normally, functions live inside a section that is executable.
575 So, if ADDR points to a non-executable section, then treat it
576 as a function descriptor and return the target address iff
577 the target address itself points to a section that is executable. */
578 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
579 {
580 CORE_ADDR pc =
581 read_memory_unsigned_integer (addr, gdbarch_tdep (gdbarch)->wordsize);
582 struct obj_section *pc_section = find_pc_section (pc);
583
584 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
585 return pc;
586 }
587
588 return addr;
4a7622d1
UW
589}
590
591
592/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
593
594static CORE_ADDR
595branch_dest (struct frame_info *frame, int opcode, int instr,
596 CORE_ADDR pc, CORE_ADDR safety)
597{
598 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
599 CORE_ADDR dest;
600 int immediate;
601 int absolute;
602 int ext_op;
603
604 absolute = (int) ((instr >> 1) & 1);
605
606 switch (opcode)
607 {
608 case 18:
609 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
610 if (absolute)
611 dest = immediate;
612 else
613 dest = pc + immediate;
614 break;
615
616 case 16:
617 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
618 if (absolute)
619 dest = immediate;
620 else
621 dest = pc + immediate;
622 break;
623
624 case 19:
625 ext_op = (instr >> 1) & 0x3ff;
626
627 if (ext_op == 16) /* br conditional register */
628 {
629 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
630
631 /* If we are about to return from a signal handler, dest is
632 something like 0x3c90. The current frame is a signal handler
633 caller frame, upon completion of the sigreturn system call
634 execution will return to the saved PC in the frame. */
635 if (dest < AIX_TEXT_SEGMENT_BASE)
636 dest = read_memory_unsigned_integer
637 (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
638 tdep->wordsize);
639 }
640
641 else if (ext_op == 528) /* br cond to count reg */
642 {
643 dest = get_frame_register_unsigned (frame, tdep->ppc_ctr_regnum) & ~3;
644
645 /* If we are about to execute a system call, dest is something
646 like 0x22fc or 0x3b00. Upon completion the system call
647 will return to the address in the link register. */
648 if (dest < AIX_TEXT_SEGMENT_BASE)
649 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
650 }
651 else
652 return -1;
653 break;
654
655 default:
656 return -1;
657 }
658 return (dest < AIX_TEXT_SEGMENT_BASE) ? safety : dest;
659}
660
661/* AIX does not support PT_STEP. Simulate it. */
662
663static int
664rs6000_software_single_step (struct frame_info *frame)
665{
a6d9a66e 666 struct gdbarch *gdbarch = get_frame_arch (frame);
4a7622d1
UW
667 int ii, insn;
668 CORE_ADDR loc;
669 CORE_ADDR breaks[2];
670 int opcode;
671
672 loc = get_frame_pc (frame);
673
674 insn = read_memory_integer (loc, 4);
675
676 if (ppc_deal_with_atomic_sequence (frame))
677 return 1;
678
679 breaks[0] = loc + PPC_INSN_SIZE;
680 opcode = insn >> 26;
681 breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
682
683 /* Don't put two breakpoints on the same address. */
684 if (breaks[1] == breaks[0])
685 breaks[1] = -1;
686
687 for (ii = 0; ii < 2; ++ii)
688 {
689 /* ignore invalid breakpoint. */
690 if (breaks[ii] == -1)
691 continue;
a6d9a66e 692 insert_single_step_breakpoint (gdbarch, breaks[ii]);
4a7622d1
UW
693 }
694
695 errno = 0; /* FIXME, don't ignore errors! */
696 /* What errors? {read,write}_memory call error(). */
697 return 1;
698}
699
1f82754b
JB
700static enum gdb_osabi
701rs6000_aix_osabi_sniffer (bfd *abfd)
702{
703
704 if (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
705 return GDB_OSABI_AIX;
706
707 return GDB_OSABI_UNKNOWN;
708}
709
710static void
711rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
712{
4a7622d1
UW
713 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
714
1f82754b
JB
715 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
716 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
6f7f3f0d 717
2454a024
UW
718 /* Displaced stepping is currently not supported in combination with
719 software single-stepping. */
720 set_gdbarch_displaced_step_copy_insn (gdbarch, NULL);
721 set_gdbarch_displaced_step_fixup (gdbarch, NULL);
722 set_gdbarch_displaced_step_free_closure (gdbarch, NULL);
723 set_gdbarch_displaced_step_location (gdbarch, NULL);
724
4a7622d1
UW
725 set_gdbarch_push_dummy_call (gdbarch, rs6000_push_dummy_call);
726 set_gdbarch_return_value (gdbarch, rs6000_return_value);
727 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
728
729 /* Handle RS/6000 function pointers (which are really function
730 descriptors). */
731 set_gdbarch_convert_from_func_ptr_addr
732 (gdbarch, rs6000_convert_from_func_ptr_addr);
733
7a61a01c
UW
734 /* Core file support. */
735 set_gdbarch_regset_from_core_section
736 (gdbarch, rs6000_aix_regset_from_core_section);
737
4a7622d1
UW
738 if (tdep->wordsize == 8)
739 tdep->lr_frame_offset = 16;
740 else
741 tdep->lr_frame_offset = 8;
742
743 if (tdep->wordsize == 4)
744 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
745 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
746 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
747 224. */
748 set_gdbarch_frame_red_zone_size (gdbarch, 224);
749 else
750 set_gdbarch_frame_red_zone_size (gdbarch, 0);
1f82754b
JB
751}
752
63807e1d
PA
753/* Provide a prototype to silence -Wmissing-prototypes. */
754extern initialize_file_ftype _initialize_rs6000_aix_tdep;
755
1f82754b
JB
756void
757_initialize_rs6000_aix_tdep (void)
758{
759 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
760 bfd_target_xcoff_flavour,
761 rs6000_aix_osabi_sniffer);
7a61a01c
UW
762 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
763 bfd_target_xcoff_flavour,
764 rs6000_aix_osabi_sniffer);
1f82754b
JB
765
766 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
767 rs6000_aix_init_osabi);
7a61a01c
UW
768 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
769 rs6000_aix_init_osabi);
1f82754b
JB
770}
771
This page took 0.328243 seconds and 4 git commands to generate.