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[deliverable/binutils-gdb.git] / gdb / rs6000-aix-tdep.c
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1/* Native support code for PPC AIX, for GDB the GNU debugger.
2
6aba47ca 3 Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
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12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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21
22#include "defs.h"
7a61a01c 23#include "gdb_string.h"
1f82754b 24#include "osabi.h"
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25#include "regcache.h"
26#include "regset.h"
1f82754b 27#include "rs6000-tdep.h"
6f7f3f0d 28#include "ppc-tdep.h"
1f82754b 29
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30
31/* Core file support. */
32
33static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
34{
35 /* General-purpose registers. */
36 208, /* r0_offset */
37 24, /* pc_offset */
38 28, /* ps_offset */
39 32, /* cr_offset */
40 36, /* lr_offset */
41 40, /* ctr_offset */
42 44, /* xer_offset */
43 48, /* mq_offset */
44
45 /* Floating-point registers. */
46 336, /* f0_offset */
47 56, /* fpscr_offset */
48
49 /* AltiVec registers. */
50 -1, /* vr0_offset */
51 -1, /* vscr_offset */
52 -1 /* vrsave_offset */
53};
54
55static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
56{
57 /* General-purpose registers. */
58 0, /* r0_offset */
59 264, /* pc_offset */
60 256, /* ps_offset */
61 288, /* cr_offset */
62 272, /* lr_offset */
63 280, /* ctr_offset */
64 292, /* xer_offset */
65 -1, /* mq_offset */
66
67 /* Floating-point registers. */
68 312, /* f0_offset */
69 296, /* fpscr_offset */
70
71 /* AltiVec registers. */
72 -1, /* vr0_offset */
73 -1, /* vscr_offset */
74 -1 /* vrsave_offset */
75};
76
77
78/* Supply register REGNUM in the general-purpose register set REGSET
79 from the buffer specified by GREGS and LEN to register cache
80 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
81
82static void
83rs6000_aix_supply_regset (const struct regset *regset,
84 struct regcache *regcache, int regnum,
85 const void *gregs, size_t len)
86{
87 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
88
89 if (ppc_floating_point_unit_p (get_regcache_arch (regcache)))
90 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
91}
92
93/* Collect register REGNUM in the general-purpose register set
94 REGSET. from register cache REGCACHE into the buffer specified by
95 GREGS and LEN. If REGNUM is -1, do this for all registers in
96 REGSET. */
97
98static void
99rs6000_aix_collect_regset (const struct regset *regset,
100 const struct regcache *regcache, int regnum,
101 void *gregs, size_t len)
102{
103 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
104
105 if (ppc_floating_point_unit_p (get_regcache_arch (regcache)))
106 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
107}
108
109/* AIX register set. */
110
111static struct regset rs6000_aix32_regset =
112{
113 &rs6000_aix32_reg_offsets,
114 rs6000_aix_supply_regset,
115 rs6000_aix_collect_regset,
116};
117
118static struct regset rs6000_aix64_regset =
119{
120 &rs6000_aix64_reg_offsets,
121 rs6000_aix_supply_regset,
122 rs6000_aix_collect_regset,
123};
124
125/* Return the appropriate register set for the core section identified
126 by SECT_NAME and SECT_SIZE. */
127
128static const struct regset *
129rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
130 const char *sect_name, size_t sect_size)
131{
132 if (gdbarch_tdep (gdbarch)->wordsize == 4)
133 {
134 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
135 return &rs6000_aix32_regset;
136 }
137 else
138 {
139 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
140 return &rs6000_aix64_regset;
141 }
142
143 return NULL;
144}
145
146
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147static enum gdb_osabi
148rs6000_aix_osabi_sniffer (bfd *abfd)
149{
150
151 if (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
152 return GDB_OSABI_AIX;
153
154 return GDB_OSABI_UNKNOWN;
155}
156
157static void
158rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
159{
160 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
161 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
6f7f3f0d 162
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163 /* Core file support. */
164 set_gdbarch_regset_from_core_section
165 (gdbarch, rs6000_aix_regset_from_core_section);
166
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167 /* Minimum possible text address in AIX. */
168 gdbarch_tdep (gdbarch)->text_segment_base = 0x10000000;
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169}
170
171void
172_initialize_rs6000_aix_tdep (void)
173{
174 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
175 bfd_target_xcoff_flavour,
176 rs6000_aix_osabi_sniffer);
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177 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
178 bfd_target_xcoff_flavour,
179 rs6000_aix_osabi_sniffer);
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180
181 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
182 rs6000_aix_init_osabi);
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183 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
184 rs6000_aix_init_osabi);
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185}
186
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