* gdb.base/source-test.gdb: New file.
[deliverable/binutils-gdb.git] / gdb / rs6000-aix-tdep.c
CommitLineData
1f82754b
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1/* Native support code for PPC AIX, for GDB the GNU debugger.
2
4c38e0a4 3 Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
1f82754b
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12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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21
22#include "defs.h"
7a61a01c 23#include "gdb_string.h"
4a7622d1 24#include "gdb_assert.h"
1f82754b 25#include "osabi.h"
7a61a01c
UW
26#include "regcache.h"
27#include "regset.h"
4a7622d1
UW
28#include "gdbtypes.h"
29#include "gdbcore.h"
30#include "target.h"
31#include "value.h"
32#include "infcall.h"
33#include "objfiles.h"
34#include "breakpoint.h"
1f82754b 35#include "rs6000-tdep.h"
6f7f3f0d 36#include "ppc-tdep.h"
2971b56b 37#include "exceptions.h"
1f82754b 38
4a7622d1
UW
39/* Hook for determining the TOC address when calling functions in the
40 inferior under AIX. The initialization code in rs6000-nat.c sets
41 this hook to point to find_toc_address. */
42
43CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
44
45/* If the kernel has to deliver a signal, it pushes a sigcontext
46 structure on the stack and then calls the signal handler, passing
47 the address of the sigcontext in an argument register. Usually
48 the signal handler doesn't save this register, so we have to
49 access the sigcontext structure via an offset from the signal handler
50 frame.
51 The following constants were determined by experimentation on AIX 3.2. */
52#define SIG_FRAME_PC_OFFSET 96
53#define SIG_FRAME_LR_OFFSET 108
54#define SIG_FRAME_FP_OFFSET 284
55
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UW
56
57/* Core file support. */
58
59static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
60{
61 /* General-purpose registers. */
62 208, /* r0_offset */
f2db237a
AM
63 4, /* gpr_size */
64 4, /* xr_size */
7a61a01c
UW
65 24, /* pc_offset */
66 28, /* ps_offset */
67 32, /* cr_offset */
68 36, /* lr_offset */
69 40, /* ctr_offset */
70 44, /* xer_offset */
71 48, /* mq_offset */
72
73 /* Floating-point registers. */
74 336, /* f0_offset */
75 56, /* fpscr_offset */
f2db237a 76 4, /* fpscr_size */
7a61a01c
UW
77
78 /* AltiVec registers. */
79 -1, /* vr0_offset */
80 -1, /* vscr_offset */
81 -1 /* vrsave_offset */
82};
83
84static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
85{
86 /* General-purpose registers. */
87 0, /* r0_offset */
f2db237a
AM
88 8, /* gpr_size */
89 4, /* xr_size */
7a61a01c
UW
90 264, /* pc_offset */
91 256, /* ps_offset */
92 288, /* cr_offset */
93 272, /* lr_offset */
94 280, /* ctr_offset */
95 292, /* xer_offset */
96 -1, /* mq_offset */
97
98 /* Floating-point registers. */
99 312, /* f0_offset */
100 296, /* fpscr_offset */
f2db237a 101 4, /* fpscr_size */
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UW
102
103 /* AltiVec registers. */
104 -1, /* vr0_offset */
105 -1, /* vscr_offset */
106 -1 /* vrsave_offset */
107};
108
109
110/* Supply register REGNUM in the general-purpose register set REGSET
111 from the buffer specified by GREGS and LEN to register cache
112 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
113
114static void
115rs6000_aix_supply_regset (const struct regset *regset,
116 struct regcache *regcache, int regnum,
117 const void *gregs, size_t len)
118{
119 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
f2db237a 120 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
7a61a01c
UW
121}
122
123/* Collect register REGNUM in the general-purpose register set
124 REGSET. from register cache REGCACHE into the buffer specified by
125 GREGS and LEN. If REGNUM is -1, do this for all registers in
126 REGSET. */
127
128static void
129rs6000_aix_collect_regset (const struct regset *regset,
130 const struct regcache *regcache, int regnum,
131 void *gregs, size_t len)
132{
133 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
f2db237a 134 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
7a61a01c
UW
135}
136
137/* AIX register set. */
138
139static struct regset rs6000_aix32_regset =
140{
141 &rs6000_aix32_reg_offsets,
142 rs6000_aix_supply_regset,
143 rs6000_aix_collect_regset,
144};
145
146static struct regset rs6000_aix64_regset =
147{
148 &rs6000_aix64_reg_offsets,
149 rs6000_aix_supply_regset,
150 rs6000_aix_collect_regset,
151};
152
153/* Return the appropriate register set for the core section identified
154 by SECT_NAME and SECT_SIZE. */
155
156static const struct regset *
157rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
158 const char *sect_name, size_t sect_size)
159{
160 if (gdbarch_tdep (gdbarch)->wordsize == 4)
161 {
162 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
163 return &rs6000_aix32_regset;
164 }
165 else
166 {
167 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
168 return &rs6000_aix64_regset;
169 }
170
171 return NULL;
172}
173
174
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UW
175/* Pass the arguments in either registers, or in the stack. In RS/6000,
176 the first eight words of the argument list (that might be less than
177 eight parameters if some parameters occupy more than one word) are
178 passed in r3..r10 registers. float and double parameters are
179 passed in fpr's, in addition to that. Rest of the parameters if any
180 are passed in user stack. There might be cases in which half of the
181 parameter is copied into registers, the other half is pushed into
182 stack.
183
184 Stack must be aligned on 64-bit boundaries when synthesizing
185 function calls.
186
187 If the function is returning a structure, then the return address is passed
188 in r3, then the first 7 words of the parameters can be passed in registers,
189 starting from r4. */
190
191static CORE_ADDR
192rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
193 struct regcache *regcache, CORE_ADDR bp_addr,
194 int nargs, struct value **args, CORE_ADDR sp,
195 int struct_return, CORE_ADDR struct_addr)
196{
197 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 198 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4a7622d1
UW
199 int ii;
200 int len = 0;
201 int argno; /* current argument number */
202 int argbytes; /* current argument byte */
203 gdb_byte tmp_buffer[50];
204 int f_argno = 0; /* current floating point argno */
205 int wordsize = gdbarch_tdep (gdbarch)->wordsize;
206 CORE_ADDR func_addr = find_function_addr (function, NULL);
207
208 struct value *arg = 0;
209 struct type *type;
210
211 ULONGEST saved_sp;
212
213 /* The calling convention this function implements assumes the
214 processor has floating-point registers. We shouldn't be using it
215 on PPC variants that lack them. */
216 gdb_assert (ppc_floating_point_unit_p (gdbarch));
217
218 /* The first eight words of ther arguments are passed in registers.
219 Copy them appropriately. */
220 ii = 0;
221
222 /* If the function is returning a `struct', then the first word
223 (which will be passed in r3) is used for struct return address.
224 In that case we should advance one word and start from r4
225 register to copy parameters. */
226 if (struct_return)
227 {
228 regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
229 struct_addr);
230 ii++;
231 }
232
233/*
234 effectively indirect call... gcc does...
235
236 return_val example( float, int);
237
238 eabi:
239 float in fp0, int in r3
240 offset of stack on overflow 8/16
241 for varargs, must go by type.
242 power open:
243 float in r3&r4, int in r5
244 offset of stack on overflow different
245 both:
246 return in r3 or f0. If no float, must study how gcc emulates floats;
247 pay attention to arg promotion.
248 User may have to cast\args to handle promotion correctly
249 since gdb won't know if prototype supplied or not.
250 */
251
252 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
253 {
254 int reg_size = register_size (gdbarch, ii + 3);
255
256 arg = args[argno];
257 type = check_typedef (value_type (arg));
258 len = TYPE_LENGTH (type);
259
260 if (TYPE_CODE (type) == TYPE_CODE_FLT)
261 {
262
263 /* Floating point arguments are passed in fpr's, as well as gpr's.
264 There are 13 fpr's reserved for passing parameters. At this point
265 there is no way we would run out of them. */
266
267 gdb_assert (len <= 8);
268
269 regcache_cooked_write (regcache,
270 tdep->ppc_fp0_regnum + 1 + f_argno,
271 value_contents (arg));
272 ++f_argno;
273 }
274
275 if (len > reg_size)
276 {
277
278 /* Argument takes more than one register. */
279 while (argbytes < len)
280 {
281 gdb_byte word[MAX_REGISTER_SIZE];
282 memset (word, 0, reg_size);
283 memcpy (word,
284 ((char *) value_contents (arg)) + argbytes,
285 (len - argbytes) > reg_size
286 ? reg_size : len - argbytes);
287 regcache_cooked_write (regcache,
288 tdep->ppc_gp0_regnum + 3 + ii,
289 word);
290 ++ii, argbytes += reg_size;
291
292 if (ii >= 8)
293 goto ran_out_of_registers_for_arguments;
294 }
295 argbytes = 0;
296 --ii;
297 }
298 else
299 {
300 /* Argument can fit in one register. No problem. */
301 int adj = gdbarch_byte_order (gdbarch)
302 == BFD_ENDIAN_BIG ? reg_size - len : 0;
303 gdb_byte word[MAX_REGISTER_SIZE];
304
305 memset (word, 0, reg_size);
306 memcpy (word, value_contents (arg), len);
307 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word);
308 }
309 ++argno;
310 }
311
312ran_out_of_registers_for_arguments:
313
314 regcache_cooked_read_unsigned (regcache,
315 gdbarch_sp_regnum (gdbarch),
316 &saved_sp);
317
318 /* Location for 8 parameters are always reserved. */
319 sp -= wordsize * 8;
320
321 /* Another six words for back chain, TOC register, link register, etc. */
322 sp -= wordsize * 6;
323
324 /* Stack pointer must be quadword aligned. */
325 sp &= -16;
326
327 /* If there are more arguments, allocate space for them in
328 the stack, then push them starting from the ninth one. */
329
330 if ((argno < nargs) || argbytes)
331 {
332 int space = 0, jj;
333
334 if (argbytes)
335 {
336 space += ((len - argbytes + 3) & -4);
337 jj = argno + 1;
338 }
339 else
340 jj = argno;
341
342 for (; jj < nargs; ++jj)
343 {
344 struct value *val = args[jj];
345 space += ((TYPE_LENGTH (value_type (val))) + 3) & -4;
346 }
347
348 /* Add location required for the rest of the parameters. */
349 space = (space + 15) & -16;
350 sp -= space;
351
352 /* This is another instance we need to be concerned about
353 securing our stack space. If we write anything underneath %sp
354 (r1), we might conflict with the kernel who thinks he is free
355 to use this area. So, update %sp first before doing anything
356 else. */
357
358 regcache_raw_write_signed (regcache,
359 gdbarch_sp_regnum (gdbarch), sp);
360
361 /* If the last argument copied into the registers didn't fit there
362 completely, push the rest of it into stack. */
363
364 if (argbytes)
365 {
366 write_memory (sp + 24 + (ii * 4),
367 value_contents (arg) + argbytes,
368 len - argbytes);
369 ++argno;
370 ii += ((len - argbytes + 3) & -4) / 4;
371 }
372
373 /* Push the rest of the arguments into stack. */
374 for (; argno < nargs; ++argno)
375 {
376
377 arg = args[argno];
378 type = check_typedef (value_type (arg));
379 len = TYPE_LENGTH (type);
380
381
382 /* Float types should be passed in fpr's, as well as in the
383 stack. */
384 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
385 {
386
387 gdb_assert (len <= 8);
388
389 regcache_cooked_write (regcache,
390 tdep->ppc_fp0_regnum + 1 + f_argno,
391 value_contents (arg));
392 ++f_argno;
393 }
394
395 write_memory (sp + 24 + (ii * 4), value_contents (arg), len);
396 ii += ((len + 3) & -4) / 4;
397 }
398 }
399
400 /* Set the stack pointer. According to the ABI, the SP is meant to
401 be set _before_ the corresponding stack space is used. On AIX,
402 this even applies when the target has been completely stopped!
403 Not doing this can lead to conflicts with the kernel which thinks
404 that it still has control over this not-yet-allocated stack
405 region. */
406 regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
407
408 /* Set back chain properly. */
e17a4113 409 store_unsigned_integer (tmp_buffer, wordsize, byte_order, saved_sp);
4a7622d1
UW
410 write_memory (sp, tmp_buffer, wordsize);
411
412 /* Point the inferior function call's return address at the dummy's
413 breakpoint. */
414 regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
415
416 /* Set the TOC register, get the value from the objfile reader
417 which, in turn, gets it from the VMAP table. */
418 if (rs6000_find_toc_address_hook != NULL)
419 {
420 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (func_addr);
421 regcache_raw_write_signed (regcache, tdep->ppc_toc_regnum, tocvalue);
422 }
423
424 target_store_registers (regcache, -1);
425 return sp;
426}
427
428static enum return_value_convention
429rs6000_return_value (struct gdbarch *gdbarch, struct type *func_type,
430 struct type *valtype, struct regcache *regcache,
431 gdb_byte *readbuf, const gdb_byte *writebuf)
432{
433 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 434 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4a7622d1
UW
435 gdb_byte buf[8];
436
437 /* The calling convention this function implements assumes the
438 processor has floating-point registers. We shouldn't be using it
439 on PowerPC variants that lack them. */
440 gdb_assert (ppc_floating_point_unit_p (gdbarch));
441
442 /* AltiVec extension: Functions that declare a vector data type as a
443 return value place that return value in VR2. */
444 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
445 && TYPE_LENGTH (valtype) == 16)
446 {
447 if (readbuf)
448 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
449 if (writebuf)
450 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
451
452 return RETURN_VALUE_REGISTER_CONVENTION;
453 }
454
455 /* If the called subprogram returns an aggregate, there exists an
456 implicit first argument, whose value is the address of a caller-
457 allocated buffer into which the callee is assumed to store its
458 return value. All explicit parameters are appropriately
459 relabeled. */
460 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
461 || TYPE_CODE (valtype) == TYPE_CODE_UNION
462 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
463 return RETURN_VALUE_STRUCT_CONVENTION;
464
465 /* Scalar floating-point values are returned in FPR1 for float or
466 double, and in FPR1:FPR2 for quadword precision. Fortran
467 complex*8 and complex*16 are returned in FPR1:FPR2, and
468 complex*32 is returned in FPR1:FPR4. */
469 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
470 && (TYPE_LENGTH (valtype) == 4 || TYPE_LENGTH (valtype) == 8))
471 {
472 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
473 gdb_byte regval[8];
474
475 /* FIXME: kettenis/2007-01-01: Add support for quadword
476 precision and complex. */
477
478 if (readbuf)
479 {
480 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
481 convert_typed_floating (regval, regtype, readbuf, valtype);
482 }
483 if (writebuf)
484 {
485 convert_typed_floating (writebuf, valtype, regval, regtype);
486 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
487 }
488
489 return RETURN_VALUE_REGISTER_CONVENTION;
490 }
491
492 /* Values of the types int, long, short, pointer, and char (length
493 is less than or equal to four bytes), as well as bit values of
494 lengths less than or equal to 32 bits, must be returned right
495 justified in GPR3 with signed values sign extended and unsigned
496 values zero extended, as necessary. */
497 if (TYPE_LENGTH (valtype) <= tdep->wordsize)
498 {
499 if (readbuf)
500 {
501 ULONGEST regval;
502
503 /* For reading we don't have to worry about sign extension. */
504 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
505 &regval);
e17a4113
UW
506 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
507 regval);
4a7622d1
UW
508 }
509 if (writebuf)
510 {
511 /* For writing, use unpack_long since that should handle any
512 required sign extension. */
513 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
514 unpack_long (valtype, writebuf));
515 }
516
517 return RETURN_VALUE_REGISTER_CONVENTION;
518 }
519
520 /* Eight-byte non-floating-point scalar values must be returned in
521 GPR3:GPR4. */
522
523 if (TYPE_LENGTH (valtype) == 8)
524 {
525 gdb_assert (TYPE_CODE (valtype) != TYPE_CODE_FLT);
526 gdb_assert (tdep->wordsize == 4);
527
528 if (readbuf)
529 {
530 gdb_byte regval[8];
531
532 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, regval);
533 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
534 regval + 4);
535 memcpy (readbuf, regval, 8);
536 }
537 if (writebuf)
538 {
539 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
540 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
541 writebuf + 4);
542 }
543
544 return RETURN_VALUE_REGISTER_CONVENTION;
545 }
546
547 return RETURN_VALUE_STRUCT_CONVENTION;
548}
549
550/* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
551
552 Usually a function pointer's representation is simply the address
553 of the function. On the RS/6000 however, a function pointer is
554 represented by a pointer to an OPD entry. This OPD entry contains
555 three words, the first word is the address of the function, the
556 second word is the TOC pointer (r2), and the third word is the
557 static chain value. Throughout GDB it is currently assumed that a
558 function pointer contains the address of the function, which is not
559 easy to fix. In addition, the conversion of a function address to
560 a function pointer would require allocation of an OPD entry in the
561 inferior's memory space, with all its drawbacks. To be able to
562 call C++ virtual methods in the inferior (which are called via
563 function pointers), find_function_addr uses this function to get the
564 function address from a function pointer. */
565
566/* Return real function address if ADDR (a function pointer) is in the data
567 space and is therefore a special function pointer. */
568
569static CORE_ADDR
570rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
571 CORE_ADDR addr,
572 struct target_ops *targ)
573{
e17a4113
UW
574 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
575 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4a7622d1
UW
576 struct obj_section *s;
577
578 s = find_pc_section (addr);
4a7622d1 579
40adab56
JB
580 /* Normally, functions live inside a section that is executable.
581 So, if ADDR points to a non-executable section, then treat it
582 as a function descriptor and return the target address iff
583 the target address itself points to a section that is executable. */
584 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
585 {
2971b56b
JB
586 CORE_ADDR pc;
587 struct obj_section *pc_section;
588 struct gdb_exception e;
589
590 TRY_CATCH (e, RETURN_MASK_ERROR)
591 {
592 pc = read_memory_unsigned_integer (addr, tdep->wordsize, byte_order);
593 }
594 if (e.reason < 0)
595 {
596 /* An error occured during reading. Probably a memory error
597 due to the section not being loaded yet. This address
598 cannot be a function descriptor. */
599 return addr;
600 }
601 pc_section = find_pc_section (pc);
40adab56
JB
602
603 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
604 return pc;
605 }
606
607 return addr;
4a7622d1
UW
608}
609
610
611/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
612
613static CORE_ADDR
614branch_dest (struct frame_info *frame, int opcode, int instr,
615 CORE_ADDR pc, CORE_ADDR safety)
616{
e17a4113
UW
617 struct gdbarch *gdbarch = get_frame_arch (frame);
618 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
619 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4a7622d1
UW
620 CORE_ADDR dest;
621 int immediate;
622 int absolute;
623 int ext_op;
624
625 absolute = (int) ((instr >> 1) & 1);
626
627 switch (opcode)
628 {
629 case 18:
630 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
631 if (absolute)
632 dest = immediate;
633 else
634 dest = pc + immediate;
635 break;
636
637 case 16:
638 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
639 if (absolute)
640 dest = immediate;
641 else
642 dest = pc + immediate;
643 break;
644
645 case 19:
646 ext_op = (instr >> 1) & 0x3ff;
647
648 if (ext_op == 16) /* br conditional register */
649 {
650 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
651
652 /* If we are about to return from a signal handler, dest is
653 something like 0x3c90. The current frame is a signal handler
654 caller frame, upon completion of the sigreturn system call
655 execution will return to the saved PC in the frame. */
656 if (dest < AIX_TEXT_SEGMENT_BASE)
657 dest = read_memory_unsigned_integer
658 (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
e17a4113 659 tdep->wordsize, byte_order);
4a7622d1
UW
660 }
661
662 else if (ext_op == 528) /* br cond to count reg */
663 {
664 dest = get_frame_register_unsigned (frame, tdep->ppc_ctr_regnum) & ~3;
665
666 /* If we are about to execute a system call, dest is something
667 like 0x22fc or 0x3b00. Upon completion the system call
668 will return to the address in the link register. */
669 if (dest < AIX_TEXT_SEGMENT_BASE)
670 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
671 }
672 else
673 return -1;
674 break;
675
676 default:
677 return -1;
678 }
679 return (dest < AIX_TEXT_SEGMENT_BASE) ? safety : dest;
680}
681
682/* AIX does not support PT_STEP. Simulate it. */
683
684static int
685rs6000_software_single_step (struct frame_info *frame)
686{
a6d9a66e 687 struct gdbarch *gdbarch = get_frame_arch (frame);
6c95b8df 688 struct address_space *aspace = get_frame_address_space (frame);
e17a4113 689 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4a7622d1
UW
690 int ii, insn;
691 CORE_ADDR loc;
692 CORE_ADDR breaks[2];
693 int opcode;
694
695 loc = get_frame_pc (frame);
696
e17a4113 697 insn = read_memory_integer (loc, 4, byte_order);
4a7622d1
UW
698
699 if (ppc_deal_with_atomic_sequence (frame))
700 return 1;
701
702 breaks[0] = loc + PPC_INSN_SIZE;
703 opcode = insn >> 26;
704 breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
705
706 /* Don't put two breakpoints on the same address. */
707 if (breaks[1] == breaks[0])
708 breaks[1] = -1;
709
710 for (ii = 0; ii < 2; ++ii)
711 {
712 /* ignore invalid breakpoint. */
713 if (breaks[ii] == -1)
714 continue;
6c95b8df 715 insert_single_step_breakpoint (gdbarch, aspace, breaks[ii]);
4a7622d1
UW
716 }
717
718 errno = 0; /* FIXME, don't ignore errors! */
719 /* What errors? {read,write}_memory call error(). */
720 return 1;
721}
722
1f82754b
JB
723static enum gdb_osabi
724rs6000_aix_osabi_sniffer (bfd *abfd)
725{
726
727 if (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
728 return GDB_OSABI_AIX;
729
730 return GDB_OSABI_UNKNOWN;
731}
732
733static void
734rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
735{
4a7622d1
UW
736 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
737
1f82754b
JB
738 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
739 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
6f7f3f0d 740
2454a024
UW
741 /* Displaced stepping is currently not supported in combination with
742 software single-stepping. */
743 set_gdbarch_displaced_step_copy_insn (gdbarch, NULL);
744 set_gdbarch_displaced_step_fixup (gdbarch, NULL);
745 set_gdbarch_displaced_step_free_closure (gdbarch, NULL);
746 set_gdbarch_displaced_step_location (gdbarch, NULL);
747
4a7622d1
UW
748 set_gdbarch_push_dummy_call (gdbarch, rs6000_push_dummy_call);
749 set_gdbarch_return_value (gdbarch, rs6000_return_value);
750 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
751
752 /* Handle RS/6000 function pointers (which are really function
753 descriptors). */
754 set_gdbarch_convert_from_func_ptr_addr
755 (gdbarch, rs6000_convert_from_func_ptr_addr);
756
7a61a01c
UW
757 /* Core file support. */
758 set_gdbarch_regset_from_core_section
759 (gdbarch, rs6000_aix_regset_from_core_section);
760
4a7622d1
UW
761 if (tdep->wordsize == 8)
762 tdep->lr_frame_offset = 16;
763 else
764 tdep->lr_frame_offset = 8;
765
766 if (tdep->wordsize == 4)
767 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
768 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
769 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
770 224. */
771 set_gdbarch_frame_red_zone_size (gdbarch, 224);
772 else
773 set_gdbarch_frame_red_zone_size (gdbarch, 0);
1f82754b
JB
774}
775
63807e1d
PA
776/* Provide a prototype to silence -Wmissing-prototypes. */
777extern initialize_file_ftype _initialize_rs6000_aix_tdep;
778
1f82754b
JB
779void
780_initialize_rs6000_aix_tdep (void)
781{
782 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
783 bfd_target_xcoff_flavour,
784 rs6000_aix_osabi_sniffer);
7a61a01c
UW
785 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
786 bfd_target_xcoff_flavour,
787 rs6000_aix_osabi_sniffer);
1f82754b
JB
788
789 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
790 rs6000_aix_init_osabi);
7a61a01c
UW
791 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
792 rs6000_aix_init_osabi);
1f82754b
JB
793}
794
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