Fix some places where octet to byte conversions are needed.
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
618f726f 3 Copyright (C) 2001-2016 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
566c56c9
MK
47#include "linux-record.h"
48#include "record-full.h"
4ac33720 49#include "auxv.h"
237b092b 50#include "xml-syscall.h"
5769d3cd 51
55aa24fb
SDJ
52#include "stap-probe.h"
53#include "ax.h"
54#include "ax-gdb.h"
55#include "user-regs.h"
56#include "cli/cli-utils.h"
57#include <ctype.h>
04a83fee 58#include "elf/common.h"
417c80f9
AA
59#include "elf/s390.h"
60#include "elf-bfd.h"
55aa24fb 61
7803799a 62#include "features/s390-linux32.c"
c642a434
UW
63#include "features/s390-linux32v1.c"
64#include "features/s390-linux32v2.c"
7803799a 65#include "features/s390-linux64.c"
c642a434
UW
66#include "features/s390-linux64v1.c"
67#include "features/s390-linux64v2.c"
4ac33720 68#include "features/s390-te-linux64.c"
550bdf96
AA
69#include "features/s390-vx-linux64.c"
70#include "features/s390-tevx-linux64.c"
7803799a 71#include "features/s390x-linux64.c"
c642a434
UW
72#include "features/s390x-linux64v1.c"
73#include "features/s390x-linux64v2.c"
4ac33720 74#include "features/s390x-te-linux64.c"
550bdf96
AA
75#include "features/s390x-vx-linux64.c"
76#include "features/s390x-tevx-linux64.c"
7803799a 77
237b092b
AA
78#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
79#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
80
52059ffd
TT
81enum s390_abi_kind
82{
83 ABI_LINUX_S390,
84 ABI_LINUX_ZSERIES
85};
86
417c80f9
AA
87enum s390_vector_abi_kind
88{
89 S390_VECTOR_ABI_NONE,
90 S390_VECTOR_ABI_128
91};
92
d0f54f9d
JB
93/* The tdep structure. */
94
95struct gdbarch_tdep
5769d3cd 96{
b0cf273e 97 /* ABI version. */
52059ffd 98 enum s390_abi_kind abi;
b0cf273e 99
417c80f9
AA
100 /* Vector ABI. */
101 enum s390_vector_abi_kind vector_abi;
102
7803799a
UW
103 /* Pseudo register numbers. */
104 int gpr_full_regnum;
105 int pc_regnum;
106 int cc_regnum;
550bdf96 107 int v0_full_regnum;
7803799a 108
5aa82d05
AA
109 int have_linux_v1;
110 int have_linux_v2;
111 int have_tdb;
d0f54f9d
JB
112};
113
114
7803799a
UW
115/* ABI call-saved register information. */
116
117static int
118s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 119{
7803799a
UW
120 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
121
122 switch (tdep->abi)
6707b003 123 {
7803799a
UW
124 case ABI_LINUX_S390:
125 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
126 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
127 || regnum == S390_A0_REGNUM)
128 return 1;
6707b003 129
7803799a
UW
130 break;
131
132 case ABI_LINUX_ZSERIES:
133 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
134 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
135 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
136 return 1;
137
138 break;
139 }
140
141 return 0;
5769d3cd
AC
142}
143
c642a434
UW
144static int
145s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
146{
147 /* The last-break address is read-only. */
148 return regnum == S390_LAST_BREAK_REGNUM;
149}
150
151static void
152s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
153{
154 struct gdbarch *gdbarch = get_regcache_arch (regcache);
155 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
156
157 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
158
159 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
160 messing with the PC we just installed, if we happen to be within
161 an interrupted system call that the kernel wants to restart.
162
163 Note that after we return from the dummy call, the SYSTEM_CALL and
164 ORIG_R2 registers will be automatically restored, and the kernel
165 continues to restart the system call at this point. */
166 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
167 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
168}
169
f79a3bae
MK
170/* The "guess_tracepoint_registers" gdbarch method. */
171
172static void
173s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
174 struct regcache *regcache,
175 CORE_ADDR addr)
176{
177 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
178 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
179 gdb_byte *reg = (gdb_byte *) alloca (sz);
180 ULONGEST pswm, pswa;
181
182 /* Set PSWA from the location and a default PSWM (the only part we're
183 unlikely to get right is the CC). */
184 if (tdep->abi == ABI_LINUX_S390)
185 {
186 /* 31-bit PSWA needs high bit set (it's very unlikely the target
187 was in 24-bit mode). */
188 pswa = addr | 0x80000000UL;
189 pswm = 0x070d0000UL;
190 }
191 else
192 {
193 pswa = addr;
194 pswm = 0x0705000180000000ULL;
195 }
196
197 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
198 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
199
200 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
201 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
202}
203
7803799a 204
d0f54f9d
JB
205/* DWARF Register Mapping. */
206
2ccd1468 207static const short s390_dwarf_regmap[] =
d0f54f9d 208{
550bdf96 209 /* 0-15: General Purpose Registers. */
d0f54f9d
JB
210 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
211 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
212 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
213 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
214
550bdf96 215 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
d0f54f9d
JB
216 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
217 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
218 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
219 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
220
550bdf96 221 /* 32-47: Control Registers (not mapped). */
34201ae3
UW
222 -1, -1, -1, -1, -1, -1, -1, -1,
223 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d 224
550bdf96 225 /* 48-63: Access Registers. */
d0f54f9d
JB
226 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
227 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
228 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
229 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
230
550bdf96 231 /* 64-65: Program Status Word. */
d0f54f9d 232 S390_PSWM_REGNUM,
7803799a
UW
233 S390_PSWA_REGNUM,
234
550bdf96
AA
235 /* 66-67: Reserved. */
236 -1, -1,
237
238 /* 68-83: Vector Registers 16-31. */
239 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
240 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
241 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
242 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
243
244 /* End of "official" DWARF registers. The remainder of the map is
245 for GDB internal use only. */
246
7803799a
UW
247 /* GPR Lower Half Access. */
248 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
249 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
250 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
251 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
d0f54f9d
JB
252};
253
550bdf96
AA
254enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
255
d0f54f9d
JB
256/* Convert DWARF register number REG to the appropriate register
257 number used by GDB. */
a78f21af 258static int
d3f73121 259s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 260{
7803799a 261 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
550bdf96 262 int gdb_reg = -1;
7803799a 263
550bdf96
AA
264 /* In a 32-on-64 debug scenario, debug info refers to the full
265 64-bit GPRs. Note that call frame information still refers to
266 the 32-bit lower halves, because s390_adjust_frame_regnum uses
267 special register numbers to access GPRs. */
7803799a
UW
268 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
269 return tdep->gpr_full_regnum + reg;
d0f54f9d 270
16aff9a6 271 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
550bdf96
AA
272 gdb_reg = s390_dwarf_regmap[reg];
273
274 if (tdep->v0_full_regnum == -1)
275 {
276 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
277 gdb_reg = -1;
278 }
279 else
280 {
281 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
282 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
283 }
d0f54f9d 284
550bdf96 285 return gdb_reg;
7803799a 286}
d0f54f9d 287
7803799a
UW
288/* Translate a .eh_frame register to DWARF register, or adjust a
289 .debug_frame register. */
290static int
291s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
292{
293 /* See s390_dwarf_reg_to_regnum for comments. */
550bdf96 294 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
d0f54f9d
JB
295}
296
d0f54f9d 297
7803799a
UW
298/* Pseudo registers. */
299
2ccd1468
UW
300static int
301regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
302{
303 return (tdep->gpr_full_regnum != -1
304 && regnum >= tdep->gpr_full_regnum
305 && regnum <= tdep->gpr_full_regnum + 15);
306}
307
550bdf96
AA
308/* Check whether REGNUM indicates a full vector register (v0-v15).
309 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
310
311static int
312regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
313{
314 return (tdep->v0_full_regnum != -1
315 && regnum >= tdep->v0_full_regnum
316 && regnum <= tdep->v0_full_regnum + 15);
317}
318
87de11c0
AA
319/* Return the name of register REGNO. Return the empty string for
320 registers that shouldn't be visible. */
550bdf96
AA
321
322static const char *
323s390_register_name (struct gdbarch *gdbarch, int regnum)
324{
325 if (regnum >= S390_V0_LOWER_REGNUM
326 && regnum <= S390_V15_LOWER_REGNUM)
87de11c0 327 return "";
550bdf96
AA
328 return tdesc_register_name (gdbarch, regnum);
329}
330
7803799a
UW
331static const char *
332s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 333{
7803799a 334 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 335
7803799a
UW
336 if (regnum == tdep->pc_regnum)
337 return "pc";
d0f54f9d 338
7803799a
UW
339 if (regnum == tdep->cc_regnum)
340 return "cc";
d0f54f9d 341
2ccd1468 342 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
343 {
344 static const char *full_name[] = {
345 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
346 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
347 };
348 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 349 }
7803799a 350
550bdf96
AA
351 if (regnum_is_vxr_full (tdep, regnum))
352 {
353 static const char *full_name[] = {
354 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
355 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
356 };
357 return full_name[regnum - tdep->v0_full_regnum];
358 }
359
7803799a 360 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
361}
362
7803799a
UW
363static struct type *
364s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 365{
7803799a 366 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 367
7803799a
UW
368 if (regnum == tdep->pc_regnum)
369 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 370
7803799a
UW
371 if (regnum == tdep->cc_regnum)
372 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 373
2ccd1468 374 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
375 return builtin_type (gdbarch)->builtin_uint64;
376
550bdf96
AA
377 if (regnum_is_vxr_full (tdep, regnum))
378 return tdesc_find_type (gdbarch, "vec128");
379
7803799a 380 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
381}
382
05d1431c 383static enum register_status
7803799a
UW
384s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
385 int regnum, gdb_byte *buf)
d0f54f9d 386{
7803799a 387 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 388 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 389 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
390 ULONGEST val;
391
7803799a 392 if (regnum == tdep->pc_regnum)
d0f54f9d 393 {
05d1431c
PA
394 enum register_status status;
395
396 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
397 if (status == REG_VALID)
398 {
399 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
400 val &= 0x7fffffff;
401 store_unsigned_integer (buf, regsize, byte_order, val);
402 }
403 return status;
7803799a 404 }
d0f54f9d 405
7803799a
UW
406 if (regnum == tdep->cc_regnum)
407 {
05d1431c
PA
408 enum register_status status;
409
410 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
411 if (status == REG_VALID)
412 {
413 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
414 val = (val >> 12) & 3;
415 else
416 val = (val >> 44) & 3;
417 store_unsigned_integer (buf, regsize, byte_order, val);
418 }
419 return status;
7803799a 420 }
d0f54f9d 421
2ccd1468 422 if (regnum_is_gpr_full (tdep, regnum))
7803799a 423 {
05d1431c 424 enum register_status status;
7803799a 425 ULONGEST val_upper;
05d1431c 426
7803799a
UW
427 regnum -= tdep->gpr_full_regnum;
428
05d1431c
PA
429 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
430 if (status == REG_VALID)
431 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
432 &val_upper);
433 if (status == REG_VALID)
434 {
435 val |= val_upper << 32;
436 store_unsigned_integer (buf, regsize, byte_order, val);
437 }
438 return status;
d0f54f9d 439 }
7803799a 440
550bdf96
AA
441 if (regnum_is_vxr_full (tdep, regnum))
442 {
443 enum register_status status;
444
445 regnum -= tdep->v0_full_regnum;
446
447 status = regcache_raw_read (regcache, S390_F0_REGNUM + regnum, buf);
448 if (status == REG_VALID)
449 status = regcache_raw_read (regcache,
450 S390_V0_LOWER_REGNUM + regnum, buf + 8);
451 return status;
452 }
453
7803799a 454 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
455}
456
457static void
7803799a
UW
458s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
459 int regnum, const gdb_byte *buf)
d0f54f9d 460{
7803799a 461 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 462 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 463 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
464 ULONGEST val, psw;
465
7803799a 466 if (regnum == tdep->pc_regnum)
d0f54f9d 467 {
7803799a
UW
468 val = extract_unsigned_integer (buf, regsize, byte_order);
469 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
470 {
471 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
472 val = (psw & 0x80000000) | (val & 0x7fffffff);
473 }
474 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
475 return;
476 }
d0f54f9d 477
7803799a
UW
478 if (regnum == tdep->cc_regnum)
479 {
480 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 481 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
482 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
483 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
484 else
485 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
486 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
487 return;
488 }
d0f54f9d 489
2ccd1468 490 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
491 {
492 regnum -= tdep->gpr_full_regnum;
493 val = extract_unsigned_integer (buf, regsize, byte_order);
494 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
495 val & 0xffffffff);
496 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
497 val >> 32);
498 return;
d0f54f9d 499 }
7803799a 500
550bdf96
AA
501 if (regnum_is_vxr_full (tdep, regnum))
502 {
503 regnum -= tdep->v0_full_regnum;
504 regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf);
505 regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8);
506 return;
507 }
508
7803799a 509 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
510}
511
512/* 'float' values are stored in the upper half of floating-point
550bdf96
AA
513 registers, even though we are otherwise a big-endian platform. The
514 same applies to a 'float' value within a vector. */
d0f54f9d 515
9acbedc0 516static struct value *
2ed3c037
UW
517s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
518 int regnum, struct frame_id frame_id)
d0f54f9d 519{
550bdf96 520 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2ed3c037
UW
521 struct value *value = default_value_from_register (gdbarch, type,
522 regnum, frame_id);
744a8059
SP
523 check_typedef (type);
524
550bdf96
AA
525 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
526 && TYPE_LENGTH (type) < 8)
527 || regnum_is_vxr_full (tdep, regnum)
528 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
9acbedc0 529 set_value_offset (value, 0);
d0f54f9d 530
9acbedc0 531 return value;
d0f54f9d
JB
532}
533
534/* Register groups. */
535
a78f21af 536static int
7803799a
UW
537s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
538 struct reggroup *group)
d0f54f9d
JB
539{
540 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
541
d6db1fab
UW
542 /* We usually save/restore the whole PSW, which includes PC and CC.
543 However, some older gdbservers may not support saving/restoring
544 the whole PSW yet, and will return an XML register description
545 excluding those from the save/restore register groups. In those
546 cases, we still need to explicitly save/restore PC and CC in order
547 to push or pop frames. Since this doesn't hurt anything if we
548 already save/restore the whole PSW (it's just redundant), we add
549 PC and CC at this point unconditionally. */
d0f54f9d 550 if (group == save_reggroup || group == restore_reggroup)
7803799a 551 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d 552
550bdf96
AA
553 if (group == vector_reggroup)
554 return regnum_is_vxr_full (tdep, regnum);
555
556 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
557 return 0;
558
d0f54f9d
JB
559 return default_register_reggroup_p (gdbarch, regnum, group);
560}
561
562
6df55226
MK
563/* A helper for s390_software_single_step, decides if an instruction
564 is a partial-execution instruction that needs to be executed until
565 completion when in record mode. If it is, returns 1 and writes
566 instruction length to a pointer. */
567
568static int
569s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
570{
571 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
572 uint16_t insn;
573
574 insn = read_memory_integer (loc, 2, byte_order);
575
576 switch (insn >> 8)
577 {
578 case 0xa8: /* MVCLE */
579 *len = 4;
580 return 1;
581
582 case 0xeb:
583 {
584 insn = read_memory_integer (loc + 4, 2, byte_order);
585 if ((insn & 0xff) == 0x8e)
586 {
587 /* MVCLU */
588 *len = 6;
589 return 1;
590 }
591 }
592 break;
593 }
594
595 switch (insn)
596 {
597 case 0xb255: /* MVST */
598 case 0xb263: /* CMPSC */
599 case 0xb2a5: /* TRE */
600 case 0xb2a6: /* CU21 */
601 case 0xb2a7: /* CU12 */
602 case 0xb9b0: /* CU14 */
603 case 0xb9b1: /* CU24 */
604 case 0xb9b2: /* CU41 */
605 case 0xb9b3: /* CU42 */
606 case 0xb92a: /* KMF */
607 case 0xb92b: /* KMO */
608 case 0xb92f: /* KMC */
609 case 0xb92d: /* KMCTR */
610 case 0xb92e: /* KM */
611 case 0xb93c: /* PPNO */
612 case 0xb990: /* TRTT */
613 case 0xb991: /* TRTO */
614 case 0xb992: /* TROT */
615 case 0xb993: /* TROO */
616 *len = 4;
617 return 1;
618 }
619
620 return 0;
621}
622
623/* Implement the "software_single_step" gdbarch method, needed to single step
624 through instructions like MVCLE in record mode, to make sure they are
625 executed to completion. Without that, record will save the full length
626 of destination buffer on every iteration, even though the CPU will only
627 process about 4kiB of it each time, leading to O(n**2) memory and time
628 complexity. */
629
630static int
631s390_software_single_step (struct frame_info *frame)
632{
633 struct gdbarch *gdbarch = get_frame_arch (frame);
634 struct address_space *aspace = get_frame_address_space (frame);
635 CORE_ADDR loc = get_frame_pc (frame);
636 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
637 int len;
638 uint16_t insn;
639
640 /* Special handling only if recording. */
641 if (!record_full_is_used ())
642 return 0;
643
644 /* First, match a partial instruction. */
645 if (!s390_is_partial_instruction (gdbarch, loc, &len))
646 return 0;
647
648 loc += len;
649
650 /* Second, look for a branch back to it. */
651 insn = read_memory_integer (loc, 2, byte_order);
652 if (insn != 0xa714) /* BRC with mask 1 */
653 return 0;
654
655 insn = read_memory_integer (loc + 2, 2, byte_order);
656 if (insn != (uint16_t) -(len / 2))
657 return 0;
658
659 loc += 4;
660
661 /* Found it, step past the whole thing. */
662
663 insert_single_step_breakpoint (gdbarch, aspace, loc);
664
665 return 1;
666}
667
668static int
669s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
670 struct displaced_step_closure *closure)
671{
672 return 1;
673}
674
675
2ccd1468 676/* Maps for register sets. */
d0f54f9d 677
99b7da5d 678static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 679 {
99b7da5d
AA
680 { 1, S390_PSWM_REGNUM },
681 { 1, S390_PSWA_REGNUM },
682 { 16, S390_R0_REGNUM },
683 { 16, S390_A0_REGNUM },
684 { 1, S390_ORIG_R2_REGNUM },
685 { 0 }
2ccd1468 686 };
d0f54f9d 687
99b7da5d 688static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 689 {
99b7da5d
AA
690 { 1, S390_FPC_REGNUM, 8 },
691 { 16, S390_F0_REGNUM, 8 },
692 { 0 }
2ccd1468 693 };
d0f54f9d 694
99b7da5d 695static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 696 {
99b7da5d
AA
697 { 16, S390_R0_UPPER_REGNUM, 4 },
698 { 0 }
2ccd1468 699 };
7803799a 700
99b7da5d 701static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 702 {
99b7da5d
AA
703 { 1, REGCACHE_MAP_SKIP, 4 },
704 { 1, S390_LAST_BREAK_REGNUM, 4 },
705 { 0 }
2ccd1468 706 };
c642a434 707
99b7da5d 708static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 709 {
99b7da5d
AA
710 { 1, S390_LAST_BREAK_REGNUM, 8 },
711 { 0 }
2ccd1468
UW
712 };
713
99b7da5d 714static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 715 {
99b7da5d
AA
716 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
717 { 0 }
2ccd1468
UW
718 };
719
99b7da5d 720static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 721 {
99b7da5d
AA
722 { 1, S390_TDB_DWORD0_REGNUM, 8 },
723 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
724 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
725 { 1, S390_TDB_ATIA_REGNUM, 8 },
726 { 12, REGCACHE_MAP_SKIP, 8 },
727 { 16, S390_TDB_R0_REGNUM, 8 },
728 { 0 }
2ccd1468 729 };
c642a434 730
550bdf96
AA
731static const struct regcache_map_entry s390_regmap_vxrs_low[] =
732 {
733 { 16, S390_V0_LOWER_REGNUM, 8 },
734 { 0 }
735 };
736
737static const struct regcache_map_entry s390_regmap_vxrs_high[] =
738 {
739 { 16, S390_V16_REGNUM, 16 },
740 { 0 }
741 };
742
4ac33720 743
99b7da5d
AA
744/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
745 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
746
747static void
748s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
749 int regnum, const void *regs, size_t len)
750{
751 ULONGEST tdw;
752 enum register_status ret;
753 int i;
754
99b7da5d 755 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
756 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
757 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 758 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
759}
760
99b7da5d
AA
761const struct regset s390_gregset = {
762 s390_gregmap,
763 regcache_supply_regset,
764 regcache_collect_regset
d0f54f9d
JB
765};
766
99b7da5d
AA
767const struct regset s390_fpregset = {
768 s390_fpregmap,
769 regcache_supply_regset,
770 regcache_collect_regset
d0f54f9d
JB
771};
772
7803799a 773static const struct regset s390_upper_regset = {
34201ae3 774 s390_regmap_upper,
99b7da5d
AA
775 regcache_supply_regset,
776 regcache_collect_regset
7803799a
UW
777};
778
99b7da5d 779const struct regset s390_last_break_regset = {
c642a434 780 s390_regmap_last_break,
99b7da5d
AA
781 regcache_supply_regset,
782 regcache_collect_regset
c642a434
UW
783};
784
99b7da5d 785const struct regset s390x_last_break_regset = {
c642a434 786 s390x_regmap_last_break,
99b7da5d
AA
787 regcache_supply_regset,
788 regcache_collect_regset
c642a434
UW
789};
790
99b7da5d 791const struct regset s390_system_call_regset = {
c642a434 792 s390_regmap_system_call,
99b7da5d
AA
793 regcache_supply_regset,
794 regcache_collect_regset
c642a434
UW
795};
796
99b7da5d 797const struct regset s390_tdb_regset = {
4ac33720
UW
798 s390_regmap_tdb,
799 s390_supply_tdb_regset,
99b7da5d 800 regcache_collect_regset
4ac33720
UW
801};
802
550bdf96
AA
803const struct regset s390_vxrs_low_regset = {
804 s390_regmap_vxrs_low,
805 regcache_supply_regset,
806 regcache_collect_regset
807};
808
809const struct regset s390_vxrs_high_regset = {
810 s390_regmap_vxrs_high,
811 regcache_supply_regset,
812 regcache_collect_regset
813};
814
5aa82d05
AA
815/* Iterate over supported core file register note sections. */
816
817static void
818s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
819 iterate_over_regset_sections_cb *cb,
820 void *cb_data,
821 const struct regcache *regcache)
822{
823 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8f0435f7
AA
824 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
825 s390_sizeof_gregset : s390x_sizeof_gregset);
5aa82d05 826
8f0435f7
AA
827 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
828 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
5aa82d05
AA
829
830 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
8f0435f7
AA
831 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
832 "s390 GPR upper halves", cb_data);
5aa82d05
AA
833
834 if (tdep->have_linux_v1)
8f0435f7
AA
835 cb (".reg-s390-last-break", 8,
836 (gdbarch_ptr_bit (gdbarch) == 32
837 ? &s390_last_break_regset : &s390x_last_break_regset),
838 "s930 last-break address", cb_data);
5aa82d05
AA
839
840 if (tdep->have_linux_v2)
8f0435f7
AA
841 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
842 "s390 system-call", cb_data);
5aa82d05
AA
843
844 /* If regcache is set, we are in "write" (gcore) mode. In this
845 case, don't iterate over the TDB unless its registers are
846 available. */
847 if (tdep->have_tdb
848 && (regcache == NULL
849 || REG_VALID == regcache_register_status (regcache,
850 S390_TDB_DWORD0_REGNUM)))
8f0435f7
AA
851 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
852 "s390 TDB", cb_data);
550bdf96
AA
853
854 if (tdep->v0_full_regnum != -1)
855 {
856 cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset,
857 "s390 vector registers 0-15 lower half", cb_data);
858 cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset,
859 "s390 vector registers 16-31", cb_data);
860 }
5aa82d05
AA
861}
862
7803799a
UW
863static const struct target_desc *
864s390_core_read_description (struct gdbarch *gdbarch,
865 struct target_ops *target, bfd *abfd)
866{
7803799a 867 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 868 CORE_ADDR hwcap = 0;
550bdf96 869 int high_gprs, v1, v2, te, vx;
4ac33720
UW
870
871 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
872 if (!section)
873 return NULL;
874
550bdf96
AA
875 high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs")
876 != NULL);
877 v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL);
878 v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL);
879 vx = (hwcap & HWCAP_S390_VX);
880 te = (hwcap & HWCAP_S390_TE);
881
7803799a
UW
882 switch (bfd_section_size (abfd, section))
883 {
884 case s390_sizeof_gregset:
c642a434 885 if (high_gprs)
550bdf96
AA
886 return (te && vx ? tdesc_s390_tevx_linux64 :
887 vx ? tdesc_s390_vx_linux64 :
888 te ? tdesc_s390_te_linux64 :
889 v2 ? tdesc_s390_linux64v2 :
890 v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64);
c642a434 891 else
550bdf96
AA
892 return (v2 ? tdesc_s390_linux32v2 :
893 v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
894
895 case s390x_sizeof_gregset:
550bdf96
AA
896 return (te && vx ? tdesc_s390x_tevx_linux64 :
897 vx ? tdesc_s390x_vx_linux64 :
898 te ? tdesc_s390x_te_linux64 :
899 v2 ? tdesc_s390x_linux64v2 :
900 v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
901
902 default:
903 return NULL;
904 }
905}
906
d0f54f9d 907
4bc8c588
JB
908/* Decoding S/390 instructions. */
909
910/* Named opcode values for the S/390 instructions we recognize. Some
911 instructions have their opcode split across two fields; those are the
912 op1_* and op2_* enums. */
913enum
914 {
a8c99f38
JB
915 op1_lhi = 0xa7, op2_lhi = 0x08,
916 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 917 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 918 op_lr = 0x18,
a8c99f38
JB
919 op_lgr = 0xb904,
920 op_l = 0x58,
921 op1_ly = 0xe3, op2_ly = 0x58,
922 op1_lg = 0xe3, op2_lg = 0x04,
923 op_lm = 0x98,
924 op1_lmy = 0xeb, op2_lmy = 0x98,
925 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 926 op_st = 0x50,
a8c99f38 927 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 928 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 929 op_std = 0x60,
4bc8c588 930 op_stm = 0x90,
a8c99f38 931 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 932 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
933 op1_aghi = 0xa7, op2_aghi = 0x0b,
934 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
935 op1_agfi = 0xc2, op2_agfi = 0x08,
936 op1_afi = 0xc2, op2_afi = 0x09,
937 op1_algfi= 0xc2, op2_algfi= 0x0a,
938 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
939 op_ar = 0x1a,
940 op_agr = 0xb908,
941 op_a = 0x5a,
942 op1_ay = 0xe3, op2_ay = 0x5a,
943 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
944 op1_slgfi= 0xc2, op2_slgfi= 0x04,
945 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
946 op_sr = 0x1b,
947 op_sgr = 0xb909,
948 op_s = 0x5b,
949 op1_sy = 0xe3, op2_sy = 0x5b,
950 op1_sg = 0xe3, op2_sg = 0x09,
951 op_nr = 0x14,
952 op_ngr = 0xb980,
953 op_la = 0x41,
954 op1_lay = 0xe3, op2_lay = 0x71,
955 op1_larl = 0xc0, op2_larl = 0x00,
956 op_basr = 0x0d,
957 op_bas = 0x4d,
958 op_bcr = 0x07,
959 op_bc = 0x0d,
1db4e8a0
UW
960 op_bctr = 0x06,
961 op_bctgr = 0xb946,
962 op_bct = 0x46,
963 op1_bctg = 0xe3, op2_bctg = 0x46,
964 op_bxh = 0x86,
965 op1_bxhg = 0xeb, op2_bxhg = 0x44,
966 op_bxle = 0x87,
967 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
968 op1_bras = 0xa7, op2_bras = 0x05,
969 op1_brasl= 0xc0, op2_brasl= 0x05,
970 op1_brc = 0xa7, op2_brc = 0x04,
971 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
972 op1_brct = 0xa7, op2_brct = 0x06,
973 op1_brctg= 0xa7, op2_brctg= 0x07,
974 op_brxh = 0x84,
975 op1_brxhg= 0xec, op2_brxhg= 0x44,
976 op_brxle = 0x85,
977 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 978 op_svc = 0x0a,
4bc8c588
JB
979 };
980
981
a8c99f38
JB
982/* Read a single instruction from address AT. */
983
984#define S390_MAX_INSTR_SIZE 6
985static int
986s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
987{
988 static int s390_instrlen[] = { 2, 4, 4, 6 };
989 int instrlen;
990
8defab1a 991 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
992 return -1;
993 instrlen = s390_instrlen[instr[0] >> 6];
994 if (instrlen > 2)
995 {
8defab1a 996 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 997 return -1;
a8c99f38
JB
998 }
999 return instrlen;
1000}
1001
1002
4bc8c588
JB
1003/* The functions below are for recognizing and decoding S/390
1004 instructions of various formats. Each of them checks whether INSN
1005 is an instruction of the given format, with the specified opcodes.
1006 If it is, it sets the remaining arguments to the values of the
1007 instruction's fields, and returns a non-zero value; otherwise, it
1008 returns zero.
1009
1010 These functions' arguments appear in the order they appear in the
1011 instruction, not in the machine-language form. So, opcodes always
1012 come first, even though they're sometimes scattered around the
1013 instructions. And displacements appear before base and extension
1014 registers, as they do in the assembly syntax, not at the end, as
1015 they do in the machine language. */
a78f21af 1016static int
4bc8c588
JB
1017is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
1018{
1019 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1020 {
1021 *r1 = (insn[1] >> 4) & 0xf;
1022 /* i2 is a 16-bit signed quantity. */
1023 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1024 return 1;
1025 }
1026 else
1027 return 0;
1028}
8ac0e65a 1029
5769d3cd 1030
4bc8c588
JB
1031static int
1032is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 1033 unsigned int *r1, int *i2)
4bc8c588
JB
1034{
1035 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1036 {
1037 *r1 = (insn[1] >> 4) & 0xf;
1038 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
1039 no sign extension is necessary, but we don't want to assume
1040 that. */
4bc8c588 1041 *i2 = (((insn[2] << 24)
34201ae3
UW
1042 | (insn[3] << 16)
1043 | (insn[4] << 8)
1044 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
1045 return 1;
1046 }
1047 else
1048 return 0;
1049}
1050
1051
1052static int
1053is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1054{
1055 if (insn[0] == op)
1056 {
1057 *r1 = (insn[1] >> 4) & 0xf;
1058 *r2 = insn[1] & 0xf;
1059 return 1;
1060 }
1061 else
1062 return 0;
1063}
1064
1065
1066static int
1067is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1068{
1069 if (((insn[0] << 8) | insn[1]) == op)
1070 {
1071 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1072 *r1 = (insn[3] >> 4) & 0xf;
1073 *r2 = insn[3] & 0xf;
1074 return 1;
1075 }
1076 else
1077 return 0;
1078}
1079
1080
1081static int
1082is_rs (bfd_byte *insn, int op,
eb1bd1fb 1083 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1084{
1085 if (insn[0] == op)
1086 {
1087 *r1 = (insn[1] >> 4) & 0xf;
1088 *r3 = insn[1] & 0xf;
1089 *b2 = (insn[2] >> 4) & 0xf;
1090 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1091 return 1;
1092 }
1093 else
1094 return 0;
1095}
1096
1097
1098static int
a8c99f38 1099is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 1100 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1101{
1102 if (insn[0] == op1
4bc8c588
JB
1103 && insn[5] == op2)
1104 {
1105 *r1 = (insn[1] >> 4) & 0xf;
1106 *r3 = insn[1] & 0xf;
1107 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1108 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1109 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1110 ^ 0x80000) - 0x80000;
4bc8c588
JB
1111 return 1;
1112 }
1113 else
1114 return 0;
1115}
1116
1117
1db4e8a0
UW
1118static int
1119is_rsi (bfd_byte *insn, int op,
34201ae3 1120 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1121{
1122 if (insn[0] == op)
1123 {
1124 *r1 = (insn[1] >> 4) & 0xf;
1125 *r3 = insn[1] & 0xf;
1126 /* i2 is a 16-bit signed quantity. */
1127 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1128 return 1;
1129 }
1130 else
1131 return 0;
1132}
1133
1134
1135static int
1136is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 1137 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1138{
1139 if (insn[0] == op1
1140 && insn[5] == op2)
1141 {
1142 *r1 = (insn[1] >> 4) & 0xf;
1143 *r3 = insn[1] & 0xf;
1144 /* i2 is a 16-bit signed quantity. */
1145 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1146 return 1;
1147 }
1148 else
1149 return 0;
1150}
1151
1152
4bc8c588
JB
1153static int
1154is_rx (bfd_byte *insn, int op,
eb1bd1fb 1155 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1156{
1157 if (insn[0] == op)
1158 {
1159 *r1 = (insn[1] >> 4) & 0xf;
1160 *x2 = insn[1] & 0xf;
1161 *b2 = (insn[2] >> 4) & 0xf;
1162 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1163 return 1;
1164 }
1165 else
1166 return 0;
1167}
1168
1169
1170static int
a8c99f38 1171is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1172 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1173{
1174 if (insn[0] == op1
4bc8c588
JB
1175 && insn[5] == op2)
1176 {
1177 *r1 = (insn[1] >> 4) & 0xf;
1178 *x2 = insn[1] & 0xf;
1179 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1180 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1181 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1182 ^ 0x80000) - 0x80000;
4bc8c588
JB
1183 return 1;
1184 }
1185 else
1186 return 0;
1187}
1188
1189
3fc46200 1190/* Prologue analysis. */
4bc8c588 1191
d0f54f9d
JB
1192#define S390_NUM_GPRS 16
1193#define S390_NUM_FPRS 16
4bc8c588 1194
a8c99f38
JB
1195struct s390_prologue_data {
1196
ee1b3323
UW
1197 /* The stack. */
1198 struct pv_area *stack;
1199
e17a4113 1200 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1201 int gpr_size;
1202 int fpr_size;
e17a4113 1203 enum bfd_endian byte_order;
a8c99f38
JB
1204
1205 /* The general-purpose registers. */
3fc46200 1206 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1207
1208 /* The floating-point registers. */
3fc46200 1209 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1210
121d8485
UW
1211 /* The offset relative to the CFA where the incoming GPR N was saved
1212 by the function prologue. 0 if not saved or unknown. */
1213 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1214
121d8485
UW
1215 /* Likewise for FPRs. */
1216 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1217
121d8485
UW
1218 /* Nonzero if the backchain was saved. This is assumed to be the
1219 case when the incoming SP is saved at the current SP location. */
1220 int back_chain_saved_p;
1221};
4bc8c588 1222
3fc46200
UW
1223/* Return the effective address for an X-style instruction, like:
1224
34201ae3 1225 L R1, D2(X2, B2)
3fc46200
UW
1226
1227 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1228 constant; the effective address is the sum of all three. If either
1229 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1230 means that r0 can't be used as either X2 or B2. */
1231static pv_t
1232s390_addr (struct s390_prologue_data *data,
1233 int d2, unsigned int x2, unsigned int b2)
1234{
1235 pv_t result;
1236
1237 result = pv_constant (d2);
1238 if (x2)
1239 result = pv_add (result, data->gpr[x2]);
1240 if (b2)
1241 result = pv_add (result, data->gpr[b2]);
1242
1243 return result;
1244}
1245
1246/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1247static void
3fc46200
UW
1248s390_store (struct s390_prologue_data *data,
1249 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1250 pv_t value)
4bc8c588 1251{
3fc46200 1252 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1253 pv_t offset;
121d8485
UW
1254
1255 /* Check whether we are storing the backchain. */
3fc46200 1256 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1257
3fc46200 1258 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1259 if (size == data->gpr_size
3fc46200 1260 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1261 {
1262 data->back_chain_saved_p = 1;
1263 return;
1264 }
1265
1266
1267 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1268 if (!pv_area_store_would_trash (data->stack, addr))
1269 pv_area_store (data->stack, addr, size, value);
4bc8c588 1270
a8c99f38 1271
121d8485
UW
1272 /* Note: If this is some store we cannot identify, you might think we
1273 should forget our cached values, as any of those might have been hit.
1274
1275 However, we make the assumption that the register save areas are only
1276 ever stored to once in any given function, and we do recognize these
1277 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1278}
4bc8c588 1279
3fc46200
UW
1280/* Do a SIZE-byte load from D2(X2,B2). */
1281static pv_t
1282s390_load (struct s390_prologue_data *data,
1283 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1284
4bc8c588 1285{
3fc46200 1286 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1287
a8c99f38
JB
1288 /* If it's a load from an in-line constant pool, then we can
1289 simulate that, under the assumption that the code isn't
1290 going to change between the time the processor actually
1291 executed it creating the current frame, and the time when
1292 we're analyzing the code to unwind past that frame. */
3fc46200 1293 if (pv_is_constant (addr))
4bc8c588 1294 {
0542c86d 1295 struct target_section *secp;
3fc46200 1296 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1297 if (secp != NULL
34201ae3 1298 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1299 secp->the_bfd_section)
34201ae3
UW
1300 & SEC_READONLY))
1301 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1302 data->byte_order));
a8c99f38 1303 }
7666f43c 1304
121d8485 1305 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1306 return pv_area_fetch (data->stack, addr, size);
1307}
121d8485 1308
ee1b3323
UW
1309/* Function for finding saved registers in a 'struct pv_area'; we pass
1310 this to pv_area_scan.
121d8485 1311
ee1b3323
UW
1312 If VALUE is a saved register, ADDR says it was saved at a constant
1313 offset from the frame base, and SIZE indicates that the whole
1314 register was saved, record its offset in the reg_offset table in
1315 PROLOGUE_UNTYPED. */
1316static void
c378eb4e
MS
1317s390_check_for_saved (void *data_untyped, pv_t addr,
1318 CORE_ADDR size, pv_t value)
ee1b3323 1319{
19ba03f4 1320 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
ee1b3323
UW
1321 int i, offset;
1322
1323 if (!pv_is_register (addr, S390_SP_REGNUM))
1324 return;
1325
1326 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1327
ee1b3323
UW
1328 /* If we are storing the original value of a register, we want to
1329 record the CFA offset. If the same register is stored multiple
1330 times, the stack slot with the highest address counts. */
34201ae3 1331
ee1b3323
UW
1332 for (i = 0; i < S390_NUM_GPRS; i++)
1333 if (size == data->gpr_size
1334 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1335 if (data->gpr_slot[i] == 0
1336 || data->gpr_slot[i] > offset)
1337 {
1338 data->gpr_slot[i] = offset;
1339 return;
1340 }
1341
1342 for (i = 0; i < S390_NUM_FPRS; i++)
1343 if (size == data->fpr_size
1344 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1345 if (data->fpr_slot[i] == 0
1346 || data->fpr_slot[i] > offset)
1347 {
1348 data->fpr_slot[i] = offset;
1349 return;
1350 }
a8c99f38 1351}
4bc8c588 1352
a8c99f38
JB
1353/* Analyze the prologue of the function starting at START_PC,
1354 continuing at most until CURRENT_PC. Initialize DATA to
1355 hold all information we find out about the state of the registers
1356 and stack slots. Return the address of the instruction after
1357 the last one that changed the SP, FP, or back chain; or zero
1358 on error. */
1359static CORE_ADDR
1360s390_analyze_prologue (struct gdbarch *gdbarch,
1361 CORE_ADDR start_pc,
1362 CORE_ADDR current_pc,
1363 struct s390_prologue_data *data)
4bc8c588 1364{
a8c99f38
JB
1365 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1366
4bc8c588 1367 /* Our return value:
a8c99f38 1368 The address of the instruction after the last one that changed
34201ae3 1369 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1370 read memory. */
1371 CORE_ADDR result = start_pc;
4bc8c588 1372
4bc8c588
JB
1373 /* The current PC for our abstract interpretation. */
1374 CORE_ADDR pc;
1375
1376 /* The address of the next instruction after that. */
1377 CORE_ADDR next_pc;
34201ae3 1378
4bc8c588
JB
1379 /* Set up everything's initial value. */
1380 {
1381 int i;
1382
55f960e1 1383 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1384
a8c99f38
JB
1385 /* For the purpose of prologue tracking, we consider the GPR size to
1386 be equal to the ABI word size, even if it is actually larger
1387 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1388 data->gpr_size = word_size;
1389 data->fpr_size = 8;
e17a4113 1390 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1391
4bc8c588 1392 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1393 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1394
1395 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1396 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1397
121d8485
UW
1398 for (i = 0; i < S390_NUM_GPRS; i++)
1399 data->gpr_slot[i] = 0;
1400
1401 for (i = 0; i < S390_NUM_FPRS; i++)
1402 data->fpr_slot[i] = 0;
4bc8c588 1403
121d8485 1404 data->back_chain_saved_p = 0;
4bc8c588
JB
1405 }
1406
a8c99f38
JB
1407 /* Start interpreting instructions, until we hit the frame's
1408 current PC or the first branch instruction. */
1409 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1410 {
4bc8c588 1411 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1412 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1413
3fc46200
UW
1414 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1415 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1416 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1417
4bc8c588 1418 /* Fields for various kinds of instructions. */
a8c99f38
JB
1419 unsigned int b2, r1, r2, x2, r3;
1420 int i2, d2;
4bc8c588 1421
121d8485 1422 /* The values of SP and FP before this instruction,
34201ae3 1423 for detecting instructions that change them. */
3fc46200 1424 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1425 /* Likewise for the flag whether the back chain was saved. */
1426 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1427
1428 /* If we got an error trying to read the instruction, report it. */
1429 if (insn_len < 0)
34201ae3
UW
1430 {
1431 result = 0;
1432 break;
1433 }
4bc8c588
JB
1434
1435 next_pc = pc + insn_len;
1436
a8c99f38
JB
1437 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1438 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1439 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1440
4bc8c588 1441
3fc46200
UW
1442 /* LHI r1, i2 --- load halfword immediate. */
1443 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1444 /* LGFI r1, i2 --- load fullword immediate. */
1445 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1446 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1447 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1448 data->gpr[r1] = pv_constant (i2);
1449
1450 /* LR r1, r2 --- load from register. */
1451 /* LGR r1, r2 --- load from register (64-bit version). */
1452 else if (is_rr (insn32, op_lr, &r1, &r2)
1453 || is_rre (insn64, op_lgr, &r1, &r2))
1454 data->gpr[r1] = data->gpr[r2];
1455
1456 /* L r1, d2(x2, b2) --- load. */
1457 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1458 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1459 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1460 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1461 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1462 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1463
1464 /* ST r1, d2(x2, b2) --- store. */
1465 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1466 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1467 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1468 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1469 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1470 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1471
1472 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1473 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1474 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1475
1476 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1477 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1478 version). */
3fc46200
UW
1479 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1480 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1481 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1482 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1483 {
1484 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1485 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1486 }
4bc8c588 1487
3fc46200
UW
1488 /* AHI r1, i2 --- add halfword immediate. */
1489 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1490 /* AFI r1, i2 --- add fullword immediate. */
1491 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1492 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1493 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1494 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1495 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1496 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1497
1498 /* ALFI r1, i2 --- add logical immediate. */
1499 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1500 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1501 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1502 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1503 (CORE_ADDR)i2 & 0xffffffff);
1504
1505 /* AR r1, r2 -- add register. */
1506 /* AGR r1, r2 -- add register (64-bit version). */
1507 else if (is_rr (insn32, op_ar, &r1, &r2)
1508 || is_rre (insn64, op_agr, &r1, &r2))
1509 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1510
1511 /* A r1, d2(x2, b2) -- add. */
1512 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1513 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1514 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1515 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1516 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1517 data->gpr[r1] = pv_add (data->gpr[r1],
1518 s390_load (data, d2, x2, b2, data->gpr_size));
1519
1520 /* SLFI r1, i2 --- subtract logical immediate. */
1521 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1522 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1523 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1524 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1525 -((CORE_ADDR)i2 & 0xffffffff));
1526
1527 /* SR r1, r2 -- subtract register. */
1528 /* SGR r1, r2 -- subtract register (64-bit version). */
1529 else if (is_rr (insn32, op_sr, &r1, &r2)
1530 || is_rre (insn64, op_sgr, &r1, &r2))
1531 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1532
1533 /* S r1, d2(x2, b2) -- subtract. */
1534 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1535 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1536 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1537 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1538 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1539 data->gpr[r1] = pv_subtract (data->gpr[r1],
1540 s390_load (data, d2, x2, b2, data->gpr_size));
1541
1542 /* LA r1, d2(x2, b2) --- load address. */
1543 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1544 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1545 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1546 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1547
1548 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1549 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1550 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1551
3fc46200 1552 /* BASR r1, 0 --- branch and save.
34201ae3 1553 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1554 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1555 && r2 == 0)
3fc46200 1556 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1557
3fc46200 1558 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1559 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1560 {
1561 data->gpr[r1] = pv_constant (next_pc);
1562 next_pc = pc + i2 * 2;
4bc8c588 1563
34201ae3
UW
1564 /* We'd better not interpret any backward branches. We'll
1565 never terminate. */
1566 if (next_pc <= pc)
1567 break;
1568 }
4bc8c588 1569
bc0e3f49
AA
1570 /* BRC/BRCL -- branch relative on condition. Ignore "branch
1571 never", branch to following instruction, and "conditional
1572 trap" (BRC +2). Otherwise terminate search. */
1573 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
1574 {
1575 if (r1 != 0 && i2 != 1 && i2 != 2)
1576 break;
1577 }
1578 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
1579 {
1580 if (r1 != 0 && i2 != 3)
1581 break;
1582 }
1583
a8c99f38
JB
1584 /* Terminate search when hitting any other branch instruction. */
1585 else if (is_rr (insn, op_basr, &r1, &r2)
1586 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1587 || is_rr (insn, op_bcr, &r1, &r2)
1588 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
a8c99f38
JB
1589 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1590 break;
1591
4bc8c588 1592 else
d4fb63e1
TT
1593 {
1594 /* An instruction we don't know how to simulate. The only
1595 safe thing to do would be to set every value we're tracking
1596 to 'unknown'. Instead, we'll be optimistic: we assume that
1597 we *can* interpret every instruction that the compiler uses
1598 to manipulate any of the data we're interested in here --
1599 then we can just ignore anything else. */
1600 }
4bc8c588
JB
1601
1602 /* Record the address after the last instruction that changed
34201ae3
UW
1603 the FP, SP, or backlink. Ignore instructions that changed
1604 them back to their original values --- those are probably
1605 restore instructions. (The back chain is never restored,
1606 just popped.) */
4bc8c588 1607 {
34201ae3
UW
1608 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1609 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1610
1611 if ((! pv_is_identical (pre_insn_sp, sp)
1612 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1613 && sp.kind != pvk_unknown)
34201ae3
UW
1614 || (! pv_is_identical (pre_insn_fp, fp)
1615 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1616 && fp.kind != pvk_unknown)
34201ae3
UW
1617 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1618 result = next_pc;
4bc8c588 1619 }
5769d3cd 1620 }
4bc8c588 1621
ee1b3323
UW
1622 /* Record where all the registers were saved. */
1623 pv_area_scan (data->stack, s390_check_for_saved, data);
1624
1625 free_pv_area (data->stack);
1626 data->stack = NULL;
1627
4bc8c588 1628 return result;
5769d3cd
AC
1629}
1630
34201ae3 1631/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1632 some "real" code. */
1633static CORE_ADDR
6093d2eb 1634s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1635{
1636 struct s390_prologue_data data;
f054145e
AA
1637 CORE_ADDR skip_pc, func_addr;
1638
1639 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1640 {
1641 CORE_ADDR post_prologue_pc
1642 = skip_prologue_using_sal (gdbarch, func_addr);
1643 if (post_prologue_pc != 0)
1644 return max (pc, post_prologue_pc);
1645 }
1646
6093d2eb 1647 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1648 return skip_pc ? skip_pc : pc;
1649}
1650
c9cf6e20 1651/* Implmement the stack_frame_destroyed_p gdbarch method. */
d0f54f9d 1652static int
c9cf6e20 1653s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
d0f54f9d
JB
1654{
1655 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1656
1657 /* In frameless functions, there's not frame to destroy and thus
1658 we don't care about the epilogue.
1659
1660 In functions with frame, the epilogue sequence is a pair of
1661 a LM-type instruction that restores (amongst others) the
1662 return register %r14 and the stack pointer %r15, followed
1663 by a branch 'br %r14' --or equivalent-- that effects the
1664 actual return.
1665
1666 In that situation, this function needs to return 'true' in
1667 exactly one case: when pc points to that branch instruction.
1668
1669 Thus we try to disassemble the one instructions immediately
177b42fe 1670 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1671 modifying the stack pointer.
1672
1673 Note that disassembling backwards is not reliable, so there
1674 is a slight chance of false positives here ... */
1675
1676 bfd_byte insn[6];
1677 unsigned int r1, r3, b2;
1678 int d2;
1679
1680 if (word_size == 4
8defab1a 1681 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1682 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1683 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1684 return 1;
1685
a8c99f38 1686 if (word_size == 4
8defab1a 1687 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1688 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1689 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1690 return 1;
1691
d0f54f9d 1692 if (word_size == 8
8defab1a 1693 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1694 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1695 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1696 return 1;
1697
1698 return 0;
1699}
5769d3cd 1700
1db4e8a0
UW
1701/* Displaced stepping. */
1702
5ac21343
PA
1703/* Return true if INSN is a non-branch RIL-b or RIL-c format
1704 instruction. */
1705
1706static int
1707is_non_branch_ril (gdb_byte *insn)
1708{
1709 gdb_byte op1 = insn[0];
1710
1711 if (op1 == 0xc4)
1712 {
1713 gdb_byte op2 = insn[1] & 0x0f;
1714
1715 switch (op2)
1716 {
1717 case 0x02: /* llhrl */
1718 case 0x04: /* lghrl */
1719 case 0x05: /* lhrl */
1720 case 0x06: /* llghrl */
1721 case 0x07: /* sthrl */
1722 case 0x08: /* lgrl */
1723 case 0x0b: /* stgrl */
1724 case 0x0c: /* lgfrl */
1725 case 0x0d: /* lrl */
1726 case 0x0e: /* llgfrl */
1727 case 0x0f: /* strl */
1728 return 1;
1729 }
1730 }
1731 else if (op1 == 0xc6)
1732 {
1733 gdb_byte op2 = insn[1] & 0x0f;
1734
1735 switch (op2)
1736 {
1737 case 0x00: /* exrl */
1738 case 0x02: /* pfdrl */
1739 case 0x04: /* cghrl */
1740 case 0x05: /* chrl */
1741 case 0x06: /* clghrl */
1742 case 0x07: /* clhrl */
1743 case 0x08: /* cgrl */
1744 case 0x0a: /* clgrl */
1745 case 0x0c: /* cgfrl */
1746 case 0x0d: /* crl */
1747 case 0x0e: /* clgfrl */
1748 case 0x0f: /* clrl */
1749 return 1;
1750 }
1751 }
1752
1753 return 0;
1754}
1755
1756/* Implementation of gdbarch_displaced_step_copy_insn. */
1757
1758static struct displaced_step_closure *
1759s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
1760 CORE_ADDR from, CORE_ADDR to,
1761 struct regcache *regs)
1762{
1763 size_t len = gdbarch_max_insn_length (gdbarch);
224c3ddb 1764 gdb_byte *buf = (gdb_byte *) xmalloc (len);
5ac21343
PA
1765 struct cleanup *old_chain = make_cleanup (xfree, buf);
1766
1767 read_memory (from, buf, len);
1768
1769 /* Adjust the displacement field of PC-relative RIL instructions,
1770 except branches. The latter are handled in the fixup hook. */
1771 if (is_non_branch_ril (buf))
1772 {
1773 LONGEST offset;
1774
1775 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
1776 offset = (from - to + offset * 2) / 2;
1777
1778 /* If the instruction is too far from the jump pad, punt. This
1779 will usually happen with instructions in shared libraries.
1780 We could probably support these by rewriting them to be
1781 absolute or fully emulating them. */
1782 if (offset < INT32_MIN || offset > INT32_MAX)
1783 {
1784 /* Let the core fall back to stepping over the breakpoint
1785 in-line. */
1786 if (debug_displaced)
1787 {
1788 fprintf_unfiltered (gdb_stdlog,
1789 "displaced: can't displaced step "
1790 "RIL instruction: offset %s out of range\n",
1791 plongest (offset));
1792 }
1793 do_cleanups (old_chain);
1794 return NULL;
1795 }
1796
1797 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
1798 }
1799
1800 write_memory (to, buf, len);
1801
1802 if (debug_displaced)
1803 {
1804 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
1805 paddress (gdbarch, from), paddress (gdbarch, to));
1806 displaced_step_dump_bytes (gdb_stdlog, buf, len);
1807 }
1808
1809 discard_cleanups (old_chain);
1810 return (struct displaced_step_closure *) buf;
1811}
1812
1db4e8a0
UW
1813/* Fix up the state of registers and memory after having single-stepped
1814 a displaced instruction. */
1815static void
1816s390_displaced_step_fixup (struct gdbarch *gdbarch,
1817 struct displaced_step_closure *closure,
1818 CORE_ADDR from, CORE_ADDR to,
1819 struct regcache *regs)
1820{
5ac21343 1821 /* Our closure is a copy of the instruction. */
1db4e8a0
UW
1822 gdb_byte *insn = (gdb_byte *) closure;
1823 static int s390_instrlen[] = { 2, 4, 4, 6 };
1824 int insnlen = s390_instrlen[insn[0] >> 6];
1825
1826 /* Fields for various kinds of instructions. */
1827 unsigned int b2, r1, r2, x2, r3;
1828 int i2, d2;
1829
1830 /* Get current PC and addressing mode bit. */
1831 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1832 ULONGEST amode = 0;
1db4e8a0
UW
1833
1834 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1835 {
1836 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1837 amode &= 0x80000000;
1838 }
1839
1840 if (debug_displaced)
1841 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1842 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1843 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1844 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1845
1846 /* Handle absolute branch and save instructions. */
1847 if (is_rr (insn, op_basr, &r1, &r2)
1848 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1849 {
1850 /* Recompute saved return address in R1. */
1851 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1852 amode | (from + insnlen));
1853 }
1854
1855 /* Handle absolute branch instructions. */
1856 else if (is_rr (insn, op_bcr, &r1, &r2)
1857 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1858 || is_rr (insn, op_bctr, &r1, &r2)
1859 || is_rre (insn, op_bctgr, &r1, &r2)
1860 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1861 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1862 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1863 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1864 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1865 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1866 {
1867 /* Update PC iff branch was *not* taken. */
1868 if (pc == to + insnlen)
1869 regcache_write_pc (regs, from + insnlen);
1870 }
1871
1872 /* Handle PC-relative branch and save instructions. */
1873 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1874 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1875 {
1876 /* Update PC. */
1877 regcache_write_pc (regs, pc - to + from);
1878 /* Recompute saved return address in R1. */
1879 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1880 amode | (from + insnlen));
1881 }
1882
1883 /* Handle PC-relative branch instructions. */
1884 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1885 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1886 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1887 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1888 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1889 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1890 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1891 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1892 {
1893 /* Update PC. */
1894 regcache_write_pc (regs, pc - to + from);
1895 }
1896
1897 /* Handle LOAD ADDRESS RELATIVE LONG. */
1898 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1899 {
0161e4b9
UW
1900 /* Update PC. */
1901 regcache_write_pc (regs, from + insnlen);
34201ae3 1902 /* Recompute output address in R1. */
1db4e8a0 1903 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1904 amode | (from + i2 * 2));
1db4e8a0
UW
1905 }
1906
1907 /* If we executed a breakpoint instruction, point PC right back at it. */
1908 else if (insn[0] == 0x0 && insn[1] == 0x1)
1909 regcache_write_pc (regs, from);
1910
1911 /* For any other insn, PC points right after the original instruction. */
1912 else
1913 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1914
1915 if (debug_displaced)
1916 fprintf_unfiltered (gdb_stdlog,
1917 "displaced: (s390) pc is now %s\n",
1918 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1919}
a8c99f38 1920
d6db1fab
UW
1921
1922/* Helper routine to unwind pseudo registers. */
1923
1924static struct value *
1925s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1926{
1927 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1928 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1929 struct type *type = register_type (gdbarch, regnum);
1930
1931 /* Unwind PC via PSW address. */
1932 if (regnum == tdep->pc_regnum)
1933 {
1934 struct value *val;
1935
1936 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1937 if (!value_optimized_out (val))
1938 {
1939 LONGEST pswa = value_as_long (val);
1940
1941 if (TYPE_LENGTH (type) == 4)
1942 return value_from_pointer (type, pswa & 0x7fffffff);
1943 else
1944 return value_from_pointer (type, pswa);
1945 }
1946 }
1947
1948 /* Unwind CC via PSW mask. */
1949 if (regnum == tdep->cc_regnum)
1950 {
1951 struct value *val;
1952
1953 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1954 if (!value_optimized_out (val))
1955 {
1956 LONGEST pswm = value_as_long (val);
1957
1958 if (TYPE_LENGTH (type) == 4)
1959 return value_from_longest (type, (pswm >> 12) & 3);
1960 else
1961 return value_from_longest (type, (pswm >> 44) & 3);
1962 }
1963 }
1964
1965 /* Unwind full GPRs to show at least the lower halves (as the
1966 upper halves are undefined). */
2ccd1468 1967 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1968 {
1969 int reg = regnum - tdep->gpr_full_regnum;
1970 struct value *val;
1971
1972 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1973 if (!value_optimized_out (val))
1974 return value_cast (type, val);
1975 }
1976
1977 return allocate_optimized_out_value (type);
1978}
1979
1980static struct value *
1981s390_trad_frame_prev_register (struct frame_info *this_frame,
1982 struct trad_frame_saved_reg saved_regs[],
1983 int regnum)
1984{
1985 if (regnum < S390_NUM_REGS)
1986 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1987 else
1988 return s390_unwind_pseudo_register (this_frame, regnum);
1989}
1990
1991
a8c99f38
JB
1992/* Normal stack frames. */
1993
1994struct s390_unwind_cache {
1995
1996 CORE_ADDR func;
1997 CORE_ADDR frame_base;
1998 CORE_ADDR local_base;
1999
2000 struct trad_frame_saved_reg *saved_regs;
2001};
2002
a78f21af 2003static int
f089c433 2004s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2005 struct s390_unwind_cache *info)
5769d3cd 2006{
f089c433 2007 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
2008 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2009 struct s390_prologue_data data;
3fc46200
UW
2010 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2011 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
2012 int i;
2013 CORE_ADDR cfa;
a8c99f38
JB
2014 CORE_ADDR func;
2015 CORE_ADDR result;
2016 ULONGEST reg;
2017 CORE_ADDR prev_sp;
2018 int frame_pointer;
2019 int size;
edb3359d 2020 struct frame_info *next_frame;
a8c99f38
JB
2021
2022 /* Try to find the function start address. If we can't find it, we don't
2023 bother searching for it -- with modern compilers this would be mostly
2024 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2025 or else a valid backchain ... */
6d53bec8
AA
2026 if (!get_frame_func_if_available (this_frame, &info->func))
2027 {
2028 info->func = -1;
2029 return 0;
2030 }
2031 func = info->func;
5769d3cd 2032
a8c99f38
JB
2033 /* Try to analyze the prologue. */
2034 result = s390_analyze_prologue (gdbarch, func,
f089c433 2035 get_frame_pc (this_frame), &data);
a8c99f38 2036 if (!result)
5769d3cd 2037 return 0;
5769d3cd 2038
a8c99f38 2039 /* If this was successful, we should have found the instruction that
34201ae3 2040 sets the stack pointer register to the previous value of the stack
a8c99f38 2041 pointer minus the frame size. */
3fc46200 2042 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 2043 return 0;
a8c99f38 2044
34201ae3 2045 /* A frame size of zero at this point can mean either a real
a8c99f38 2046 frameless function, or else a failure to find the prologue.
34201ae3 2047 Perform some sanity checks to verify we really have a
a8c99f38
JB
2048 frameless function. */
2049 if (sp->k == 0)
5769d3cd 2050 {
34201ae3
UW
2051 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2052 size zero. This is only possible if the next frame is a sentinel
a8c99f38 2053 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
2054 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2055 needed, instead the code should simpliy rely on its
2056 analysis. */
edb3359d
DJ
2057 next_frame = get_next_frame (this_frame);
2058 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2059 next_frame = get_next_frame (next_frame);
2060 if (next_frame
f089c433 2061 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 2062 return 0;
5769d3cd 2063
a8c99f38
JB
2064 /* If we really have a frameless function, %r14 must be valid
2065 -- in particular, it must point to a different function. */
f089c433 2066 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
2067 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2068 if (get_pc_function_start (reg) == func)
5769d3cd 2069 {
a8c99f38
JB
2070 /* However, there is one case where it *is* valid for %r14
2071 to point to the same function -- if this is a recursive
2072 call, and we have stopped in the prologue *before* the
2073 stack frame was allocated.
2074
2075 Recognize this case by looking ahead a bit ... */
5769d3cd 2076
a8c99f38 2077 struct s390_prologue_data data2;
3fc46200 2078 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
2079
2080 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
2081 && pv_is_register (*sp, S390_SP_REGNUM)
2082 && sp->k != 0))
a8c99f38 2083 return 0;
5769d3cd 2084 }
5769d3cd 2085 }
5769d3cd
AC
2086
2087
a8c99f38
JB
2088 /* OK, we've found valid prologue data. */
2089 size = -sp->k;
5769d3cd 2090
a8c99f38
JB
2091 /* If the frame pointer originally also holds the same value
2092 as the stack pointer, we're probably using it. If it holds
2093 some other value -- even a constant offset -- it is most
2094 likely used as temp register. */
3fc46200 2095 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
2096 frame_pointer = S390_FRAME_REGNUM;
2097 else
2098 frame_pointer = S390_SP_REGNUM;
2099
34201ae3
UW
2100 /* If we've detected a function with stack frame, we'll still have to
2101 treat it as frameless if we're currently within the function epilog
c378eb4e 2102 code at a point where the frame pointer has already been restored.
a8c99f38 2103 This can only happen in an innermost frame. */
0e100dab
AC
2104 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2105 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
2106 next_frame = get_next_frame (this_frame);
2107 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2108 next_frame = get_next_frame (next_frame);
f089c433 2109 if (size > 0
edb3359d 2110 && (next_frame == NULL
f089c433 2111 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 2112 {
c9cf6e20 2113 /* See the comment in s390_stack_frame_destroyed_p on why this is
a8c99f38 2114 not completely reliable ... */
c9cf6e20 2115 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 2116 {
a8c99f38
JB
2117 memset (&data, 0, sizeof (data));
2118 size = 0;
2119 frame_pointer = S390_SP_REGNUM;
5769d3cd 2120 }
5769d3cd 2121 }
5769d3cd 2122
a8c99f38
JB
2123 /* Once we know the frame register and the frame size, we can unwind
2124 the current value of the frame register from the next frame, and
34201ae3 2125 add back the frame size to arrive that the previous frame's
a8c99f38 2126 stack pointer value. */
f089c433 2127 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 2128 cfa = prev_sp + 16*word_size + 32;
5769d3cd 2129
7803799a
UW
2130 /* Set up ABI call-saved/call-clobbered registers. */
2131 for (i = 0; i < S390_NUM_REGS; i++)
2132 if (!s390_register_call_saved (gdbarch, i))
2133 trad_frame_set_unknown (info->saved_regs, i);
2134
2135 /* CC is always call-clobbered. */
d6db1fab 2136 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 2137
121d8485
UW
2138 /* Record the addresses of all register spill slots the prologue parser
2139 has recognized. Consider only registers defined as call-saved by the
2140 ABI; for call-clobbered registers the parser may have recognized
2141 spurious stores. */
5769d3cd 2142
7803799a
UW
2143 for (i = 0; i < 16; i++)
2144 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2145 && data.gpr_slot[i] != 0)
121d8485 2146 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 2147
7803799a
UW
2148 for (i = 0; i < 16; i++)
2149 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2150 && data.fpr_slot[i] != 0)
2151 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
2152
2153 /* Function return will set PC to %r14. */
d6db1fab 2154 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2155
2156 /* In frameless functions, we unwind simply by moving the return
2157 address to the PC. However, if we actually stored to the
2158 save area, use that -- we might only think the function frameless
2159 because we're in the middle of the prologue ... */
2160 if (size == 0
d6db1fab 2161 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2162 {
d6db1fab 2163 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 2164 }
a8c99f38
JB
2165
2166 /* Another sanity check: unless this is a frameless function,
2167 we should have found spill slots for SP and PC.
2168 If not, we cannot unwind further -- this happens e.g. in
2169 libc's thread_start routine. */
2170 if (size > 0)
5769d3cd 2171 {
a8c99f38 2172 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 2173 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2174 prev_sp = -1;
5769d3cd 2175 }
a8c99f38
JB
2176
2177 /* We use the current value of the frame register as local_base,
2178 and the top of the register save area as frame_base. */
2179 if (prev_sp != -1)
2180 {
2181 info->frame_base = prev_sp + 16*word_size + 32;
2182 info->local_base = prev_sp - size;
2183 }
2184
a8c99f38 2185 return 1;
5769d3cd
AC
2186}
2187
a78f21af 2188static void
f089c433 2189s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2190 struct s390_unwind_cache *info)
5769d3cd 2191{
f089c433 2192 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2193 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2194 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2195 CORE_ADDR backchain;
2196 ULONGEST reg;
f2489477 2197 LONGEST sp, tmp;
7803799a
UW
2198 int i;
2199
2200 /* Set up ABI call-saved/call-clobbered registers. */
2201 for (i = 0; i < S390_NUM_REGS; i++)
2202 if (!s390_register_call_saved (gdbarch, i))
2203 trad_frame_set_unknown (info->saved_regs, i);
2204
2205 /* CC is always call-clobbered. */
d6db1fab 2206 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2207
2208 /* Get the backchain. */
f089c433 2209 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
f2489477
AA
2210 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2211 tmp = 0;
2212 backchain = (CORE_ADDR) tmp;
a8c99f38
JB
2213
2214 /* A zero backchain terminates the frame chain. As additional
2215 sanity check, let's verify that the spill slot for SP in the
2216 save area pointed to by the backchain in fact links back to
2217 the save area. */
2218 if (backchain != 0
e17a4113
UW
2219 && safe_read_memory_integer (backchain + 15*word_size,
2220 word_size, byte_order, &sp)
a8c99f38
JB
2221 && (CORE_ADDR)sp == backchain)
2222 {
2223 /* We don't know which registers were saved, but it will have
34201ae3
UW
2224 to be at least %r14 and %r15. This will allow us to continue
2225 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
2226 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2227 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2228
2229 /* Function return will set PC to %r14. */
d6db1fab 2230 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2231 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2232
2233 /* We use the current value of the frame register as local_base,
34201ae3 2234 and the top of the register save area as frame_base. */
a8c99f38
JB
2235 info->frame_base = backchain + 16*word_size + 32;
2236 info->local_base = reg;
2237 }
2238
f089c433 2239 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2240}
2241
a8c99f38 2242static struct s390_unwind_cache *
f089c433 2243s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2244 void **this_prologue_cache)
2245{
2246 struct s390_unwind_cache *info;
62261490 2247
a8c99f38 2248 if (*this_prologue_cache)
19ba03f4 2249 return (struct s390_unwind_cache *) *this_prologue_cache;
a8c99f38
JB
2250
2251 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2252 *this_prologue_cache = info;
f089c433 2253 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2254 info->func = -1;
2255 info->frame_base = -1;
2256 info->local_base = -1;
2257
492d29ea 2258 TRY
62261490
PA
2259 {
2260 /* Try to use prologue analysis to fill the unwind cache.
2261 If this fails, fall back to reading the stack backchain. */
2262 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2263 s390_backchain_frame_unwind_cache (this_frame, info);
2264 }
492d29ea 2265 CATCH (ex, RETURN_MASK_ERROR)
7556d4a4
PA
2266 {
2267 if (ex.error != NOT_AVAILABLE_ERROR)
2268 throw_exception (ex);
2269 }
492d29ea 2270 END_CATCH
a8c99f38
JB
2271
2272 return info;
2273}
5769d3cd 2274
a78f21af 2275static void
f089c433 2276s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2277 void **this_prologue_cache,
2278 struct frame_id *this_id)
5769d3cd 2279{
a8c99f38 2280 struct s390_unwind_cache *info
f089c433 2281 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2282
a8c99f38 2283 if (info->frame_base == -1)
6d53bec8
AA
2284 {
2285 if (info->func != -1)
2286 *this_id = frame_id_build_unavailable_stack (info->func);
2287 return;
2288 }
5769d3cd 2289
a8c99f38 2290 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2291}
2292
f089c433
UW
2293static struct value *
2294s390_frame_prev_register (struct frame_info *this_frame,
2295 void **this_prologue_cache, int regnum)
a8c99f38 2296{
7803799a 2297 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2298 struct s390_unwind_cache *info
f089c433 2299 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2300
d6db1fab 2301 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2302}
2303
2304static const struct frame_unwind s390_frame_unwind = {
2305 NORMAL_FRAME,
8fbca658 2306 default_frame_unwind_stop_reason,
a8c99f38 2307 s390_frame_this_id,
f089c433
UW
2308 s390_frame_prev_register,
2309 NULL,
2310 default_frame_sniffer
a8c99f38
JB
2311};
2312
5769d3cd 2313
8e645ae7
AC
2314/* Code stubs and their stack frames. For things like PLTs and NULL
2315 function calls (where there is no true frame and the return address
2316 is in the RETADDR register). */
a8c99f38 2317
8e645ae7
AC
2318struct s390_stub_unwind_cache
2319{
a8c99f38
JB
2320 CORE_ADDR frame_base;
2321 struct trad_frame_saved_reg *saved_regs;
2322};
2323
8e645ae7 2324static struct s390_stub_unwind_cache *
f089c433 2325s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2326 void **this_prologue_cache)
5769d3cd 2327{
f089c433 2328 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2329 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2330 struct s390_stub_unwind_cache *info;
a8c99f38 2331 ULONGEST reg;
5c3cf190 2332
a8c99f38 2333 if (*this_prologue_cache)
19ba03f4 2334 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
5c3cf190 2335
8e645ae7 2336 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2337 *this_prologue_cache = info;
f089c433 2338 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2339
2340 /* The return address is in register %r14. */
d6db1fab 2341 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2342
2343 /* Retrieve stack pointer and determine our frame base. */
f089c433 2344 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2345 info->frame_base = reg + 16*word_size + 32;
2346
2347 return info;
5769d3cd
AC
2348}
2349
a8c99f38 2350static void
f089c433 2351s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2352 void **this_prologue_cache,
2353 struct frame_id *this_id)
5769d3cd 2354{
8e645ae7 2355 struct s390_stub_unwind_cache *info
f089c433
UW
2356 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2357 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2358}
5769d3cd 2359
f089c433
UW
2360static struct value *
2361s390_stub_frame_prev_register (struct frame_info *this_frame,
2362 void **this_prologue_cache, int regnum)
8e645ae7
AC
2363{
2364 struct s390_stub_unwind_cache *info
f089c433 2365 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2366 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2367}
2368
f089c433
UW
2369static int
2370s390_stub_frame_sniffer (const struct frame_unwind *self,
2371 struct frame_info *this_frame,
2372 void **this_prologue_cache)
a8c99f38 2373{
93d42b30 2374 CORE_ADDR addr_in_block;
8e645ae7
AC
2375 bfd_byte insn[S390_MAX_INSTR_SIZE];
2376
2377 /* If the current PC points to non-readable memory, we assume we
2378 have trapped due to an invalid function pointer call. We handle
2379 the non-existing current function like a PLT stub. */
f089c433 2380 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2381 if (in_plt_section (addr_in_block)
f089c433
UW
2382 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2383 return 1;
2384 return 0;
a8c99f38 2385}
5769d3cd 2386
f089c433
UW
2387static const struct frame_unwind s390_stub_frame_unwind = {
2388 NORMAL_FRAME,
8fbca658 2389 default_frame_unwind_stop_reason,
f089c433
UW
2390 s390_stub_frame_this_id,
2391 s390_stub_frame_prev_register,
2392 NULL,
2393 s390_stub_frame_sniffer
2394};
2395
5769d3cd 2396
a8c99f38 2397/* Signal trampoline stack frames. */
5769d3cd 2398
a8c99f38
JB
2399struct s390_sigtramp_unwind_cache {
2400 CORE_ADDR frame_base;
2401 struct trad_frame_saved_reg *saved_regs;
2402};
5769d3cd 2403
a8c99f38 2404static struct s390_sigtramp_unwind_cache *
f089c433 2405s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2406 void **this_prologue_cache)
5769d3cd 2407{
f089c433 2408 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2409 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2410 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2411 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2412 struct s390_sigtramp_unwind_cache *info;
2413 ULONGEST this_sp, prev_sp;
7803799a 2414 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2415 int i;
2416
2417 if (*this_prologue_cache)
19ba03f4 2418 return (struct s390_sigtramp_unwind_cache *) *this_prologue_cache;
5769d3cd 2419
a8c99f38
JB
2420 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2421 *this_prologue_cache = info;
f089c433 2422 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2423
f089c433
UW
2424 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2425 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2426 next_cfa = this_sp + 16*word_size + 32;
2427
2428 /* New-style RT frame:
2429 retcode + alignment (8 bytes)
2430 siginfo (128 bytes)
c378eb4e 2431 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2432 if (next_ra == next_cfa)
2433 {
f0f63663 2434 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2435 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2436 upper GPR halves if present. */
2437 sigreg_high_off = 8;
a8c99f38
JB
2438 }
2439
2440 /* Old-style RT frame and all non-RT frames:
2441 old signal mask (8 bytes)
c378eb4e 2442 pointer to sigregs. */
5769d3cd
AC
2443 else
2444 {
e17a4113
UW
2445 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2446 word_size, byte_order);
7803799a
UW
2447 /* sigregs are followed by signo (4 bytes), then by the
2448 upper GPR halves if present. */
2449 sigreg_high_off = 4;
a8c99f38 2450 }
5769d3cd 2451
a8c99f38 2452 /* The sigregs structure looks like this:
34201ae3
UW
2453 long psw_mask;
2454 long psw_addr;
2455 long gprs[16];
2456 int acrs[16];
2457 int fpc;
2458 int __pad;
2459 double fprs[16]; */
5769d3cd 2460
7803799a
UW
2461 /* PSW mask and address. */
2462 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2463 sigreg_ptr += word_size;
7803799a 2464 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2465 sigreg_ptr += word_size;
2466
2467 /* Then the GPRs. */
2468 for (i = 0; i < 16; i++)
2469 {
2470 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2471 sigreg_ptr += word_size;
2472 }
2473
2474 /* Then the ACRs. */
2475 for (i = 0; i < 16; i++)
2476 {
2477 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2478 sigreg_ptr += 4;
5769d3cd 2479 }
5769d3cd 2480
a8c99f38
JB
2481 /* The floating-point control word. */
2482 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2483 sigreg_ptr += 8;
5769d3cd 2484
a8c99f38
JB
2485 /* And finally the FPRs. */
2486 for (i = 0; i < 16; i++)
2487 {
2488 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2489 sigreg_ptr += 8;
2490 }
2491
7803799a
UW
2492 /* If we have them, the GPR upper halves are appended at the end. */
2493 sigreg_ptr += sigreg_high_off;
2494 if (tdep->gpr_full_regnum != -1)
2495 for (i = 0; i < 16; i++)
2496 {
34201ae3 2497 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2498 sigreg_ptr += 4;
2499 }
2500
a8c99f38
JB
2501 /* Restore the previous frame's SP. */
2502 prev_sp = read_memory_unsigned_integer (
2503 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2504 word_size, byte_order);
5769d3cd 2505
a8c99f38
JB
2506 /* Determine our frame base. */
2507 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2508
a8c99f38 2509 return info;
5769d3cd
AC
2510}
2511
a8c99f38 2512static void
f089c433 2513s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2514 void **this_prologue_cache,
2515 struct frame_id *this_id)
5769d3cd 2516{
a8c99f38 2517 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2518 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2519 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2520}
2521
f089c433
UW
2522static struct value *
2523s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2524 void **this_prologue_cache, int regnum)
a8c99f38
JB
2525{
2526 struct s390_sigtramp_unwind_cache *info
f089c433 2527 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2528 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2529}
2530
f089c433
UW
2531static int
2532s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2533 struct frame_info *this_frame,
2534 void **this_prologue_cache)
5769d3cd 2535{
f089c433 2536 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2537 bfd_byte sigreturn[2];
4c8287ac 2538
8defab1a 2539 if (target_read_memory (pc, sigreturn, 2))
f089c433 2540 return 0;
4c8287ac 2541
237b092b 2542 if (sigreturn[0] != op_svc)
f089c433 2543 return 0;
5769d3cd 2544
a8c99f38
JB
2545 if (sigreturn[1] != 119 /* sigreturn */
2546 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2547 return 0;
34201ae3 2548
f089c433 2549 return 1;
5769d3cd
AC
2550}
2551
f089c433
UW
2552static const struct frame_unwind s390_sigtramp_frame_unwind = {
2553 SIGTRAMP_FRAME,
8fbca658 2554 default_frame_unwind_stop_reason,
f089c433
UW
2555 s390_sigtramp_frame_this_id,
2556 s390_sigtramp_frame_prev_register,
2557 NULL,
2558 s390_sigtramp_frame_sniffer
2559};
2560
237b092b
AA
2561/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2562 upon error. */
2563
2564static LONGEST
2565s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2566 ptid_t ptid)
2567{
2568 struct regcache *regs = get_thread_regcache (ptid);
2569 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2570 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2571 ULONGEST pc;
2572 ULONGEST svc_number = -1;
2573 unsigned opcode;
2574
2575 /* Assume that the PC points after the 2-byte SVC instruction. We
2576 don't currently support SVC via EXECUTE. */
2577 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2578 pc -= 2;
2579 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2580 if (opcode != op_svc)
2581 return -1;
2582
2583 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2584 byte_order);
2585 if (svc_number == 0)
2586 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2587
2588 return svc_number;
2589}
2590
566c56c9
MK
2591/* Process record-replay */
2592
2593static struct linux_record_tdep s390_linux_record_tdep;
2594static struct linux_record_tdep s390x_linux_record_tdep;
2595
2596/* Record all registers but PC register for process-record. */
2597
2598static int
2599s390_all_but_pc_registers_record (struct regcache *regcache)
2600{
2601 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2602 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2603 int i;
2604
2605 for (i = 0; i < 16; i++)
2606 {
2607 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2608 return -1;
2609 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
2610 return -1;
2611 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2612 return -1;
2613 if (tdep->gpr_full_regnum != -1)
2614 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2615 return -1;
2616 if (tdep->v0_full_regnum != -1)
2617 {
2618 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2619 return -1;
2620 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i))
2621 return -1;
2622 }
2623 }
2624 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2625 return -1;
2626 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2627 return -1;
2628
2629 return 0;
2630}
2631
2632static enum gdb_syscall
2633s390_canonicalize_syscall (int syscall, enum s390_abi_kind abi)
2634{
2635 switch (syscall)
2636 {
2637 /* s390 syscall numbers < 222 are mostly the same as x86, so just list
2638 the exceptions. */
2639 case 0:
2640 return gdb_sys_no_syscall;
2641 case 7:
2642 return gdb_sys_restart_syscall;
2643 /* These syscalls work only on 31-bit. */
2644 case 13: /* time */
2645 case 16: /* lchown[16] */
2646 case 23: /* setuid[16] */
2647 case 24: /* getuid[16] */
2648 case 25: /* stime */
2649 case 46: /* setgid[16] */
2650 case 47: /* getgid[16] */
2651 case 49: /* seteuid[16] */
2652 case 50: /* getegid[16] */
2653 case 70: /* setreuid[16] */
2654 case 71: /* setregid[16] */
2655 case 76: /* [old_]getrlimit */
2656 case 80: /* getgroups[16] */
2657 case 81: /* setgroups[16] */
2658 case 95: /* fchown[16] */
2659 case 101: /* ioperm */
2660 case 138: /* setfsuid[16] */
2661 case 139: /* setfsgid[16] */
2662 case 140: /* _llseek */
2663 case 164: /* setresuid[16] */
2664 case 165: /* getresuid[16] */
2665 case 170: /* setresgid[16] */
2666 case 171: /* getresgid[16] */
2667 case 182: /* chown[16] */
2668 case 192: /* mmap2 */
2669 case 193: /* truncate64 */
2670 case 194: /* ftruncate64 */
2671 case 195: /* stat64 */
2672 case 196: /* lstat64 */
2673 case 197: /* fstat64 */
2674 case 221: /* fcntl64 */
2675 if (abi == ABI_LINUX_S390)
4d193179 2676 return (enum gdb_syscall) syscall;
566c56c9
MK
2677 return gdb_sys_no_syscall;
2678 /* These syscalls don't exist on s390. */
2679 case 17: /* break */
2680 case 18: /* oldstat */
2681 case 28: /* oldfstat */
2682 case 31: /* stty */
2683 case 32: /* gtty */
2684 case 35: /* ftime */
2685 case 44: /* prof */
2686 case 53: /* lock */
2687 case 56: /* mpx */
2688 case 58: /* ulimit */
2689 case 59: /* oldolduname */
2690 case 68: /* sgetmask */
2691 case 69: /* ssetmask */
2692 case 82: /* [old_]select */
2693 case 84: /* oldlstat */
2694 case 98: /* profil */
2695 case 109: /* olduname */
2696 case 113: /* vm86old */
2697 case 123: /* modify_ldt */
2698 case 166: /* vm86 */
2699 return gdb_sys_no_syscall;
2700 case 110:
2701 return gdb_sys_lookup_dcookie;
2702 /* Here come the differences. */
2703 case 222:
2704 return gdb_sys_readahead;
2705 case 223:
2706 if (abi == ABI_LINUX_S390)
2707 return gdb_sys_sendfile64;
2708 return gdb_sys_no_syscall;
2709 /* 224-235 handled below */
2710 case 236:
2711 return gdb_sys_gettid;
2712 case 237:
2713 return gdb_sys_tkill;
2714 case 238:
2715 return gdb_sys_futex;
2716 case 239:
2717 return gdb_sys_sched_setaffinity;
2718 case 240:
2719 return gdb_sys_sched_getaffinity;
2720 case 241:
2721 return gdb_sys_tgkill;
2722 /* 242 reserved */
2723 case 243:
2724 return gdb_sys_io_setup;
2725 case 244:
2726 return gdb_sys_io_destroy;
2727 case 245:
2728 return gdb_sys_io_getevents;
2729 case 246:
2730 return gdb_sys_io_submit;
2731 case 247:
2732 return gdb_sys_io_cancel;
2733 case 248:
2734 return gdb_sys_exit_group;
2735 case 249:
2736 return gdb_sys_epoll_create;
2737 case 250:
2738 return gdb_sys_epoll_ctl;
2739 case 251:
2740 return gdb_sys_epoll_wait;
2741 case 252:
2742 return gdb_sys_set_tid_address;
2743 case 253:
2744 return gdb_sys_fadvise64;
2745 /* 254-262 handled below */
2746 /* 263 reserved */
2747 case 264:
2748 if (abi == ABI_LINUX_S390)
2749 return gdb_sys_fadvise64_64;
2750 return gdb_sys_no_syscall;
2751 case 265:
2752 return gdb_sys_statfs64;
2753 case 266:
2754 return gdb_sys_fstatfs64;
2755 case 267:
2756 return gdb_sys_remap_file_pages;
2757 /* 268-270 reserved */
2758 /* 271-277 handled below */
2759 case 278:
2760 return gdb_sys_add_key;
2761 case 279:
2762 return gdb_sys_request_key;
2763 case 280:
2764 return gdb_sys_keyctl;
2765 case 281:
2766 return gdb_sys_waitid;
2767 /* 282-312 handled below */
2768 case 293:
2769 if (abi == ABI_LINUX_S390)
2770 return gdb_sys_fstatat64;
2771 return gdb_sys_newfstatat;
2772 /* 313+ not yet supported */
2773 default:
4d193179
SM
2774 {
2775 int ret;
2776
2777 /* Most "old" syscalls copied from i386. */
2778 if (syscall <= 221)
2779 ret = syscall;
2780 /* xattr syscalls. */
2781 else if (syscall >= 224 && syscall <= 235)
2782 ret = syscall + 2;
2783 /* timer syscalls. */
2784 else if (syscall >= 254 && syscall <= 262)
2785 ret = syscall + 5;
2786 /* mq_* and kexec_load */
2787 else if (syscall >= 271 && syscall <= 277)
2788 ret = syscall + 6;
2789 /* ioprio_set .. epoll_pwait */
2790 else if (syscall >= 282 && syscall <= 312)
2791 ret = syscall + 7;
2792 else
2793 ret = gdb_sys_no_syscall;
2794
2795 return (enum gdb_syscall) ret;
2796 }
566c56c9
MK
2797 }
2798}
2799
2800static int
2801s390_linux_syscall_record (struct regcache *regcache, LONGEST syscall_native)
2802{
2803 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2804 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2805 int ret;
2806 enum gdb_syscall syscall_gdb;
2807
2808 /* On s390, syscall number can be passed either as immediate field of svc
2809 instruction, or in %r1 (with svc 0). */
2810 if (syscall_native == 0)
2811 regcache_raw_read_signed (regcache, S390_R1_REGNUM, &syscall_native);
2812
2813 syscall_gdb = s390_canonicalize_syscall (syscall_native, tdep->abi);
2814
2815 if (syscall_gdb < 0)
2816 {
2817 printf_unfiltered (_("Process record and replay target doesn't "
2818 "support syscall number %s\n"),
2819 plongest (syscall_native));
2820 return -1;
2821 }
2822
2823 if (syscall_gdb == gdb_sys_sigreturn
2824 || syscall_gdb == gdb_sys_rt_sigreturn)
2825 {
2826 if (s390_all_but_pc_registers_record (regcache))
2827 return -1;
2828 return 0;
2829 }
2830
2831 if (tdep->abi == ABI_LINUX_ZSERIES)
2832 ret = record_linux_system_call (syscall_gdb, regcache,
2833 &s390x_linux_record_tdep);
2834 else
2835 ret = record_linux_system_call (syscall_gdb, regcache,
2836 &s390_linux_record_tdep);
2837
2838 if (ret)
2839 return ret;
2840
2841 /* Record the return value of the system call. */
2842 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
2843 return -1;
2844
2845 return 0;
2846}
2847
2848static int
2849s390_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache,
2850 enum gdb_signal signal)
2851{
2852 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2853 /* There are two kinds of signal frames on s390. rt_sigframe is always
2854 the larger one, so don't even bother with sigframe. */
2855 const int sizeof_rt_sigframe = (tdep->abi == ABI_LINUX_ZSERIES ?
2856 160 + 8 + 128 + 1024 : 96 + 8 + 128 + 1000);
2857 ULONGEST sp;
2858 int i;
2859
2860 for (i = 0; i < 16; i++)
2861 {
2862 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2863 return -1;
2864 if (tdep->gpr_full_regnum != -1)
2865 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2866 return -1;
2867 }
2868 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
2869 return -1;
2870 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2871 return -1;
2872
2873 /* Record the change in the stack.
2874 frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */
2875 regcache_raw_read_unsigned (regcache, S390_SP_REGNUM, &sp);
2876 sp -= sizeof_rt_sigframe;
2877
2878 if (record_full_arch_list_add_mem (sp, sizeof_rt_sigframe))
2879 return -1;
2880
2881 if (record_full_arch_list_add_end ())
2882 return -1;
2883
2884 return 0;
2885}
4c8287ac 2886
a8c99f38
JB
2887/* Frame base handling. */
2888
2889static CORE_ADDR
f089c433 2890s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2891{
a8c99f38 2892 struct s390_unwind_cache *info
f089c433 2893 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2894 return info->frame_base;
2895}
2896
2897static CORE_ADDR
f089c433 2898s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2899{
2900 struct s390_unwind_cache *info
f089c433 2901 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2902 return info->local_base;
2903}
2904
2905static const struct frame_base s390_frame_base = {
2906 &s390_frame_unwind,
2907 s390_frame_base_address,
2908 s390_local_base_address,
2909 s390_local_base_address
2910};
2911
2912static CORE_ADDR
2913s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2914{
7803799a 2915 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2916 ULONGEST pc;
7803799a 2917 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2918 return gdbarch_addr_bits_remove (gdbarch, pc);
2919}
2920
2921static CORE_ADDR
2922s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2923{
2924 ULONGEST sp;
2925 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2926 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2927}
2928
2929
a431654a
AC
2930/* DWARF-2 frame support. */
2931
7803799a
UW
2932static struct value *
2933s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2934 int regnum)
2935{
d6db1fab 2936 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2937}
2938
a431654a
AC
2939static void
2940s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2941 struct dwarf2_frame_state_reg *reg,
4a4e5149 2942 struct frame_info *this_frame)
a431654a
AC
2943{
2944 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2945
d6db1fab
UW
2946 /* The condition code (and thus PSW mask) is call-clobbered. */
2947 if (regnum == S390_PSWM_REGNUM)
2948 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2949
2950 /* The PSW address unwinds to the return address. */
2951 else if (regnum == S390_PSWA_REGNUM)
2952 reg->how = DWARF2_FRAME_REG_RA;
2953
7803799a
UW
2954 /* Fixed registers are call-saved or call-clobbered
2955 depending on the ABI in use. */
d6db1fab 2956 else if (regnum < S390_NUM_REGS)
a431654a 2957 {
7803799a 2958 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2959 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2960 else
a431654a 2961 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2962 }
a431654a 2963
d6db1fab
UW
2964 /* We install a special function to unwind pseudos. */
2965 else
7803799a
UW
2966 {
2967 reg->how = DWARF2_FRAME_REG_FN;
2968 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2969 }
2970}
2971
2972
b0cf273e
JB
2973/* Dummy function calls. */
2974
80f75320
AA
2975/* Unwrap any single-field structs in TYPE and return the effective
2976 "inner" type. E.g., yield "float" for all these cases:
20a940cc 2977
80f75320
AA
2978 float x;
2979 struct { float x };
2980 struct { struct { float x; } x; };
417c80f9
AA
2981 struct { struct { struct { float x; } x; } x; };
2982
2983 However, if an inner type is smaller than MIN_SIZE, abort the
2984 unwrapping. */
20a940cc 2985
80f75320 2986static struct type *
417c80f9 2987s390_effective_inner_type (struct type *type, unsigned int min_size)
20a940cc 2988{
80f75320
AA
2989 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
2990 && TYPE_NFIELDS (type) == 1)
417c80f9
AA
2991 {
2992 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
2993
2994 if (TYPE_LENGTH (inner) < min_size)
2995 break;
2996 type = inner;
2997 }
2998
80f75320 2999 return type;
20a940cc
JB
3000}
3001
80f75320
AA
3002/* Return non-zero if TYPE should be passed like "float" or
3003 "double". */
20a940cc 3004
20a940cc 3005static int
80f75320 3006s390_function_arg_float (struct type *type)
20a940cc 3007{
80f75320
AA
3008 /* Note that long double as well as complex types are intentionally
3009 excluded. */
3010 if (TYPE_LENGTH (type) > 8)
3011 return 0;
20a940cc 3012
80f75320
AA
3013 /* A struct containing just a float or double is passed like a float
3014 or double. */
417c80f9 3015 type = s390_effective_inner_type (type, 0);
20a940cc 3016
20a940cc 3017 return (TYPE_CODE (type) == TYPE_CODE_FLT
80f75320 3018 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
20a940cc
JB
3019}
3020
417c80f9
AA
3021/* Return non-zero if TYPE should be passed like a vector. */
3022
3023static int
3024s390_function_arg_vector (struct type *type)
3025{
3026 if (TYPE_LENGTH (type) > 16)
3027 return 0;
3028
3029 /* Structs containing just a vector are passed like a vector. */
3030 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
3031
3032 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
3033}
3034
6dbc9c04 3035/* Determine whether N is a power of two. */
20a940cc 3036
78f8b424 3037static int
b0cf273e 3038is_power_of_two (unsigned int n)
78f8b424 3039{
6dbc9c04 3040 return n && ((n & (n - 1)) == 0);
78f8b424
JB
3041}
3042
80f75320 3043/* For an argument whose type is TYPE and which is not passed like a
417c80f9
AA
3044 float or vector, return non-zero if it should be passed like "int"
3045 or "long long". */
4d819d0e 3046
78f8b424 3047static int
b0cf273e 3048s390_function_arg_integer (struct type *type)
78f8b424 3049{
80f75320
AA
3050 enum type_code code = TYPE_CODE (type);
3051
354ecfd5 3052 if (TYPE_LENGTH (type) > 8)
b0cf273e 3053 return 0;
78f8b424 3054
80f75320
AA
3055 if (code == TYPE_CODE_INT
3056 || code == TYPE_CODE_ENUM
3057 || code == TYPE_CODE_RANGE
3058 || code == TYPE_CODE_CHAR
3059 || code == TYPE_CODE_BOOL
3060 || code == TYPE_CODE_PTR
3061 || code == TYPE_CODE_REF)
3062 return 1;
3063
3064 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
3065 && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
3066}
3067
80f75320
AA
3068/* Argument passing state: Internal data structure passed to helper
3069 routines of s390_push_dummy_call. */
78f8b424 3070
80f75320
AA
3071struct s390_arg_state
3072 {
3073 /* Register cache, or NULL, if we are in "preparation mode". */
3074 struct regcache *regcache;
417c80f9
AA
3075 /* Next available general/floating-point/vector register for
3076 argument passing. */
3077 int gr, fr, vr;
80f75320
AA
3078 /* Current pointer to copy area (grows downwards). */
3079 CORE_ADDR copy;
3080 /* Current pointer to parameter area (grows upwards). */
3081 CORE_ADDR argp;
3082 };
78f8b424 3083
80f75320
AA
3084/* Prepare one argument ARG for a dummy call and update the argument
3085 passing state AS accordingly. If the regcache field in AS is set,
3086 operate in "write mode" and write ARG into the inferior. Otherwise
3087 run "preparation mode" and skip all updates to the inferior. */
78f8b424 3088
80f75320
AA
3089static void
3090s390_handle_arg (struct s390_arg_state *as, struct value *arg,
3091 struct gdbarch_tdep *tdep, int word_size,
417c80f9 3092 enum bfd_endian byte_order, int is_unnamed)
78f8b424 3093{
80f75320
AA
3094 struct type *type = check_typedef (value_type (arg));
3095 unsigned int length = TYPE_LENGTH (type);
3096 int write_mode = as->regcache != NULL;
78f8b424 3097
80f75320
AA
3098 if (s390_function_arg_float (type))
3099 {
3100 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
3101 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
3102 6. */
3103 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
3104 {
3105 /* When we store a single-precision value in an FP register,
3106 it occupies the leftmost bits. */
3107 if (write_mode)
3108 regcache_cooked_write_part (as->regcache,
3109 S390_F0_REGNUM + as->fr,
3110 0, length,
3111 value_contents (arg));
3112 as->fr += 2;
3113 }
3114 else
3115 {
3116 /* When we store a single-precision value in a stack slot,
3117 it occupies the rightmost bits. */
3118 as->argp = align_up (as->argp + length, word_size);
3119 if (write_mode)
3120 write_memory (as->argp - length, value_contents (arg),
3121 length);
3122 }
3123 }
417c80f9
AA
3124 else if (tdep->vector_abi == S390_VECTOR_ABI_128
3125 && s390_function_arg_vector (type))
3126 {
3127 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
3128
3129 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
3130 {
3131 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
3132
3133 if (write_mode)
3134 regcache_cooked_write_part (as->regcache, regnum,
3135 0, length,
3136 value_contents (arg));
3137 as->vr++;
3138 }
3139 else
3140 {
3141 if (write_mode)
3142 write_memory (as->argp, value_contents (arg), length);
3143 as->argp = align_up (as->argp + length, word_size);
3144 }
3145 }
80f75320 3146 else if (s390_function_arg_integer (type) && length <= word_size)
78f8b424 3147 {
decf8d9a
JK
3148 /* Initialize it just to avoid a GCC false warning. */
3149 ULONGEST val = 0;
78f8b424 3150
80f75320 3151 if (write_mode)
34201ae3 3152 {
80f75320
AA
3153 /* Place value in least significant bits of the register or
3154 memory word and sign- or zero-extend to full word size.
3155 This also applies to a struct or union. */
3156 val = TYPE_UNSIGNED (type)
3157 ? extract_unsigned_integer (value_contents (arg),
3158 length, byte_order)
3159 : extract_signed_integer (value_contents (arg),
3160 length, byte_order);
3161 }
78f8b424 3162
80f75320
AA
3163 if (as->gr <= 6)
3164 {
3165 if (write_mode)
3166 regcache_cooked_write_unsigned (as->regcache,
3167 S390_R0_REGNUM + as->gr,
3168 val);
3169 as->gr++;
3170 }
3171 else
3172 {
3173 if (write_mode)
3174 write_memory_unsigned_integer (as->argp, word_size,
3175 byte_order, val);
3176 as->argp += word_size;
34201ae3 3177 }
78f8b424 3178 }
80f75320
AA
3179 else if (s390_function_arg_integer (type) && length == 8)
3180 {
3181 if (as->gr <= 5)
3182 {
3183 if (write_mode)
3184 {
3185 regcache_cooked_write (as->regcache,
3186 S390_R0_REGNUM + as->gr,
3187 value_contents (arg));
3188 regcache_cooked_write (as->regcache,
3189 S390_R0_REGNUM + as->gr + 1,
3190 value_contents (arg) + word_size);
3191 }
3192 as->gr += 2;
3193 }
3194 else
3195 {
3196 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
3197 in it, then don't go back and use it again later. */
3198 as->gr = 7;
78f8b424 3199
80f75320
AA
3200 if (write_mode)
3201 write_memory (as->argp, value_contents (arg), length);
3202 as->argp += length;
3203 }
3204 }
3205 else
3206 {
3207 /* This argument type is never passed in registers. Place the
3208 value in the copy area and pass a pointer to it. Use 8-byte
3209 alignment as a conservative assumption. */
3210 as->copy = align_down (as->copy - length, 8);
3211 if (write_mode)
3212 write_memory (as->copy, value_contents (arg), length);
3213
3214 if (as->gr <= 6)
3215 {
3216 if (write_mode)
3217 regcache_cooked_write_unsigned (as->regcache,
3218 S390_R0_REGNUM + as->gr,
3219 as->copy);
3220 as->gr++;
3221 }
3222 else
3223 {
3224 if (write_mode)
3225 write_memory_unsigned_integer (as->argp, word_size,
3226 byte_order, as->copy);
3227 as->argp += word_size;
3228 }
3229 }
78f8b424
JB
3230}
3231
78f8b424 3232/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
3233 place to be passed to a function, as specified by the "GNU/Linux
3234 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
3235
3236 SP is the current stack pointer. We must put arguments, links,
3237 padding, etc. whereever they belong, and return the new stack
3238 pointer value.
34201ae3 3239
78f8b424
JB
3240 If STRUCT_RETURN is non-zero, then the function we're calling is
3241 going to return a structure by value; STRUCT_ADDR is the address of
3242 a block we've allocated for it on the stack.
3243
3244 Our caller has taken care of any type promotions needed to satisfy
3245 prototypes or the old K&R argument-passing rules. */
80f75320 3246
a78f21af 3247static CORE_ADDR
7d9b040b 3248s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
3249 struct regcache *regcache, CORE_ADDR bp_addr,
3250 int nargs, struct value **args, CORE_ADDR sp,
3251 int struct_return, CORE_ADDR struct_addr)
5769d3cd 3252{
b0cf273e
JB
3253 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3254 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 3255 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 3256 int i;
80f75320
AA
3257 struct s390_arg_state arg_state, arg_prep;
3258 CORE_ADDR param_area_start, new_sp;
417c80f9
AA
3259 struct type *ftype = check_typedef (value_type (function));
3260
3261 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
3262 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
5769d3cd 3263
80f75320
AA
3264 arg_prep.copy = sp;
3265 arg_prep.gr = struct_return ? 3 : 2;
3266 arg_prep.fr = 0;
417c80f9 3267 arg_prep.vr = 0;
80f75320
AA
3268 arg_prep.argp = 0;
3269 arg_prep.regcache = NULL;
5769d3cd 3270
80f75320
AA
3271 /* Initialize arg_state for "preparation mode". */
3272 arg_state = arg_prep;
5769d3cd 3273
80f75320
AA
3274 /* Update arg_state.copy with the start of the reference-to-copy area
3275 and arg_state.argp with the size of the parameter area. */
3276 for (i = 0; i < nargs; i++)
417c80f9
AA
3277 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3278 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3279
80f75320 3280 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
78f8b424 3281
c0cc4c83 3282 /* Allocate the standard frame areas: the register save area, the
80f75320
AA
3283 word reserved for the compiler, and the back chain pointer. */
3284 new_sp = param_area_start - (16 * word_size + 32);
3285
3286 /* Now we have the final stack pointer. Make sure we didn't
3287 underflow; on 31-bit, this would result in addresses with the
3288 high bit set, which causes confusion elsewhere. Note that if we
3289 error out here, stack and registers remain untouched. */
3290 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
c0cc4c83
UW
3291 error (_("Stack overflow"));
3292
80f75320
AA
3293 /* Pass the structure return address in general register 2. */
3294 if (struct_return)
3295 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
c0cc4c83 3296
80f75320
AA
3297 /* Initialize arg_state for "write mode". */
3298 arg_state = arg_prep;
3299 arg_state.argp = param_area_start;
3300 arg_state.regcache = regcache;
78f8b424 3301
80f75320
AA
3302 /* Write all parameters. */
3303 for (i = 0; i < nargs; i++)
417c80f9
AA
3304 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3305 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3306
8de7d199
UW
3307 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
3308 if (word_size == 4)
3309 {
3310 ULONGEST pswa;
3311 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3312 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
3313 }
b0cf273e 3314 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 3315
b0cf273e 3316 /* Store updated stack pointer. */
80f75320 3317 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
78f8b424 3318
a8c99f38 3319 /* We need to return the 'stack part' of the frame ID,
121d8485 3320 which is actually the top of the register save area. */
80f75320 3321 return param_area_start;
5769d3cd
AC
3322}
3323
f089c433 3324/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
3325 dummy frame. The frame ID's base needs to match the TOS value
3326 returned by push_dummy_call, and the PC match the dummy frame's
3327 breakpoint. */
3328static struct frame_id
f089c433 3329s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 3330{
a8c99f38 3331 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
3332 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
3333 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 3334
121d8485 3335 return frame_id_build (sp + 16*word_size + 32,
34201ae3 3336 get_frame_pc (this_frame));
b0cf273e 3337}
c8f9d51c 3338
4074e13c
JB
3339static CORE_ADDR
3340s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
3341{
3342 /* Both the 32- and 64-bit ABI's say that the stack pointer should
3343 always be aligned on an eight-byte boundary. */
3344 return (addr & -8);
3345}
3346
3347
4e65a17e
AA
3348/* Helper for s390_return_value: Set or retrieve a function return
3349 value if it resides in a register. */
b0cf273e 3350
4e65a17e
AA
3351static void
3352s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
3353 struct regcache *regcache,
3354 gdb_byte *out, const gdb_byte *in)
c8f9d51c 3355{
4e65a17e
AA
3356 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3357 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
3358 int length = TYPE_LENGTH (type);
3359 int code = TYPE_CODE (type);
b0cf273e 3360
4e65a17e 3361 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
b0cf273e 3362 {
4e65a17e
AA
3363 /* Float-like value: left-aligned in f0. */
3364 if (in != NULL)
3365 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
3366 0, length, in);
3367 else
3368 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
3369 0, length, out);
3370 }
417c80f9
AA
3371 else if (code == TYPE_CODE_ARRAY)
3372 {
3373 /* Vector: left-aligned in v24. */
3374 if (in != NULL)
3375 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
3376 0, length, in);
3377 else
3378 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
3379 0, length, out);
3380 }
4e65a17e
AA
3381 else if (length <= word_size)
3382 {
3383 /* Integer: zero- or sign-extended in r2. */
3384 if (out != NULL)
3385 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
3386 word_size - length, length, out);
3387 else if (TYPE_UNSIGNED (type))
3388 regcache_cooked_write_unsigned
3389 (regcache, S390_R2_REGNUM,
3390 extract_unsigned_integer (in, length, byte_order));
3391 else
3392 regcache_cooked_write_signed
3393 (regcache, S390_R2_REGNUM,
3394 extract_signed_integer (in, length, byte_order));
b0cf273e 3395 }
4e65a17e
AA
3396 else if (length == 2 * word_size)
3397 {
3398 /* Double word: in r2 and r3. */
3399 if (in != NULL)
3400 {
3401 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
3402 regcache_cooked_write (regcache, S390_R3_REGNUM,
3403 in + word_size);
3404 }
3405 else
3406 {
3407 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
3408 regcache_cooked_read (regcache, S390_R3_REGNUM,
3409 out + word_size);
3410 }
3411 }
3412 else
3413 internal_error (__FILE__, __LINE__, _("invalid return type"));
c8f9d51c
JB
3414}
3415
4e65a17e
AA
3416
3417/* Implement the 'return_value' gdbarch method. */
3418
b0cf273e 3419static enum return_value_convention
6a3a010b 3420s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
3421 struct type *type, struct regcache *regcache,
3422 gdb_byte *out, const gdb_byte *in)
5769d3cd 3423{
56b9d9ac 3424 enum return_value_convention rvc;
56b9d9ac
UW
3425
3426 type = check_typedef (type);
56b9d9ac 3427
4e65a17e 3428 switch (TYPE_CODE (type))
b0cf273e 3429 {
4e65a17e
AA
3430 case TYPE_CODE_STRUCT:
3431 case TYPE_CODE_UNION:
4e65a17e
AA
3432 case TYPE_CODE_COMPLEX:
3433 rvc = RETURN_VALUE_STRUCT_CONVENTION;
3434 break;
417c80f9
AA
3435 case TYPE_CODE_ARRAY:
3436 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
3437 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
3438 ? RETURN_VALUE_REGISTER_CONVENTION
3439 : RETURN_VALUE_STRUCT_CONVENTION;
3440 break;
4e65a17e
AA
3441 default:
3442 rvc = TYPE_LENGTH (type) <= 8
3443 ? RETURN_VALUE_REGISTER_CONVENTION
3444 : RETURN_VALUE_STRUCT_CONVENTION;
b0cf273e 3445 }
5769d3cd 3446
4e65a17e
AA
3447 if (in != NULL || out != NULL)
3448 {
3449 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
3450 s390_register_return_value (gdbarch, type, regcache, out, in);
3451 else if (in != NULL)
3452 error (_("Cannot set function return value."));
3453 else
3454 error (_("Function return value unknown."));
b0cf273e
JB
3455 }
3456
3457 return rvc;
3458}
5769d3cd
AC
3459
3460
a8c99f38
JB
3461/* Breakpoints. */
3462
43af2100 3463static const gdb_byte *
c378eb4e
MS
3464s390_breakpoint_from_pc (struct gdbarch *gdbarch,
3465 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 3466{
43af2100 3467 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
3468
3469 *lenptr = sizeof (breakpoint);
3470 return breakpoint;
3471}
3472
5769d3cd 3473
a8c99f38 3474/* Address handling. */
5769d3cd
AC
3475
3476static CORE_ADDR
24568a2c 3477s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 3478{
a8c99f38 3479 return addr & 0x7fffffff;
5769d3cd
AC
3480}
3481
ffc65945
KB
3482static int
3483s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
3484{
3485 if (byte_size == 4)
119ac181 3486 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3487 else
3488 return 0;
3489}
3490
3491static const char *
3492s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
3493{
119ac181 3494 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
3495 return "mode32";
3496 else
3497 return NULL;
3498}
3499
a78f21af 3500static int
c378eb4e
MS
3501s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
3502 const char *name,
ffc65945
KB
3503 int *type_flags_ptr)
3504{
3505 if (strcmp (name, "mode32") == 0)
3506 {
119ac181 3507 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3508 return 1;
3509 }
3510 else
3511 return 0;
3512}
3513
60abeae4
AA
3514/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
3515 "-mcmodel=large". */
a2658feb
JK
3516
3517static char *
3518s390_gcc_target_options (struct gdbarch *gdbarch)
3519{
60abeae4
AA
3520 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
3521}
3522
3523/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
3524 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
3525 always "s390". Note that an s390x compiler supports "-m31" as
3526 well. */
3527
3528static const char *
3529s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
3530{
3531 return "s390x?";
a2658feb
JK
3532}
3533
55aa24fb
SDJ
3534/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3535 gdbarch.h. */
3536
3537static int
3538s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3539{
3540 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3541 or indirection. */
3542 || *s == '%' /* Register access. */
3543 || isdigit (*s)); /* Literal number. */
3544}
3545
566c56c9
MK
3546/* Process record and replay helpers. */
3547
3548/* Takes the intermediate sum of address calculations and masks off upper
3549 bits according to current addressing mode. */
3550
3551static CORE_ADDR
3552s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
3553 CORE_ADDR val) {
3554 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3555 ULONGEST pswm, pswa;
3556 int am;
3557 if (tdep->abi == ABI_LINUX_S390)
3558 {
3559 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3560 am = pswa >> 31 & 1;
3561 }
3562 else
3563 {
3564 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
3565 am = pswm >> 31 & 3;
3566 }
3567 switch (am)
3568 {
3569 case 0:
3570 return val & 0xffffff;
3571 case 1:
3572 return val & 0x7fffffff;
3573 case 3:
3574 return val;
3575 default:
3576 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
3577 return 0;
3578 }
3579}
3580
3581/* Calculates memory address using pre-calculated index, raw instruction word
3582 with b and d/dl fields, and raw instruction byte with dh field. Index and
3583 dh should be set to 0 if unused. */
3584
3585static CORE_ADDR
3586s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
3587 ULONGEST x, uint16_t bd, int8_t dh)
3588{
3589 uint8_t rb = bd >> 12 & 0xf;
3590 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
3591 ULONGEST b;
3592 CORE_ADDR res = d + x;
3593 if (rb)
3594 {
3595 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
3596 res += b;
3597 }
3598 return s390_record_address_mask (gdbarch, regcache, res);
3599}
3600
3601/* Calculates memory address using raw x, b + d/dl, dh fields from
3602 instruction. rx and dh should be set to 0 if unused. */
3603
3604static CORE_ADDR
3605s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
3606 uint8_t rx, uint16_t bd, int8_t dh)
3607{
3608 ULONGEST x = 0;
3609 if (rx)
3610 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
3611 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3612}
3613
3614/* Calculates memory address for VSCE[GF] instructions. */
3615
3616static int
3617s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
3618 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
3619 int8_t dh, CORE_ADDR *res)
3620{
3621 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3622 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3623 ULONGEST x;
3624 gdb_byte buf[16];
3625 if (tdep->v0_full_regnum == -1 || el * es >= 16)
3626 return -1;
3627 if (vx < 16)
3628 regcache_cooked_read (regcache, tdep->v0_full_regnum + vx, buf);
3629 else
3630 regcache_raw_read (regcache, S390_V16_REGNUM + vx - 16, buf);
3631 x = extract_unsigned_integer (buf + el * es, es, byte_order);
3632 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3633 return 0;
3634}
3635
3636/* Calculates memory address for instructions with relative long addressing. */
3637
3638static CORE_ADDR
3639s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
3640 CORE_ADDR addr, uint16_t i1, uint16_t i2)
3641{
3642 int32_t ri = i1 << 16 | i2;
3643 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
3644}
3645
3646/* Population count helper. */
3647
3648static int s390_popcnt (unsigned int x) {
3649 int res = 0;
3650 while (x)
3651 {
3652 if (x & 1)
3653 res++;
3654 x >>= 1;
3655 }
3656 return res;
3657}
3658
3659/* Record 64-bit register. */
3660
3661static int
3662s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3663{
3664 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3665 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3666 return -1;
3667 if (tdep->abi == ABI_LINUX_S390)
3668 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3669 return -1;
3670 return 0;
3671}
3672
3673/* Record high 32 bits of a register. */
3674
3675static int
3676s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3677{
3678 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3679 if (tdep->abi == ABI_LINUX_S390)
3680 {
3681 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3682 return -1;
3683 }
3684 else
3685 {
3686 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3687 return -1;
3688 }
3689 return 0;
3690}
3691
3692/* Record vector register. */
3693
3694static int
3695s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3696{
3697 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3698 if (i < 16)
3699 {
3700 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
3701 return -1;
3702 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
3703 return -1;
3704 }
3705 else
3706 {
3707 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
3708 return -1;
3709 }
3710 return 0;
3711}
3712
3713static int
3714s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
3715 CORE_ADDR addr)
3716{
3717 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3718 uint16_t insn[3] = {0};
3719 /* Instruction as bytes. */
3720 uint8_t ibyte[6];
3721 /* Instruction as nibbles. */
3722 uint8_t inib[12];
3723 /* Instruction vector registers. */
3724 uint8_t ivec[4];
3725 CORE_ADDR oaddr, oaddr2, oaddr3;
3726 ULONGEST tmp;
3727 int i, n;
3728 /* if EX/EXRL instruction used, here's the reg parameter */
3729 int ex = -1;
3730 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3731
3732 /* Attempting to use EX or EXRL jumps back here */
3733ex:
3734
3735 /* Read instruction. */
3736 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
3737 /* If execute was involved, do the adjustment. */
3738 if (ex != -1)
3739 insn[0] |= ex & 0xff;
3740 /* Two highest bits determine instruction size. */
3741 if (insn[0] >= 0x4000)
3742 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
3743 else
3744 /* Not necessary, but avoids uninitialized variable warnings. */
3745 insn[1] = 0;
3746 if (insn[0] >= 0xc000)
3747 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
3748 else
3749 insn[2] = 0;
3750 /* Split instruction into bytes and nibbles. */
3751 for (i = 0; i < 3; i++)
3752 {
3753 ibyte[i*2] = insn[i] >> 8 & 0xff;
3754 ibyte[i*2+1] = insn[i] & 0xff;
3755 }
3756 for (i = 0; i < 6; i++)
3757 {
3758 inib[i*2] = ibyte[i] >> 4 & 0xf;
3759 inib[i*2+1] = ibyte[i] & 0xf;
3760 }
3761 /* Compute vector registers, if applicable. */
3762 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
3763 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
3764 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
3765 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
3766
3767 switch (ibyte[0])
3768 {
3769 /* 0x00 undefined */
3770
3771 case 0x01:
3772 /* E-format instruction */
3773 switch (ibyte[1])
3774 {
3775 /* 0x00 undefined */
3776 /* 0x01 unsupported: PR - program return */
3777 /* 0x02 unsupported: UPT */
3778 /* 0x03 undefined */
3779 /* 0x04 privileged: PTFF - perform timing facility function */
3780 /* 0x05-0x06 undefined */
3781 /* 0x07 privileged: SCKPF - set clock programmable field */
3782 /* 0x08-0x09 undefined */
3783
3784 case 0x0a: /* PFPO - perform floating point operation */
3785 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3786 if (!(tmp & 0x80000000u))
3787 {
3788 uint8_t ofc = tmp >> 16 & 0xff;
3789 switch (ofc)
3790 {
3791 case 0x00: /* HFP32 */
3792 case 0x01: /* HFP64 */
3793 case 0x05: /* BFP32 */
3794 case 0x06: /* BFP64 */
3795 case 0x08: /* DFP32 */
3796 case 0x09: /* DFP64 */
3797 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3798 return -1;
3799 break;
3800 case 0x02: /* HFP128 */
3801 case 0x07: /* BFP128 */
3802 case 0x0a: /* DFP128 */
3803 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3804 return -1;
3805 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3806 return -1;
3807 break;
3808 default:
3809 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3810 ofc, paddress (gdbarch, addr));
3811 return -1;
3812 }
3813
3814 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3815 return -1;
3816 }
3817 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3818 return -1;
3819 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3820 return -1;
3821 break;
3822
3823 case 0x0b: /* TAM - test address mode */
3824 case 0x0c: /* SAM24 - set address mode 24 */
3825 case 0x0d: /* SAM31 - set address mode 31 */
3826 case 0x0e: /* SAM64 - set address mode 64 */
3827 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3828 return -1;
3829 break;
3830
3831 /* 0x0f-0xfe undefined */
3832
3833 /* 0xff unsupported: TRAP */
3834
3835 default:
3836 goto UNKNOWN_OP;
3837 }
3838 break;
3839
3840 /* 0x02 undefined */
3841 /* 0x03 undefined */
3842
3843 case 0x04: /* SPM - set program mask */
3844 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3845 return -1;
3846 break;
3847
3848 case 0x05: /* BALR - branch and link */
3849 case 0x45: /* BAL - branch and link */
3850 case 0x06: /* BCTR - branch on count */
3851 case 0x46: /* BCT - branch on count */
3852 case 0x0d: /* BASR - branch and save */
3853 case 0x4d: /* BAS - branch and save */
3854 case 0x84: /* BRXH - branch relative on index high */
3855 case 0x85: /* BRXLE - branch relative on index low or equal */
3856 case 0x86: /* BXH - branch on index high */
3857 case 0x87: /* BXLE - branch on index low or equal */
3858 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3859 use 32-bit destination as counter. */
3860 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3861 return -1;
3862 break;
3863
3864 case 0x07: /* BCR - branch on condition */
3865 case 0x47: /* BC - branch on condition */
3866 /* No effect other than PC transfer. */
3867 break;
3868
3869 /* 0x08 undefined */
3870 /* 0x09 undefined */
3871
3872 case 0x0a:
3873 /* SVC - supervisor call */
3874 if (s390_linux_syscall_record (regcache, ibyte[1]))
3875 return -1;
3876 break;
3877
3878 case 0x0b: /* BSM - branch and set mode */
3879 if (inib[2])
3880 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3881 return -1;
3882 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3883 return -1;
3884 break;
3885
3886 case 0x0c: /* BASSM - branch and save and set mode */
3887 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3888 return -1;
3889 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3890 return -1;
3891 break;
3892
3893 case 0x0e: /* MVCL - move long [interruptible] */
3894 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3895 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3896 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3897 tmp &= 0xffffff;
3898 if (record_full_arch_list_add_mem (oaddr, tmp))
3899 return -1;
3900 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3901 return -1;
3902 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3903 return -1;
3904 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3905 return -1;
3906 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3907 return -1;
3908 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3909 return -1;
3910 break;
3911
3912 case 0x0f: /* CLCL - compare logical long [interruptible] */
3913 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3914 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3915 return -1;
3916 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3917 return -1;
3918 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3919 return -1;
3920 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3921 return -1;
3922 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3923 return -1;
3924 break;
3925
3926 case 0x10: /* LPR - load positive */
3927 case 0x11: /* LNR - load negative */
3928 case 0x12: /* LTR - load and test */
3929 case 0x13: /* LCR - load complement */
3930 case 0x14: /* NR - and */
3931 case 0x16: /* OR - or */
3932 case 0x17: /* XR - xor */
3933 case 0x1a: /* AR - add */
3934 case 0x1b: /* SR - subtract */
3935 case 0x1e: /* ALR - add logical */
3936 case 0x1f: /* SLR - subtract logical */
3937 case 0x54: /* N - and */
3938 case 0x56: /* O - or */
3939 case 0x57: /* X - xor */
3940 case 0x5a: /* A - add */
3941 case 0x5b: /* S - subtract */
3942 case 0x5e: /* AL - add logical */
3943 case 0x5f: /* SL - subtract logical */
3944 case 0x4a: /* AH - add halfword */
3945 case 0x4b: /* SH - subtract halfword */
3946 case 0x8a: /* SRA - shift right single */
3947 case 0x8b: /* SLA - shift left single */
3948 case 0xbf: /* ICM - insert characters under mask */
3949 /* 32-bit destination + flags */
3950 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3951 return -1;
3952 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3953 return -1;
3954 break;
3955
3956 case 0x15: /* CLR - compare logical */
3957 case 0x55: /* CL - compare logical */
3958 case 0x19: /* CR - compare */
3959 case 0x29: /* CDR - compare */
3960 case 0x39: /* CER - compare */
3961 case 0x49: /* CH - compare halfword */
3962 case 0x59: /* C - compare */
3963 case 0x69: /* CD - compare */
3964 case 0x79: /* CE - compare */
3965 case 0x91: /* TM - test under mask */
3966 case 0x95: /* CLI - compare logical */
3967 case 0xbd: /* CLM - compare logical under mask */
3968 case 0xd5: /* CLC - compare logical */
3969 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3970 return -1;
3971 break;
3972
3973 case 0x18: /* LR - load */
3974 case 0x48: /* LH - load halfword */
3975 case 0x58: /* L - load */
3976 case 0x41: /* LA - load address */
3977 case 0x43: /* IC - insert character */
3978 case 0x4c: /* MH - multiply halfword */
3979 case 0x71: /* MS - multiply single */
3980 case 0x88: /* SRL - shift right single logical */
3981 case 0x89: /* SLL - shift left single logical */
3982 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3983 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3984 return -1;
3985 break;
3986
3987 case 0x1c: /* MR - multiply */
3988 case 0x5c: /* M - multiply */
3989 case 0x1d: /* DR - divide */
3990 case 0x5d: /* D - divide */
3991 case 0x8c: /* SRDL - shift right double logical */
3992 case 0x8d: /* SLDL - shift left double logical */
3993 /* 32-bit pair destination, no flags */
3994 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3995 return -1;
3996 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3997 return -1;
3998 break;
3999
4000 case 0x20: /* LPDR - load positive */
4001 case 0x30: /* LPER - load positive */
4002 case 0x21: /* LNDR - load negative */
4003 case 0x31: /* LNER - load negative */
4004 case 0x22: /* LTDR - load and test */
4005 case 0x32: /* LTER - load and test */
4006 case 0x23: /* LCDR - load complement */
4007 case 0x33: /* LCER - load complement */
4008 case 0x2a: /* ADR - add */
4009 case 0x3a: /* AER - add */
4010 case 0x6a: /* AD - add */
4011 case 0x7a: /* AE - add */
4012 case 0x2b: /* SDR - subtract */
4013 case 0x3b: /* SER - subtract */
4014 case 0x6b: /* SD - subtract */
4015 case 0x7b: /* SE - subtract */
4016 case 0x2e: /* AWR - add unnormalized */
4017 case 0x3e: /* AUR - add unnormalized */
4018 case 0x6e: /* AW - add unnormalized */
4019 case 0x7e: /* AU - add unnormalized */
4020 case 0x2f: /* SWR - subtract unnormalized */
4021 case 0x3f: /* SUR - subtract unnormalized */
4022 case 0x6f: /* SW - subtract unnormalized */
4023 case 0x7f: /* SU - subtract unnormalized */
4024 /* float destination + flags */
4025 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4026 return -1;
4027 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4028 return -1;
4029 break;
4030
4031 case 0x24: /* HDR - halve */
4032 case 0x34: /* HER - halve */
4033 case 0x25: /* LDXR - load rounded */
4034 case 0x35: /* LEDR - load rounded */
4035 case 0x28: /* LDR - load */
4036 case 0x38: /* LER - load */
4037 case 0x68: /* LD - load */
4038 case 0x78: /* LE - load */
4039 case 0x2c: /* MDR - multiply */
4040 case 0x3c: /* MDER - multiply */
4041 case 0x6c: /* MD - multiply */
4042 case 0x7c: /* MDE - multiply */
4043 case 0x2d: /* DDR - divide */
4044 case 0x3d: /* DER - divide */
4045 case 0x6d: /* DD - divide */
4046 case 0x7d: /* DE - divide */
4047 /* float destination, no flags */
4048 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4049 return -1;
4050 break;
4051
4052 case 0x26: /* MXR - multiply */
4053 case 0x27: /* MXDR - multiply */
4054 case 0x67: /* MXD - multiply */
4055 /* float pair destination, no flags */
4056 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4057 return -1;
4058 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4059 return -1;
4060 break;
4061
4062 case 0x36: /* AXR - add */
4063 case 0x37: /* SXR - subtract */
4064 /* float pair destination + flags */
4065 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4066 return -1;
4067 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4068 return -1;
4069 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4070 return -1;
4071 break;
4072
4073 case 0x40: /* STH - store halfword */
4074 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4075 if (record_full_arch_list_add_mem (oaddr, 2))
4076 return -1;
4077 break;
4078
4079 case 0x42: /* STC - store character */
4080 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4081 if (record_full_arch_list_add_mem (oaddr, 1))
4082 return -1;
4083 break;
4084
4085 case 0x44: /* EX - execute */
4086 if (ex != -1)
4087 {
4088 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4089 paddress (gdbarch, addr));
4090 return -1;
4091 }
4092 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4093 if (inib[2])
4094 {
4095 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4096 ex = tmp & 0xff;
4097 }
4098 else
4099 {
4100 ex = 0;
4101 }
4102 goto ex;
4103
4104 case 0x4e: /* CVD - convert to decimal */
4105 case 0x60: /* STD - store */
4106 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4107 if (record_full_arch_list_add_mem (oaddr, 8))
4108 return -1;
4109 break;
4110
4111 case 0x4f: /* CVB - convert to binary */
4112 /* 32-bit gpr destination + FPC (DXC write) */
4113 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4114 return -1;
4115 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4116 return -1;
4117 break;
4118
4119 case 0x50: /* ST - store */
4120 case 0x70: /* STE - store */
4121 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4122 if (record_full_arch_list_add_mem (oaddr, 4))
4123 return -1;
4124 break;
4125
4126 case 0x51: /* LAE - load address extended */
4127 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4128 return -1;
4129 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
4130 return -1;
4131 break;
4132
4133 /* 0x52 undefined */
4134 /* 0x53 undefined */
4135
4136 /* 0x61-0x66 undefined */
4137
4138 /* 0x72-0x77 undefined */
4139
4140 /* 0x80 privileged: SSM - set system mask */
4141 /* 0x81 undefined */
4142 /* 0x82 privileged: LPSW - load PSW */
4143 /* 0x83 privileged: diagnose */
4144
4145 case 0x8e: /* SRDA - shift right double */
4146 case 0x8f: /* SLDA - shift left double */
4147 /* 32-bit pair destination + flags */
4148 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4149 return -1;
4150 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4151 return -1;
4152 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4153 return -1;
4154 break;
4155
4156 case 0x90: /* STM - store multiple */
4157 case 0x9b: /* STAM - store access multiple */
4158 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4159 if (inib[2] <= inib[3])
4160 n = inib[3] - inib[2] + 1;
4161 else
4162 n = inib[3] + 0x10 - inib[2] + 1;
4163 if (record_full_arch_list_add_mem (oaddr, n * 4))
4164 return -1;
4165 break;
4166
4167 case 0x92: /* MVI - move */
4168 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4169 if (record_full_arch_list_add_mem (oaddr, 1))
4170 return -1;
4171 break;
4172
4173 case 0x93: /* TS - test and set */
4174 case 0x94: /* NI - and */
4175 case 0x96: /* OI - or */
4176 case 0x97: /* XI - xor */
4177 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4178 if (record_full_arch_list_add_mem (oaddr, 1))
4179 return -1;
4180 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4181 return -1;
4182 break;
4183
4184 case 0x98: /* LM - load multiple */
4185 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4186 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
4187 return -1;
4188 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4189 return -1;
4190 break;
4191
4192 /* 0x99 privileged: TRACE */
4193
4194 case 0x9a: /* LAM - load access multiple */
4195 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4196 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
4197 return -1;
4198 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
4199 return -1;
4200 break;
4201
4202 /* 0x9c-0x9f privileged and obsolete (old I/O) */
4203 /* 0xa0-0xa4 undefined */
4204
4205 case 0xa5:
4206 case 0xa7:
4207 /* RI-format instruction */
4208 switch (ibyte[0] << 4 | inib[3])
4209 {
4210 case 0xa50: /* IIHH - insert immediate */
4211 case 0xa51: /* IIHL - insert immediate */
4212 /* high 32-bit destination */
4213 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4214 return -1;
4215 break;
4216
4217 case 0xa52: /* IILH - insert immediate */
4218 case 0xa53: /* IILL - insert immediate */
4219 case 0xa75: /* BRAS - branch relative and save */
4220 case 0xa76: /* BRCT - branch relative on count */
4221 case 0xa78: /* LHI - load halfword immediate */
4222 case 0xa7c: /* MHI - multiply halfword immediate */
4223 /* 32-bit or native destination */
4224 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4225 return -1;
4226 break;
4227
4228 case 0xa54: /* NIHH - and immediate */
4229 case 0xa55: /* NIHL - and immediate */
4230 case 0xa58: /* OIHH - or immediate */
4231 case 0xa59: /* OIHL - or immediate */
4232 /* high 32-bit destination + flags */
4233 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4234 return -1;
4235 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4236 return -1;
4237 break;
4238
4239 case 0xa56: /* NILH - and immediate */
4240 case 0xa57: /* NILL - and immediate */
4241 case 0xa5a: /* OILH - or immediate */
4242 case 0xa5b: /* OILL - or immediate */
4243 case 0xa7a: /* AHI - add halfword immediate */
4244 /* 32-bit destination + flags */
4245 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4246 return -1;
4247 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4248 return -1;
4249 break;
4250
4251 case 0xa5c: /* LLIHH - load logical immediate */
4252 case 0xa5d: /* LLIHL - load logical immediate */
4253 case 0xa5e: /* LLILH - load logical immediate */
4254 case 0xa5f: /* LLILL - load logical immediate */
4255 case 0xa77: /* BRCTG - branch relative on count */
4256 case 0xa79: /* LGHI - load halfword immediate */
4257 case 0xa7d: /* MGHI - multiply halfword immediate */
4258 /* 64-bit destination */
4259 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4260 return -1;
4261 break;
4262
4263 case 0xa70: /* TMLH - test under mask */
4264 case 0xa71: /* TMLL - test under mask */
4265 case 0xa72: /* TMHH - test under mask */
4266 case 0xa73: /* TMHL - test under mask */
4267 case 0xa7e: /* CHI - compare halfword immediate */
4268 case 0xa7f: /* CGHI - compare halfword immediate */
4269 /* flags only */
4270 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4271 return -1;
4272 break;
4273
4274 case 0xa74: /* BRC - branch relative on condition */
4275 /* no register change */
4276 break;
4277
4278 case 0xa7b: /* AGHI - add halfword immediate */
4279 /* 64-bit destination + flags */
4280 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4281 return -1;
4282 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4283 return -1;
4284 break;
4285
4286 default:
4287 goto UNKNOWN_OP;
4288 }
4289 break;
4290
4291 /* 0xa6 undefined */
4292
4293 case 0xa8: /* MVCLE - move long extended [partial] */
4294 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4295 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4296 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
4297 if (record_full_arch_list_add_mem (oaddr, tmp))
4298 return -1;
4299 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4300 return -1;
4301 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4302 return -1;
4303 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4304 return -1;
4305 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4306 return -1;
4307 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4308 return -1;
4309 break;
4310
4311 /* 0xaa-0xab undefined */
4312 /* 0xac privileged: STNSM - store then and system mask */
4313 /* 0xad privileged: STOSM - store then or system mask */
4314 /* 0xae privileged: SIGP - signal processor */
4315 /* 0xaf unsupported: MC - monitor call */
4316 /* 0xb0 undefined */
4317 /* 0xb1 privileged: LRA - load real address */
4318
4319 case 0xb2:
4320 case 0xb3:
4321 case 0xb9:
4322 /* S/RRD/RRE/RRF/IE-format instruction */
4323 switch (insn[0])
4324 {
4325 /* 0xb200-0xb204 undefined or privileged */
4326
4327 case 0xb205: /* STCK - store clock */
4328 case 0xb27c: /* STCKF - store clock fast */
4329 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4330 if (record_full_arch_list_add_mem (oaddr, 8))
4331 return -1;
4332 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4333 return -1;
4334 break;
4335
4336 /* 0xb206-0xb219 undefined, privileged, or unsupported */
4337 /* 0xb21a unsupported: CFC */
4338 /* 0xb21b-0xb221 undefined or privileged */
4339
4340 case 0xb222: /* IPM - insert program mask */
4341 case 0xb24f: /* EAR - extract access */
4342 case 0xb252: /* MSR - multiply single */
4343 case 0xb2ec: /* ETND - extract transaction nesting depth */
4344 case 0xb38c: /* EFPC - extract fpc */
4345 case 0xb91f: /* LRVR - load reversed */
4346 case 0xb926: /* LBR - load byte */
4347 case 0xb927: /* LHR - load halfword */
4348 case 0xb994: /* LLCR - load logical character */
4349 case 0xb995: /* LLHR - load logical halfword */
4350 case 0xb9f2: /* LOCR - load on condition */
4351 /* 32-bit gpr destination */
4352 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4353 return -1;
4354 break;
4355
4356 /* 0xb223-0xb22c privileged or unsupported */
4357
4358 case 0xb22d: /* DXR - divide */
4359 case 0xb325: /* LXDR - load lengthened */
4360 case 0xb326: /* LXER - load lengthened */
4361 case 0xb336: /* SQXR - square root */
4362 case 0xb365: /* LXR - load */
4363 case 0xb367: /* FIXR - load fp integer */
4364 case 0xb376: /* LZXR - load zero */
4365 case 0xb3b6: /* CXFR - convert from fixed */
4366 case 0xb3c6: /* CXGR - convert from fixed */
4367 case 0xb3fe: /* IEXTR - insert biased exponent */
4368 /* float pair destination */
4369 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4370 return -1;
4371 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4372 return -1;
4373 break;
4374
4375 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
4376
4377 case 0xb241: /* CKSM - checksum [partial] */
4378 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4379 return -1;
4380 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4381 return -1;
4382 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4383 return -1;
4384 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4385 return -1;
4386 break;
4387
4388 /* 0xb242-0xb243 undefined */
4389
4390 case 0xb244: /* SQDR - square root */
4391 case 0xb245: /* SQER - square root */
4392 case 0xb324: /* LDER - load lengthened */
4393 case 0xb337: /* MEER - multiply */
4394 case 0xb366: /* LEXR - load rounded */
4395 case 0xb370: /* LPDFR - load positive */
4396 case 0xb371: /* LNDFR - load negative */
4397 case 0xb372: /* CSDFR - copy sign */
4398 case 0xb373: /* LCDFR - load complement */
4399 case 0xb374: /* LZER - load zero */
4400 case 0xb375: /* LZDR - load zero */
4401 case 0xb377: /* FIER - load fp integer */
4402 case 0xb37f: /* FIDR - load fp integer */
4403 case 0xb3b4: /* CEFR - convert from fixed */
4404 case 0xb3b5: /* CDFR - convert from fixed */
4405 case 0xb3c1: /* LDGR - load fpr from gr */
4406 case 0xb3c4: /* CEGR - convert from fixed */
4407 case 0xb3c5: /* CDGR - convert from fixed */
4408 case 0xb3f6: /* IEDTR - insert biased exponent */
4409 /* float destination */
4410 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4411 return -1;
4412 break;
4413
4414 /* 0xb246-0xb24c: privileged or unsupported */
4415
4416 case 0xb24d: /* CPYA - copy access */
4417 case 0xb24e: /* SAR - set access */
4418 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
4419 return -1;
4420 break;
4421
4422 /* 0xb250-0xb251 undefined or privileged */
4423 /* 0xb253-0xb254 undefined or privileged */
4424
4425 case 0xb255: /* MVST - move string [partial] */
4426 {
4427 uint8_t end;
4428 gdb_byte cur;
4429 ULONGEST num = 0;
4430 /* Read ending byte. */
4431 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4432 end = tmp & 0xff;
4433 /* Get address of second operand. */
4434 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
4435 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4436 /* Search for ending byte and compute length. */
4437 do {
4438 num++;
4439 if (target_read_memory (oaddr, &cur, 1))
4440 return -1;
4441 oaddr++;
4442 } while (cur != end);
4443 /* Get address of first operand and record it. */
4444 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4445 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4446 if (record_full_arch_list_add_mem (oaddr, num))
4447 return -1;
4448 /* Record the registers. */
4449 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4450 return -1;
4451 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4452 return -1;
4453 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4454 return -1;
4455 }
4456 break;
4457
4458 /* 0xb256 undefined */
4459
4460 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
4461 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4462 return -1;
4463 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4464 return -1;
4465 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4466 return -1;
4467 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4468 return -1;
4469 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4470 return -1;
4471 break;
4472
4473 /* 0xb258-0xb25c undefined, privileged, or unsupported */
4474
4475 case 0xb25d: /* CLST - compare logical string [partial] */
4476 case 0xb25e: /* SRST - search string [partial] */
4477 case 0xb9be: /* SRSTU - search string unicode [partial] */
4478 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4479 return -1;
4480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4481 return -1;
4482 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4483 return -1;
4484 break;
4485
4486 /* 0xb25f-0xb262 undefined */
4487
4488 case 0xb263: /* CMPSC - compression call [interruptible] */
4489 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4490 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4491 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4492 if (record_full_arch_list_add_mem (oaddr, tmp))
4493 return -1;
4494 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4495 return -1;
4496 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4497 return -1;
4498 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4499 return -1;
4500 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4501 return -1;
4502 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
4503 return -1;
4504 /* DXC may be written */
4505 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4506 return -1;
4507 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4508 return -1;
4509 break;
4510
4511 /* 0xb264-0xb277 undefined, privileged, or unsupported */
4512
4513 case 0xb278: /* STCKE - store clock extended */
4514 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4515 if (record_full_arch_list_add_mem (oaddr, 16))
4516 return -1;
4517 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4518 return -1;
4519 break;
4520
4521 /* 0xb279-0xb27b undefined or unsupported */
4522 /* 0xb27d-0xb298 undefined or privileged */
4523
4524 case 0xb299: /* SRNM - set rounding mode */
4525 case 0xb2b8: /* SRNMB - set bfp rounding mode */
4526 case 0xb2b9: /* SRNMT - set dfp rounding mode */
4527 case 0xb29d: /* LFPC - load fpc */
4528 case 0xb2bd: /* LFAS - load fpc and signal */
4529 case 0xb384: /* SFPC - set fpc */
4530 case 0xb385: /* SFASR - set fpc and signal */
4531 case 0xb960: /* CGRT - compare and trap */
4532 case 0xb961: /* CLGRT - compare logical and trap */
4533 case 0xb972: /* CRT - compare and trap */
4534 case 0xb973: /* CLRT - compare logical and trap */
4535 /* fpc only - including possible DXC write for trapping insns */
4536 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4537 return -1;
4538 break;
4539
4540 /* 0xb29a-0xb29b undefined */
4541
4542 case 0xb29c: /* STFPC - store fpc */
4543 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4544 if (record_full_arch_list_add_mem (oaddr, 4))
4545 return -1;
4546 break;
4547
4548 /* 0xb29e-0xb2a4 undefined */
4549
4550 case 0xb2a5: /* TRE - translate extended [partial] */
4551 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4552 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4553 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4554 if (record_full_arch_list_add_mem (oaddr, tmp))
4555 return -1;
4556 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4557 return -1;
4558 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4559 return -1;
4560 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4561 return -1;
4562 break;
4563
4564 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
4565 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
4566 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
4567 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
4568 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
4569 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
4570 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4571 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4572 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4573 if (record_full_arch_list_add_mem (oaddr, tmp))
4574 return -1;
4575 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4576 return -1;
4577 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4578 return -1;
4579 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4580 return -1;
4581 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4582 return -1;
4583 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4584 return -1;
4585 break;
4586
4587 /* 0xb2a8-0xb2af undefined */
4588
4589 case 0xb2b0: /* STFLE - store facility list extended */
4590 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4591 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4592 tmp &= 0xff;
4593 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
4594 return -1;
4595 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
4596 return -1;
4597 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4598 return -1;
4599 break;
4600
4601 /* 0xb2b1-0xb2b7 undefined or privileged */
4602 /* 0xb2ba-0xb2bc undefined */
4603 /* 0xb2be-0xb2e7 undefined */
4604 /* 0xb2e9-0xb2eb undefined */
4605 /* 0xb2ed-0xb2f7 undefined */
4606 /* 0xb2f8 unsupported: TEND */
4607 /* 0xb2f9 undefined */
4608
4609 case 0xb2e8: /* PPA - perform processor assist */
4610 case 0xb2fa: /* NIAI - next instruction access intent */
4611 /* no visible effects */
4612 break;
4613
4614 /* 0xb2fb undefined */
4615 /* 0xb2fc unsupported: TABORT */
4616 /* 0xb2fd-0xb2fe undefined */
4617 /* 0xb2ff unsupported: TRAP */
4618
4619 case 0xb300: /* LPEBR - load positive */
4620 case 0xb301: /* LNEBR - load negative */
4621 case 0xb303: /* LCEBR - load complement */
4622 case 0xb310: /* LPDBR - load positive */
4623 case 0xb311: /* LNDBR - load negative */
4624 case 0xb313: /* LCDBR - load complement */
4625 case 0xb350: /* TBEDR - convert hfp to bfp */
4626 case 0xb351: /* TBDR - convert hfp to bfp */
4627 case 0xb358: /* THDER - convert bfp to hfp */
4628 case 0xb359: /* THDR - convert bfp to hfp */
4629 /* float destination + flags */
4630 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4631 return -1;
4632 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4633 return -1;
4634 break;
4635
4636 case 0xb304: /* LDEBR - load lengthened */
4637 case 0xb30c: /* MDEBR - multiply */
4638 case 0xb30d: /* DEBR - divide */
4639 case 0xb314: /* SQEBR - square root */
4640 case 0xb315: /* SQDBR - square root */
4641 case 0xb317: /* MEEBR - multiply */
4642 case 0xb31c: /* MDBR - multiply */
4643 case 0xb31d: /* DDBR - divide */
4644 case 0xb344: /* LEDBRA - load rounded */
4645 case 0xb345: /* LDXBRA - load rounded */
4646 case 0xb346: /* LEXBRA - load rounded */
4647 case 0xb357: /* FIEBRA - load fp integer */
4648 case 0xb35f: /* FIDBRA - load fp integer */
4649 case 0xb390: /* CELFBR - convert from logical */
4650 case 0xb391: /* CDLFBR - convert from logical */
4651 case 0xb394: /* CEFBR - convert from fixed */
4652 case 0xb395: /* CDFBR - convert from fixed */
4653 case 0xb3a0: /* CELGBR - convert from logical */
4654 case 0xb3a1: /* CDLGBR - convert from logical */
4655 case 0xb3a4: /* CEGBR - convert from fixed */
4656 case 0xb3a5: /* CDGBR - convert from fixed */
4657 case 0xb3d0: /* MDTR - multiply */
4658 case 0xb3d1: /* DDTR - divide */
4659 case 0xb3d4: /* LDETR - load lengthened */
4660 case 0xb3d5: /* LEDTR - load lengthened */
4661 case 0xb3d7: /* FIDTR - load fp integer */
4662 case 0xb3dd: /* LDXTR - load lengthened */
4663 case 0xb3f1: /* CDGTR - convert from fixed */
4664 case 0xb3f2: /* CDUTR - convert from unsigned packed */
4665 case 0xb3f3: /* CDSTR - convert from signed packed */
4666 case 0xb3f5: /* QADTR - quantize */
4667 case 0xb3f7: /* RRDTR - reround */
4668 case 0xb951: /* CDFTR - convert from fixed */
4669 case 0xb952: /* CDLGTR - convert from logical */
4670 case 0xb953: /* CDLFTR - convert from logical */
4671 /* float destination + fpc */
4672 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4673 return -1;
4674 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4675 return -1;
4676 break;
4677
4678 case 0xb305: /* LXDBR - load lengthened */
4679 case 0xb306: /* LXEBR - load lengthened */
4680 case 0xb307: /* MXDBR - multiply */
4681 case 0xb316: /* SQXBR - square root */
4682 case 0xb34c: /* MXBR - multiply */
4683 case 0xb34d: /* DXBR - divide */
4684 case 0xb347: /* FIXBRA - load fp integer */
4685 case 0xb392: /* CXLFBR - convert from logical */
4686 case 0xb396: /* CXFBR - convert from fixed */
4687 case 0xb3a2: /* CXLGBR - convert from logical */
4688 case 0xb3a6: /* CXGBR - convert from fixed */
4689 case 0xb3d8: /* MXTR - multiply */
4690 case 0xb3d9: /* DXTR - divide */
4691 case 0xb3dc: /* LXDTR - load lengthened */
4692 case 0xb3df: /* FIXTR - load fp integer */
4693 case 0xb3f9: /* CXGTR - convert from fixed */
4694 case 0xb3fa: /* CXUTR - convert from unsigned packed */
4695 case 0xb3fb: /* CXSTR - convert from signed packed */
4696 case 0xb3fd: /* QAXTR - quantize */
4697 case 0xb3ff: /* RRXTR - reround */
4698 case 0xb959: /* CXFTR - convert from fixed */
4699 case 0xb95a: /* CXLGTR - convert from logical */
4700 case 0xb95b: /* CXLFTR - convert from logical */
4701 /* float pair destination + fpc */
4702 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4703 return -1;
4704 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4705 return -1;
4706 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4707 return -1;
4708 break;
4709
4710 case 0xb308: /* KEBR - compare and signal */
4711 case 0xb309: /* CEBR - compare */
4712 case 0xb318: /* KDBR - compare and signal */
4713 case 0xb319: /* CDBR - compare */
4714 case 0xb348: /* KXBR - compare and signal */
4715 case 0xb349: /* CXBR - compare */
4716 case 0xb3e0: /* KDTR - compare and signal */
4717 case 0xb3e4: /* CDTR - compare */
4718 case 0xb3e8: /* KXTR - compare and signal */
4719 case 0xb3ec: /* CXTR - compare */
4720 /* flags + fpc only */
4721 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4722 return -1;
4723 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4724 return -1;
4725 break;
4726
4727 case 0xb302: /* LTEBR - load and test */
4728 case 0xb312: /* LTDBR - load and test */
4729 case 0xb30a: /* AEBR - add */
4730 case 0xb30b: /* SEBR - subtract */
4731 case 0xb31a: /* ADBR - add */
4732 case 0xb31b: /* SDBR - subtract */
4733 case 0xb3d2: /* ADTR - add */
4734 case 0xb3d3: /* SDTR - subtract */
4735 case 0xb3d6: /* LTDTR - load and test */
4736 /* float destination + flags + fpc */
4737 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4738 return -1;
4739 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4740 return -1;
4741 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4742 return -1;
4743 break;
4744
4745 case 0xb30e: /* MAEBR - multiply and add */
4746 case 0xb30f: /* MSEBR - multiply and subtract */
4747 case 0xb31e: /* MADBR - multiply and add */
4748 case 0xb31f: /* MSDBR - multiply and subtract */
4749 /* float destination [RRD] + fpc */
4750 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4751 return -1;
4752 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4753 return -1;
4754 break;
4755
4756 /* 0xb320-0xb323 undefined */
4757 /* 0xb327-0xb32d undefined */
4758
4759 case 0xb32e: /* MAER - multiply and add */
4760 case 0xb32f: /* MSER - multiply and subtract */
4761 case 0xb338: /* MAYLR - multiply and add unnormalized */
4762 case 0xb339: /* MYLR - multiply unnormalized */
4763 case 0xb33c: /* MAYHR - multiply and add unnormalized */
4764 case 0xb33d: /* MYHR - multiply unnormalized */
4765 case 0xb33e: /* MADR - multiply and add */
4766 case 0xb33f: /* MSDR - multiply and subtract */
4767 /* float destination [RRD] */
4768 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4769 return -1;
4770 break;
4771
4772 /* 0xb330-0xb335 undefined */
4773
4774 case 0xb33a: /* MAYR - multiply and add unnormalized */
4775 case 0xb33b: /* MYR - multiply unnormalized */
4776 /* float pair destination [RRD] */
4777 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4778 return -1;
4779 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4780 return -1;
4781 break;
4782
4783 case 0xb340: /* LPXBR - load positive */
4784 case 0xb341: /* LNXBR - load negative */
4785 case 0xb343: /* LCXBR - load complement */
4786 case 0xb360: /* LPXR - load positive */
4787 case 0xb361: /* LNXR - load negative */
4788 case 0xb362: /* LTXR - load and test */
4789 case 0xb363: /* LCXR - load complement */
4790 /* float pair destination + flags */
4791 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4792 return -1;
4793 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4794 return -1;
4795 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4796 return -1;
4797 break;
4798
4799 case 0xb342: /* LTXBR - load and test */
4800 case 0xb34a: /* AXBR - add */
4801 case 0xb34b: /* SXBR - subtract */
4802 case 0xb3da: /* AXTR - add */
4803 case 0xb3db: /* SXTR - subtract */
4804 case 0xb3de: /* LTXTR - load and test */
4805 /* float pair destination + flags + fpc */
4806 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4807 return -1;
4808 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4809 return -1;
4810 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4811 return -1;
4812 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4813 return -1;
4814 break;
4815
4816 /* 0xb34e-0xb34f undefined */
4817 /* 0xb352 undefined */
4818
4819 case 0xb353: /* DIEBR - divide to integer */
4820 case 0xb35b: /* DIDBR - divide to integer */
4821 /* two float destinations + flags + fpc */
4822 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4823 return -1;
4824 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4825 return -1;
4826 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4827 return -1;
4828 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4829 return -1;
4830 break;
4831
4832 /* 0xb354-0xb356 undefined */
4833 /* 0xb35a undefined */
4834
4835 /* 0xb35c-0xb35e undefined */
4836 /* 0xb364 undefined */
4837 /* 0xb368 undefined */
4838
4839 case 0xb369: /* CXR - compare */
4840 case 0xb3f4: /* CEDTR - compare biased exponent */
4841 case 0xb3fc: /* CEXTR - compare biased exponent */
4842 case 0xb920: /* CGR - compare */
4843 case 0xb921: /* CLGR - compare logical */
4844 case 0xb930: /* CGFR - compare */
4845 case 0xb931: /* CLGFR - compare logical */
4846 case 0xb9cd: /* CHHR - compare high */
4847 case 0xb9cf: /* CLHHR - compare logical high */
4848 case 0xb9dd: /* CHLR - compare high */
4849 case 0xb9df: /* CLHLR - compare logical high */
4850 /* flags only */
4851 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4852 return -1;
4853 break;
4854
4855 /* 0xb36a-0xb36f undefined */
4856 /* 0xb377-0xb37e undefined */
4857 /* 0xb380-0xb383 undefined */
4858 /* 0xb386-0xb38b undefined */
4859 /* 0xb38d-0xb38f undefined */
4860 /* 0xb393 undefined */
4861 /* 0xb397 undefined */
4862
4863 case 0xb398: /* CFEBR - convert to fixed */
4864 case 0xb399: /* CFDBR - convert to fixed */
4865 case 0xb39a: /* CFXBR - convert to fixed */
4866 case 0xb39c: /* CLFEBR - convert to logical */
4867 case 0xb39d: /* CLFDBR - convert to logical */
4868 case 0xb39e: /* CLFXBR - convert to logical */
4869 case 0xb941: /* CFDTR - convert to fixed */
4870 case 0xb949: /* CFXTR - convert to fixed */
4871 case 0xb943: /* CLFDTR - convert to logical */
4872 case 0xb94b: /* CLFXTR - convert to logical */
4873 /* 32-bit gpr destination + flags + fpc */
4874 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4875 return -1;
4876 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4877 return -1;
4878 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4879 return -1;
4880 break;
4881
4882 /* 0xb39b undefined */
4883 /* 0xb39f undefined */
4884
4885 /* 0xb3a3 undefined */
4886 /* 0xb3a7 undefined */
4887
4888 case 0xb3a8: /* CGEBR - convert to fixed */
4889 case 0xb3a9: /* CGDBR - convert to fixed */
4890 case 0xb3aa: /* CGXBR - convert to fixed */
4891 case 0xb3ac: /* CLGEBR - convert to logical */
4892 case 0xb3ad: /* CLGDBR - convert to logical */
4893 case 0xb3ae: /* CLGXBR - convert to logical */
4894 case 0xb3e1: /* CGDTR - convert to fixed */
4895 case 0xb3e9: /* CGXTR - convert to fixed */
4896 case 0xb942: /* CLGDTR - convert to logical */
4897 case 0xb94a: /* CLGXTR - convert to logical */
4898 /* 64-bit gpr destination + flags + fpc */
4899 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4900 return -1;
4901 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4902 return -1;
4903 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4904 return -1;
4905 break;
4906
4907 /* 0xb3ab undefined */
4908 /* 0xb3af-0xb3b3 undefined */
4909 /* 0xb3b7 undefined */
4910
4911 case 0xb3b8: /* CFER - convert to fixed */
4912 case 0xb3b9: /* CFDR - convert to fixed */
4913 case 0xb3ba: /* CFXR - convert to fixed */
4914 case 0xb998: /* ALCR - add logical with carry */
4915 case 0xb999: /* SLBR - subtract logical with borrow */
4916 case 0xb9f4: /* NRK - and */
4917 case 0xb9f6: /* ORK - or */
4918 case 0xb9f7: /* XRK - xor */
4919 case 0xb9f8: /* ARK - add */
4920 case 0xb9f9: /* SRK - subtract */
4921 case 0xb9fa: /* ALRK - add logical */
4922 case 0xb9fb: /* SLRK - subtract logical */
4923 /* 32-bit gpr destination + flags */
4924 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4925 return -1;
4926 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4927 return -1;
4928 break;
4929
4930 case 0xb3c8: /* CGER - convert to fixed */
4931 case 0xb3c9: /* CGDR - convert to fixed */
4932 case 0xb3ca: /* CGXR - convert to fixed */
4933 case 0xb900: /* LPGR - load positive */
4934 case 0xb901: /* LNGR - load negative */
4935 case 0xb902: /* LTGR - load and test */
4936 case 0xb903: /* LCGR - load complement */
4937 case 0xb908: /* AGR - add */
4938 case 0xb909: /* SGR - subtract */
4939 case 0xb90a: /* ALGR - add logical */
4940 case 0xb90b: /* SLGR - subtract logical */
4941 case 0xb910: /* LPGFR - load positive */
4942 case 0xb911: /* LNGFR - load negative */
4943 case 0xb912: /* LTGFR - load and test */
4944 case 0xb913: /* LCGFR - load complement */
4945 case 0xb918: /* AGFR - add */
4946 case 0xb919: /* SGFR - subtract */
4947 case 0xb91a: /* ALGFR - add logical */
4948 case 0xb91b: /* SLGFR - subtract logical */
4949 case 0xb980: /* NGR - and */
4950 case 0xb981: /* OGR - or */
4951 case 0xb982: /* XGR - xor */
4952 case 0xb988: /* ALCGR - add logical with carry */
4953 case 0xb989: /* SLBGR - subtract logical with borrow */
4954 case 0xb9e1: /* POPCNT - population count */
4955 case 0xb9e4: /* NGRK - and */
4956 case 0xb9e6: /* OGRK - or */
4957 case 0xb9e7: /* XGRK - xor */
4958 case 0xb9e8: /* AGRK - add */
4959 case 0xb9e9: /* SGRK - subtract */
4960 case 0xb9ea: /* ALGRK - add logical */
4961 case 0xb9eb: /* SLGRK - subtract logical */
4962 /* 64-bit gpr destination + flags */
4963 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4964 return -1;
4965 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4966 return -1;
4967 break;
4968
4969 /* 0xb3bb-0xb3c0 undefined */
4970 /* 0xb3c2-0xb3c3 undefined */
4971 /* 0xb3c7 undefined */
4972 /* 0xb3cb-0xb3cc undefined */
4973
4974 case 0xb3cd: /* LGDR - load gr from fpr */
4975 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4976 case 0xb3e3: /* CSDTR - convert to signed packed */
4977 case 0xb3e5: /* EEDTR - extract biased exponent */
4978 case 0xb3e7: /* ESDTR - extract significance */
4979 case 0xb3ed: /* EEXTR - extract biased exponent */
4980 case 0xb3ef: /* ESXTR - extract significance */
4981 case 0xb904: /* LGR - load */
4982 case 0xb906: /* LGBR - load byte */
4983 case 0xb907: /* LGHR - load halfword */
4984 case 0xb90c: /* MSGR - multiply single */
4985 case 0xb90f: /* LRVGR - load reversed */
4986 case 0xb914: /* LGFR - load */
4987 case 0xb916: /* LLGFR - load logical */
4988 case 0xb917: /* LLGTR - load logical thirty one bits */
4989 case 0xb91c: /* MSGFR - load */
4990 case 0xb946: /* BCTGR - branch on count */
4991 case 0xb984: /* LLGCR - load logical character */
4992 case 0xb985: /* LLGHR - load logical halfword */
4993 case 0xb9e2: /* LOCGR - load on condition */
4994 /* 64-bit gpr destination */
4995 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4996 return -1;
4997 break;
4998
4999 /* 0xb3ce-0xb3cf undefined */
5000 /* 0xb3e6 undefined */
5001
5002 case 0xb3ea: /* CUXTR - convert to unsigned packed */
5003 case 0xb3eb: /* CSXTR - convert to signed packed */
5004 case 0xb90d: /* DSGR - divide single */
5005 case 0xb91d: /* DSGFR - divide single */
5006 case 0xb986: /* MLGR - multiply logical */
5007 case 0xb987: /* DLGR - divide logical */
5008 /* 64-bit gpr pair destination */
5009 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5010 return -1;
5011 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5012 return -1;
5013 break;
5014
5015 /* 0xb3ee undefined */
5016 /* 0xb3f0 undefined */
5017 /* 0xb3f8 undefined */
5018
5019 /* 0xb905 privileged */
5020
5021 /* 0xb90e unsupported: EREGG */
5022
5023 /* 0xb915 undefined */
5024
5025 case 0xb91e: /* KMAC - compute message authentication code [partial] */
5026 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5027 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5028 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5029 tmp &= 0xff;
5030 switch (tmp)
5031 {
5032 case 0x00: /* KMAC-Query */
5033 if (record_full_arch_list_add_mem (oaddr, 16))
5034 return -1;
5035 break;
5036
5037 case 0x01: /* KMAC-DEA */
5038 case 0x02: /* KMAC-TDEA-128 */
5039 case 0x03: /* KMAC-TDEA-192 */
5040 case 0x09: /* KMAC-Encrypted-DEA */
5041 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
5042 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
5043 if (record_full_arch_list_add_mem (oaddr, 8))
5044 return -1;
5045 break;
5046
5047 case 0x12: /* KMAC-AES-128 */
5048 case 0x13: /* KMAC-AES-192 */
5049 case 0x14: /* KMAC-AES-256 */
5050 case 0x1a: /* KMAC-Encrypted-AES-128 */
5051 case 0x1b: /* KMAC-Encrypted-AES-192 */
5052 case 0x1c: /* KMAC-Encrypted-AES-256 */
5053 if (record_full_arch_list_add_mem (oaddr, 16))
5054 return -1;
5055 break;
5056
5057 default:
5058 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5059 (int)tmp, paddress (gdbarch, addr));
5060 return -1;
5061 }
5062 if (tmp != 0)
5063 {
5064 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5065 return -1;
5066 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5067 return -1;
5068 }
5069 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5070 return -1;
5071 break;
5072
5073 /* 0xb922-0xb924 undefined */
5074 /* 0xb925 privileged */
5075 /* 0xb928 privileged */
5076 /* 0xb929 undefined */
5077
5078 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
5079 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
5080 case 0xb92f: /* KMC - cipher message with chaining [partial] */
5081 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5082 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5083 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5084 tmp &= 0x7f;
5085 switch (tmp)
5086 {
5087 case 0x00: /* KM*-Query */
5088 if (record_full_arch_list_add_mem (oaddr, 16))
5089 return -1;
5090 break;
5091
5092 case 0x01: /* KM*-DEA */
5093 case 0x02: /* KM*-TDEA-128 */
5094 case 0x03: /* KM*-TDEA-192 */
5095 case 0x09: /* KM*-Encrypted-DEA */
5096 case 0x0a: /* KM*-Encrypted-TDEA-128 */
5097 case 0x0b: /* KM*-Encrypted-TDEA-192 */
5098 if (record_full_arch_list_add_mem (oaddr, 8))
5099 return -1;
5100 break;
5101
5102 case 0x12: /* KM*-AES-128 */
5103 case 0x13: /* KM*-AES-192 */
5104 case 0x14: /* KM*-AES-256 */
5105 case 0x1a: /* KM*-Encrypted-AES-128 */
5106 case 0x1b: /* KM*-Encrypted-AES-192 */
5107 case 0x1c: /* KM*-Encrypted-AES-256 */
5108 if (record_full_arch_list_add_mem (oaddr, 16))
5109 return -1;
5110 break;
5111
5112 case 0x43: /* KMC-PRNG */
5113 /* Only valid for KMC. */
5114 if (insn[0] == 0xb92f)
5115 {
5116 if (record_full_arch_list_add_mem (oaddr, 8))
5117 return -1;
5118 break;
5119 }
5120 /* For other instructions, fallthru. */
5121 default:
5122 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
5123 (int)tmp, paddress (gdbarch, addr));
5124 return -1;
5125 }
5126 if (tmp != 0)
5127 {
5128 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5129 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5130 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5131 if (record_full_arch_list_add_mem (oaddr2, tmp))
5132 return -1;
5133 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5134 return -1;
5135 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5136 return -1;
5137 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5138 return -1;
5139 }
5140 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5141 return -1;
5142 break;
5143
5144 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
5145 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5146 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5147 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5148 tmp &= 0x7f;
5149 switch (tmp)
5150 {
5151 case 0x00: /* PCC-Query */
5152 if (record_full_arch_list_add_mem (oaddr, 16))
5153 return -1;
5154 break;
5155
5156 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
5157 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
5158 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
5159 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
5160 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
5161 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
5162 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
5163 return -1;
5164 break;
5165
5166 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
5167 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
5168 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
5169 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
5170 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
5171 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
5172 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
5173 return -1;
5174 break;
5175
5176 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
5177 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
5178 return -1;
5179 break;
5180
5181 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
5182 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
5183 return -1;
5184 break;
5185
5186 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
5187 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
5188 return -1;
5189 break;
5190
5191 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
5192 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
5193 return -1;
5194 break;
5195
5196 default:
5197 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
5198 (int)tmp, paddress (gdbarch, addr));
5199 return -1;
5200 }
5201 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5202 return -1;
5203 break;
5204
5205 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
5206 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5207 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5208 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5209 tmp &= 0x7f;
5210 switch (tmp)
5211 {
5212 case 0x00: /* KMCTR-Query */
5213 if (record_full_arch_list_add_mem (oaddr, 16))
5214 return -1;
5215 break;
5216
5217 case 0x01: /* KMCTR-DEA */
5218 case 0x02: /* KMCTR-TDEA-128 */
5219 case 0x03: /* KMCTR-TDEA-192 */
5220 case 0x09: /* KMCTR-Encrypted-DEA */
5221 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
5222 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
5223 case 0x12: /* KMCTR-AES-128 */
5224 case 0x13: /* KMCTR-AES-192 */
5225 case 0x14: /* KMCTR-AES-256 */
5226 case 0x1a: /* KMCTR-Encrypted-AES-128 */
5227 case 0x1b: /* KMCTR-Encrypted-AES-192 */
5228 case 0x1c: /* KMCTR-Encrypted-AES-256 */
5229 break;
5230
5231 default:
5232 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
5233 (int)tmp, paddress (gdbarch, addr));
5234 return -1;
5235 }
5236 if (tmp != 0)
5237 {
5238 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5239 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5240 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5241 if (record_full_arch_list_add_mem (oaddr2, tmp))
5242 return -1;
5243 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5244 return -1;
5245 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5246 return -1;
5247 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5248 return -1;
5249 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
5250 return -1;
5251 }
5252 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5253 return -1;
5254 break;
5255
5256 case 0xb92e: /* KM - cipher message [partial] */
5257 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5258 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5259 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5260 tmp &= 0x7f;
5261 switch (tmp)
5262 {
5263 case 0x00: /* KM-Query */
5264 if (record_full_arch_list_add_mem (oaddr, 16))
5265 return -1;
5266 break;
5267
5268 case 0x01: /* KM-DEA */
5269 case 0x02: /* KM-TDEA-128 */
5270 case 0x03: /* KM-TDEA-192 */
5271 case 0x09: /* KM-Encrypted-DEA */
5272 case 0x0a: /* KM-Encrypted-TDEA-128 */
5273 case 0x0b: /* KM-Encrypted-TDEA-192 */
5274 case 0x12: /* KM-AES-128 */
5275 case 0x13: /* KM-AES-192 */
5276 case 0x14: /* KM-AES-256 */
5277 case 0x1a: /* KM-Encrypted-AES-128 */
5278 case 0x1b: /* KM-Encrypted-AES-192 */
5279 case 0x1c: /* KM-Encrypted-AES-256 */
5280 break;
5281
5282 case 0x32: /* KM-XTS-AES-128 */
5283 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
5284 return -1;
5285 break;
5286
5287 case 0x34: /* KM-XTS-AES-256 */
5288 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
5289 return -1;
5290 break;
5291
5292 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
5293 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
5294 return -1;
5295 break;
5296
5297 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
5298 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
5299 return -1;
5300 break;
5301
5302 default:
5303 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
5304 (int)tmp, paddress (gdbarch, addr));
5305 return -1;
5306 }
5307 if (tmp != 0)
5308 {
5309 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5310 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5311 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5312 if (record_full_arch_list_add_mem (oaddr2, tmp))
5313 return -1;
5314 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5315 return -1;
5316 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5317 return -1;
5318 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5319 return -1;
5320 }
5321 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5322 return -1;
5323 break;
5324
5325 /* 0xb932-0xb93b undefined */
5326
5327 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
5328 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5329 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5330 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5331 tmp &= 0xff;
5332 switch (tmp)
5333 {
5334 case 0x00: /* PPNO-Query */
5335 case 0x80: /* PPNO-Query */
5336 if (record_full_arch_list_add_mem (oaddr, 16))
5337 return -1;
5338 break;
5339
5340 case 0x03: /* PPNO-SHA-512-DRNG - generate */
5341 if (record_full_arch_list_add_mem (oaddr, 240))
5342 return -1;
5343 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5344 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5345 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5346 if (record_full_arch_list_add_mem (oaddr2, tmp))
5347 return -1;
5348 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5349 return -1;
5350 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5351 return -1;
5352 break;
5353
5354 case 0x83: /* PPNO-SHA-512-DRNG - seed */
5355 if (record_full_arch_list_add_mem (oaddr, 240))
5356 return -1;
5357 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5358 return -1;
5359 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5360 return -1;
5361 break;
5362
5363 default:
5364 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
5365 (int)tmp, paddress (gdbarch, addr));
5366 return -1;
5367 }
5368 /* DXC may be written */
5369 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5370 return -1;
5371 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5372 return -1;
5373 break;
5374
5375 /* 0xb93d undefined */
5376
5377 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
5378 case 0xb93f: /* KLMD - compute last message digest [partial] */
5379 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5380 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5381 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5382 tmp &= 0xff;
5383 switch (tmp)
5384 {
5385 case 0x00: /* K*MD-Query */
5386 if (record_full_arch_list_add_mem (oaddr, 16))
5387 return -1;
5388 break;
5389
5390 case 0x01: /* K*MD-SHA-1 */
5391 if (record_full_arch_list_add_mem (oaddr, 20))
5392 return -1;
5393 break;
5394
5395 case 0x02: /* K*MD-SHA-256 */
5396 if (record_full_arch_list_add_mem (oaddr, 32))
5397 return -1;
5398 break;
5399
5400 case 0x03: /* K*MD-SHA-512 */
5401 if (record_full_arch_list_add_mem (oaddr, 64))
5402 return -1;
5403 break;
5404
5405 case 0x41: /* KIMD-GHASH */
5406 /* Only valid for KIMD. */
5407 if (insn[0] == 0xb93e)
5408 {
5409 if (record_full_arch_list_add_mem (oaddr, 16))
5410 return -1;
5411 break;
5412 }
5413 /* For KLMD, fallthru. */
5414 default:
5415 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5416 (int)tmp, paddress (gdbarch, addr));
5417 return -1;
5418 }
5419 if (tmp != 0)
5420 {
5421 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5422 return -1;
5423 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5424 return -1;
5425 }
5426 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5427 return -1;
5428 break;
5429
5430 /* 0xb940 undefined */
5431 /* 0xb944-0xb945 undefined */
5432 /* 0xb947-0xb948 undefined */
5433 /* 0xb94c-0xb950 undefined */
5434 /* 0xb954-0xb958 undefined */
5435 /* 0xb95c-0xb95f undefined */
5436 /* 0xb962-0xb971 undefined */
5437 /* 0xb974-0xb97f undefined */
5438
5439 case 0xb983: /* FLOGR - find leftmost one */
5440 /* 64-bit gpr pair destination + flags */
5441 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5442 return -1;
5443 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5444 return -1;
5445 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5446 return -1;
5447 break;
5448
5449 /* 0xb98a privileged */
5450 /* 0xb98b-0xb98c undefined */
5451
5452 case 0xb98d: /* EPSW - extract psw */
5453 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5454 return -1;
5455 if (inib[7])
5456 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5457 return -1;
5458 break;
5459
5460 /* 0xb98e-0xb98f privileged */
5461
5462 case 0xb990: /* TRTT - translate two to two [partial] */
5463 case 0xb991: /* TRTO - translate two to one [partial] */
5464 case 0xb992: /* TROT - translate one to two [partial] */
5465 case 0xb993: /* TROO - translate one to one [partial] */
5466 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5467 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5468 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5469 /* tmp is source length, we want destination length. Adjust. */
5470 if (insn[0] == 0xb991)
5471 tmp >>= 1;
5472 if (insn[0] == 0xb992)
5473 tmp <<= 1;
5474 if (record_full_arch_list_add_mem (oaddr, tmp))
5475 return -1;
5476 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5477 return -1;
5478 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5479 return -1;
5480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5481 return -1;
5482 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5483 return -1;
5484 break;
5485
5486 case 0xb996: /* MLR - multiply logical */
5487 case 0xb997: /* DLR - divide logical */
5488 /* 32-bit gpr pair destination */
5489 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5490 return -1;
5491 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5492 return -1;
5493 break;
5494
5495 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
5496 /* 0xb9b4-0xb9bc undefined */
5497
5498 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
5499 case 0xb9bf: /* TRTE - translate and test extended [partial] */
5500 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5501 return -1;
5502 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5503 return -1;
5504 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5505 return -1;
5506 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5507 return -1;
5508 break;
5509
5510 /* 0xb9c0-0xb9c7 undefined */
5511
5512 case 0xb9c8: /* AHHHR - add high */
5513 case 0xb9c9: /* SHHHR - subtract high */
5514 case 0xb9ca: /* ALHHHR - add logical high */
5515 case 0xb9cb: /* SLHHHR - subtract logical high */
5516 case 0xb9d8: /* AHHLR - add high */
5517 case 0xb9d9: /* SHHLR - subtract high */
5518 case 0xb9da: /* ALHHLR - add logical high */
5519 case 0xb9db: /* SLHHLR - subtract logical high */
5520 /* 32-bit high gpr destination + flags */
5521 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5522 return -1;
5523 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5524 return -1;
5525 break;
5526
5527 /* 0xb9cc undefined */
5528 /* 0xb9ce undefined */
5529 /* 0xb9d0-0xb9d7 undefined */
5530 /* 0xb9dc undefined */
5531 /* 0xb9de undefined */
5532
5533 case 0xb9e0: /* LOCFHR - load high on condition */
5534 /* 32-bit high gpr destination */
5535 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5536 return -1;
5537 break;
5538
5539 /* 0xb9e3 undefined */
5540 /* 0xb9e5 undefined */
5541 /* 0xb9ec-0xb9f1 undefined */
5542 /* 0xb9f3 undefined */
5543 /* 0xb9f5 undefined */
5544 /* 0xb9fc-0xb9ff undefined */
5545
5546 default:
5547 goto UNKNOWN_OP;
5548 }
5549 break;
5550
5551 /* 0xb4-0xb5 undefined */
5552 /* 0xb6 privileged: STCTL - store control */
5553 /* 0xb7 privileged: LCTL - load control */
5554 /* 0xb8 undefined */
5555
5556 case 0xba: /* CS - compare and swap */
5557 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5558 if (record_full_arch_list_add_mem (oaddr, 4))
5559 return -1;
5560 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5561 return -1;
5562 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5563 return -1;
5564 break;
5565
5566 case 0xbb: /* CDS - compare double and swap */
5567 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5568 if (record_full_arch_list_add_mem (oaddr, 8))
5569 return -1;
5570 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5571 return -1;
5572 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5573 return -1;
5574 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5575 return -1;
5576 break;
5577
5578 /* 0xbc undefined */
5579
5580 case 0xbe: /* STCM - store characters under mask */
5581 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5582 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5583 return -1;
5584 break;
5585
5586 case 0xc0:
5587 case 0xc2:
5588 case 0xc4:
5589 case 0xc6:
5590 case 0xcc:
5591 /* RIL-format instruction */
5592 switch (ibyte[0] << 4 | inib[3])
5593 {
5594 case 0xc00: /* LARL - load address relative long */
5595 case 0xc05: /* BRASL - branch relative and save long */
5596 case 0xc09: /* IILF - insert immediate */
5597 case 0xc21: /* MSFI - multiply single immediate */
5598 case 0xc42: /* LLHRL - load logical halfword relative long */
5599 case 0xc45: /* LHRL - load halfword relative long */
5600 case 0xc4d: /* LRL - load relative long */
5601 /* 32-bit or native gpr destination */
5602 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5603 return -1;
5604 break;
5605
5606 case 0xc01: /* LGFI - load immediate */
5607 case 0xc0e: /* LLIHF - load logical immediate */
5608 case 0xc0f: /* LLILF - load logical immediate */
5609 case 0xc20: /* MSGFI - multiply single immediate */
5610 case 0xc44: /* LGHRL - load halfword relative long */
5611 case 0xc46: /* LLGHRL - load logical halfword relative long */
5612 case 0xc48: /* LGRL - load relative long */
5613 case 0xc4c: /* LGFRL - load relative long */
5614 case 0xc4e: /* LLGFRL - load logical relative long */
5615 /* 64-bit gpr destination */
5616 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5617 return -1;
5618 break;
5619
5620 /* 0xc02-0xc03 undefined */
5621
5622 case 0xc04: /* BRCL - branch relative on condition long */
5623 case 0xc62: /* PFDRL - prefetch data relative long */
5624 break;
5625
5626 case 0xc06: /* XIHF - xor immediate */
5627 case 0xc0a: /* NIHF - and immediate */
5628 case 0xc0c: /* OIHF - or immediate */
5629 case 0xcc8: /* AIH - add immediate high */
5630 case 0xcca: /* ALSIH - add logical with signed immediate high */
5631 /* 32-bit high gpr destination + flags */
5632 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5633 return -1;
5634 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5635 return -1;
5636 break;
5637
5638 case 0xc07: /* XILF - xor immediate */
5639 case 0xc0b: /* NILF - and immediate */
5640 case 0xc0d: /* OILF - or immediate */
5641 case 0xc25: /* SLFI - subtract logical immediate */
5642 case 0xc29: /* AFI - add immediate */
5643 case 0xc2b: /* ALFI - add logical immediate */
5644 /* 32-bit gpr destination + flags */
5645 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5646 return -1;
5647 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5648 return -1;
5649 break;
5650
5651 case 0xc08: /* IIHF - insert immediate */
5652 case 0xcc6: /* BRCTH - branch relative on count high */
5653 case 0xccb: /* ALSIHN - add logical with signed immediate high */
5654 /* 32-bit high gpr destination */
5655 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5656 return -1;
5657 break;
5658
5659 /* 0xc22-0xc23 undefined */
5660
5661 case 0xc24: /* SLGFI - subtract logical immediate */
5662 case 0xc28: /* AGFI - add immediate */
5663 case 0xc2a: /* ALGFI - add logical immediate */
5664 /* 64-bit gpr destination + flags */
5665 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5666 return -1;
5667 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5668 return -1;
5669 break;
5670
5671 /* 0xc26-0xc27 undefined */
5672
5673 case 0xc2c: /* CGFI - compare immediate */
5674 case 0xc2d: /* CFI - compare immediate */
5675 case 0xc2e: /* CLGFI - compare logical immediate */
5676 case 0xc2f: /* CLFI - compare logical immediate */
5677 case 0xc64: /* CGHRL - compare halfword relative long */
5678 case 0xc65: /* CHRL - compare halfword relative long */
5679 case 0xc66: /* CLGHRL - compare logical halfword relative long */
5680 case 0xc67: /* CLHRL - compare logical halfword relative long */
5681 case 0xc68: /* CGRL - compare relative long */
5682 case 0xc6a: /* CLGRL - compare logical relative long */
5683 case 0xc6c: /* CGFRL - compare relative long */
5684 case 0xc6d: /* CRL - compare relative long */
5685 case 0xc6e: /* CLGFRL - compare logical relative long */
5686 case 0xc6f: /* CLRL - compare logical relative long */
5687 case 0xccd: /* CIH - compare immediate high */
5688 case 0xccf: /* CLIH - compare logical immediate high */
5689 /* flags only */
5690 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5691 return -1;
5692 break;
5693
5694 /* 0xc40-0xc41 undefined */
5695 /* 0xc43 undefined */
5696
5697 case 0xc47: /* STHRL - store halfword relative long */
5698 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5699 if (record_full_arch_list_add_mem (oaddr, 2))
5700 return -1;
5701 break;
5702
5703 /* 0xc49-0xc4a undefined */
5704
5705 case 0xc4b: /* STGRL - store relative long */
5706 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5707 if (record_full_arch_list_add_mem (oaddr, 8))
5708 return -1;
5709 break;
5710
5711 case 0xc4f: /* STRL - store relative long */
5712 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5713 if (record_full_arch_list_add_mem (oaddr, 4))
5714 return -1;
5715 break;
5716
5717 case 0xc60: /* EXRL - execute relative long */
5718 if (ex != -1)
5719 {
5720 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
5721 paddress (gdbarch, addr));
5722 return -1;
5723 }
5724 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5725 if (inib[2])
5726 {
5727 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5728 ex = tmp & 0xff;
5729 }
5730 else
5731 {
5732 ex = 0;
5733 }
5734 goto ex;
5735
5736 /* 0xc61 undefined */
5737 /* 0xc63 undefined */
5738 /* 0xc69 undefined */
5739 /* 0xc6b undefined */
5740 /* 0xcc0-0xcc5 undefined */
5741 /* 0xcc7 undefined */
5742 /* 0xcc9 undefined */
5743 /* 0xccc undefined */
5744 /* 0xcce undefined */
5745
5746 default:
5747 goto UNKNOWN_OP;
5748 }
5749 break;
5750
5751 /* 0xc1 undefined */
5752 /* 0xc3 undefined */
5753
5754 case 0xc5: /* BPRP - branch prediction relative preload */
5755 case 0xc7: /* BPP - branch prediction preload */
5756 /* no visible effect */
5757 break;
5758
5759 case 0xc8:
5760 /* SSF-format instruction */
5761 switch (ibyte[0] << 4 | inib[3])
5762 {
5763 /* 0xc80 unsupported */
5764
5765 case 0xc81: /* ECTG - extract cpu time */
5766 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5767 return -1;
5768 if (s390_record_gpr_g (gdbarch, regcache, 0))
5769 return -1;
5770 if (s390_record_gpr_g (gdbarch, regcache, 1))
5771 return -1;
5772 break;
5773
5774 case 0xc82: /* CSST - compare and swap and store */
5775 {
5776 uint8_t fc, sc;
5777 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5778 fc = tmp & 0xff;
5779 sc = tmp >> 8 & 0xff;
5780
5781 /* First and third operands. */
5782 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5783 switch (fc)
5784 {
5785 case 0x00: /* 32-bit */
5786 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5787 return -1;
5788 if (record_full_arch_list_add_mem (oaddr, 4))
5789 return -1;
5790 break;
5791
5792 case 0x01: /* 64-bit */
5793 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5794 return -1;
5795 if (record_full_arch_list_add_mem (oaddr, 8))
5796 return -1;
5797 break;
5798
5799 case 0x02: /* 128-bit */
5800 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5801 return -1;
5802 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5803 return -1;
5804 if (record_full_arch_list_add_mem (oaddr, 16))
5805 return -1;
5806 break;
5807
5808 default:
5809 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5810 fc, paddress (gdbarch, addr));
5811 return -1;
5812 }
5813
5814 /* Second operand. */
5815 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5816 if (sc > 4)
5817 {
5818 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5819 sc, paddress (gdbarch, addr));
5820 return -1;
5821 }
5822
5823 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5824 return -1;
5825
5826 /* Flags. */
5827 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5828 return -1;
5829 }
5830 break;
5831
5832 /* 0xc83 undefined */
5833
5834 case 0xc84: /* LPD - load pair disjoint */
5835 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5836 return -1;
5837 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5838 return -1;
5839 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5840 return -1;
5841 break;
5842
5843 case 0xc85: /* LPDG - load pair disjoint */
5844 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5845 return -1;
5846 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5847 return -1;
5848 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5849 return -1;
5850 break;
5851
5852 /* 0xc86-0xc8f undefined */
5853
5854 default:
5855 goto UNKNOWN_OP;
5856 }
5857 break;
5858
5859 /* 0xc9-0xcb undefined */
5860 /* 0xcd-0xcf undefined */
5861
5862 case 0xd0: /* TRTR - translate and test reversed */
5863 case 0xdd: /* TRT - translate and test */
5864 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5865 return -1;
5866 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5867 return -1;
5868 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5869 return -1;
5870 break;
5871
5872 case 0xd1: /* MVN - move numbers */
5873 case 0xd2: /* MVC - move */
5874 case 0xd3: /* MVZ - move zones */
5875 case 0xdc: /* TR - translate */
5876 case 0xe8: /* MVCIN - move inverse */
5877 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5878 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5879 return -1;
5880 break;
5881
5882 case 0xd4: /* NC - and */
5883 case 0xd6: /* OC - or*/
5884 case 0xd7: /* XC - xor */
5885 case 0xe2: /* UNPKU - unpack unicode */
5886 case 0xea: /* UNPKA - unpack ASCII */
5887 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5888 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5889 return -1;
5890 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5891 return -1;
5892 break;
5893
5894 case 0xde: /* ED - edit */
5895 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5896 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5897 return -1;
5898 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5899 return -1;
5900 /* DXC may be written */
5901 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5902 return -1;
5903 break;
5904
5905 case 0xdf: /* EDMK - edit and mark */
5906 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5907 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5908 return -1;
5909 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5910 return -1;
5911 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5912 return -1;
5913 /* DXC may be written */
5914 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5915 return -1;
5916 break;
5917
5918 /* 0xd8 undefined */
5919 /* 0xd9 unsupported: MVCK - move with key */
5920 /* 0xda unsupported: MVCP - move to primary */
5921 /* 0xdb unsupported: MVCS - move to secondary */
5922 /* 0xe0 undefined */
5923
5924 case 0xe1: /* PKU - pack unicode */
5925 case 0xe9: /* PKA - pack ASCII */
5926 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5927 if (record_full_arch_list_add_mem (oaddr, 16))
5928 return -1;
5929 break;
5930
5931 case 0xe3:
5932 case 0xe7:
5933 case 0xeb:
5934 case 0xed:
5935 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5936 switch (ibyte[0] << 8 | ibyte[5])
5937 {
5938 /* 0xe300-0xe301 undefined */
5939
5940 case 0xe302: /* LTG - load and test */
5941 case 0xe308: /* AG - add */
5942 case 0xe309: /* SG - subtract */
5943 case 0xe30a: /* ALG - add logical */
5944 case 0xe30b: /* SLG - subtract logical */
5945 case 0xe318: /* AGF - add */
5946 case 0xe319: /* SGF - subtract */
5947 case 0xe31a: /* ALGF - add logical */
5948 case 0xe31b: /* SLGF - subtract logical */
5949 case 0xe332: /* LTGF - load and test */
5950 case 0xe380: /* NG - and */
5951 case 0xe381: /* OG - or */
5952 case 0xe382: /* XG - xor */
5953 case 0xe388: /* ALCG - add logical with carry */
5954 case 0xe389: /* SLBG - subtract logical with borrow */
5955 case 0xeb0a: /* SRAG - shift right single */
5956 case 0xeb0b: /* SLAG - shift left single */
5957 /* 64-bit gpr destination + flags */
5958 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5959 return -1;
5960 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5961 return -1;
5962 break;
5963
5964 /* 0xe303 privileged */
5965
5966 case 0xe304: /* LG - load */
5967 case 0xe30c: /* MSG - multiply single */
5968 case 0xe30f: /* LRVG - load reversed */
5969 case 0xe314: /* LGF - load */
5970 case 0xe315: /* LGH - load halfword */
5971 case 0xe316: /* LLGF - load logical */
5972 case 0xe317: /* LLGT - load logical thirty one bits */
5973 case 0xe31c: /* MSGF - multiply single */
5974 case 0xe32a: /* LZRG - load and zero rightmost byte */
5975 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5976 case 0xe346: /* BCTG - branch on count */
5977 case 0xe377: /* LGB - load byte */
5978 case 0xe390: /* LLGC - load logical character */
5979 case 0xe391: /* LLGH - load logical halfword */
5980 case 0xeb0c: /* SRLG - shift right single logical */
5981 case 0xeb0d: /* SLLG - shift left single logical */
5982 case 0xeb1c: /* RLLG - rotate left single logical */
5983 case 0xeb44: /* BXHG - branch on index high */
5984 case 0xeb45: /* BXLEG - branch on index low or equal */
5985 case 0xeb4c: /* ECAG - extract cpu attribute */
5986 case 0xebe2: /* LOCG - load on condition */
5987 /* 64-bit gpr destination */
5988 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5989 return -1;
5990 break;
5991
5992 /* 0xe305 undefined */
5993
5994 case 0xe306: /* CVBY - convert to binary */
5995 /* 32-bit or native gpr destination + FPC (DXC write) */
5996 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5997 return -1;
5998 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5999 return -1;
6000 break;
6001
6002 /* 0xe307 undefined */
6003
6004 case 0xe30d: /* DSG - divide single */
6005 case 0xe31d: /* DSGF - divide single */
6006 case 0xe386: /* MLG - multiply logical */
6007 case 0xe387: /* DLG - divide logical */
6008 case 0xe38f: /* LPQ - load pair from quadword */
6009 /* 64-bit gpr pair destination */
6010 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6011 return -1;
6012 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6013 return -1;
6014 break;
6015
6016 case 0xe30e: /* CVBG - convert to binary */
6017 /* 64-bit gpr destination + FPC (DXC write) */
6018 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6019 return -1;
6020 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6021 return -1;
6022 break;
6023
6024 /* 0xe310-0xe311 undefined */
6025
6026 case 0xe312: /* LT - load and test */
6027 case 0xe354: /* NY - and */
6028 case 0xe356: /* OY - or */
6029 case 0xe357: /* XY - xor */
6030 case 0xe35a: /* AY - add */
6031 case 0xe35b: /* SY - subtract */
6032 case 0xe35e: /* ALY - add logical */
6033 case 0xe35f: /* SLY - subtract logical */
6034 case 0xe37a: /* AHY - add halfword */
6035 case 0xe37b: /* SHY - subtract halfword */
6036 case 0xe398: /* ALC - add logical with carry */
6037 case 0xe399: /* SLB - subtract logical with borrow */
6038 case 0xe727: /* LCBB - load count to block bounduary */
6039 case 0xeb81: /* ICMY - insert characters under mask */
6040 case 0xebdc: /* SRAK - shift left single */
6041 case 0xebdd: /* SLAK - shift left single */
6042 /* 32-bit gpr destination + flags */
6043 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6044 return -1;
6045 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6046 return -1;
6047 break;
6048
6049 /* 0xe313 privileged */
6050
6051 case 0xe31e: /* LRV - load reversed */
6052 case 0xe31f: /* LRVH - load reversed */
6053 case 0xe33b: /* LZRF - load and zero rightmost byte */
6054 case 0xe351: /* MSY - multiply single */
6055 case 0xe358: /* LY - load */
6056 case 0xe371: /* LAY - load address */
6057 case 0xe373: /* ICY - insert character */
6058 case 0xe376: /* LB - load byte */
6059 case 0xe378: /* LHY - load */
6060 case 0xe37c: /* MHY - multiply halfword */
6061 case 0xe394: /* LLC - load logical character */
6062 case 0xe395: /* LLH - load logical halfword */
6063 case 0xeb1d: /* RLL - rotate left single logical */
6064 case 0xebde: /* SRLK - shift left single logical */
6065 case 0xebdf: /* SLLK - shift left single logical */
6066 case 0xebf2: /* LOC - load on condition */
6067 /* 32-bit or native gpr destination */
6068 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6069 return -1;
6070 break;
6071
6072 case 0xe320: /* CG - compare */
6073 case 0xe321: /* CLG - compare logical */
6074 case 0xe330: /* CGF - compare */
6075 case 0xe331: /* CLGF - compare logical */
6076 case 0xe334: /* CGH - compare halfword */
6077 case 0xe355: /* CLY - compare logical */
6078 case 0xe359: /* CY - compare */
6079 case 0xe379: /* CHY - compare halfword */
6080 case 0xe3cd: /* CHF - compare high */
6081 case 0xe3cf: /* CLHF - compare logical high */
6082 case 0xeb20: /* CLMH - compare logical under mask high */
6083 case 0xeb21: /* CLMY - compare logical under mask */
6084 case 0xeb51: /* TMY - test under mask */
6085 case 0xeb55: /* CLIY - compare logical */
6086 case 0xebc0: /* TP - test decimal */
6087 case 0xed10: /* TCEB - test data class */
6088 case 0xed11: /* TCDB - test data class */
6089 case 0xed12: /* TCXB - test data class */
6090 case 0xed50: /* TDCET - test data class */
6091 case 0xed51: /* TDGET - test data group */
6092 case 0xed54: /* TDCDT - test data class */
6093 case 0xed55: /* TDGDT - test data group */
6094 case 0xed58: /* TDCXT - test data class */
6095 case 0xed59: /* TDGXT - test data group */
6096 /* flags only */
6097 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6098 return -1;
6099 break;
6100
6101 /* 0xe322-0xe323 undefined */
6102
6103 case 0xe324: /* STG - store */
6104 case 0xe325: /* NTSTG - nontransactional store */
6105 case 0xe326: /* CVDY - convert to decimal */
6106 case 0xe32f: /* STRVG - store reversed */
6107 case 0xebe3: /* STOCG - store on condition */
6108 case 0xed67: /* STDY - store */
6109 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6110 if (record_full_arch_list_add_mem (oaddr, 8))
6111 return -1;
6112 break;
6113
6114 /* 0xe327-0xe329 undefined */
6115 /* 0xe32b-0xe32d undefined */
6116
6117 case 0xe32e: /* CVDG - convert to decimal */
6118 case 0xe38e: /* STPQ - store pair to quadword */
6119 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6120 if (record_full_arch_list_add_mem (oaddr, 16))
6121 return -1;
6122 break;
6123
6124 /* 0xe333 undefined */
6125 /* 0xe335 undefined */
6126
6127 case 0xe336: /* PFD - prefetch data */
6128 break;
6129
6130 /* 0xe337-0xe339 undefined */
6131 /* 0xe33c-0xe33d undefined */
6132
6133 case 0xe33e: /* STRV - store reversed */
6134 case 0xe350: /* STY - store */
6135 case 0xe3cb: /* STFH - store high */
6136 case 0xebe1: /* STOCFH - store high on condition */
6137 case 0xebf3: /* STOC - store on condition */
6138 case 0xed66: /* STEY - store */
6139 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6140 if (record_full_arch_list_add_mem (oaddr, 4))
6141 return -1;
6142 break;
6143
6144 case 0xe33f: /* STRVH - store reversed */
6145 case 0xe370: /* STHY - store halfword */
6146 case 0xe3c7: /* STHH - store halfword high */
6147 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6148 if (record_full_arch_list_add_mem (oaddr, 2))
6149 return -1;
6150 break;
6151
6152 /* 0xe340-0xe345 undefined */
6153 /* 0xe347-0xe34f undefined */
6154 /* 0xe352-0xe353 undefined */
6155
6156 case 0xe35c: /* MFY - multiply */
6157 case 0xe396: /* ML - multiply logical */
6158 case 0xe397: /* DL - divide logical */
6159 /* 32-bit gpr pair destination */
6160 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6161 return -1;
6162 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6163 return -1;
6164 break;
6165
6166 /* 0xe35d undefined */
6167 /* 0xe360-0xe36f undefined */
6168
6169 case 0xe372: /* STCY - store character */
6170 case 0xe3c3: /* STCH - store character high */
6171 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6172 if (record_full_arch_list_add_mem (oaddr, 1))
6173 return -1;
6174 break;
6175
6176 /* 0xe374 undefined */
6177
6178 case 0xe375: /* LAEY - load address extended */
6179 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6180 return -1;
6181 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
6182 return -1;
6183 break;
6184
6185 /* 0xe37d-0xe37f undefined */
6186 /* 0xe383-0xe384 undefined */
6187
6188 case 0xe385: /* LGAT - load and trap */
6189 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
6190 case 0xe39d: /* LLGFAT - load logical and trap */
6191 case 0xe721: /* VLGV - vector load gr from vr element */
6192 /* 64-bit gpr destination + fpc for possible DXC write */
6193 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6194 return -1;
6195 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6196 return -1;
6197 break;
6198
6199 /* 0xe38a-0xe38d undefined */
6200 /* 0xe392-0xe393 undefined */
6201 /* 0xe39a-0xe39b undefined */
6202 /* 0xe39e undefined */
6203
6204 case 0xe39f: /* LAT - load and trap */
6205 /* 32-bit gpr destination + fpc for possible DXC write */
6206 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6207 return -1;
6208 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6209 return -1;
6210 break;
6211
6212 /* 0xe3a0-0xe3bf undefined */
6213
6214 case 0xe3c0: /* LBH - load byte high */
6215 case 0xe3c2: /* LLCH - load logical character high */
6216 case 0xe3c4: /* LHH - load halfword high */
6217 case 0xe3c6: /* LLHH - load logical halfword high */
6218 case 0xe3ca: /* LFH - load high */
6219 case 0xebe0: /* LOCFH - load high on condition */
6220 /* 32-bit high gpr destination */
6221 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6222 return -1;
6223 break;
6224
6225 /* 0xe3c1 undefined */
6226 /* 0xe3c5 undefined */
6227
6228 case 0xe3c8: /* LFHAT - load high and trap */
6229 /* 32-bit high gpr destination + fpc for possible DXC write */
6230 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6231 return -1;
6232 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6233 return -1;
6234 break;
6235
6236 /* 0xe3c9 undefined */
6237 /* 0xe3cc undefined */
6238 /* 0xe3ce undefined */
6239 /* 0xe3d0-0xe3ff undefined */
6240
6241 case 0xe700: /* VLEB - vector load element */
6242 case 0xe701: /* VLEH - vector load element */
6243 case 0xe702: /* VLEG - vector load element */
6244 case 0xe703: /* VLEF - vector load element */
6245 case 0xe704: /* VLLEZ - vector load logical element and zero */
6246 case 0xe705: /* VLREP - vector load and replicate */
6247 case 0xe706: /* VL - vector load */
6248 case 0xe707: /* VLBB - vector load to block bounduary */
6249 case 0xe712: /* VGEG - vector gather element */
6250 case 0xe713: /* VGEF - vector gather element */
6251 case 0xe722: /* VLVG - vector load vr element from gr */
6252 case 0xe730: /* VESL - vector element shift left */
6253 case 0xe733: /* VERLL - vector element rotate left logical */
6254 case 0xe737: /* VLL - vector load with length */
6255 case 0xe738: /* VESRL - vector element shift right logical */
6256 case 0xe73a: /* VESRA - vector element shift right arithmetic */
6257 case 0xe740: /* VLEIB - vector load element immediate */
6258 case 0xe741: /* VLEIH - vector load element immediate */
6259 case 0xe742: /* VLEIG - vector load element immediate */
6260 case 0xe743: /* VLEIF - vector load element immediate */
6261 case 0xe744: /* VGBM - vector generate byte mask */
6262 case 0xe745: /* VREPI - vector replicate immediate */
6263 case 0xe746: /* VGM - vector generate mask */
6264 case 0xe74d: /* VREP - vector replicate */
6265 case 0xe750: /* VPOPCT - vector population count */
6266 case 0xe752: /* VCTZ - vector count trailing zeros */
6267 case 0xe753: /* VCLZ - vector count leading zeros */
6268 case 0xe756: /* VLR - vector load */
6269 case 0xe75f: /* VSEG -vector sign extend to doubleword */
6270 case 0xe760: /* VMRL - vector merge low */
6271 case 0xe761: /* VMRH - vector merge high */
6272 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
6273 case 0xe764: /* VSUM - vector sum across word */
6274 case 0xe765: /* VSUMG - vector sum across doubleword */
6275 case 0xe766: /* VCKSM - vector checksum */
6276 case 0xe767: /* VSUMQ - vector sum across quadword */
6277 case 0xe768: /* VN - vector and */
6278 case 0xe769: /* VNC - vector and with complement */
6279 case 0xe76a: /* VO - vector or */
6280 case 0xe76b: /* VNO - vector nor */
6281 case 0xe76d: /* VX - vector xor */
6282 case 0xe770: /* VESLV - vector element shift left */
6283 case 0xe772: /* VERIM - vector element rotate and insert under mask */
6284 case 0xe773: /* VERLLV - vector element rotate left logical */
6285 case 0xe774: /* VSL - vector shift left */
6286 case 0xe775: /* VSLB - vector shift left by byte */
6287 case 0xe777: /* VSLDB - vector shift left double by byte */
6288 case 0xe778: /* VESRLV - vector element shift right logical */
6289 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
6290 case 0xe77c: /* VSRL - vector shift right logical */
6291 case 0xe77d: /* VSRLB - vector shift right logical by byte */
6292 case 0xe77e: /* VSRA - vector shift right arithmetic */
6293 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
6294 case 0xe784: /* VPDI - vector permute doubleword immediate */
6295 case 0xe78c: /* VPERM - vector permute */
6296 case 0xe78d: /* VSEL - vector select */
6297 case 0xe78e: /* VFMS - vector fp multiply and subtract */
6298 case 0xe78f: /* VFMA - vector fp multiply and add */
6299 case 0xe794: /* VPK - vector pack */
6300 case 0xe7a1: /* VMLH - vector multiply logical high */
6301 case 0xe7a2: /* VML - vector multiply low */
6302 case 0xe7a3: /* VMH - vector multiply high */
6303 case 0xe7a4: /* VMLE - vector multiply logical even */
6304 case 0xe7a5: /* VMLO - vector multiply logical odd */
6305 case 0xe7a6: /* VME - vector multiply even */
6306 case 0xe7a7: /* VMO - vector multiply odd */
6307 case 0xe7a9: /* VMALH - vector multiply and add logical high */
6308 case 0xe7aa: /* VMAL - vector multiply and add low */
6309 case 0xe7ab: /* VMAH - vector multiply and add high */
6310 case 0xe7ac: /* VMALE - vector multiply and add logical even */
6311 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
6312 case 0xe7ae: /* VMAE - vector multiply and add even */
6313 case 0xe7af: /* VMAO - vector multiply and add odd */
6314 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
6315 case 0xe7b9: /* VACCC - vector add with carry compute carry */
6316 case 0xe7bb: /* VAC - vector add with carry */
6317 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
6318 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
6319 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
6320 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
6321 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
6322 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
6323 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
6324 case 0xe7c4: /* VLDE - vector fp load lengthened */
6325 case 0xe7c5: /* VLED - vector fp load rounded */
6326 case 0xe7c7: /* VFI - vector load fp integer */
6327 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
6328 case 0xe7ce: /* VFSQ - vector fp square root */
6329 case 0xe7d4: /* VUPLL - vector unpack logical low */
6330 case 0xe7d6: /* VUPL - vector unpack low */
6331 case 0xe7d5: /* VUPLH - vector unpack logical high */
6332 case 0xe7d7: /* VUPH - vector unpack high */
6333 case 0xe7de: /* VLC - vector load complement */
6334 case 0xe7df: /* VLP - vector load positive */
6335 case 0xe7e2: /* VFA - vector fp subtract */
6336 case 0xe7e3: /* VFA - vector fp add */
6337 case 0xe7e5: /* VFD - vector fp divide */
6338 case 0xe7e7: /* VFM - vector fp multiply */
6339 case 0xe7f0: /* VAVGL - vector average logical */
6340 case 0xe7f1: /* VACC - vector add and compute carry */
6341 case 0xe7f2: /* VAVG - vector average */
6342 case 0xe7f3: /* VA - vector add */
6343 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
6344 case 0xe7f7: /* VS - vector subtract */
6345 case 0xe7fc: /* VMNL - vector minimum logical */
6346 case 0xe7fd: /* VMXL - vector maximum logical */
6347 case 0xe7fe: /* VMN - vector minimum */
6348 case 0xe7ff: /* VMX - vector maximum */
6349 /* vector destination + FPC */
6350 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6351 return -1;
6352 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6353 return -1;
6354 break;
6355
6356 case 0xe708: /* VSTEB - vector store element */
6357 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6358 if (record_full_arch_list_add_mem (oaddr, 1))
6359 return -1;
6360 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6361 return -1;
6362 break;
6363
6364 case 0xe709: /* VSTEH - vector store element */
6365 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6366 if (record_full_arch_list_add_mem (oaddr, 2))
6367 return -1;
6368 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6369 return -1;
6370 break;
6371
6372 case 0xe70a: /* VSTEG - vector store element */
6373 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6374 if (record_full_arch_list_add_mem (oaddr, 8))
6375 return -1;
6376 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6377 return -1;
6378 break;
6379
6380 case 0xe70b: /* VSTEF - vector store element */
6381 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6382 if (record_full_arch_list_add_mem (oaddr, 4))
6383 return -1;
6384 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6385 return -1;
6386 break;
6387
6388 /* 0xe70c-0xe70d undefined */
6389
6390 case 0xe70e: /* VST - vector store */
6391 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6392 if (record_full_arch_list_add_mem (oaddr, 16))
6393 return -1;
6394 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6395 return -1;
6396 break;
6397
6398 /* 0xe70f-0xe711 undefined */
6399 /* 0xe714-0xe719 undefined */
6400
6401 case 0xe71a: /* VSCEG - vector scatter element */
6402 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
6403 return -1;
6404 if (record_full_arch_list_add_mem (oaddr, 8))
6405 return -1;
6406 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6407 return -1;
6408 break;
6409
6410 case 0xe71b: /* VSCEF - vector scatter element */
6411 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
6412 return -1;
6413 if (record_full_arch_list_add_mem (oaddr, 4))
6414 return -1;
6415 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6416 return -1;
6417 break;
6418
6419 /* 0xe71c-0xe720 undefined */
6420 /* 0xe723-0xe726 undefined */
6421 /* 0xe728-0xe72f undefined */
6422 /* 0xe731-0xe732 undefined */
6423 /* 0xe734-0xe735 undefined */
6424
6425 case 0xe736: /* VLM - vector load multiple */
6426 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
6427 if (s390_record_vr (gdbarch, regcache, i))
6428 return -1;
6429 if (s390_record_vr (gdbarch, regcache, ivec[1]))
6430 return -1;
6431 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6432 return -1;
6433 break;
6434
6435 /* 0xe739 undefined */
6436 /* 0xe73b-0xe73d undefined */
6437
6438 case 0xe73e: /* VSTM - vector store multiple */
6439 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6440 if (ivec[0] <= ivec[1])
6441 n = ivec[1] - ivec[0] + 1;
6442 else
6443 n = ivec[1] + 0x20 - ivec[0] + 1;
6444 if (record_full_arch_list_add_mem (oaddr, n * 16))
6445 return -1;
6446 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6447 return -1;
6448 break;
6449
6450 case 0xe73f: /* VSTL - vector store with length */
6451 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6452 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
6453 tmp &= 0xffffffffu;
6454 if (tmp > 16)
6455 tmp = 16;
6456 if (record_full_arch_list_add_mem (oaddr, tmp))
6457 return -1;
6458 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6459 return -1;
6460 break;
6461
6462 /* 0xe747-0xe749 undefined */
6463
6464 case 0xe74a: /* VFTCI - vector fp test data class immediate */
6465 case 0xe75c: /* VISTR - vector isolate string */
6466 case 0xe780: /* VFEE - vector find element equal */
6467 case 0xe781: /* VFENE - vector find element not equal */
6468 case 0xe782: /* VFA - vector find any element equal */
6469 case 0xe78a: /* VSTRC - vector string range compare */
6470 case 0xe795: /* VPKLS - vector pack logical saturate */
6471 case 0xe797: /* VPKS - vector pack saturate */
6472 case 0xe7e8: /* VFCE - vector fp compare equal */
6473 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
6474 case 0xe7eb: /* VFCE - vector fp compare high */
6475 case 0xe7f8: /* VCEQ - vector compare equal */
6476 case 0xe7f9: /* VCHL - vector compare high logical */
6477 case 0xe7fb: /* VCH - vector compare high */
6478 /* vector destination + flags + FPC */
6479 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6480 return -1;
6481 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6482 return -1;
6483 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6484 return -1;
6485 break;
6486
6487 /* 0xe74b-0xe74c undefined */
6488 /* 0xe74e-0xe74f undefined */
6489 /* 0xe751 undefined */
6490 /* 0xe754-0xe755 undefined */
6491 /* 0xe757-0xe75b undefined */
6492 /* 0xe75d-0xe75e undefined */
6493 /* 0xe763 undefined */
6494 /* 0xe76c undefined */
6495 /* 0xe76e-0xe76f undefined */
6496 /* 0xe771 undefined */
6497 /* 0xe776 undefined */
6498 /* 0xe779 undefined */
6499 /* 0xe77b undefined */
6500 /* 0xe783 undefined */
6501 /* 0xe785-0xe789 undefined */
6502 /* 0xe78b undefined */
6503 /* 0xe790-0xe793 undefined */
6504 /* 0xe796 undefined */
6505 /* 0xe798-0xe7a0 undefined */
6506 /* 0xe7a8 undefined */
6507 /* 0xe7b0-0xe7b3 undefined */
6508 /* 0xe7b5-0xe7b8 undefined */
6509 /* 0xe7ba undefined */
6510 /* 0xe7be undefined */
6511 /* 0xe7c6 undefined */
6512 /* 0xe7c8-0xe7c9 undefined */
6513
6514 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
6515 case 0xe7cb: /* WFC - vector fp compare scalar */
6516 case 0xe7d8: /* VTM - vector test under mask */
6517 case 0xe7d9: /* VECL - vector element compare logical */
6518 case 0xe7db: /* VEC - vector element compare */
6519 case 0xed08: /* KEB - compare and signal */
6520 case 0xed09: /* CEB - compare */
6521 case 0xed18: /* KDB - compare and signal */
6522 case 0xed19: /* CDB - compare */
6523 /* flags + fpc only */
6524 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6525 return -1;
6526 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6527 return -1;
6528 break;
6529
6530 /* 0xe7cd undefined */
6531 /* 0xe7cf-0xe7d3 undefined */
6532 /* 0xe7da undefined */
6533 /* 0xe7dc-0xe7dd undefined */
6534 /* 0xe7e0-0xe7e1 undefined */
6535 /* 0xe7e4 undefined */
6536 /* 0xe7e6 undefined */
6537 /* 0xe7e9 undefined */
6538 /* 0xe7ec-0xe7ef undefined */
6539 /* 0xe7f4 undefined */
6540 /* 0xe7f6 undefined */
6541 /* 0xe7fa undefined */
6542
6543 /* 0xeb00-0xeb03 undefined */
6544
6545 case 0xeb04: /* LMG - load multiple */
6546 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6547 if (s390_record_gpr_g (gdbarch, regcache, i))
6548 return -1;
6549 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6550 return -1;
6551 break;
6552
6553 /* 0xeb05-0xeb09 undefined */
6554 /* 0xeb0e undefined */
6555 /* 0xeb0f privileged: TRACG */
6556 /* 0xeb10-0xeb13 undefined */
6557
6558 case 0xeb14: /* CSY - compare and swap */
6559 case 0xebf4: /* LAN - load and and */
6560 case 0xebf6: /* LAO - load and or */
6561 case 0xebf7: /* LAX - load and xor */
6562 case 0xebf8: /* LAA - load and add */
6563 case 0xebfa: /* LAAL - load and add logical */
6564 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6565 if (record_full_arch_list_add_mem (oaddr, 4))
6566 return -1;
6567 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6568 return -1;
6569 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6570 return -1;
6571 break;
6572
6573 /* 0xeb15-0xeb1b undefined */
6574 /* 0xeb1e-0xeb1f undefined */
6575 /* 0xeb22 undefined */
6576
6577 case 0xeb23: /* CLT - compare logical and trap */
6578 case 0xeb2b: /* CLGT - compare logical and trap */
6579 /* fpc only - including possible DXC write for trapping insns */
6580 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6581 return -1;
6582 break;
6583
6584 case 0xeb24: /* STMG - store multiple */
6585 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6586 if (inib[2] <= inib[3])
6587 n = inib[3] - inib[2] + 1;
6588 else
6589 n = inib[3] + 0x10 - inib[2] + 1;
6590 if (record_full_arch_list_add_mem (oaddr, n * 8))
6591 return -1;
6592 break;
6593
6594 /* 0xeb25 privileged */
6595
6596 case 0xeb26: /* STMH - store multiple high */
6597 case 0xeb90: /* STMY - store multiple */
6598 case 0xeb9b: /* STAMY - store access multiple */
6599 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6600 if (inib[2] <= inib[3])
6601 n = inib[3] - inib[2] + 1;
6602 else
6603 n = inib[3] + 0x10 - inib[2] + 1;
6604 if (record_full_arch_list_add_mem (oaddr, n * 4))
6605 return -1;
6606 break;
6607
6608 /* 0xeb27-0xeb2a undefined */
6609
6610 case 0xeb2c: /* STCMH - store characters under mask */
6611 case 0xeb2d: /* STCMY - store characters under mask */
6612 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6613 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
6614 return -1;
6615 break;
6616
6617 /* 0xeb2e undefined */
6618 /* 0xeb2f privileged */
6619
6620 case 0xeb30: /* CSG - compare and swap */
6621 case 0xebe4: /* LANG - load and and */
6622 case 0xebe6: /* LAOG - load and or */
6623 case 0xebe7: /* LAXG - load and xor */
6624 case 0xebe8: /* LAAG - load and add */
6625 case 0xebea: /* LAALG - load and add logical */
6626 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6627 if (record_full_arch_list_add_mem (oaddr, 8))
6628 return -1;
6629 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6630 return -1;
6631 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6632 return -1;
6633 break;
6634
6635 case 0xeb31: /* CDSY - compare double and swap */
6636 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6637 if (record_full_arch_list_add_mem (oaddr, 8))
6638 return -1;
6639 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6640 return -1;
6641 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6642 return -1;
6643 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6644 return -1;
6645 break;
6646
6647 /* 0xeb32-0xeb3d undefined */
6648
6649 case 0xeb3e: /* CDSG - compare double and swap */
6650 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6651 if (record_full_arch_list_add_mem (oaddr, 16))
6652 return -1;
6653 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6654 return -1;
6655 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6656 return -1;
6657 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6658 return -1;
6659 break;
6660
6661 /* 0xeb3f-0xeb43 undefined */
6662 /* 0xeb46-0xeb4b undefined */
6663 /* 0xeb4d-0xeb50 undefined */
6664
6665 case 0xeb52: /* MVIY - move */
6666 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6667 if (record_full_arch_list_add_mem (oaddr, 1))
6668 return -1;
6669 break;
6670
6671 case 0xeb54: /* NIY - and */
6672 case 0xeb56: /* OIY - or */
6673 case 0xeb57: /* XIY - xor */
6674 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6675 if (record_full_arch_list_add_mem (oaddr, 1))
6676 return -1;
6677 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6678 return -1;
6679 break;
6680
6681 /* 0xeb53 undefined */
6682 /* 0xeb58-0xeb69 undefined */
6683
6684 case 0xeb6a: /* ASI - add immediate */
6685 case 0xeb6e: /* ALSI - add immediate */
6686 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6687 if (record_full_arch_list_add_mem (oaddr, 4))
6688 return -1;
6689 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6690 return -1;
6691 break;
6692
6693 /* 0xeb6b-0xeb6d undefined */
6694 /* 0xeb6f-0xeb79 undefined */
6695
6696 case 0xeb7a: /* AGSI - add immediate */
6697 case 0xeb7e: /* ALGSI - add immediate */
6698 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6699 if (record_full_arch_list_add_mem (oaddr, 8))
6700 return -1;
6701 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6702 return -1;
6703 break;
6704
6705 /* 0xeb7b-0xeb7d undefined */
6706 /* 0xeb7f undefined */
6707
6708 case 0xeb80: /* ICMH - insert characters under mask */
6709 /* 32-bit high gpr destination + flags */
6710 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6711 return -1;
6712 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6713 return -1;
6714 break;
6715
6716 /* 0xeb82-0xeb8d undefined */
6717
6718 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6719 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6720 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6721 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6722 if (record_full_arch_list_add_mem (oaddr, tmp))
6723 return -1;
6724 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6725 return -1;
6726 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6727 return -1;
6728 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6729 return -1;
6730 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6731 return -1;
6732 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6733 return -1;
6734 break;
6735
6736 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6737 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6738 return -1;
6739 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6740 return -1;
6741 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6742 return -1;
6743 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6744 return -1;
6745 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6746 return -1;
6747 break;
6748
6749 /* 0xeb91-0xeb95 undefined */
6750
6751 case 0xeb96: /* LMH - load multiple high */
6752 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6753 if (s390_record_gpr_h (gdbarch, regcache, i))
6754 return -1;
6755 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6756 return -1;
6757 break;
6758
6759 /* 0xeb97 undefined */
6760
6761 case 0xeb98: /* LMY - load multiple */
6762 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6763 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6764 return -1;
6765 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6766 return -1;
6767 break;
6768
6769 /* 0xeb99 undefined */
6770
6771 case 0xeb9a: /* LAMY - load access multiple */
6772 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6773 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6774 return -1;
6775 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6776 return -1;
6777 break;
6778
6779 /* 0xeb9c-0xebbf undefined */
6780 /* 0xebc1-0xebdb undefined */
6781 /* 0xebe5 undefined */
6782 /* 0xebe9 undefined */
6783 /* 0xebeb-0xebf1 undefined */
6784 /* 0xebf5 undefined */
6785 /* 0xebf9 undefined */
6786 /* 0xebfb-0xebff undefined */
6787
6788 /* 0xed00-0xed03 undefined */
6789
6790 case 0xed04: /* LDEB - load lengthened */
6791 case 0xed0c: /* MDEB - multiply */
6792 case 0xed0d: /* DEB - divide */
6793 case 0xed14: /* SQEB - square root */
6794 case 0xed15: /* SQDB - square root */
6795 case 0xed17: /* MEEB - multiply */
6796 case 0xed1c: /* MDB - multiply */
6797 case 0xed1d: /* DDB - divide */
6798 /* float destination + fpc */
6799 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6800 return -1;
6801 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6802 return -1;
6803 break;
6804
6805 case 0xed05: /* LXDB - load lengthened */
6806 case 0xed06: /* LXEB - load lengthened */
6807 case 0xed07: /* MXDB - multiply */
6808 /* float pair destination + fpc */
6809 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6810 return -1;
6811 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6812 return -1;
6813 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6814 return -1;
6815 break;
6816
6817 case 0xed0a: /* AEB - add */
6818 case 0xed0b: /* SEB - subtract */
6819 case 0xed1a: /* ADB - add */
6820 case 0xed1b: /* SDB - subtract */
6821 /* float destination + flags + fpc */
6822 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6823 return -1;
6824 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6825 return -1;
6826 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6827 return -1;
6828 break;
6829
6830 case 0xed0e: /* MAEB - multiply and add */
6831 case 0xed0f: /* MSEB - multiply and subtract */
6832 case 0xed1e: /* MADB - multiply and add */
6833 case 0xed1f: /* MSDB - multiply and subtract */
6834 case 0xed40: /* SLDT - shift significand left */
6835 case 0xed41: /* SRDT - shift significand right */
6836 case 0xedaa: /* CDZT - convert from zoned */
6837 case 0xedae: /* CDPT - convert from packed */
6838 /* float destination [RXF] + fpc */
6839 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6840 return -1;
6841 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6842 return -1;
6843 break;
6844
6845 /* 0xed13 undefined */
6846 /* 0xed16 undefined */
6847 /* 0xed20-0xed23 undefined */
6848
6849 case 0xed24: /* LDE - load lengthened */
6850 case 0xed34: /* SQE - square root */
6851 case 0xed35: /* SQD - square root */
6852 case 0xed37: /* MEE - multiply */
6853 case 0xed64: /* LEY - load */
6854 case 0xed65: /* LDY - load */
6855 /* float destination */
6856 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6857 return -1;
6858 break;
6859
6860 case 0xed25: /* LXD - load lengthened */
6861 case 0xed26: /* LXE - load lengthened */
6862 /* float pair destination */
6863 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6864 return -1;
6865 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6866 return -1;
6867 break;
6868
6869 /* 0xed27-0xed2d undefined */
6870
6871 case 0xed2e: /* MAE - multiply and add */
6872 case 0xed2f: /* MSE - multiply and subtract */
6873 case 0xed38: /* MAYL - multiply and add unnormalized */
6874 case 0xed39: /* MYL - multiply unnormalized */
6875 case 0xed3c: /* MAYH - multiply and add unnormalized */
6876 case 0xed3d: /* MYH - multiply unnormalized */
6877 case 0xed3e: /* MAD - multiply and add */
6878 case 0xed3f: /* MSD - multiply and subtract */
6879 /* float destination [RXF] */
6880 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6881 return -1;
6882 break;
6883
6884 /* 0xed30-0xed33 undefined */
6885 /* 0xed36 undefined */
6886
6887 case 0xed3a: /* MAY - multiply and add unnormalized */
6888 case 0xed3b: /* MY - multiply unnormalized */
6889 /* float pair destination [RXF] */
6890 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6891 return -1;
6892 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6893 return -1;
6894 break;
6895
6896 /* 0xed42-0xed47 undefind */
6897
6898 case 0xed48: /* SLXT - shift significand left */
6899 case 0xed49: /* SRXT - shift significand right */
6900 case 0xedab: /* CXZT - convert from zoned */
6901 case 0xedaf: /* CXPT - convert from packed */
6902 /* float pair destination [RXF] + fpc */
6903 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6904 return -1;
6905 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6906 return -1;
6907 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6908 return -1;
6909 break;
6910
6911 /* 0xed4a-0xed4f undefind */
6912 /* 0xed52-0xed53 undefind */
6913 /* 0xed56-0xed57 undefind */
6914 /* 0xed5a-0xed63 undefind */
6915 /* 0xed68-0xeda7 undefined */
6916
6917 case 0xeda8: /* CZDT - convert to zoned */
6918 case 0xeda9: /* CZXT - convert to zoned */
6919 case 0xedac: /* CPDT - convert to packed */
6920 case 0xedad: /* CPXT - convert to packed */
6921 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6922 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6923 return -1;
6924 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6925 return -1;
6926 break;
6927
6928 /* 0xedb0-0xedff undefined */
6929
6930 default:
6931 goto UNKNOWN_OP;
6932 }
6933 break;
6934
6935 /* 0xe4 undefined */
6936
6937 case 0xe5:
6938 /* SSE/SIL-format instruction */
6939 switch (insn[0])
6940 {
6941 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6942
6943 case 0xe544: /* MVHHI - move */
6944 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6945 if (record_full_arch_list_add_mem (oaddr, 2))
6946 return -1;
6947 break;
6948
6949 /* 0xe545-0xe547 undefined */
6950
6951 case 0xe548: /* MVGHI - move */
6952 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6953 if (record_full_arch_list_add_mem (oaddr, 8))
6954 return -1;
6955 break;
6956
6957 /* 0xe549-0xe54b undefined */
6958
6959 case 0xe54c: /* MVHI - move */
6960 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6961 if (record_full_arch_list_add_mem (oaddr, 4))
6962 return -1;
6963 break;
6964
6965 /* 0xe54d-0xe553 undefined */
6966
6967 case 0xe554: /* CHHSI - compare halfword immediate */
6968 case 0xe555: /* CLHHSI - compare logical immediate */
6969 case 0xe558: /* CGHSI - compare halfword immediate */
6970 case 0xe559: /* CLGHSI - compare logical immediate */
6971 case 0xe55c: /* CHSI - compare halfword immediate */
6972 case 0xe55d: /* CLFHSI - compare logical immediate */
6973 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6974 return -1;
6975 break;
6976
6977 /* 0xe556-0xe557 undefined */
6978 /* 0xe55a-0xe55b undefined */
6979 /* 0xe55e-0xe55f undefined */
6980
6981 case 0xe560: /* TBEGIN - transaction begin */
6982 /* The transaction will be immediately aborted after this
6983 instruction, due to single-stepping. This instruction is
6984 only supported so that the program can fail a few times
6985 and go to the non-transactional fallback. */
6986 if (inib[4])
6987 {
6988 /* Transaction diagnostic block - user. */
6989 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6990 if (record_full_arch_list_add_mem (oaddr, 256))
6991 return -1;
6992 }
6993 /* Transaction diagnostic block - supervisor. */
6994 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6995 return -1;
6996 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6997 return -1;
6998 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6999 return -1;
7000 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
7001 return -1;
7002 for (i = 0; i < 16; i++)
7003 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
7004 return -1;
7005 /* And flags. */
7006 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7007 return -1;
7008 break;
7009
7010 /* 0xe561 unsupported: TBEGINC */
7011 /* 0xe562-0xe5ff undefined */
7012
7013 default:
7014 goto UNKNOWN_OP;
7015 }
7016 break;
7017
7018 /* 0xe6 undefined */
7019
7020 case 0xec:
7021 /* RIE/RIS/RRS-format instruction */
7022 switch (ibyte[0] << 8 | ibyte[5])
7023 {
7024 /* 0xec00-0xec41 undefined */
7025
7026 case 0xec42: /* LOCHI - load halfword immediate on condition */
7027 case 0xec51: /* RISBLG - rotate then insert selected bits low */
7028 /* 32-bit or native gpr destination */
7029 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7030 return -1;
7031 break;
7032
7033 /* 0xec43 undefined */
7034
7035 case 0xec44: /* BRXHG - branch relative on index high */
7036 case 0xec45: /* BRXLG - branch relative on index low or equal */
7037 case 0xec46: /* LOCGHI - load halfword immediate on condition */
7038 case 0xec59: /* RISBGN - rotate then insert selected bits */
7039 /* 64-bit gpr destination */
7040 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7041 return -1;
7042 break;
7043
7044 /* 0xec47-0xec4d undefined */
7045
7046 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
7047 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
7048 /* 32-bit high gpr destination */
7049 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
7050 return -1;
7051 break;
7052
7053 /* 0xec4f-0xec50 undefined */
7054 /* 0xec52-0xec53 undefined */
7055
7056 case 0xec54: /* RNSBG - rotate then and selected bits */
7057 case 0xec55: /* RISBG - rotate then insert selected bits */
7058 case 0xec56: /* ROSBG - rotate then or selected bits */
7059 case 0xec57: /* RXSBG - rotate then xor selected bits */
7060 case 0xecd9: /* AGHIK - add immediate */
7061 case 0xecdb: /* ALGHSIK - add logical immediate */
7062 /* 64-bit gpr destination + flags */
7063 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7064 return -1;
7065 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7066 return -1;
7067 break;
7068
7069 /* 0xec58 undefined */
7070 /* 0xec5a-0xec5c undefined */
7071 /* 0xec5e-0xec63 undefined */
7072
7073 case 0xec64: /* CGRJ - compare and branch relative */
7074 case 0xec65: /* CLGRJ - compare logical and branch relative */
7075 case 0xec76: /* CRJ - compare and branch relative */
7076 case 0xec77: /* CLRJ - compare logical and branch relative */
7077 case 0xec7c: /* CGIJ - compare immediate and branch relative */
7078 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
7079 case 0xec7e: /* CIJ - compare immediate and branch relative */
7080 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
7081 case 0xece4: /* CGRB - compare and branch */
7082 case 0xece5: /* CLGRB - compare logical and branch */
7083 case 0xecf6: /* CRB - compare and branch */
7084 case 0xecf7: /* CLRB - compare logical and branch */
7085 case 0xecfc: /* CGIB - compare immediate and branch */
7086 case 0xecfd: /* CLGIB - compare logical immediate and branch */
7087 case 0xecfe: /* CIB - compare immediate and branch */
7088 case 0xecff: /* CLIB - compare logical immediate and branch */
7089 break;
7090
7091 /* 0xec66-0xec6f undefined */
7092
7093 case 0xec70: /* CGIT - compare immediate and trap */
7094 case 0xec71: /* CLGIT - compare logical immediate and trap */
7095 case 0xec72: /* CIT - compare immediate and trap */
7096 case 0xec73: /* CLFIT - compare logical immediate and trap */
7097 /* fpc only - including possible DXC write for trapping insns */
7098 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7099 return -1;
7100 break;
7101
7102 /* 0xec74-0xec75 undefined */
7103 /* 0xec78-0xec7b undefined */
7104
7105 /* 0xec80-0xecd7 undefined */
7106
7107 case 0xecd8: /* AHIK - add immediate */
7108 case 0xecda: /* ALHSIK - add logical immediate */
7109 /* 32-bit gpr destination + flags */
7110 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7111 return -1;
7112 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7113 return -1;
7114 break;
7115
7116 /* 0xecdc-0xece3 undefined */
7117 /* 0xece6-0xecf5 undefined */
7118 /* 0xecf8-0xecfb undefined */
7119
7120 default:
7121 goto UNKNOWN_OP;
7122 }
7123 break;
7124
7125 case 0xee: /* PLO - perform locked operation */
7126 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
7127 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7128 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
7129 if (!(tmp & 0x100))
7130 {
7131 uint8_t fc = tmp & 0xff;
7132 gdb_byte buf[8];
7133 switch (fc)
7134 {
7135 case 0x00: /* CL */
7136 /* op1c */
7137 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7138 return -1;
7139 /* op3 */
7140 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7141 return -1;
7142 break;
7143
7144 case 0x01: /* CLG */
7145 /* op1c */
7146 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7147 return -1;
7148 /* op3 */
7149 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7150 return -1;
7151 break;
7152
7153 case 0x02: /* CLGR */
7154 /* op1c */
7155 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7156 return -1;
7157 /* op3 */
7158 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7159 return -1;
7160 break;
7161
7162 case 0x03: /* CLX */
7163 /* op1c */
7164 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7165 return -1;
7166 /* op3 */
7167 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7168 return -1;
7169 break;
7170
7171 case 0x08: /* DCS */
7172 /* op3c */
7173 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7174 return -1;
7175 /* fallthru */
7176 case 0x0c: /* CSST */
7177 /* op4 */
7178 if (record_full_arch_list_add_mem (oaddr2, 4))
7179 return -1;
7180 goto CS;
7181
7182 case 0x14: /* CSTST */
7183 /* op8 */
7184 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7185 return -1;
7186 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7187 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7188 if (record_full_arch_list_add_mem (oaddr3, 4))
7189 return -1;
7190 /* fallthru */
7191 case 0x10: /* CSDST */
7192 /* op6 */
7193 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7194 return -1;
7195 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7196 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7197 if (record_full_arch_list_add_mem (oaddr3, 4))
7198 return -1;
7199 /* op4 */
7200 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7201 return -1;
7202 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7203 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7204 if (record_full_arch_list_add_mem (oaddr3, 4))
7205 return -1;
7206 /* fallthru */
7207 case 0x04: /* CS */
7208CS:
7209 /* op1c */
7210 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7211 return -1;
7212 /* op2 */
7213 if (record_full_arch_list_add_mem (oaddr, 4))
7214 return -1;
7215 break;
7216
7217 case 0x09: /* DCSG */
7218 /* op3c */
7219 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7220 return -1;
7221 goto CSSTG;
7222
7223 case 0x15: /* CSTSTG */
7224 /* op8 */
7225 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7226 return -1;
7227 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7228 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7229 if (record_full_arch_list_add_mem (oaddr3, 8))
7230 return -1;
7231 /* fallthru */
7232 case 0x11: /* CSDSTG */
7233 /* op6 */
7234 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7235 return -1;
7236 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7237 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7238 if (record_full_arch_list_add_mem (oaddr3, 8))
7239 return -1;
7240 /* fallthru */
7241 case 0x0d: /* CSSTG */
7242CSSTG:
7243 /* op4 */
7244 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7245 return -1;
7246 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7247 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7248 if (record_full_arch_list_add_mem (oaddr3, 8))
7249 return -1;
7250 /* fallthru */
7251 case 0x05: /* CSG */
7252 /* op1c */
7253 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7254 return -1;
7255 /* op2 */
7256 if (record_full_arch_list_add_mem (oaddr, 8))
7257 return -1;
7258 break;
7259
7260 case 0x0a: /* DCSGR */
7261 /* op3c */
7262 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7263 return -1;
7264 /* fallthru */
7265 case 0x0e: /* CSSTGR */
7266 /* op4 */
7267 if (record_full_arch_list_add_mem (oaddr2, 8))
7268 return -1;
7269 goto CSGR;
7270
7271 case 0x16: /* CSTSTGR */
7272 /* op8 */
7273 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7274 return -1;
7275 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7276 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7277 if (record_full_arch_list_add_mem (oaddr3, 8))
7278 return -1;
7279 /* fallthru */
7280 case 0x12: /* CSDSTGR */
7281 /* op6 */
7282 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7283 return -1;
7284 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7285 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7286 if (record_full_arch_list_add_mem (oaddr3, 8))
7287 return -1;
7288 /* op4 */
7289 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7290 return -1;
7291 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7292 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7293 if (record_full_arch_list_add_mem (oaddr3, 8))
7294 return -1;
7295 /* fallthru */
7296 case 0x06: /* CSGR */
7297CSGR:
7298 /* op1c */
7299 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7300 return -1;
7301 /* op2 */
7302 if (record_full_arch_list_add_mem (oaddr, 8))
7303 return -1;
7304 break;
7305
7306 case 0x0b: /* DCSX */
7307 /* op3c */
7308 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7309 return -1;
7310 goto CSSTX;
7311
7312 case 0x17: /* CSTSTX */
7313 /* op8 */
7314 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7315 return -1;
7316 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7317 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7318 if (record_full_arch_list_add_mem (oaddr3, 16))
7319 return -1;
7320 /* fallthru */
7321 case 0x13: /* CSDSTX */
7322 /* op6 */
7323 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7324 return -1;
7325 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7326 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7327 if (record_full_arch_list_add_mem (oaddr3, 16))
7328 return -1;
7329 /* fallthru */
7330 case 0x0f: /* CSSTX */
7331CSSTX:
7332 /* op4 */
7333 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7334 return -1;
7335 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7336 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7337 if (record_full_arch_list_add_mem (oaddr3, 16))
7338 return -1;
7339 /* fallthru */
7340 case 0x07: /* CSX */
7341 /* op1c */
7342 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7343 return -1;
7344 /* op2 */
7345 if (record_full_arch_list_add_mem (oaddr, 16))
7346 return -1;
7347 break;
7348
7349 default:
7350 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
7351 fc, paddress (gdbarch, addr));
7352 return -1;
7353 }
7354 }
7355 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7356 return -1;
7357 break;
7358
7359 case 0xef: /* LMD - load multiple disjoint */
7360 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
7361 if (s390_record_gpr_g (gdbarch, regcache, i))
7362 return -1;
7363 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7364 return -1;
7365 break;
7366
7367 case 0xf0: /* SRP - shift and round decimal */
7368 case 0xf8: /* ZAP - zero and add */
7369 case 0xfa: /* AP - add decimal */
7370 case 0xfb: /* SP - subtract decimal */
7371 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7372 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7373 return -1;
7374 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7375 return -1;
7376 /* DXC may be written */
7377 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7378 return -1;
7379 break;
7380
7381 case 0xf1: /* MVO - move with offset */
7382 case 0xf2: /* PACK - pack */
7383 case 0xf3: /* UNPK - unpack */
7384 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7385 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7386 return -1;
7387 break;
7388
7389 /* 0xf4-0xf7 undefined */
7390
7391 case 0xf9: /* CP - compare decimal */
7392 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7393 return -1;
7394 /* DXC may be written */
7395 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7396 return -1;
7397 break;
7398
7399 case 0xfc: /* MP - multiply decimal */
7400 case 0xfd: /* DP - divide decimal */
7401 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7402 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7403 return -1;
7404 /* DXC may be written */
7405 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7406 return -1;
7407 break;
7408
7409 /* 0xfe-0xff undefined */
7410
7411 default:
7412UNKNOWN_OP:
7413 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
7414 "at %s.\n", insn[0], paddress (gdbarch, addr));
7415 return -1;
7416 }
7417
7418 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
7419 return -1;
7420 if (record_full_arch_list_add_end ())
7421 return -1;
7422 return 0;
7423}
7424
7425/* Initialize linux_record_tdep if not initialized yet. */
7426
7427static void
7428s390_init_linux_record_tdep (struct linux_record_tdep *record_tdep,
7429 enum s390_abi_kind abi)
7430{
7431 /* These values are the size of the type that will be used in a system
7432 call. They are obtained from Linux Kernel source. */
7433
7434 if (abi == ABI_LINUX_ZSERIES)
7435 {
7436 record_tdep->size_pointer = 8;
7437 /* no _old_kernel_stat */
7438 record_tdep->size_tms = 32;
7439 record_tdep->size_loff_t = 8;
7440 record_tdep->size_flock = 32;
7441 record_tdep->size_ustat = 32;
7442 record_tdep->size_old_sigaction = 32;
7443 record_tdep->size_old_sigset_t = 8;
7444 record_tdep->size_rlimit = 16;
7445 record_tdep->size_rusage = 144;
7446 record_tdep->size_timeval = 16;
7447 record_tdep->size_timezone = 8;
7448 /* old_[ug]id_t never used */
7449 record_tdep->size_fd_set = 128;
7450 record_tdep->size_old_dirent = 280;
7451 record_tdep->size_statfs = 88;
7452 record_tdep->size_statfs64 = 88;
7453 record_tdep->size_sockaddr = 16;
7454 record_tdep->size_int = 4;
7455 record_tdep->size_long = 8;
7456 record_tdep->size_ulong = 8;
7457 record_tdep->size_msghdr = 56;
7458 record_tdep->size_itimerval = 32;
7459 record_tdep->size_stat = 144;
7460 /* old_utsname unused */
7461 record_tdep->size_sysinfo = 112;
7462 record_tdep->size_msqid_ds = 120;
7463 record_tdep->size_shmid_ds = 112;
7464 record_tdep->size_new_utsname = 390;
7465 record_tdep->size_timex = 208;
7466 record_tdep->size_mem_dqinfo = 24;
7467 record_tdep->size_if_dqblk = 72;
7468 record_tdep->size_fs_quota_stat = 80;
7469 record_tdep->size_timespec = 16;
7470 record_tdep->size_pollfd = 8;
7471 record_tdep->size_NFS_FHSIZE = 32;
7472 record_tdep->size_knfsd_fh = 132;
7473 record_tdep->size_TASK_COMM_LEN = 16;
7474 record_tdep->size_sigaction = 32;
7475 record_tdep->size_sigset_t = 8;
7476 record_tdep->size_siginfo_t = 128;
7477 record_tdep->size_cap_user_data_t = 12;
7478 record_tdep->size_stack_t = 24;
7479 record_tdep->size_off_t = 8;
7480 /* stat64 unused */
7481 record_tdep->size_gid_t = 4;
7482 record_tdep->size_uid_t = 4;
7483 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7484 record_tdep->size_flock64 = 32;
7485 record_tdep->size_io_event = 32;
7486 record_tdep->size_iocb = 64;
7487 record_tdep->size_epoll_event = 16;
7488 record_tdep->size_itimerspec = 32;
7489 record_tdep->size_mq_attr = 64;
7490 record_tdep->size_termios = 36;
7491 record_tdep->size_termios2 = 44;
7492 record_tdep->size_pid_t = 4;
7493 record_tdep->size_winsize = 8;
7494 record_tdep->size_serial_struct = 72;
7495 record_tdep->size_serial_icounter_struct = 80;
7496 record_tdep->size_size_t = 8;
7497 record_tdep->size_iovec = 16;
7498 record_tdep->size_time_t = 8;
7499 }
7500 else if (abi == ABI_LINUX_S390)
7501 {
7502 record_tdep->size_pointer = 4;
7503 record_tdep->size__old_kernel_stat = 32;
7504 record_tdep->size_tms = 16;
7505 record_tdep->size_loff_t = 8;
7506 record_tdep->size_flock = 16;
7507 record_tdep->size_ustat = 20;
7508 record_tdep->size_old_sigaction = 16;
7509 record_tdep->size_old_sigset_t = 4;
7510 record_tdep->size_rlimit = 8;
7511 record_tdep->size_rusage = 72;
7512 record_tdep->size_timeval = 8;
7513 record_tdep->size_timezone = 8;
7514 record_tdep->size_old_gid_t = 2;
7515 record_tdep->size_old_uid_t = 2;
7516 record_tdep->size_fd_set = 128;
7517 record_tdep->size_old_dirent = 268;
7518 record_tdep->size_statfs = 64;
7519 record_tdep->size_statfs64 = 88;
7520 record_tdep->size_sockaddr = 16;
7521 record_tdep->size_int = 4;
7522 record_tdep->size_long = 4;
7523 record_tdep->size_ulong = 4;
7524 record_tdep->size_msghdr = 28;
7525 record_tdep->size_itimerval = 16;
7526 record_tdep->size_stat = 64;
7527 /* old_utsname unused */
7528 record_tdep->size_sysinfo = 64;
7529 record_tdep->size_msqid_ds = 88;
7530 record_tdep->size_shmid_ds = 84;
7531 record_tdep->size_new_utsname = 390;
7532 record_tdep->size_timex = 128;
7533 record_tdep->size_mem_dqinfo = 24;
7534 record_tdep->size_if_dqblk = 72;
7535 record_tdep->size_fs_quota_stat = 80;
7536 record_tdep->size_timespec = 8;
7537 record_tdep->size_pollfd = 8;
7538 record_tdep->size_NFS_FHSIZE = 32;
7539 record_tdep->size_knfsd_fh = 132;
7540 record_tdep->size_TASK_COMM_LEN = 16;
7541 record_tdep->size_sigaction = 20;
7542 record_tdep->size_sigset_t = 8;
7543 record_tdep->size_siginfo_t = 128;
7544 record_tdep->size_cap_user_data_t = 12;
7545 record_tdep->size_stack_t = 12;
7546 record_tdep->size_off_t = 4;
7547 record_tdep->size_stat64 = 104;
7548 record_tdep->size_gid_t = 4;
7549 record_tdep->size_uid_t = 4;
7550 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7551 record_tdep->size_flock64 = 32;
7552 record_tdep->size_io_event = 32;
7553 record_tdep->size_iocb = 64;
7554 record_tdep->size_epoll_event = 16;
7555 record_tdep->size_itimerspec = 16;
7556 record_tdep->size_mq_attr = 32;
7557 record_tdep->size_termios = 36;
7558 record_tdep->size_termios2 = 44;
7559 record_tdep->size_pid_t = 4;
7560 record_tdep->size_winsize = 8;
7561 record_tdep->size_serial_struct = 60;
7562 record_tdep->size_serial_icounter_struct = 80;
7563 record_tdep->size_size_t = 4;
7564 record_tdep->size_iovec = 8;
7565 record_tdep->size_time_t = 4;
7566 }
7567
7568 /* These values are the second argument of system call "sys_fcntl"
7569 and "sys_fcntl64". They are obtained from Linux Kernel source. */
7570 record_tdep->fcntl_F_GETLK = 5;
7571 record_tdep->fcntl_F_GETLK64 = 12;
7572 record_tdep->fcntl_F_SETLK64 = 13;
7573 record_tdep->fcntl_F_SETLKW64 = 14;
7574
7575 record_tdep->arg1 = S390_R2_REGNUM;
7576 record_tdep->arg2 = S390_R3_REGNUM;
7577 record_tdep->arg3 = S390_R4_REGNUM;
7578 record_tdep->arg4 = S390_R5_REGNUM;
7579 record_tdep->arg5 = S390_R6_REGNUM;
7580
7581 /* These values are the second argument of system call "sys_ioctl".
7582 They are obtained from Linux Kernel source.
7583 See arch/s390/include/uapi/asm/ioctls.h. */
7584
7585 record_tdep->ioctl_TCGETS = 0x5401;
7586 record_tdep->ioctl_TCSETS = 0x5402;
7587 record_tdep->ioctl_TCSETSW = 0x5403;
7588 record_tdep->ioctl_TCSETSF = 0x5404;
7589 record_tdep->ioctl_TCGETA = 0x5405;
7590 record_tdep->ioctl_TCSETA = 0x5406;
7591 record_tdep->ioctl_TCSETAW = 0x5407;
7592 record_tdep->ioctl_TCSETAF = 0x5408;
7593 record_tdep->ioctl_TCSBRK = 0x5409;
7594 record_tdep->ioctl_TCXONC = 0x540a;
7595 record_tdep->ioctl_TCFLSH = 0x540b;
7596 record_tdep->ioctl_TIOCEXCL = 0x540c;
7597 record_tdep->ioctl_TIOCNXCL = 0x540d;
7598 record_tdep->ioctl_TIOCSCTTY = 0x540e;
7599 record_tdep->ioctl_TIOCGPGRP = 0x540f;
7600 record_tdep->ioctl_TIOCSPGRP = 0x5410;
7601 record_tdep->ioctl_TIOCOUTQ = 0x5411;
7602 record_tdep->ioctl_TIOCSTI = 0x5412;
7603 record_tdep->ioctl_TIOCGWINSZ = 0x5413;
7604 record_tdep->ioctl_TIOCSWINSZ = 0x5414;
7605 record_tdep->ioctl_TIOCMGET = 0x5415;
7606 record_tdep->ioctl_TIOCMBIS = 0x5416;
7607 record_tdep->ioctl_TIOCMBIC = 0x5417;
7608 record_tdep->ioctl_TIOCMSET = 0x5418;
7609 record_tdep->ioctl_TIOCGSOFTCAR = 0x5419;
7610 record_tdep->ioctl_TIOCSSOFTCAR = 0x541a;
7611 record_tdep->ioctl_FIONREAD = 0x541b;
7612 record_tdep->ioctl_TIOCINQ = 0x541b; /* alias */
7613 record_tdep->ioctl_TIOCLINUX = 0x541c;
7614 record_tdep->ioctl_TIOCCONS = 0x541d;
7615 record_tdep->ioctl_TIOCGSERIAL = 0x541e;
7616 record_tdep->ioctl_TIOCSSERIAL = 0x541f;
7617 record_tdep->ioctl_TIOCPKT = 0x5420;
7618 record_tdep->ioctl_FIONBIO = 0x5421;
7619 record_tdep->ioctl_TIOCNOTTY = 0x5422;
7620 record_tdep->ioctl_TIOCSETD = 0x5423;
7621 record_tdep->ioctl_TIOCGETD = 0x5424;
7622 record_tdep->ioctl_TCSBRKP = 0x5425;
7623 record_tdep->ioctl_TIOCSBRK = 0x5427;
7624 record_tdep->ioctl_TIOCCBRK = 0x5428;
7625 record_tdep->ioctl_TIOCGSID = 0x5429;
7626 record_tdep->ioctl_TCGETS2 = 0x802c542a;
7627 record_tdep->ioctl_TCSETS2 = 0x402c542b;
7628 record_tdep->ioctl_TCSETSW2 = 0x402c542c;
7629 record_tdep->ioctl_TCSETSF2 = 0x402c542d;
7630 record_tdep->ioctl_TIOCGPTN = 0x80045430;
7631 record_tdep->ioctl_TIOCSPTLCK = 0x40045431;
7632 record_tdep->ioctl_FIONCLEX = 0x5450;
7633 record_tdep->ioctl_FIOCLEX = 0x5451;
7634 record_tdep->ioctl_FIOASYNC = 0x5452;
7635 record_tdep->ioctl_TIOCSERCONFIG = 0x5453;
7636 record_tdep->ioctl_TIOCSERGWILD = 0x5454;
7637 record_tdep->ioctl_TIOCSERSWILD = 0x5455;
7638 record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456;
7639 record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457;
7640 record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458;
7641 record_tdep->ioctl_TIOCSERGETLSR = 0x5459;
7642 record_tdep->ioctl_TIOCSERGETMULTI = 0x545a;
7643 record_tdep->ioctl_TIOCSERSETMULTI = 0x545b;
7644 record_tdep->ioctl_TIOCMIWAIT = 0x545c;
7645 record_tdep->ioctl_TIOCGICOUNT = 0x545d;
7646 record_tdep->ioctl_FIOQSIZE = 0x545e;
7647}
7648
a8c99f38
JB
7649/* Set up gdbarch struct. */
7650
a78f21af 7651static struct gdbarch *
5769d3cd
AC
7652s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
7653{
7803799a
UW
7654 const struct target_desc *tdesc = info.target_desc;
7655 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
7656 struct gdbarch *gdbarch;
7657 struct gdbarch_tdep *tdep;
f486487f 7658 enum s390_abi_kind tdep_abi;
417c80f9 7659 enum s390_vector_abi_kind vector_abi;
7803799a 7660 int have_upper = 0;
c642a434
UW
7661 int have_linux_v1 = 0;
7662 int have_linux_v2 = 0;
5aa82d05 7663 int have_tdb = 0;
550bdf96 7664 int have_vx = 0;
7803799a 7665 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
7666 static const char *const stap_register_prefixes[] = { "%", NULL };
7667 static const char *const stap_register_indirection_prefixes[] = { "(",
7668 NULL };
7669 static const char *const stap_register_indirection_suffixes[] = { ")",
7670 NULL };
7803799a
UW
7671
7672 /* Default ABI and register size. */
7673 switch (info.bfd_arch_info->mach)
7674 {
7675 case bfd_mach_s390_31:
7676 tdep_abi = ABI_LINUX_S390;
7677 break;
7678
7679 case bfd_mach_s390_64:
7680 tdep_abi = ABI_LINUX_ZSERIES;
7681 break;
7682
7683 default:
7684 return NULL;
7685 }
7686
7687 /* Use default target description if none provided by the target. */
7688 if (!tdesc_has_registers (tdesc))
7689 {
7690 if (tdep_abi == ABI_LINUX_S390)
7691 tdesc = tdesc_s390_linux32;
7692 else
7693 tdesc = tdesc_s390x_linux64;
7694 }
7695
7696 /* Check any target description for validity. */
7697 if (tdesc_has_registers (tdesc))
7698 {
7699 static const char *const gprs[] = {
7700 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
7701 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
7702 };
7703 static const char *const fprs[] = {
7704 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
7705 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
7706 };
7707 static const char *const acrs[] = {
7708 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
7709 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
7710 };
7711 static const char *const gprs_lower[] = {
7712 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
7713 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
7714 };
7715 static const char *const gprs_upper[] = {
7716 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
7717 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
7718 };
4ac33720
UW
7719 static const char *const tdb_regs[] = {
7720 "tdb0", "tac", "tct", "atia",
7721 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
7722 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
7723 };
550bdf96
AA
7724 static const char *const vxrs_low[] = {
7725 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
7726 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
7727 };
7728 static const char *const vxrs_high[] = {
7729 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
7730 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
7731 };
7803799a
UW
7732 const struct tdesc_feature *feature;
7733 int i, valid_p = 1;
7734
7735 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
7736 if (feature == NULL)
7737 return NULL;
7738
7739 tdesc_data = tdesc_data_alloc ();
7740
7741 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7742 S390_PSWM_REGNUM, "pswm");
7743 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7744 S390_PSWA_REGNUM, "pswa");
7745
7746 if (tdesc_unnumbered_register (feature, "r0"))
7747 {
7748 for (i = 0; i < 16; i++)
7749 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7750 S390_R0_REGNUM + i, gprs[i]);
7751 }
7752 else
7753 {
7754 have_upper = 1;
7755
7756 for (i = 0; i < 16; i++)
7757 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7758 S390_R0_REGNUM + i,
7759 gprs_lower[i]);
7760 for (i = 0; i < 16; i++)
7761 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7762 S390_R0_UPPER_REGNUM + i,
7763 gprs_upper[i]);
7764 }
7765
7766 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
7767 if (feature == NULL)
7768 {
7769 tdesc_data_cleanup (tdesc_data);
7770 return NULL;
7771 }
7772
7773 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7774 S390_FPC_REGNUM, "fpc");
7775 for (i = 0; i < 16; i++)
7776 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7777 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 7778
7803799a
UW
7779 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
7780 if (feature == NULL)
7781 {
7782 tdesc_data_cleanup (tdesc_data);
7783 return NULL;
7784 }
7785
7786 for (i = 0; i < 16; i++)
7787 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7788 S390_A0_REGNUM + i, acrs[i]);
7789
94eae614 7790 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
7791 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
7792 if (feature)
7793 {
7794 tdesc_numbered_register (feature, tdesc_data,
7795 S390_ORIG_R2_REGNUM, "orig_r2");
7796
7797 if (tdesc_numbered_register (feature, tdesc_data,
7798 S390_LAST_BREAK_REGNUM, "last_break"))
7799 have_linux_v1 = 1;
7800
7801 if (tdesc_numbered_register (feature, tdesc_data,
7802 S390_SYSTEM_CALL_REGNUM, "system_call"))
7803 have_linux_v2 = 1;
7804
7805 if (have_linux_v2 > have_linux_v1)
7806 valid_p = 0;
7807 }
7808
4ac33720
UW
7809 /* Transaction diagnostic block. */
7810 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
7811 if (feature)
7812 {
7813 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
7814 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7815 S390_TDB_DWORD0_REGNUM + i,
7816 tdb_regs[i]);
5aa82d05 7817 have_tdb = 1;
4ac33720
UW
7818 }
7819
550bdf96
AA
7820 /* Vector registers. */
7821 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
7822 if (feature)
7823 {
7824 for (i = 0; i < 16; i++)
7825 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7826 S390_V0_LOWER_REGNUM + i,
7827 vxrs_low[i]);
7828 for (i = 0; i < 16; i++)
7829 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7830 S390_V16_REGNUM + i,
7831 vxrs_high[i]);
7832 have_vx = 1;
7833 }
7834
7803799a
UW
7835 if (!valid_p)
7836 {
7837 tdesc_data_cleanup (tdesc_data);
7838 return NULL;
7839 }
7840 }
5769d3cd 7841
417c80f9
AA
7842 /* Determine vector ABI. */
7843 vector_abi = S390_VECTOR_ABI_NONE;
7844#ifdef HAVE_ELF
7845 if (have_vx
7846 && info.abfd != NULL
7847 && info.abfd->format == bfd_object
7848 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7849 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7850 Tag_GNU_S390_ABI_Vector) == 2)
7851 vector_abi = S390_VECTOR_ABI_128;
7852#endif
7853
7803799a
UW
7854 /* Find a candidate among extant architectures. */
7855 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7856 arches != NULL;
7857 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7858 {
7859 tdep = gdbarch_tdep (arches->gdbarch);
7860 if (!tdep)
7861 continue;
7862 if (tdep->abi != tdep_abi)
7863 continue;
417c80f9
AA
7864 if (tdep->vector_abi != vector_abi)
7865 continue;
7803799a
UW
7866 if ((tdep->gpr_full_regnum != -1) != have_upper)
7867 continue;
7868 if (tdesc_data != NULL)
7869 tdesc_data_cleanup (tdesc_data);
7870 return arches->gdbarch;
7871 }
5769d3cd 7872
7803799a 7873 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 7874 tdep = XCNEW (struct gdbarch_tdep);
7803799a 7875 tdep->abi = tdep_abi;
417c80f9 7876 tdep->vector_abi = vector_abi;
5aa82d05
AA
7877 tdep->have_linux_v1 = have_linux_v1;
7878 tdep->have_linux_v2 = have_linux_v2;
7879 tdep->have_tdb = have_tdb;
d0f54f9d 7880 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
7881
7882 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 7883 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 7884
1de90795
UW
7885 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7886 We can safely let them default to 128-bit, since the debug info
7887 will give the size of type actually used in each case. */
7888 set_gdbarch_long_double_bit (gdbarch, 128);
7889 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
7890
aaab4dba 7891 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 7892 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 7893 always. */
5769d3cd 7894 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
7895 /* Stack grows downward. */
7896 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd 7897 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
6df55226
MK
7898 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
7899 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
5769d3cd 7900 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
c9cf6e20 7901 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
a8c99f38 7902
7803799a 7903 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 7904 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 7905 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 7906 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 7907 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 7908 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7803799a 7909 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
5aa82d05
AA
7910 set_gdbarch_iterate_over_regset_sections (gdbarch,
7911 s390_iterate_over_regset_sections);
c642a434
UW
7912 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
7913 set_gdbarch_write_pc (gdbarch, s390_write_pc);
f79a3bae 7914 set_gdbarch_guess_tracepoint_registers (gdbarch, s390_guess_tracepoint_registers);
7803799a
UW
7915 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7916 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7917 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7918 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7919 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 7920 s390_pseudo_register_reggroup_p);
7803799a 7921 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
550bdf96 7922 set_gdbarch_register_name (gdbarch, s390_register_name);
7803799a
UW
7923
7924 /* Assign pseudo register numbers. */
7925 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7926 last_pseudo_reg = first_pseudo_reg;
7927 tdep->gpr_full_regnum = -1;
7928 if (have_upper)
7929 {
7930 tdep->gpr_full_regnum = last_pseudo_reg;
7931 last_pseudo_reg += 16;
7932 }
550bdf96
AA
7933 tdep->v0_full_regnum = -1;
7934 if (have_vx)
7935 {
7936 tdep->v0_full_regnum = last_pseudo_reg;
7937 last_pseudo_reg += 16;
7938 }
7803799a
UW
7939 tdep->pc_regnum = last_pseudo_reg++;
7940 tdep->cc_regnum = last_pseudo_reg++;
7941 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7942 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 7943
b0cf273e
JB
7944 /* Inferior function calls. */
7945 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 7946 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 7947 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 7948 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 7949
237b092b
AA
7950 /* Syscall handling. */
7951 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
7952
a8c99f38 7953 /* Frame handling. */
a431654a 7954 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 7955 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 7956 dwarf2_append_unwinders (gdbarch);
a431654a 7957 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
7958 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7959 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
7960 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
7961 frame_base_set_default (gdbarch, &s390_frame_base);
7962 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7963 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7964
1db4e8a0
UW
7965 /* Displaced stepping. */
7966 set_gdbarch_displaced_step_copy_insn (gdbarch,
5ac21343 7967 s390_displaced_step_copy_insn);
1db4e8a0
UW
7968 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
7969 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 7970 simple_displaced_step_free_closure);
906d60cf 7971 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
1db4e8a0
UW
7972 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
7973
70728992
PA
7974 /* Note that GNU/Linux is the only OS supported on this
7975 platform. */
7976 linux_init_abi (info, gdbarch);
7977
7803799a 7978 switch (tdep->abi)
5769d3cd 7979 {
7803799a 7980 case ABI_LINUX_S390:
5769d3cd 7981 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
7982 set_solib_svr4_fetch_link_map_offsets
7983 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 7984
458c8db8 7985 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
5769d3cd 7986 break;
b0cf273e 7987
7803799a 7988 case ABI_LINUX_ZSERIES:
5769d3cd
AC
7989 set_gdbarch_long_bit (gdbarch, 64);
7990 set_gdbarch_long_long_bit (gdbarch, 64);
7991 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
7992 set_solib_svr4_fetch_link_map_offsets
7993 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 7994 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 7995 s390_address_class_type_flags);
ffc65945 7996 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 7997 s390_address_class_type_flags_to_name);
ffc65945 7998 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 7999 s390_address_class_name_to_type_flags);
d851a69a 8000 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X);
5769d3cd
AC
8001 break;
8002 }
8003
36482093
AC
8004 set_gdbarch_print_insn (gdbarch, print_insn_s390);
8005
982e9687
UW
8006 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
8007
b2756930
KB
8008 /* Enable TLS support. */
8009 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 8010 svr4_fetch_objfile_link_map);
b2756930 8011
55aa24fb 8012 /* SystemTap functions. */
05c0465e
SDJ
8013 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
8014 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
8015 stap_register_indirection_prefixes);
8016 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
8017 stap_register_indirection_suffixes);
55aa24fb 8018 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
60abeae4
AA
8019 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
8020 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
55aa24fb 8021
566c56c9
MK
8022 /* Support reverse debugging. */
8023
8024 set_gdbarch_process_record (gdbarch, s390_process_record);
8025 set_gdbarch_process_record_signal (gdbarch, s390_linux_record_signal);
8026
8027 s390_init_linux_record_tdep (&s390_linux_record_tdep, ABI_LINUX_S390);
8028 s390_init_linux_record_tdep (&s390x_linux_record_tdep, ABI_LINUX_ZSERIES);
8029
5769d3cd
AC
8030 return gdbarch;
8031}
8032
8033
a78f21af
AC
8034extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
8035
5769d3cd 8036void
5ae5f592 8037_initialize_s390_tdep (void)
5769d3cd 8038{
5769d3cd
AC
8039 /* Hook us into the gdbarch mechanism. */
8040 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 8041
94eae614 8042 /* Initialize the GNU/Linux target descriptions. */
7803799a 8043 initialize_tdesc_s390_linux32 ();
c642a434
UW
8044 initialize_tdesc_s390_linux32v1 ();
8045 initialize_tdesc_s390_linux32v2 ();
7803799a 8046 initialize_tdesc_s390_linux64 ();
c642a434
UW
8047 initialize_tdesc_s390_linux64v1 ();
8048 initialize_tdesc_s390_linux64v2 ();
4ac33720 8049 initialize_tdesc_s390_te_linux64 ();
550bdf96
AA
8050 initialize_tdesc_s390_vx_linux64 ();
8051 initialize_tdesc_s390_tevx_linux64 ();
7803799a 8052 initialize_tdesc_s390x_linux64 ();
c642a434
UW
8053 initialize_tdesc_s390x_linux64v1 ();
8054 initialize_tdesc_s390x_linux64v2 ();
4ac33720 8055 initialize_tdesc_s390x_te_linux64 ();
550bdf96
AA
8056 initialize_tdesc_s390x_vx_linux64 ();
8057 initialize_tdesc_s390x_tevx_linux64 ();
5769d3cd 8058}
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