PR ld/12772
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
7b6bb8da
JB
3 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
ca557f44 5
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AC
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
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AC
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 23
d0f54f9d 24#include "defs.h"
5769d3cd
AC
25#include "arch-utils.h"
26#include "frame.h"
27#include "inferior.h"
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
78f8b424 42#include "gdb_assert.h"
a89aa300 43#include "dis-asm.h"
76a9d10f 44#include "solib-svr4.h"
3fc46200 45#include "prologue-value.h"
70728992 46#include "linux-tdep.h"
d0f54f9d 47#include "s390-tdep.h"
5769d3cd 48
7803799a 49#include "features/s390-linux32.c"
c642a434
UW
50#include "features/s390-linux32v1.c"
51#include "features/s390-linux32v2.c"
7803799a 52#include "features/s390-linux64.c"
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UW
53#include "features/s390-linux64v1.c"
54#include "features/s390-linux64v2.c"
7803799a 55#include "features/s390x-linux64.c"
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UW
56#include "features/s390x-linux64v1.c"
57#include "features/s390x-linux64v2.c"
7803799a 58
60e6cc42 59
d0f54f9d
JB
60/* The tdep structure. */
61
62struct gdbarch_tdep
5769d3cd 63{
b0cf273e
JB
64 /* ABI version. */
65 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
66
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UW
67 /* Pseudo register numbers. */
68 int gpr_full_regnum;
69 int pc_regnum;
70 int cc_regnum;
71
d0f54f9d
JB
72 /* Core file register sets. */
73 const struct regset *gregset;
74 int sizeof_gregset;
75
76 const struct regset *fpregset;
77 int sizeof_fpregset;
78};
79
80
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UW
81/* ABI call-saved register information. */
82
83static int
84s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 85{
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UW
86 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
87
88 switch (tdep->abi)
6707b003 89 {
7803799a
UW
90 case ABI_LINUX_S390:
91 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
92 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
93 || regnum == S390_A0_REGNUM)
94 return 1;
6707b003 95
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UW
96 break;
97
98 case ABI_LINUX_ZSERIES:
99 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
100 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
101 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
102 return 1;
103
104 break;
105 }
106
107 return 0;
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AC
108}
109
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UW
110static int
111s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
112{
113 /* The last-break address is read-only. */
114 return regnum == S390_LAST_BREAK_REGNUM;
115}
116
117static void
118s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
119{
120 struct gdbarch *gdbarch = get_regcache_arch (regcache);
121 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
122
123 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
124
125 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
126 messing with the PC we just installed, if we happen to be within
127 an interrupted system call that the kernel wants to restart.
128
129 Note that after we return from the dummy call, the SYSTEM_CALL and
130 ORIG_R2 registers will be automatically restored, and the kernel
131 continues to restart the system call at this point. */
132 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
133 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
134}
135
7803799a 136
d0f54f9d
JB
137/* DWARF Register Mapping. */
138
139static int s390_dwarf_regmap[] =
140{
141 /* General Purpose Registers. */
142 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
143 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
144 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
145 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
146
147 /* Floating Point Registers. */
148 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
149 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
150 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
151 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
152
153 /* Control Registers (not mapped). */
154 -1, -1, -1, -1, -1, -1, -1, -1,
155 -1, -1, -1, -1, -1, -1, -1, -1,
156
157 /* Access Registers. */
158 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
159 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
160 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
161 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
162
163 /* Program Status Word. */
164 S390_PSWM_REGNUM,
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UW
165 S390_PSWA_REGNUM,
166
167 /* GPR Lower Half Access. */
168 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
169 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
170 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
171 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434
UW
172
173 /* Linux-specific registers (not mapped). */
174 -1, -1, -1,
d0f54f9d
JB
175};
176
177/* Convert DWARF register number REG to the appropriate register
178 number used by GDB. */
a78f21af 179static int
d3f73121 180s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 181{
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UW
182 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
183
184 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
185 GPRs. Note that call frame information still refers to the 32-bit
186 lower halves, because s390_adjust_frame_regnum uses register numbers
187 66 .. 81 to access GPRs. */
188 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
189 return tdep->gpr_full_regnum + reg;
d0f54f9d 190
16aff9a6 191 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 192 return s390_dwarf_regmap[reg];
d0f54f9d 193
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UW
194 warning (_("Unmapped DWARF Register #%d encountered."), reg);
195 return -1;
196}
d0f54f9d 197
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UW
198/* Translate a .eh_frame register to DWARF register, or adjust a
199 .debug_frame register. */
200static int
201s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
202{
203 /* See s390_dwarf_reg_to_regnum for comments. */
204 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
205}
206
d0f54f9d 207
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UW
208/* Pseudo registers. */
209
210static const char *
211s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 212{
7803799a 213 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 214
7803799a
UW
215 if (regnum == tdep->pc_regnum)
216 return "pc";
d0f54f9d 217
7803799a
UW
218 if (regnum == tdep->cc_regnum)
219 return "cc";
d0f54f9d 220
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UW
221 if (tdep->gpr_full_regnum != -1
222 && regnum >= tdep->gpr_full_regnum
223 && regnum < tdep->gpr_full_regnum + 16)
224 {
225 static const char *full_name[] = {
226 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
227 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
228 };
229 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 230 }
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UW
231
232 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
233}
234
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UW
235static struct type *
236s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 237{
7803799a 238 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 239
7803799a
UW
240 if (regnum == tdep->pc_regnum)
241 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 242
7803799a
UW
243 if (regnum == tdep->cc_regnum)
244 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 245
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UW
246 if (tdep->gpr_full_regnum != -1
247 && regnum >= tdep->gpr_full_regnum
248 && regnum < tdep->gpr_full_regnum + 16)
249 return builtin_type (gdbarch)->builtin_uint64;
250
251 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
252}
253
05d1431c 254static enum register_status
7803799a
UW
255s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
256 int regnum, gdb_byte *buf)
d0f54f9d 257{
7803799a 258 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 259 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 260 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
261 ULONGEST val;
262
7803799a 263 if (regnum == tdep->pc_regnum)
d0f54f9d 264 {
05d1431c
PA
265 enum register_status status;
266
267 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
268 if (status == REG_VALID)
269 {
270 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
271 val &= 0x7fffffff;
272 store_unsigned_integer (buf, regsize, byte_order, val);
273 }
274 return status;
7803799a 275 }
d0f54f9d 276
7803799a
UW
277 if (regnum == tdep->cc_regnum)
278 {
05d1431c
PA
279 enum register_status status;
280
281 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
282 if (status == REG_VALID)
283 {
284 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
285 val = (val >> 12) & 3;
286 else
287 val = (val >> 44) & 3;
288 store_unsigned_integer (buf, regsize, byte_order, val);
289 }
290 return status;
7803799a 291 }
d0f54f9d 292
7803799a
UW
293 if (tdep->gpr_full_regnum != -1
294 && regnum >= tdep->gpr_full_regnum
295 && regnum < tdep->gpr_full_regnum + 16)
296 {
05d1431c 297 enum register_status status;
7803799a 298 ULONGEST val_upper;
05d1431c 299
7803799a
UW
300 regnum -= tdep->gpr_full_regnum;
301
05d1431c
PA
302 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
303 if (status == REG_VALID)
304 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
305 &val_upper);
306 if (status == REG_VALID)
307 {
308 val |= val_upper << 32;
309 store_unsigned_integer (buf, regsize, byte_order, val);
310 }
311 return status;
d0f54f9d 312 }
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UW
313
314 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
315}
316
317static void
7803799a
UW
318s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
319 int regnum, const gdb_byte *buf)
d0f54f9d 320{
7803799a 321 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 322 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 323 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
324 ULONGEST val, psw;
325
7803799a 326 if (regnum == tdep->pc_regnum)
d0f54f9d 327 {
7803799a
UW
328 val = extract_unsigned_integer (buf, regsize, byte_order);
329 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
330 {
331 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
332 val = (psw & 0x80000000) | (val & 0x7fffffff);
333 }
334 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
335 return;
336 }
d0f54f9d 337
7803799a
UW
338 if (regnum == tdep->cc_regnum)
339 {
340 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 341 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
342 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
343 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
344 else
345 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
346 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
347 return;
348 }
d0f54f9d 349
7803799a
UW
350 if (tdep->gpr_full_regnum != -1
351 && regnum >= tdep->gpr_full_regnum
352 && regnum < tdep->gpr_full_regnum + 16)
353 {
354 regnum -= tdep->gpr_full_regnum;
355 val = extract_unsigned_integer (buf, regsize, byte_order);
356 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
357 val & 0xffffffff);
358 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
359 val >> 32);
360 return;
d0f54f9d 361 }
7803799a
UW
362
363 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
364}
365
366/* 'float' values are stored in the upper half of floating-point
367 registers, even though we are otherwise a big-endian platform. */
368
9acbedc0
UW
369static struct value *
370s390_value_from_register (struct type *type, int regnum,
371 struct frame_info *frame)
d0f54f9d 372{
9acbedc0 373 struct value *value = default_value_from_register (type, regnum, frame);
56b9d9ac 374 int len = TYPE_LENGTH (check_typedef (type));
d0f54f9d 375
9acbedc0
UW
376 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8)
377 set_value_offset (value, 0);
d0f54f9d 378
9acbedc0 379 return value;
d0f54f9d
JB
380}
381
382/* Register groups. */
383
a78f21af 384static int
7803799a
UW
385s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
386 struct reggroup *group)
d0f54f9d
JB
387{
388 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
389
d6db1fab
UW
390 /* We usually save/restore the whole PSW, which includes PC and CC.
391 However, some older gdbservers may not support saving/restoring
392 the whole PSW yet, and will return an XML register description
393 excluding those from the save/restore register groups. In those
394 cases, we still need to explicitly save/restore PC and CC in order
395 to push or pop frames. Since this doesn't hurt anything if we
396 already save/restore the whole PSW (it's just redundant), we add
397 PC and CC at this point unconditionally. */
d0f54f9d 398 if (group == save_reggroup || group == restore_reggroup)
7803799a 399 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
400
401 return default_register_reggroup_p (gdbarch, regnum, group);
402}
403
404
405/* Core file register sets. */
406
407int s390_regmap_gregset[S390_NUM_REGS] =
408{
409 /* Program Status Word. */
410 0x00, 0x04,
411 /* General Purpose Registers. */
412 0x08, 0x0c, 0x10, 0x14,
413 0x18, 0x1c, 0x20, 0x24,
414 0x28, 0x2c, 0x30, 0x34,
415 0x38, 0x3c, 0x40, 0x44,
416 /* Access Registers. */
417 0x48, 0x4c, 0x50, 0x54,
418 0x58, 0x5c, 0x60, 0x64,
419 0x68, 0x6c, 0x70, 0x74,
420 0x78, 0x7c, 0x80, 0x84,
421 /* Floating Point Control Word. */
422 -1,
423 /* Floating Point Registers. */
424 -1, -1, -1, -1, -1, -1, -1, -1,
425 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
426 /* GPR Uppper Halves. */
427 -1, -1, -1, -1, -1, -1, -1, -1,
428 -1, -1, -1, -1, -1, -1, -1, -1,
c642a434
UW
429 /* Linux-specific optional "registers". */
430 0x88, -1, -1,
d0f54f9d
JB
431};
432
433int s390x_regmap_gregset[S390_NUM_REGS] =
434{
7803799a 435 /* Program Status Word. */
d0f54f9d
JB
436 0x00, 0x08,
437 /* General Purpose Registers. */
438 0x10, 0x18, 0x20, 0x28,
439 0x30, 0x38, 0x40, 0x48,
440 0x50, 0x58, 0x60, 0x68,
441 0x70, 0x78, 0x80, 0x88,
442 /* Access Registers. */
443 0x90, 0x94, 0x98, 0x9c,
444 0xa0, 0xa4, 0xa8, 0xac,
445 0xb0, 0xb4, 0xb8, 0xbc,
446 0xc0, 0xc4, 0xc8, 0xcc,
447 /* Floating Point Control Word. */
448 -1,
449 /* Floating Point Registers. */
450 -1, -1, -1, -1, -1, -1, -1, -1,
451 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
452 /* GPR Uppper Halves. */
453 0x10, 0x18, 0x20, 0x28,
454 0x30, 0x38, 0x40, 0x48,
455 0x50, 0x58, 0x60, 0x68,
456 0x70, 0x78, 0x80, 0x88,
c642a434
UW
457 /* Linux-specific optional "registers". */
458 0xd0, -1, -1,
d0f54f9d
JB
459};
460
461int s390_regmap_fpregset[S390_NUM_REGS] =
462{
463 /* Program Status Word. */
464 -1, -1,
465 /* General Purpose Registers. */
466 -1, -1, -1, -1, -1, -1, -1, -1,
467 -1, -1, -1, -1, -1, -1, -1, -1,
468 /* Access Registers. */
469 -1, -1, -1, -1, -1, -1, -1, -1,
470 -1, -1, -1, -1, -1, -1, -1, -1,
471 /* Floating Point Control Word. */
472 0x00,
473 /* Floating Point Registers. */
474 0x08, 0x10, 0x18, 0x20,
475 0x28, 0x30, 0x38, 0x40,
476 0x48, 0x50, 0x58, 0x60,
477 0x68, 0x70, 0x78, 0x80,
7803799a
UW
478 /* GPR Uppper Halves. */
479 -1, -1, -1, -1, -1, -1, -1, -1,
480 -1, -1, -1, -1, -1, -1, -1, -1,
c642a434
UW
481 /* Linux-specific optional "registers". */
482 -1, -1, -1,
7803799a
UW
483};
484
485int s390_regmap_upper[S390_NUM_REGS] =
486{
487 /* Program Status Word. */
488 -1, -1,
489 /* General Purpose Registers. */
490 -1, -1, -1, -1, -1, -1, -1, -1,
491 -1, -1, -1, -1, -1, -1, -1, -1,
492 /* Access Registers. */
493 -1, -1, -1, -1, -1, -1, -1, -1,
494 -1, -1, -1, -1, -1, -1, -1, -1,
495 /* Floating Point Control Word. */
496 -1,
497 /* Floating Point Registers. */
498 -1, -1, -1, -1, -1, -1, -1, -1,
499 -1, -1, -1, -1, -1, -1, -1, -1,
500 /* GPR Uppper Halves. */
501 0x00, 0x04, 0x08, 0x0c,
502 0x10, 0x14, 0x18, 0x1c,
503 0x20, 0x24, 0x28, 0x2c,
504 0x30, 0x34, 0x38, 0x3c,
c642a434
UW
505 /* Linux-specific optional "registers". */
506 -1, -1, -1,
507};
508
509int s390_regmap_last_break[S390_NUM_REGS] =
510{
511 /* Program Status Word. */
512 -1, -1,
513 /* General Purpose Registers. */
514 -1, -1, -1, -1, -1, -1, -1, -1,
515 -1, -1, -1, -1, -1, -1, -1, -1,
516 /* Access Registers. */
517 -1, -1, -1, -1, -1, -1, -1, -1,
518 -1, -1, -1, -1, -1, -1, -1, -1,
519 /* Floating Point Control Word. */
520 -1,
521 /* Floating Point Registers. */
522 -1, -1, -1, -1, -1, -1, -1, -1,
523 -1, -1, -1, -1, -1, -1, -1, -1,
524 /* GPR Uppper Halves. */
525 -1, -1, -1, -1, -1, -1, -1, -1,
526 -1, -1, -1, -1, -1, -1, -1, -1,
527 /* Linux-specific optional "registers". */
528 -1, 4, -1,
529};
530
531int s390x_regmap_last_break[S390_NUM_REGS] =
532{
533 /* Program Status Word. */
534 -1, -1,
535 /* General Purpose Registers. */
536 -1, -1, -1, -1, -1, -1, -1, -1,
537 -1, -1, -1, -1, -1, -1, -1, -1,
538 /* Access Registers. */
539 -1, -1, -1, -1, -1, -1, -1, -1,
540 -1, -1, -1, -1, -1, -1, -1, -1,
541 /* Floating Point Control Word. */
542 -1,
543 /* Floating Point Registers. */
544 -1, -1, -1, -1, -1, -1, -1, -1,
545 -1, -1, -1, -1, -1, -1, -1, -1,
546 /* GPR Uppper Halves. */
547 -1, -1, -1, -1, -1, -1, -1, -1,
548 -1, -1, -1, -1, -1, -1, -1, -1,
549 /* Linux-specific optional "registers". */
550 -1, 0, -1,
551};
552
553int s390_regmap_system_call[S390_NUM_REGS] =
554{
555 /* Program Status Word. */
556 -1, -1,
557 /* General Purpose Registers. */
558 -1, -1, -1, -1, -1, -1, -1, -1,
559 -1, -1, -1, -1, -1, -1, -1, -1,
560 /* Access Registers. */
561 -1, -1, -1, -1, -1, -1, -1, -1,
562 -1, -1, -1, -1, -1, -1, -1, -1,
563 /* Floating Point Control Word. */
564 -1,
565 /* Floating Point Registers. */
566 -1, -1, -1, -1, -1, -1, -1, -1,
567 -1, -1, -1, -1, -1, -1, -1, -1,
568 /* GPR Uppper Halves. */
569 -1, -1, -1, -1, -1, -1, -1, -1,
570 -1, -1, -1, -1, -1, -1, -1, -1,
571 /* Linux-specific optional "registers". */
572 -1, -1, 0,
d0f54f9d
JB
573};
574
575/* Supply register REGNUM from the register set REGSET to register cache
576 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
577static void
578s390_supply_regset (const struct regset *regset, struct regcache *regcache,
579 int regnum, const void *regs, size_t len)
580{
581 const int *offset = regset->descr;
582 int i;
583
584 for (i = 0; i < S390_NUM_REGS; i++)
585 {
586 if ((regnum == i || regnum == -1) && offset[i] != -1)
587 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
588 }
589}
590
92f38ec2
UW
591/* Collect register REGNUM from the register cache REGCACHE and store
592 it in the buffer specified by REGS and LEN as described by the
593 general-purpose register set REGSET. If REGNUM is -1, do this for
594 all registers in REGSET. */
595static void
596s390_collect_regset (const struct regset *regset,
597 const struct regcache *regcache,
598 int regnum, void *regs, size_t len)
599{
600 const int *offset = regset->descr;
601 int i;
602
603 for (i = 0; i < S390_NUM_REGS; i++)
604 {
605 if ((regnum == i || regnum == -1) && offset[i] != -1)
606 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
607 }
608}
609
d0f54f9d
JB
610static const struct regset s390_gregset = {
611 s390_regmap_gregset,
92f38ec2
UW
612 s390_supply_regset,
613 s390_collect_regset
d0f54f9d
JB
614};
615
616static const struct regset s390x_gregset = {
617 s390x_regmap_gregset,
92f38ec2
UW
618 s390_supply_regset,
619 s390_collect_regset
d0f54f9d
JB
620};
621
622static const struct regset s390_fpregset = {
623 s390_regmap_fpregset,
92f38ec2
UW
624 s390_supply_regset,
625 s390_collect_regset
d0f54f9d
JB
626};
627
7803799a
UW
628static const struct regset s390_upper_regset = {
629 s390_regmap_upper,
630 s390_supply_regset,
631 s390_collect_regset
632};
633
c642a434
UW
634static const struct regset s390_last_break_regset = {
635 s390_regmap_last_break,
636 s390_supply_regset,
637 s390_collect_regset
638};
639
640static const struct regset s390x_last_break_regset = {
641 s390x_regmap_last_break,
642 s390_supply_regset,
643 s390_collect_regset
644};
645
646static const struct regset s390_system_call_regset = {
647 s390_regmap_system_call,
648 s390_supply_regset,
649 s390_collect_regset
650};
651
652static struct core_regset_section s390_linux32_regset_sections[] =
653{
654 { ".reg", s390_sizeof_gregset, "general-purpose" },
655 { ".reg2", s390_sizeof_fpregset, "floating-point" },
656 { NULL, 0}
657};
658
659static struct core_regset_section s390_linux32v1_regset_sections[] =
660{
661 { ".reg", s390_sizeof_gregset, "general-purpose" },
662 { ".reg2", s390_sizeof_fpregset, "floating-point" },
663 { ".reg-s390-last-break", 8, "s390 last-break address" },
664 { NULL, 0}
665};
666
667static struct core_regset_section s390_linux32v2_regset_sections[] =
668{
669 { ".reg", s390_sizeof_gregset, "general-purpose" },
670 { ".reg2", s390_sizeof_fpregset, "floating-point" },
671 { ".reg-s390-last-break", 8, "s390 last-break address" },
672 { ".reg-s390-system-call", 4, "s390 system-call" },
673 { NULL, 0}
674};
675
676static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
677{
678 { ".reg", s390_sizeof_gregset, "general-purpose" },
679 { ".reg2", s390_sizeof_fpregset, "floating-point" },
680 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
681 { NULL, 0}
682};
683
c642a434
UW
684static struct core_regset_section s390_linux64v1_regset_sections[] =
685{
686 { ".reg", s390_sizeof_gregset, "general-purpose" },
687 { ".reg2", s390_sizeof_fpregset, "floating-point" },
688 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
689 { ".reg-s390-last-break", 8, "s930 last-break address" },
690 { NULL, 0}
691};
692
693static struct core_regset_section s390_linux64v2_regset_sections[] =
694{
695 { ".reg", s390_sizeof_gregset, "general-purpose" },
696 { ".reg2", s390_sizeof_fpregset, "floating-point" },
697 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
698 { ".reg-s390-last-break", 8, "s930 last-break address" },
699 { ".reg-s390-system-call", 4, "s390 system-call" },
700 { NULL, 0}
701};
702
703static struct core_regset_section s390x_linux64_regset_sections[] =
704{
705 { ".reg", s390x_sizeof_gregset, "general-purpose" },
706 { ".reg2", s390_sizeof_fpregset, "floating-point" },
707 { NULL, 0}
708};
709
710static struct core_regset_section s390x_linux64v1_regset_sections[] =
711{
712 { ".reg", s390x_sizeof_gregset, "general-purpose" },
713 { ".reg2", s390_sizeof_fpregset, "floating-point" },
714 { ".reg-s390-last-break", 8, "s930 last-break address" },
715 { NULL, 0}
716};
717
718static struct core_regset_section s390x_linux64v2_regset_sections[] =
719{
720 { ".reg", s390x_sizeof_gregset, "general-purpose" },
721 { ".reg2", s390_sizeof_fpregset, "floating-point" },
722 { ".reg-s390-last-break", 8, "s930 last-break address" },
723 { ".reg-s390-system-call", 4, "s390 system-call" },
724 { NULL, 0}
725};
726
727
d0f54f9d
JB
728/* Return the appropriate register set for the core section identified
729 by SECT_NAME and SECT_SIZE. */
63807e1d 730static const struct regset *
d0f54f9d
JB
731s390_regset_from_core_section (struct gdbarch *gdbarch,
732 const char *sect_name, size_t sect_size)
733{
734 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
735
e31dcd20 736 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
737 return tdep->gregset;
738
e31dcd20 739 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
740 return tdep->fpregset;
741
7803799a
UW
742 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
743 return &s390_upper_regset;
744
c642a434
UW
745 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
746 return (gdbarch_ptr_bit (gdbarch) == 32
747 ? &s390_last_break_regset : &s390x_last_break_regset);
748
749 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
750 return &s390_system_call_regset;
751
d0f54f9d 752 return NULL;
5769d3cd
AC
753}
754
7803799a
UW
755static const struct target_desc *
756s390_core_read_description (struct gdbarch *gdbarch,
757 struct target_ops *target, bfd *abfd)
758{
759 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
760 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
761 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a
UW
762 asection *section = bfd_get_section_by_name (abfd, ".reg");
763 if (!section)
764 return NULL;
765
766 switch (bfd_section_size (abfd, section))
767 {
768 case s390_sizeof_gregset:
c642a434
UW
769 if (high_gprs)
770 return (v2? tdesc_s390_linux64v2 :
771 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
772 else
773 return (v2? tdesc_s390_linux32v2 :
774 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
775
776 case s390x_sizeof_gregset:
c642a434
UW
777 return (v2? tdesc_s390x_linux64v2 :
778 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
779
780 default:
781 return NULL;
782 }
783}
784
d0f54f9d 785
4bc8c588
JB
786/* Decoding S/390 instructions. */
787
788/* Named opcode values for the S/390 instructions we recognize. Some
789 instructions have their opcode split across two fields; those are the
790 op1_* and op2_* enums. */
791enum
792 {
a8c99f38
JB
793 op1_lhi = 0xa7, op2_lhi = 0x08,
794 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 795 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 796 op_lr = 0x18,
a8c99f38
JB
797 op_lgr = 0xb904,
798 op_l = 0x58,
799 op1_ly = 0xe3, op2_ly = 0x58,
800 op1_lg = 0xe3, op2_lg = 0x04,
801 op_lm = 0x98,
802 op1_lmy = 0xeb, op2_lmy = 0x98,
803 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 804 op_st = 0x50,
a8c99f38 805 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 806 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 807 op_std = 0x60,
4bc8c588 808 op_stm = 0x90,
a8c99f38 809 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 810 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
811 op1_aghi = 0xa7, op2_aghi = 0x0b,
812 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
813 op1_agfi = 0xc2, op2_agfi = 0x08,
814 op1_afi = 0xc2, op2_afi = 0x09,
815 op1_algfi= 0xc2, op2_algfi= 0x0a,
816 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
817 op_ar = 0x1a,
818 op_agr = 0xb908,
819 op_a = 0x5a,
820 op1_ay = 0xe3, op2_ay = 0x5a,
821 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
822 op1_slgfi= 0xc2, op2_slgfi= 0x04,
823 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
824 op_sr = 0x1b,
825 op_sgr = 0xb909,
826 op_s = 0x5b,
827 op1_sy = 0xe3, op2_sy = 0x5b,
828 op1_sg = 0xe3, op2_sg = 0x09,
829 op_nr = 0x14,
830 op_ngr = 0xb980,
831 op_la = 0x41,
832 op1_lay = 0xe3, op2_lay = 0x71,
833 op1_larl = 0xc0, op2_larl = 0x00,
834 op_basr = 0x0d,
835 op_bas = 0x4d,
836 op_bcr = 0x07,
837 op_bc = 0x0d,
1db4e8a0
UW
838 op_bctr = 0x06,
839 op_bctgr = 0xb946,
840 op_bct = 0x46,
841 op1_bctg = 0xe3, op2_bctg = 0x46,
842 op_bxh = 0x86,
843 op1_bxhg = 0xeb, op2_bxhg = 0x44,
844 op_bxle = 0x87,
845 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
846 op1_bras = 0xa7, op2_bras = 0x05,
847 op1_brasl= 0xc0, op2_brasl= 0x05,
848 op1_brc = 0xa7, op2_brc = 0x04,
849 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
850 op1_brct = 0xa7, op2_brct = 0x06,
851 op1_brctg= 0xa7, op2_brctg= 0x07,
852 op_brxh = 0x84,
853 op1_brxhg= 0xec, op2_brxhg= 0x44,
854 op_brxle = 0x85,
855 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
856 };
857
858
a8c99f38
JB
859/* Read a single instruction from address AT. */
860
861#define S390_MAX_INSTR_SIZE 6
862static int
863s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
864{
865 static int s390_instrlen[] = { 2, 4, 4, 6 };
866 int instrlen;
867
8defab1a 868 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
869 return -1;
870 instrlen = s390_instrlen[instr[0] >> 6];
871 if (instrlen > 2)
872 {
8defab1a 873 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
874 return -1;
875 }
876 return instrlen;
877}
878
879
4bc8c588
JB
880/* The functions below are for recognizing and decoding S/390
881 instructions of various formats. Each of them checks whether INSN
882 is an instruction of the given format, with the specified opcodes.
883 If it is, it sets the remaining arguments to the values of the
884 instruction's fields, and returns a non-zero value; otherwise, it
885 returns zero.
886
887 These functions' arguments appear in the order they appear in the
888 instruction, not in the machine-language form. So, opcodes always
889 come first, even though they're sometimes scattered around the
890 instructions. And displacements appear before base and extension
891 registers, as they do in the assembly syntax, not at the end, as
892 they do in the machine language. */
a78f21af 893static int
4bc8c588
JB
894is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
895{
896 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
897 {
898 *r1 = (insn[1] >> 4) & 0xf;
899 /* i2 is a 16-bit signed quantity. */
900 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
901 return 1;
902 }
903 else
904 return 0;
905}
8ac0e65a 906
5769d3cd 907
4bc8c588
JB
908static int
909is_ril (bfd_byte *insn, int op1, int op2,
910 unsigned int *r1, int *i2)
911{
912 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
913 {
914 *r1 = (insn[1] >> 4) & 0xf;
915 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
916 no sign extension is necessary, but we don't want to assume
917 that. */
918 *i2 = (((insn[2] << 24)
919 | (insn[3] << 16)
920 | (insn[4] << 8)
921 | (insn[5])) ^ 0x80000000) - 0x80000000;
922 return 1;
923 }
924 else
925 return 0;
926}
927
928
929static int
930is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
931{
932 if (insn[0] == op)
933 {
934 *r1 = (insn[1] >> 4) & 0xf;
935 *r2 = insn[1] & 0xf;
936 return 1;
937 }
938 else
939 return 0;
940}
941
942
943static int
944is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
945{
946 if (((insn[0] << 8) | insn[1]) == op)
947 {
948 /* Yes, insn[3]. insn[2] is unused in RRE format. */
949 *r1 = (insn[3] >> 4) & 0xf;
950 *r2 = insn[3] & 0xf;
951 return 1;
952 }
953 else
954 return 0;
955}
956
957
958static int
959is_rs (bfd_byte *insn, int op,
960 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
961{
962 if (insn[0] == op)
963 {
964 *r1 = (insn[1] >> 4) & 0xf;
965 *r3 = insn[1] & 0xf;
966 *b2 = (insn[2] >> 4) & 0xf;
967 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
968 return 1;
969 }
970 else
971 return 0;
972}
973
974
975static int
a8c99f38 976is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
977 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
978{
979 if (insn[0] == op1
4bc8c588
JB
980 && insn[5] == op2)
981 {
982 *r1 = (insn[1] >> 4) & 0xf;
983 *r3 = insn[1] & 0xf;
984 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
985 /* The 'long displacement' is a 20-bit signed integer. */
986 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
987 ^ 0x80000) - 0x80000;
4bc8c588
JB
988 return 1;
989 }
990 else
991 return 0;
992}
993
994
1db4e8a0
UW
995static int
996is_rsi (bfd_byte *insn, int op,
997 unsigned int *r1, unsigned int *r3, int *i2)
998{
999 if (insn[0] == op)
1000 {
1001 *r1 = (insn[1] >> 4) & 0xf;
1002 *r3 = insn[1] & 0xf;
1003 /* i2 is a 16-bit signed quantity. */
1004 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1005 return 1;
1006 }
1007 else
1008 return 0;
1009}
1010
1011
1012static int
1013is_rie (bfd_byte *insn, int op1, int op2,
1014 unsigned int *r1, unsigned int *r3, int *i2)
1015{
1016 if (insn[0] == op1
1017 && insn[5] == op2)
1018 {
1019 *r1 = (insn[1] >> 4) & 0xf;
1020 *r3 = insn[1] & 0xf;
1021 /* i2 is a 16-bit signed quantity. */
1022 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1023 return 1;
1024 }
1025 else
1026 return 0;
1027}
1028
1029
4bc8c588
JB
1030static int
1031is_rx (bfd_byte *insn, int op,
1032 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1033{
1034 if (insn[0] == op)
1035 {
1036 *r1 = (insn[1] >> 4) & 0xf;
1037 *x2 = insn[1] & 0xf;
1038 *b2 = (insn[2] >> 4) & 0xf;
1039 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1040 return 1;
1041 }
1042 else
1043 return 0;
1044}
1045
1046
1047static int
a8c99f38 1048is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1049 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1050{
1051 if (insn[0] == op1
4bc8c588
JB
1052 && insn[5] == op2)
1053 {
1054 *r1 = (insn[1] >> 4) & 0xf;
1055 *x2 = insn[1] & 0xf;
1056 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1057 /* The 'long displacement' is a 20-bit signed integer. */
1058 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1059 ^ 0x80000) - 0x80000;
4bc8c588
JB
1060 return 1;
1061 }
1062 else
1063 return 0;
1064}
1065
1066
3fc46200 1067/* Prologue analysis. */
4bc8c588 1068
d0f54f9d
JB
1069#define S390_NUM_GPRS 16
1070#define S390_NUM_FPRS 16
4bc8c588 1071
a8c99f38
JB
1072struct s390_prologue_data {
1073
ee1b3323
UW
1074 /* The stack. */
1075 struct pv_area *stack;
1076
e17a4113 1077 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1078 int gpr_size;
1079 int fpr_size;
e17a4113 1080 enum bfd_endian byte_order;
a8c99f38
JB
1081
1082 /* The general-purpose registers. */
3fc46200 1083 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1084
1085 /* The floating-point registers. */
3fc46200 1086 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1087
121d8485
UW
1088 /* The offset relative to the CFA where the incoming GPR N was saved
1089 by the function prologue. 0 if not saved or unknown. */
1090 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1091
121d8485
UW
1092 /* Likewise for FPRs. */
1093 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1094
121d8485
UW
1095 /* Nonzero if the backchain was saved. This is assumed to be the
1096 case when the incoming SP is saved at the current SP location. */
1097 int back_chain_saved_p;
1098};
4bc8c588 1099
3fc46200
UW
1100/* Return the effective address for an X-style instruction, like:
1101
1102 L R1, D2(X2, B2)
1103
1104 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1105 constant; the effective address is the sum of all three. If either
1106 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1107 means that r0 can't be used as either X2 or B2. */
1108static pv_t
1109s390_addr (struct s390_prologue_data *data,
1110 int d2, unsigned int x2, unsigned int b2)
1111{
1112 pv_t result;
1113
1114 result = pv_constant (d2);
1115 if (x2)
1116 result = pv_add (result, data->gpr[x2]);
1117 if (b2)
1118 result = pv_add (result, data->gpr[b2]);
1119
1120 return result;
1121}
1122
1123/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1124static void
3fc46200
UW
1125s390_store (struct s390_prologue_data *data,
1126 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1127 pv_t value)
4bc8c588 1128{
3fc46200 1129 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1130 pv_t offset;
121d8485
UW
1131
1132 /* Check whether we are storing the backchain. */
3fc46200 1133 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1134
3fc46200 1135 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1136 if (size == data->gpr_size
3fc46200 1137 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1138 {
1139 data->back_chain_saved_p = 1;
1140 return;
1141 }
1142
1143
1144 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1145 if (!pv_area_store_would_trash (data->stack, addr))
1146 pv_area_store (data->stack, addr, size, value);
4bc8c588 1147
a8c99f38 1148
121d8485
UW
1149 /* Note: If this is some store we cannot identify, you might think we
1150 should forget our cached values, as any of those might have been hit.
1151
1152 However, we make the assumption that the register save areas are only
1153 ever stored to once in any given function, and we do recognize these
1154 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1155}
4bc8c588 1156
3fc46200
UW
1157/* Do a SIZE-byte load from D2(X2,B2). */
1158static pv_t
1159s390_load (struct s390_prologue_data *data,
1160 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1161
4bc8c588 1162{
3fc46200 1163 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1164 pv_t offset;
4bc8c588 1165
a8c99f38
JB
1166 /* If it's a load from an in-line constant pool, then we can
1167 simulate that, under the assumption that the code isn't
1168 going to change between the time the processor actually
1169 executed it creating the current frame, and the time when
1170 we're analyzing the code to unwind past that frame. */
3fc46200 1171 if (pv_is_constant (addr))
4bc8c588 1172 {
0542c86d 1173 struct target_section *secp;
3fc46200 1174 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38
JB
1175 if (secp != NULL
1176 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1177 & SEC_READONLY))
e17a4113
UW
1178 return pv_constant (read_memory_integer (addr.k, size,
1179 data->byte_order));
a8c99f38 1180 }
7666f43c 1181
121d8485 1182 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1183 return pv_area_fetch (data->stack, addr, size);
1184}
121d8485 1185
ee1b3323
UW
1186/* Function for finding saved registers in a 'struct pv_area'; we pass
1187 this to pv_area_scan.
121d8485 1188
ee1b3323
UW
1189 If VALUE is a saved register, ADDR says it was saved at a constant
1190 offset from the frame base, and SIZE indicates that the whole
1191 register was saved, record its offset in the reg_offset table in
1192 PROLOGUE_UNTYPED. */
1193static void
c378eb4e
MS
1194s390_check_for_saved (void *data_untyped, pv_t addr,
1195 CORE_ADDR size, pv_t value)
ee1b3323
UW
1196{
1197 struct s390_prologue_data *data = data_untyped;
1198 int i, offset;
1199
1200 if (!pv_is_register (addr, S390_SP_REGNUM))
1201 return;
1202
1203 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1204
ee1b3323
UW
1205 /* If we are storing the original value of a register, we want to
1206 record the CFA offset. If the same register is stored multiple
1207 times, the stack slot with the highest address counts. */
1208
1209 for (i = 0; i < S390_NUM_GPRS; i++)
1210 if (size == data->gpr_size
1211 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1212 if (data->gpr_slot[i] == 0
1213 || data->gpr_slot[i] > offset)
1214 {
1215 data->gpr_slot[i] = offset;
1216 return;
1217 }
1218
1219 for (i = 0; i < S390_NUM_FPRS; i++)
1220 if (size == data->fpr_size
1221 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1222 if (data->fpr_slot[i] == 0
1223 || data->fpr_slot[i] > offset)
1224 {
1225 data->fpr_slot[i] = offset;
1226 return;
1227 }
a8c99f38 1228}
4bc8c588 1229
a8c99f38
JB
1230/* Analyze the prologue of the function starting at START_PC,
1231 continuing at most until CURRENT_PC. Initialize DATA to
1232 hold all information we find out about the state of the registers
1233 and stack slots. Return the address of the instruction after
1234 the last one that changed the SP, FP, or back chain; or zero
1235 on error. */
1236static CORE_ADDR
1237s390_analyze_prologue (struct gdbarch *gdbarch,
1238 CORE_ADDR start_pc,
1239 CORE_ADDR current_pc,
1240 struct s390_prologue_data *data)
4bc8c588 1241{
a8c99f38
JB
1242 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1243
4bc8c588 1244 /* Our return value:
a8c99f38
JB
1245 The address of the instruction after the last one that changed
1246 the SP, FP, or back chain; zero if we got an error trying to
1247 read memory. */
1248 CORE_ADDR result = start_pc;
4bc8c588 1249
4bc8c588
JB
1250 /* The current PC for our abstract interpretation. */
1251 CORE_ADDR pc;
1252
1253 /* The address of the next instruction after that. */
1254 CORE_ADDR next_pc;
1255
4bc8c588
JB
1256 /* Set up everything's initial value. */
1257 {
1258 int i;
1259
55f960e1 1260 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1261
a8c99f38
JB
1262 /* For the purpose of prologue tracking, we consider the GPR size to
1263 be equal to the ABI word size, even if it is actually larger
1264 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1265 data->gpr_size = word_size;
1266 data->fpr_size = 8;
e17a4113 1267 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1268
4bc8c588 1269 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1270 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1271
1272 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1273 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1274
121d8485
UW
1275 for (i = 0; i < S390_NUM_GPRS; i++)
1276 data->gpr_slot[i] = 0;
1277
1278 for (i = 0; i < S390_NUM_FPRS; i++)
1279 data->fpr_slot[i] = 0;
4bc8c588 1280
121d8485 1281 data->back_chain_saved_p = 0;
4bc8c588
JB
1282 }
1283
a8c99f38
JB
1284 /* Start interpreting instructions, until we hit the frame's
1285 current PC or the first branch instruction. */
1286 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1287 {
4bc8c588 1288 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1289 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1290
3fc46200
UW
1291 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1292 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1293 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1294
4bc8c588 1295 /* Fields for various kinds of instructions. */
a8c99f38
JB
1296 unsigned int b2, r1, r2, x2, r3;
1297 int i2, d2;
4bc8c588 1298
121d8485 1299 /* The values of SP and FP before this instruction,
4bc8c588 1300 for detecting instructions that change them. */
3fc46200 1301 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1302 /* Likewise for the flag whether the back chain was saved. */
1303 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1304
1305 /* If we got an error trying to read the instruction, report it. */
1306 if (insn_len < 0)
8ac0e65a 1307 {
a8c99f38 1308 result = 0;
4bc8c588
JB
1309 break;
1310 }
1311
1312 next_pc = pc + insn_len;
1313
a8c99f38
JB
1314 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1315 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1316 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1317
4bc8c588 1318
3fc46200
UW
1319 /* LHI r1, i2 --- load halfword immediate. */
1320 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1321 /* LGFI r1, i2 --- load fullword immediate. */
1322 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1323 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1324 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1325 data->gpr[r1] = pv_constant (i2);
1326
1327 /* LR r1, r2 --- load from register. */
1328 /* LGR r1, r2 --- load from register (64-bit version). */
1329 else if (is_rr (insn32, op_lr, &r1, &r2)
1330 || is_rre (insn64, op_lgr, &r1, &r2))
1331 data->gpr[r1] = data->gpr[r2];
1332
1333 /* L r1, d2(x2, b2) --- load. */
1334 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1335 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1336 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1337 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1338 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1339 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1340
1341 /* ST r1, d2(x2, b2) --- store. */
1342 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1343 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1344 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1345 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1346 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1347 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1348
1349 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1350 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1351 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1352
1353 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1354 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1355 version). */
3fc46200
UW
1356 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1357 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1358 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1359 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1360 {
3fc46200
UW
1361 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1362 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1363 }
1364
3fc46200
UW
1365 /* AHI r1, i2 --- add halfword immediate. */
1366 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1367 /* AFI r1, i2 --- add fullword immediate. */
1368 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1369 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1370 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1371 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1372 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1373 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1374
1375 /* ALFI r1, i2 --- add logical immediate. */
1376 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1377 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1378 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1379 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1380 (CORE_ADDR)i2 & 0xffffffff);
1381
1382 /* AR r1, r2 -- add register. */
1383 /* AGR r1, r2 -- add register (64-bit version). */
1384 else if (is_rr (insn32, op_ar, &r1, &r2)
1385 || is_rre (insn64, op_agr, &r1, &r2))
1386 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1387
1388 /* A r1, d2(x2, b2) -- add. */
1389 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1390 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1391 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1392 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1393 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1394 data->gpr[r1] = pv_add (data->gpr[r1],
1395 s390_load (data, d2, x2, b2, data->gpr_size));
1396
1397 /* SLFI r1, i2 --- subtract logical immediate. */
1398 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1399 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1400 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1401 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1402 -((CORE_ADDR)i2 & 0xffffffff));
1403
1404 /* SR r1, r2 -- subtract register. */
1405 /* SGR r1, r2 -- subtract register (64-bit version). */
1406 else if (is_rr (insn32, op_sr, &r1, &r2)
1407 || is_rre (insn64, op_sgr, &r1, &r2))
1408 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1409
1410 /* S r1, d2(x2, b2) -- subtract. */
1411 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1412 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1413 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1414 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1415 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1416 data->gpr[r1] = pv_subtract (data->gpr[r1],
1417 s390_load (data, d2, x2, b2, data->gpr_size));
1418
1419 /* LA r1, d2(x2, b2) --- load address. */
1420 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1421 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1422 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1423 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1424
1425 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1426 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1427 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1428
3fc46200 1429 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1430 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1431 else if (is_rr (insn, op_basr, &r1, &r2)
1432 && r2 == 0)
3fc46200 1433 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1434
3fc46200 1435 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1436 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1437 {
3fc46200 1438 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1439 next_pc = pc + i2 * 2;
4bc8c588 1440
a8c99f38
JB
1441 /* We'd better not interpret any backward branches. We'll
1442 never terminate. */
1443 if (next_pc <= pc)
4bc8c588
JB
1444 break;
1445 }
1446
a8c99f38
JB
1447 /* Terminate search when hitting any other branch instruction. */
1448 else if (is_rr (insn, op_basr, &r1, &r2)
1449 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1450 || is_rr (insn, op_bcr, &r1, &r2)
1451 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1452 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1453 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1454 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1455 break;
1456
4bc8c588
JB
1457 else
1458 /* An instruction we don't know how to simulate. The only
1459 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1460 to 'unknown'. Instead, we'll be optimistic: we assume that
1461 we *can* interpret every instruction that the compiler uses
1462 to manipulate any of the data we're interested in here --
1463 then we can just ignore anything else. */
1464 ;
4bc8c588
JB
1465
1466 /* Record the address after the last instruction that changed
1467 the FP, SP, or backlink. Ignore instructions that changed
1468 them back to their original values --- those are probably
1469 restore instructions. (The back chain is never restored,
1470 just popped.) */
1471 {
3fc46200
UW
1472 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1473 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1474
3fc46200
UW
1475 if ((! pv_is_identical (pre_insn_sp, sp)
1476 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1477 && sp.kind != pvk_unknown)
1478 || (! pv_is_identical (pre_insn_fp, fp)
1479 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1480 && fp.kind != pvk_unknown)
121d8485 1481 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1482 result = next_pc;
4bc8c588 1483 }
5769d3cd 1484 }
4bc8c588 1485
ee1b3323
UW
1486 /* Record where all the registers were saved. */
1487 pv_area_scan (data->stack, s390_check_for_saved, data);
1488
1489 free_pv_area (data->stack);
1490 data->stack = NULL;
1491
4bc8c588 1492 return result;
5769d3cd
AC
1493}
1494
a8c99f38
JB
1495/* Advance PC across any function entry prologue instructions to reach
1496 some "real" code. */
1497static CORE_ADDR
6093d2eb 1498s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1499{
1500 struct s390_prologue_data data;
1501 CORE_ADDR skip_pc;
6093d2eb 1502 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1503 return skip_pc ? skip_pc : pc;
1504}
1505
d0f54f9d
JB
1506/* Return true if we are in the functin's epilogue, i.e. after the
1507 instruction that destroyed the function's stack frame. */
1508static int
1509s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1510{
1511 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1512
1513 /* In frameless functions, there's not frame to destroy and thus
1514 we don't care about the epilogue.
1515
1516 In functions with frame, the epilogue sequence is a pair of
1517 a LM-type instruction that restores (amongst others) the
1518 return register %r14 and the stack pointer %r15, followed
1519 by a branch 'br %r14' --or equivalent-- that effects the
1520 actual return.
1521
1522 In that situation, this function needs to return 'true' in
1523 exactly one case: when pc points to that branch instruction.
1524
1525 Thus we try to disassemble the one instructions immediately
177b42fe 1526 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1527 modifying the stack pointer.
1528
1529 Note that disassembling backwards is not reliable, so there
1530 is a slight chance of false positives here ... */
1531
1532 bfd_byte insn[6];
1533 unsigned int r1, r3, b2;
1534 int d2;
1535
1536 if (word_size == 4
8defab1a 1537 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1538 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1539 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1540 return 1;
1541
a8c99f38 1542 if (word_size == 4
8defab1a 1543 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1544 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1545 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1546 return 1;
1547
d0f54f9d 1548 if (word_size == 8
8defab1a 1549 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1550 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1551 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1552 return 1;
1553
1554 return 0;
1555}
5769d3cd 1556
1db4e8a0
UW
1557/* Displaced stepping. */
1558
1559/* Fix up the state of registers and memory after having single-stepped
1560 a displaced instruction. */
1561static void
1562s390_displaced_step_fixup (struct gdbarch *gdbarch,
1563 struct displaced_step_closure *closure,
1564 CORE_ADDR from, CORE_ADDR to,
1565 struct regcache *regs)
1566{
1567 /* Since we use simple_displaced_step_copy_insn, our closure is a
1568 copy of the instruction. */
1569 gdb_byte *insn = (gdb_byte *) closure;
1570 static int s390_instrlen[] = { 2, 4, 4, 6 };
1571 int insnlen = s390_instrlen[insn[0] >> 6];
1572
1573 /* Fields for various kinds of instructions. */
1574 unsigned int b2, r1, r2, x2, r3;
1575 int i2, d2;
1576
1577 /* Get current PC and addressing mode bit. */
1578 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1579 ULONGEST amode = 0;
1db4e8a0
UW
1580
1581 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1582 {
1583 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1584 amode &= 0x80000000;
1585 }
1586
1587 if (debug_displaced)
1588 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1589 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1590 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1591 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1592
1593 /* Handle absolute branch and save instructions. */
1594 if (is_rr (insn, op_basr, &r1, &r2)
1595 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1596 {
1597 /* Recompute saved return address in R1. */
1598 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1599 amode | (from + insnlen));
1600 }
1601
1602 /* Handle absolute branch instructions. */
1603 else if (is_rr (insn, op_bcr, &r1, &r2)
1604 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1605 || is_rr (insn, op_bctr, &r1, &r2)
1606 || is_rre (insn, op_bctgr, &r1, &r2)
1607 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1608 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1609 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1610 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1611 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1612 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1613 {
1614 /* Update PC iff branch was *not* taken. */
1615 if (pc == to + insnlen)
1616 regcache_write_pc (regs, from + insnlen);
1617 }
1618
1619 /* Handle PC-relative branch and save instructions. */
1620 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1621 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1622 {
1623 /* Update PC. */
1624 regcache_write_pc (regs, pc - to + from);
1625 /* Recompute saved return address in R1. */
1626 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1627 amode | (from + insnlen));
1628 }
1629
1630 /* Handle PC-relative branch instructions. */
1631 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1632 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1633 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1634 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1635 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1636 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1637 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1638 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1639 {
1640 /* Update PC. */
1641 regcache_write_pc (regs, pc - to + from);
1642 }
1643
1644 /* Handle LOAD ADDRESS RELATIVE LONG. */
1645 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1646 {
0161e4b9
UW
1647 /* Update PC. */
1648 regcache_write_pc (regs, from + insnlen);
1db4e8a0
UW
1649 /* Recompute output address in R1. */
1650 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1651 amode | (from + i2 * 2));
1db4e8a0
UW
1652 }
1653
1654 /* If we executed a breakpoint instruction, point PC right back at it. */
1655 else if (insn[0] == 0x0 && insn[1] == 0x1)
1656 regcache_write_pc (regs, from);
1657
1658 /* For any other insn, PC points right after the original instruction. */
1659 else
1660 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1661
1662 if (debug_displaced)
1663 fprintf_unfiltered (gdb_stdlog,
1664 "displaced: (s390) pc is now %s\n",
1665 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1666}
a8c99f38 1667
d6db1fab
UW
1668
1669/* Helper routine to unwind pseudo registers. */
1670
1671static struct value *
1672s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1673{
1674 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1675 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1676 struct type *type = register_type (gdbarch, regnum);
1677
1678 /* Unwind PC via PSW address. */
1679 if (regnum == tdep->pc_regnum)
1680 {
1681 struct value *val;
1682
1683 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1684 if (!value_optimized_out (val))
1685 {
1686 LONGEST pswa = value_as_long (val);
1687
1688 if (TYPE_LENGTH (type) == 4)
1689 return value_from_pointer (type, pswa & 0x7fffffff);
1690 else
1691 return value_from_pointer (type, pswa);
1692 }
1693 }
1694
1695 /* Unwind CC via PSW mask. */
1696 if (regnum == tdep->cc_regnum)
1697 {
1698 struct value *val;
1699
1700 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1701 if (!value_optimized_out (val))
1702 {
1703 LONGEST pswm = value_as_long (val);
1704
1705 if (TYPE_LENGTH (type) == 4)
1706 return value_from_longest (type, (pswm >> 12) & 3);
1707 else
1708 return value_from_longest (type, (pswm >> 44) & 3);
1709 }
1710 }
1711
1712 /* Unwind full GPRs to show at least the lower halves (as the
1713 upper halves are undefined). */
1714 if (tdep->gpr_full_regnum != -1
1715 && regnum >= tdep->gpr_full_regnum
1716 && regnum < tdep->gpr_full_regnum + 16)
1717 {
1718 int reg = regnum - tdep->gpr_full_regnum;
1719 struct value *val;
1720
1721 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1722 if (!value_optimized_out (val))
1723 return value_cast (type, val);
1724 }
1725
1726 return allocate_optimized_out_value (type);
1727}
1728
1729static struct value *
1730s390_trad_frame_prev_register (struct frame_info *this_frame,
1731 struct trad_frame_saved_reg saved_regs[],
1732 int regnum)
1733{
1734 if (regnum < S390_NUM_REGS)
1735 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1736 else
1737 return s390_unwind_pseudo_register (this_frame, regnum);
1738}
1739
1740
a8c99f38
JB
1741/* Normal stack frames. */
1742
1743struct s390_unwind_cache {
1744
1745 CORE_ADDR func;
1746 CORE_ADDR frame_base;
1747 CORE_ADDR local_base;
1748
1749 struct trad_frame_saved_reg *saved_regs;
1750};
1751
a78f21af 1752static int
f089c433 1753s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1754 struct s390_unwind_cache *info)
5769d3cd 1755{
f089c433 1756 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1757 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1758 struct s390_prologue_data data;
3fc46200
UW
1759 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1760 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1761 int i;
1762 CORE_ADDR cfa;
a8c99f38
JB
1763 CORE_ADDR func;
1764 CORE_ADDR result;
1765 ULONGEST reg;
1766 CORE_ADDR prev_sp;
1767 int frame_pointer;
1768 int size;
edb3359d 1769 struct frame_info *next_frame;
a8c99f38
JB
1770
1771 /* Try to find the function start address. If we can't find it, we don't
1772 bother searching for it -- with modern compilers this would be mostly
1773 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1774 or else a valid backchain ... */
f089c433 1775 func = get_frame_func (this_frame);
a8c99f38
JB
1776 if (!func)
1777 return 0;
5769d3cd 1778
a8c99f38
JB
1779 /* Try to analyze the prologue. */
1780 result = s390_analyze_prologue (gdbarch, func,
f089c433 1781 get_frame_pc (this_frame), &data);
a8c99f38 1782 if (!result)
5769d3cd 1783 return 0;
5769d3cd 1784
a8c99f38
JB
1785 /* If this was successful, we should have found the instruction that
1786 sets the stack pointer register to the previous value of the stack
1787 pointer minus the frame size. */
3fc46200 1788 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1789 return 0;
a8c99f38
JB
1790
1791 /* A frame size of zero at this point can mean either a real
1792 frameless function, or else a failure to find the prologue.
1793 Perform some sanity checks to verify we really have a
1794 frameless function. */
1795 if (sp->k == 0)
5769d3cd 1796 {
a8c99f38
JB
1797 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1798 size zero. This is only possible if the next frame is a sentinel
1799 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1800 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1801 needed, instead the code should simpliy rely on its
1802 analysis. */
edb3359d
DJ
1803 next_frame = get_next_frame (this_frame);
1804 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1805 next_frame = get_next_frame (next_frame);
1806 if (next_frame
f089c433 1807 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1808 return 0;
5769d3cd 1809
a8c99f38
JB
1810 /* If we really have a frameless function, %r14 must be valid
1811 -- in particular, it must point to a different function. */
f089c433 1812 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1813 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1814 if (get_pc_function_start (reg) == func)
5769d3cd 1815 {
a8c99f38
JB
1816 /* However, there is one case where it *is* valid for %r14
1817 to point to the same function -- if this is a recursive
1818 call, and we have stopped in the prologue *before* the
1819 stack frame was allocated.
1820
1821 Recognize this case by looking ahead a bit ... */
5769d3cd 1822
a8c99f38 1823 struct s390_prologue_data data2;
3fc46200 1824 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1825
1826 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1827 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1828 && sp->k != 0))
1829 return 0;
5769d3cd 1830 }
5769d3cd 1831 }
5769d3cd
AC
1832
1833
a8c99f38
JB
1834 /* OK, we've found valid prologue data. */
1835 size = -sp->k;
5769d3cd 1836
a8c99f38
JB
1837 /* If the frame pointer originally also holds the same value
1838 as the stack pointer, we're probably using it. If it holds
1839 some other value -- even a constant offset -- it is most
1840 likely used as temp register. */
3fc46200 1841 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1842 frame_pointer = S390_FRAME_REGNUM;
1843 else
1844 frame_pointer = S390_SP_REGNUM;
1845
1846 /* If we've detected a function with stack frame, we'll still have to
1847 treat it as frameless if we're currently within the function epilog
c378eb4e 1848 code at a point where the frame pointer has already been restored.
a8c99f38 1849 This can only happen in an innermost frame. */
0e100dab
AC
1850 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1851 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1852 next_frame = get_next_frame (this_frame);
1853 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1854 next_frame = get_next_frame (next_frame);
f089c433 1855 if (size > 0
edb3359d 1856 && (next_frame == NULL
f089c433 1857 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1858 {
a8c99f38
JB
1859 /* See the comment in s390_in_function_epilogue_p on why this is
1860 not completely reliable ... */
f089c433 1861 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1862 {
a8c99f38
JB
1863 memset (&data, 0, sizeof (data));
1864 size = 0;
1865 frame_pointer = S390_SP_REGNUM;
5769d3cd 1866 }
5769d3cd 1867 }
5769d3cd 1868
a8c99f38
JB
1869 /* Once we know the frame register and the frame size, we can unwind
1870 the current value of the frame register from the next frame, and
1871 add back the frame size to arrive that the previous frame's
1872 stack pointer value. */
f089c433 1873 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1874 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1875
7803799a
UW
1876 /* Set up ABI call-saved/call-clobbered registers. */
1877 for (i = 0; i < S390_NUM_REGS; i++)
1878 if (!s390_register_call_saved (gdbarch, i))
1879 trad_frame_set_unknown (info->saved_regs, i);
1880
1881 /* CC is always call-clobbered. */
d6db1fab 1882 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1883
121d8485
UW
1884 /* Record the addresses of all register spill slots the prologue parser
1885 has recognized. Consider only registers defined as call-saved by the
1886 ABI; for call-clobbered registers the parser may have recognized
1887 spurious stores. */
5769d3cd 1888
7803799a
UW
1889 for (i = 0; i < 16; i++)
1890 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1891 && data.gpr_slot[i] != 0)
121d8485 1892 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1893
7803799a
UW
1894 for (i = 0; i < 16; i++)
1895 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1896 && data.fpr_slot[i] != 0)
1897 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1898
1899 /* Function return will set PC to %r14. */
d6db1fab 1900 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1901
1902 /* In frameless functions, we unwind simply by moving the return
1903 address to the PC. However, if we actually stored to the
1904 save area, use that -- we might only think the function frameless
1905 because we're in the middle of the prologue ... */
1906 if (size == 0
d6db1fab 1907 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1908 {
d6db1fab 1909 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1910 }
a8c99f38
JB
1911
1912 /* Another sanity check: unless this is a frameless function,
1913 we should have found spill slots for SP and PC.
1914 If not, we cannot unwind further -- this happens e.g. in
1915 libc's thread_start routine. */
1916 if (size > 0)
5769d3cd 1917 {
a8c99f38 1918 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1919 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1920 prev_sp = -1;
5769d3cd 1921 }
a8c99f38
JB
1922
1923 /* We use the current value of the frame register as local_base,
1924 and the top of the register save area as frame_base. */
1925 if (prev_sp != -1)
1926 {
1927 info->frame_base = prev_sp + 16*word_size + 32;
1928 info->local_base = prev_sp - size;
1929 }
1930
1931 info->func = func;
1932 return 1;
5769d3cd
AC
1933}
1934
a78f21af 1935static void
f089c433 1936s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1937 struct s390_unwind_cache *info)
5769d3cd 1938{
f089c433 1939 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1940 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1941 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1942 CORE_ADDR backchain;
1943 ULONGEST reg;
1944 LONGEST sp;
7803799a
UW
1945 int i;
1946
1947 /* Set up ABI call-saved/call-clobbered registers. */
1948 for (i = 0; i < S390_NUM_REGS; i++)
1949 if (!s390_register_call_saved (gdbarch, i))
1950 trad_frame_set_unknown (info->saved_regs, i);
1951
1952 /* CC is always call-clobbered. */
d6db1fab 1953 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1954
1955 /* Get the backchain. */
f089c433 1956 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1957 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1958
1959 /* A zero backchain terminates the frame chain. As additional
1960 sanity check, let's verify that the spill slot for SP in the
1961 save area pointed to by the backchain in fact links back to
1962 the save area. */
1963 if (backchain != 0
e17a4113
UW
1964 && safe_read_memory_integer (backchain + 15*word_size,
1965 word_size, byte_order, &sp)
a8c99f38
JB
1966 && (CORE_ADDR)sp == backchain)
1967 {
1968 /* We don't know which registers were saved, but it will have
1969 to be at least %r14 and %r15. This will allow us to continue
1970 unwinding, but other prev-frame registers may be incorrect ... */
1971 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1972 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1973
1974 /* Function return will set PC to %r14. */
d6db1fab 1975 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1976 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1977
1978 /* We use the current value of the frame register as local_base,
1979 and the top of the register save area as frame_base. */
1980 info->frame_base = backchain + 16*word_size + 32;
1981 info->local_base = reg;
1982 }
1983
f089c433 1984 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1985}
1986
a8c99f38 1987static struct s390_unwind_cache *
f089c433 1988s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1989 void **this_prologue_cache)
1990{
1991 struct s390_unwind_cache *info;
1992 if (*this_prologue_cache)
1993 return *this_prologue_cache;
1994
1995 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1996 *this_prologue_cache = info;
f089c433 1997 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1998 info->func = -1;
1999 info->frame_base = -1;
2000 info->local_base = -1;
2001
2002 /* Try to use prologue analysis to fill the unwind cache.
2003 If this fails, fall back to reading the stack backchain. */
f089c433
UW
2004 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2005 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
2006
2007 return info;
2008}
5769d3cd 2009
a78f21af 2010static void
f089c433 2011s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2012 void **this_prologue_cache,
2013 struct frame_id *this_id)
5769d3cd 2014{
a8c99f38 2015 struct s390_unwind_cache *info
f089c433 2016 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2017
a8c99f38
JB
2018 if (info->frame_base == -1)
2019 return;
5769d3cd 2020
a8c99f38 2021 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2022}
2023
f089c433
UW
2024static struct value *
2025s390_frame_prev_register (struct frame_info *this_frame,
2026 void **this_prologue_cache, int regnum)
a8c99f38 2027{
7803799a 2028 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2029 struct s390_unwind_cache *info
f089c433 2030 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2031
d6db1fab 2032 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2033}
2034
2035static const struct frame_unwind s390_frame_unwind = {
2036 NORMAL_FRAME,
8fbca658 2037 default_frame_unwind_stop_reason,
a8c99f38 2038 s390_frame_this_id,
f089c433
UW
2039 s390_frame_prev_register,
2040 NULL,
2041 default_frame_sniffer
a8c99f38
JB
2042};
2043
5769d3cd 2044
8e645ae7
AC
2045/* Code stubs and their stack frames. For things like PLTs and NULL
2046 function calls (where there is no true frame and the return address
2047 is in the RETADDR register). */
a8c99f38 2048
8e645ae7
AC
2049struct s390_stub_unwind_cache
2050{
a8c99f38
JB
2051 CORE_ADDR frame_base;
2052 struct trad_frame_saved_reg *saved_regs;
2053};
2054
8e645ae7 2055static struct s390_stub_unwind_cache *
f089c433 2056s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2057 void **this_prologue_cache)
5769d3cd 2058{
f089c433 2059 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2060 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2061 struct s390_stub_unwind_cache *info;
a8c99f38 2062 ULONGEST reg;
5c3cf190 2063
a8c99f38
JB
2064 if (*this_prologue_cache)
2065 return *this_prologue_cache;
5c3cf190 2066
8e645ae7 2067 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2068 *this_prologue_cache = info;
f089c433 2069 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2070
2071 /* The return address is in register %r14. */
d6db1fab 2072 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2073
2074 /* Retrieve stack pointer and determine our frame base. */
f089c433 2075 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2076 info->frame_base = reg + 16*word_size + 32;
2077
2078 return info;
5769d3cd
AC
2079}
2080
a8c99f38 2081static void
f089c433 2082s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2083 void **this_prologue_cache,
2084 struct frame_id *this_id)
5769d3cd 2085{
8e645ae7 2086 struct s390_stub_unwind_cache *info
f089c433
UW
2087 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2088 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2089}
5769d3cd 2090
f089c433
UW
2091static struct value *
2092s390_stub_frame_prev_register (struct frame_info *this_frame,
2093 void **this_prologue_cache, int regnum)
8e645ae7
AC
2094{
2095 struct s390_stub_unwind_cache *info
f089c433 2096 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2097 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2098}
2099
f089c433
UW
2100static int
2101s390_stub_frame_sniffer (const struct frame_unwind *self,
2102 struct frame_info *this_frame,
2103 void **this_prologue_cache)
a8c99f38 2104{
93d42b30 2105 CORE_ADDR addr_in_block;
8e645ae7
AC
2106 bfd_byte insn[S390_MAX_INSTR_SIZE];
2107
2108 /* If the current PC points to non-readable memory, we assume we
2109 have trapped due to an invalid function pointer call. We handle
2110 the non-existing current function like a PLT stub. */
f089c433 2111 addr_in_block = get_frame_address_in_block (this_frame);
93d42b30 2112 if (in_plt_section (addr_in_block, NULL)
f089c433
UW
2113 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2114 return 1;
2115 return 0;
a8c99f38 2116}
5769d3cd 2117
f089c433
UW
2118static const struct frame_unwind s390_stub_frame_unwind = {
2119 NORMAL_FRAME,
8fbca658 2120 default_frame_unwind_stop_reason,
f089c433
UW
2121 s390_stub_frame_this_id,
2122 s390_stub_frame_prev_register,
2123 NULL,
2124 s390_stub_frame_sniffer
2125};
2126
5769d3cd 2127
a8c99f38 2128/* Signal trampoline stack frames. */
5769d3cd 2129
a8c99f38
JB
2130struct s390_sigtramp_unwind_cache {
2131 CORE_ADDR frame_base;
2132 struct trad_frame_saved_reg *saved_regs;
2133};
5769d3cd 2134
a8c99f38 2135static struct s390_sigtramp_unwind_cache *
f089c433 2136s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2137 void **this_prologue_cache)
5769d3cd 2138{
f089c433 2139 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2140 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2141 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2142 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2143 struct s390_sigtramp_unwind_cache *info;
2144 ULONGEST this_sp, prev_sp;
7803799a 2145 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2146 int i;
2147
2148 if (*this_prologue_cache)
2149 return *this_prologue_cache;
5769d3cd 2150
a8c99f38
JB
2151 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2152 *this_prologue_cache = info;
f089c433 2153 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2154
f089c433
UW
2155 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2156 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2157 next_cfa = this_sp + 16*word_size + 32;
2158
2159 /* New-style RT frame:
2160 retcode + alignment (8 bytes)
2161 siginfo (128 bytes)
c378eb4e 2162 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2163 if (next_ra == next_cfa)
2164 {
f0f63663 2165 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2166 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2167 upper GPR halves if present. */
2168 sigreg_high_off = 8;
a8c99f38
JB
2169 }
2170
2171 /* Old-style RT frame and all non-RT frames:
2172 old signal mask (8 bytes)
c378eb4e 2173 pointer to sigregs. */
5769d3cd
AC
2174 else
2175 {
e17a4113
UW
2176 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2177 word_size, byte_order);
7803799a
UW
2178 /* sigregs are followed by signo (4 bytes), then by the
2179 upper GPR halves if present. */
2180 sigreg_high_off = 4;
a8c99f38 2181 }
5769d3cd 2182
a8c99f38
JB
2183 /* The sigregs structure looks like this:
2184 long psw_mask;
2185 long psw_addr;
2186 long gprs[16];
2187 int acrs[16];
2188 int fpc;
2189 int __pad;
2190 double fprs[16]; */
5769d3cd 2191
7803799a
UW
2192 /* PSW mask and address. */
2193 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2194 sigreg_ptr += word_size;
7803799a 2195 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2196 sigreg_ptr += word_size;
2197
2198 /* Then the GPRs. */
2199 for (i = 0; i < 16; i++)
2200 {
2201 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2202 sigreg_ptr += word_size;
2203 }
2204
2205 /* Then the ACRs. */
2206 for (i = 0; i < 16; i++)
2207 {
2208 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2209 sigreg_ptr += 4;
5769d3cd 2210 }
5769d3cd 2211
a8c99f38
JB
2212 /* The floating-point control word. */
2213 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2214 sigreg_ptr += 8;
5769d3cd 2215
a8c99f38
JB
2216 /* And finally the FPRs. */
2217 for (i = 0; i < 16; i++)
2218 {
2219 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2220 sigreg_ptr += 8;
2221 }
2222
7803799a
UW
2223 /* If we have them, the GPR upper halves are appended at the end. */
2224 sigreg_ptr += sigreg_high_off;
2225 if (tdep->gpr_full_regnum != -1)
2226 for (i = 0; i < 16; i++)
2227 {
2228 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2229 sigreg_ptr += 4;
2230 }
2231
a8c99f38
JB
2232 /* Restore the previous frame's SP. */
2233 prev_sp = read_memory_unsigned_integer (
2234 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2235 word_size, byte_order);
5769d3cd 2236
a8c99f38
JB
2237 /* Determine our frame base. */
2238 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2239
a8c99f38 2240 return info;
5769d3cd
AC
2241}
2242
a8c99f38 2243static void
f089c433 2244s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2245 void **this_prologue_cache,
2246 struct frame_id *this_id)
5769d3cd 2247{
a8c99f38 2248 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2249 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2250 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2251}
2252
f089c433
UW
2253static struct value *
2254s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2255 void **this_prologue_cache, int regnum)
a8c99f38
JB
2256{
2257 struct s390_sigtramp_unwind_cache *info
f089c433 2258 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2259 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2260}
2261
f089c433
UW
2262static int
2263s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2264 struct frame_info *this_frame,
2265 void **this_prologue_cache)
5769d3cd 2266{
f089c433 2267 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2268 bfd_byte sigreturn[2];
4c8287ac 2269
8defab1a 2270 if (target_read_memory (pc, sigreturn, 2))
f089c433 2271 return 0;
4c8287ac 2272
a8c99f38 2273 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2274 return 0;
5769d3cd 2275
a8c99f38
JB
2276 if (sigreturn[1] != 119 /* sigreturn */
2277 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2278 return 0;
a8c99f38 2279
f089c433 2280 return 1;
5769d3cd
AC
2281}
2282
f089c433
UW
2283static const struct frame_unwind s390_sigtramp_frame_unwind = {
2284 SIGTRAMP_FRAME,
8fbca658 2285 default_frame_unwind_stop_reason,
f089c433
UW
2286 s390_sigtramp_frame_this_id,
2287 s390_sigtramp_frame_prev_register,
2288 NULL,
2289 s390_sigtramp_frame_sniffer
2290};
2291
4c8287ac 2292
a8c99f38
JB
2293/* Frame base handling. */
2294
2295static CORE_ADDR
f089c433 2296s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2297{
a8c99f38 2298 struct s390_unwind_cache *info
f089c433 2299 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2300 return info->frame_base;
2301}
2302
2303static CORE_ADDR
f089c433 2304s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2305{
2306 struct s390_unwind_cache *info
f089c433 2307 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2308 return info->local_base;
2309}
2310
2311static const struct frame_base s390_frame_base = {
2312 &s390_frame_unwind,
2313 s390_frame_base_address,
2314 s390_local_base_address,
2315 s390_local_base_address
2316};
2317
2318static CORE_ADDR
2319s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2320{
7803799a 2321 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2322 ULONGEST pc;
7803799a 2323 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2324 return gdbarch_addr_bits_remove (gdbarch, pc);
2325}
2326
2327static CORE_ADDR
2328s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2329{
2330 ULONGEST sp;
2331 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2332 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2333}
2334
2335
a431654a
AC
2336/* DWARF-2 frame support. */
2337
7803799a
UW
2338static struct value *
2339s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2340 int regnum)
2341{
d6db1fab 2342 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2343}
2344
a431654a
AC
2345static void
2346s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2347 struct dwarf2_frame_state_reg *reg,
4a4e5149 2348 struct frame_info *this_frame)
a431654a
AC
2349{
2350 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2351
d6db1fab
UW
2352 /* The condition code (and thus PSW mask) is call-clobbered. */
2353 if (regnum == S390_PSWM_REGNUM)
2354 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2355
2356 /* The PSW address unwinds to the return address. */
2357 else if (regnum == S390_PSWA_REGNUM)
2358 reg->how = DWARF2_FRAME_REG_RA;
2359
7803799a
UW
2360 /* Fixed registers are call-saved or call-clobbered
2361 depending on the ABI in use. */
d6db1fab 2362 else if (regnum < S390_NUM_REGS)
a431654a 2363 {
7803799a 2364 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2365 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2366 else
a431654a 2367 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2368 }
a431654a 2369
d6db1fab
UW
2370 /* We install a special function to unwind pseudos. */
2371 else
7803799a
UW
2372 {
2373 reg->how = DWARF2_FRAME_REG_FN;
2374 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2375 }
2376}
2377
2378
b0cf273e
JB
2379/* Dummy function calls. */
2380
78f8b424
JB
2381/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2382 "Integer-like" types are those that should be passed the way
2383 integers are: integers, enums, ranges, characters, and booleans. */
2384static int
2385is_integer_like (struct type *type)
2386{
2387 enum type_code code = TYPE_CODE (type);
2388
2389 return (code == TYPE_CODE_INT
2390 || code == TYPE_CODE_ENUM
2391 || code == TYPE_CODE_RANGE
2392 || code == TYPE_CODE_CHAR
2393 || code == TYPE_CODE_BOOL);
2394}
2395
78f8b424
JB
2396/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2397 "Pointer-like" types are those that should be passed the way
2398 pointers are: pointers and references. */
2399static int
2400is_pointer_like (struct type *type)
2401{
2402 enum type_code code = TYPE_CODE (type);
2403
2404 return (code == TYPE_CODE_PTR
2405 || code == TYPE_CODE_REF);
2406}
2407
2408
20a940cc
JB
2409/* Return non-zero if TYPE is a `float singleton' or `double
2410 singleton', zero otherwise.
2411
2412 A `T singleton' is a struct type with one member, whose type is
2413 either T or a `T singleton'. So, the following are all float
2414 singletons:
2415
2416 struct { float x };
2417 struct { struct { float x; } x; };
2418 struct { struct { struct { float x; } x; } x; };
2419
2420 ... and so on.
2421
b0cf273e
JB
2422 All such structures are passed as if they were floats or doubles,
2423 as the (revised) ABI says. */
20a940cc
JB
2424static int
2425is_float_singleton (struct type *type)
2426{
b0cf273e
JB
2427 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2428 {
2429 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2430 CHECK_TYPEDEF (singleton_type);
2431
2432 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2433 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2434 || is_float_singleton (singleton_type));
2435 }
2436
2437 return 0;
20a940cc
JB
2438}
2439
2440
2441/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2442 "Struct-like" types are those that should be passed as structs are:
2443 structs and unions.
2444
2445 As an odd quirk, not mentioned in the ABI, GCC passes float and
2446 double singletons as if they were a plain float, double, etc. (The
2447 corresponding union types are handled normally.) So we exclude
2448 those types here. *shrug* */
2449static int
2450is_struct_like (struct type *type)
2451{
2452 enum type_code code = TYPE_CODE (type);
2453
2454 return (code == TYPE_CODE_UNION
2455 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2456}
2457
2458
2459/* Return non-zero if TYPE is a float-like type, zero otherwise.
2460 "Float-like" types are those that should be passed as
2461 floating-point values are.
2462
2463 You'd think this would just be floats, doubles, long doubles, etc.
2464 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2465 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2466 corresponding union types are handled normally.) So we include
20a940cc
JB
2467 those types here. *shrug* */
2468static int
2469is_float_like (struct type *type)
2470{
2471 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2472 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2473 || is_float_singleton (type));
2474}
2475
2476
78f8b424 2477static int
b0cf273e 2478is_power_of_two (unsigned int n)
78f8b424 2479{
b0cf273e 2480 return ((n & (n - 1)) == 0);
78f8b424
JB
2481}
2482
b0cf273e
JB
2483/* Return non-zero if TYPE should be passed as a pointer to a copy,
2484 zero otherwise. */
4d819d0e 2485static int
b0cf273e 2486s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
2487{
2488 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2489 if (length > 8)
2490 return 1;
4d819d0e 2491
56b9d9ac
UW
2492 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2493 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2494 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2495}
2496
b0cf273e
JB
2497/* Return non-zero if TYPE should be passed in a float register
2498 if possible. */
78f8b424 2499static int
b0cf273e 2500s390_function_arg_float (struct type *type)
78f8b424 2501{
78f8b424 2502 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2503 if (length > 8)
2504 return 0;
78f8b424 2505
b0cf273e 2506 return is_float_like (type);
4d819d0e
JB
2507}
2508
b0cf273e
JB
2509/* Return non-zero if TYPE should be passed in an integer register
2510 (or a pair of integer registers) if possible. */
78f8b424 2511static int
b0cf273e 2512s390_function_arg_integer (struct type *type)
78f8b424 2513{
78f8b424 2514 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2515 if (length > 8)
2516 return 0;
78f8b424 2517
b0cf273e
JB
2518 return is_integer_like (type)
2519 || is_pointer_like (type)
2520 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
2521}
2522
78f8b424
JB
2523/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2524 word as required for the ABI. */
2525static LONGEST
e17a4113 2526extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2527{
e17a4113 2528 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2529 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2530
2531 /* Even structs get passed in the least significant bits of the
2532 register / memory word. It's not really right to extract them as
2533 an integer, but it does take care of the extension. */
2534 if (TYPE_UNSIGNED (type))
0fd88904 2535 return extract_unsigned_integer (value_contents (arg),
e17a4113 2536 TYPE_LENGTH (type), byte_order);
78f8b424 2537 else
0fd88904 2538 return extract_signed_integer (value_contents (arg),
e17a4113 2539 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2540}
2541
2542
78f8b424
JB
2543/* Return the alignment required by TYPE. */
2544static int
2545alignment_of (struct type *type)
2546{
2547 int alignment;
2548
2549 if (is_integer_like (type)
2550 || is_pointer_like (type)
a16b8bcd
UW
2551 || TYPE_CODE (type) == TYPE_CODE_FLT
2552 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2553 alignment = TYPE_LENGTH (type);
2554 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2555 || TYPE_CODE (type) == TYPE_CODE_UNION)
2556 {
2557 int i;
2558
2559 alignment = 1;
2560 for (i = 0; i < TYPE_NFIELDS (type); i++)
2561 {
56b9d9ac
UW
2562 int field_alignment
2563 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424
JB
2564
2565 if (field_alignment > alignment)
2566 alignment = field_alignment;
2567 }
2568 }
2569 else
2570 alignment = 1;
2571
2572 /* Check that everything we ever return is a power of two. Lots of
2573 code doesn't want to deal with aligning things to arbitrary
2574 boundaries. */
2575 gdb_assert ((alignment & (alignment - 1)) == 0);
2576
2577 return alignment;
2578}
2579
2580
2581/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2582 place to be passed to a function, as specified by the "GNU/Linux
2583 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2584
2585 SP is the current stack pointer. We must put arguments, links,
2586 padding, etc. whereever they belong, and return the new stack
2587 pointer value.
2588
2589 If STRUCT_RETURN is non-zero, then the function we're calling is
2590 going to return a structure by value; STRUCT_ADDR is the address of
2591 a block we've allocated for it on the stack.
2592
2593 Our caller has taken care of any type promotions needed to satisfy
2594 prototypes or the old K&R argument-passing rules. */
a78f21af 2595static CORE_ADDR
7d9b040b 2596s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2597 struct regcache *regcache, CORE_ADDR bp_addr,
2598 int nargs, struct value **args, CORE_ADDR sp,
2599 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2600{
b0cf273e
JB
2601 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2602 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2603 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2604 int i;
5769d3cd 2605
78f8b424
JB
2606 /* If the i'th argument is passed as a reference to a copy, then
2607 copy_addr[i] is the address of the copy we made. */
2608 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2609
c0cc4c83 2610 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2611 for (i = 0; i < nargs; i++)
2612 {
2613 struct value *arg = args[i];
56b9d9ac 2614 struct type *type = check_typedef (value_type (arg));
78f8b424 2615 unsigned length = TYPE_LENGTH (type);
5769d3cd 2616
b0cf273e 2617 if (s390_function_arg_pass_by_reference (type))
01c464e9 2618 {
78f8b424 2619 sp -= length;
5b03f266 2620 sp = align_down (sp, alignment_of (type));
78f8b424 2621 copy_addr[i] = sp;
01c464e9 2622 }
5769d3cd 2623 }
5769d3cd 2624
78f8b424
JB
2625 /* Reserve space for the parameter area. As a conservative
2626 simplification, we assume that everything will be passed on the
b0cf273e
JB
2627 stack. Since every argument larger than 8 bytes will be
2628 passed by reference, we use this simple upper bound. */
2629 sp -= nargs * 8;
78f8b424 2630
78f8b424
JB
2631 /* After all that, make sure it's still aligned on an eight-byte
2632 boundary. */
5b03f266 2633 sp = align_down (sp, 8);
78f8b424 2634
c0cc4c83
UW
2635 /* Allocate the standard frame areas: the register save area, the
2636 word reserved for the compiler (which seems kind of meaningless),
2637 and the back chain pointer. */
2638 sp -= 16*word_size + 32;
2639
2640 /* Now we have the final SP value. Make sure we didn't underflow;
2641 on 31-bit, this would result in addresses with the high bit set,
2642 which causes confusion elsewhere. Note that if we error out
2643 here, stack and registers remain untouched. */
2644 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2645 error (_("Stack overflow"));
2646
2647
78f8b424
JB
2648 /* Finally, place the actual parameters, working from SP towards
2649 higher addresses. The code above is supposed to reserve enough
2650 space for this. */
2651 {
2652 int fr = 0;
2653 int gr = 2;
c0cc4c83 2654 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2655
b0cf273e 2656 /* A struct is returned using general register 2. */
4d819d0e 2657 if (struct_return)
b0cf273e
JB
2658 {
2659 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2660 struct_addr);
2661 gr++;
2662 }
4d819d0e 2663
78f8b424
JB
2664 for (i = 0; i < nargs; i++)
2665 {
2666 struct value *arg = args[i];
56b9d9ac 2667 struct type *type = check_typedef (value_type (arg));
b0cf273e
JB
2668 unsigned length = TYPE_LENGTH (type);
2669
2670 if (s390_function_arg_pass_by_reference (type))
2671 {
c0cc4c83
UW
2672 /* Actually copy the argument contents to the stack slot
2673 that was reserved above. */
2674 write_memory (copy_addr[i], value_contents (arg), length);
2675
b0cf273e
JB
2676 if (gr <= 6)
2677 {
2678 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2679 copy_addr[i]);
2680 gr++;
2681 }
2682 else
2683 {
e17a4113
UW
2684 write_memory_unsigned_integer (starg, word_size, byte_order,
2685 copy_addr[i]);
b0cf273e
JB
2686 starg += word_size;
2687 }
2688 }
2689 else if (s390_function_arg_float (type))
2690 {
2691 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2692 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2693 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2694 {
2695 /* When we store a single-precision value in an FP register,
2696 it occupies the leftmost bits. */
2697 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2698 0, length, value_contents (arg));
b0cf273e
JB
2699 fr += 2;
2700 }
2701 else
2702 {
2703 /* When we store a single-precision value in a stack slot,
2704 it occupies the rightmost bits. */
2705 starg = align_up (starg + length, word_size);
0fd88904 2706 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2707 }
2708 }
2709 else if (s390_function_arg_integer (type) && length <= word_size)
2710 {
2711 if (gr <= 6)
2712 {
2713 /* Integer arguments are always extended to word size. */
2714 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2715 extend_simple_arg (gdbarch,
2716 arg));
b0cf273e
JB
2717 gr++;
2718 }
2719 else
2720 {
2721 /* Integer arguments are always extended to word size. */
e17a4113
UW
2722 write_memory_signed_integer (starg, word_size, byte_order,
2723 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2724 starg += word_size;
2725 }
2726 }
2727 else if (s390_function_arg_integer (type) && length == 2*word_size)
2728 {
2729 if (gr <= 5)
2730 {
2731 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2732 value_contents (arg));
b0cf273e 2733 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2734 value_contents (arg) + word_size);
b0cf273e
JB
2735 gr += 2;
2736 }
2737 else
2738 {
2739 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2740 in it, then don't go back and use it again later. */
2741 gr = 7;
2742
0fd88904 2743 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2744 starg += length;
2745 }
2746 }
2747 else
e2e0b3e5 2748 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2749 }
2750 }
2751
b0cf273e
JB
2752 /* Store return address. */
2753 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2754
2755 /* Store updated stack pointer. */
2756 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2757
a8c99f38 2758 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2759 which is actually the top of the register save area. */
2760 return sp + 16*word_size + 32;
5769d3cd
AC
2761}
2762
f089c433 2763/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2764 dummy frame. The frame ID's base needs to match the TOS value
2765 returned by push_dummy_call, and the PC match the dummy frame's
2766 breakpoint. */
2767static struct frame_id
f089c433 2768s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2769{
a8c99f38 2770 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2771 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2772 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2773
121d8485 2774 return frame_id_build (sp + 16*word_size + 32,
f089c433 2775 get_frame_pc (this_frame));
b0cf273e 2776}
c8f9d51c 2777
4074e13c
JB
2778static CORE_ADDR
2779s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2780{
2781 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2782 always be aligned on an eight-byte boundary. */
2783 return (addr & -8);
2784}
2785
2786
b0cf273e
JB
2787/* Function return value access. */
2788
2789static enum return_value_convention
2790s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2791{
b0cf273e
JB
2792 int length = TYPE_LENGTH (type);
2793 if (length > 8)
2794 return RETURN_VALUE_STRUCT_CONVENTION;
2795
2796 switch (TYPE_CODE (type))
2797 {
2798 case TYPE_CODE_STRUCT:
2799 case TYPE_CODE_UNION:
2800 case TYPE_CODE_ARRAY:
56b9d9ac 2801 case TYPE_CODE_COMPLEX:
b0cf273e 2802 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2803
b0cf273e
JB
2804 default:
2805 return RETURN_VALUE_REGISTER_CONVENTION;
2806 }
c8f9d51c
JB
2807}
2808
b0cf273e 2809static enum return_value_convention
c055b101
CV
2810s390_return_value (struct gdbarch *gdbarch, struct type *func_type,
2811 struct type *type, struct regcache *regcache,
2812 gdb_byte *out, const gdb_byte *in)
5769d3cd 2813{
e17a4113 2814 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2815 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2816 enum return_value_convention rvc;
2817 int length;
2818
2819 type = check_typedef (type);
2820 rvc = s390_return_value_convention (gdbarch, type);
2821 length = TYPE_LENGTH (type);
2822
b0cf273e
JB
2823 if (in)
2824 {
2825 switch (rvc)
2826 {
2827 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2828 if (TYPE_CODE (type) == TYPE_CODE_FLT
2829 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2830 {
2831 /* When we store a single-precision value in an FP register,
2832 it occupies the leftmost bits. */
2833 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2834 0, length, in);
2835 }
2836 else if (length <= word_size)
2837 {
2838 /* Integer arguments are always extended to word size. */
2839 if (TYPE_UNSIGNED (type))
2840 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2841 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2842 else
2843 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2844 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2845 }
2846 else if (length == 2*word_size)
2847 {
2848 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2849 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2850 }
2851 else
e2e0b3e5 2852 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2853 break;
2854
2855 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2856 error (_("Cannot set function return value."));
b0cf273e
JB
2857 break;
2858 }
2859 }
2860 else if (out)
2861 {
2862 switch (rvc)
2863 {
2864 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2865 if (TYPE_CODE (type) == TYPE_CODE_FLT
2866 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2867 {
2868 /* When we store a single-precision value in an FP register,
2869 it occupies the leftmost bits. */
2870 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2871 0, length, out);
2872 }
2873 else if (length <= word_size)
2874 {
2875 /* Integer arguments occupy the rightmost bits. */
2876 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2877 word_size - length, length, out);
2878 }
2879 else if (length == 2*word_size)
2880 {
2881 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2882 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2883 }
2884 else
e2e0b3e5 2885 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2886 break;
5769d3cd 2887
b0cf273e 2888 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2889 error (_("Function return value unknown."));
b0cf273e
JB
2890 break;
2891 }
2892 }
2893
2894 return rvc;
2895}
5769d3cd
AC
2896
2897
a8c99f38
JB
2898/* Breakpoints. */
2899
43af2100 2900static const gdb_byte *
c378eb4e
MS
2901s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2902 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2903{
43af2100 2904 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2905
2906 *lenptr = sizeof (breakpoint);
2907 return breakpoint;
2908}
2909
5769d3cd 2910
a8c99f38 2911/* Address handling. */
5769d3cd
AC
2912
2913static CORE_ADDR
24568a2c 2914s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2915{
a8c99f38 2916 return addr & 0x7fffffff;
5769d3cd
AC
2917}
2918
ffc65945
KB
2919static int
2920s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2921{
2922 if (byte_size == 4)
119ac181 2923 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2924 else
2925 return 0;
2926}
2927
2928static const char *
2929s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2930{
119ac181 2931 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2932 return "mode32";
2933 else
2934 return NULL;
2935}
2936
a78f21af 2937static int
c378eb4e
MS
2938s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2939 const char *name,
ffc65945
KB
2940 int *type_flags_ptr)
2941{
2942 if (strcmp (name, "mode32") == 0)
2943 {
119ac181 2944 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2945 return 1;
2946 }
2947 else
2948 return 0;
2949}
2950
a8c99f38
JB
2951/* Set up gdbarch struct. */
2952
a78f21af 2953static struct gdbarch *
5769d3cd
AC
2954s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2955{
7803799a
UW
2956 const struct target_desc *tdesc = info.target_desc;
2957 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2958 struct gdbarch *gdbarch;
2959 struct gdbarch_tdep *tdep;
7803799a
UW
2960 int tdep_abi;
2961 int have_upper = 0;
c642a434
UW
2962 int have_linux_v1 = 0;
2963 int have_linux_v2 = 0;
7803799a
UW
2964 int first_pseudo_reg, last_pseudo_reg;
2965
2966 /* Default ABI and register size. */
2967 switch (info.bfd_arch_info->mach)
2968 {
2969 case bfd_mach_s390_31:
2970 tdep_abi = ABI_LINUX_S390;
2971 break;
2972
2973 case bfd_mach_s390_64:
2974 tdep_abi = ABI_LINUX_ZSERIES;
2975 break;
2976
2977 default:
2978 return NULL;
2979 }
2980
2981 /* Use default target description if none provided by the target. */
2982 if (!tdesc_has_registers (tdesc))
2983 {
2984 if (tdep_abi == ABI_LINUX_S390)
2985 tdesc = tdesc_s390_linux32;
2986 else
2987 tdesc = tdesc_s390x_linux64;
2988 }
2989
2990 /* Check any target description for validity. */
2991 if (tdesc_has_registers (tdesc))
2992 {
2993 static const char *const gprs[] = {
2994 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2995 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2996 };
2997 static const char *const fprs[] = {
2998 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2999 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3000 };
3001 static const char *const acrs[] = {
3002 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3003 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3004 };
3005 static const char *const gprs_lower[] = {
3006 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3007 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3008 };
3009 static const char *const gprs_upper[] = {
3010 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3011 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3012 };
3013 const struct tdesc_feature *feature;
3014 int i, valid_p = 1;
3015
3016 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3017 if (feature == NULL)
3018 return NULL;
3019
3020 tdesc_data = tdesc_data_alloc ();
3021
3022 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3023 S390_PSWM_REGNUM, "pswm");
3024 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3025 S390_PSWA_REGNUM, "pswa");
3026
3027 if (tdesc_unnumbered_register (feature, "r0"))
3028 {
3029 for (i = 0; i < 16; i++)
3030 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3031 S390_R0_REGNUM + i, gprs[i]);
3032 }
3033 else
3034 {
3035 have_upper = 1;
3036
3037 for (i = 0; i < 16; i++)
3038 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3039 S390_R0_REGNUM + i,
3040 gprs_lower[i]);
3041 for (i = 0; i < 16; i++)
3042 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3043 S390_R0_UPPER_REGNUM + i,
3044 gprs_upper[i]);
3045 }
3046
3047 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3048 if (feature == NULL)
3049 {
3050 tdesc_data_cleanup (tdesc_data);
3051 return NULL;
3052 }
3053
3054 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3055 S390_FPC_REGNUM, "fpc");
3056 for (i = 0; i < 16; i++)
3057 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3058 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3059
7803799a
UW
3060 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3061 if (feature == NULL)
3062 {
3063 tdesc_data_cleanup (tdesc_data);
3064 return NULL;
3065 }
3066
3067 for (i = 0; i < 16; i++)
3068 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3069 S390_A0_REGNUM + i, acrs[i]);
3070
c642a434
UW
3071 /* Optional Linux-specific "registers". */
3072 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3073 if (feature)
3074 {
3075 tdesc_numbered_register (feature, tdesc_data,
3076 S390_ORIG_R2_REGNUM, "orig_r2");
3077
3078 if (tdesc_numbered_register (feature, tdesc_data,
3079 S390_LAST_BREAK_REGNUM, "last_break"))
3080 have_linux_v1 = 1;
3081
3082 if (tdesc_numbered_register (feature, tdesc_data,
3083 S390_SYSTEM_CALL_REGNUM, "system_call"))
3084 have_linux_v2 = 1;
3085
3086 if (have_linux_v2 > have_linux_v1)
3087 valid_p = 0;
3088 }
3089
7803799a
UW
3090 if (!valid_p)
3091 {
3092 tdesc_data_cleanup (tdesc_data);
3093 return NULL;
3094 }
3095 }
5769d3cd 3096
7803799a
UW
3097 /* Find a candidate among extant architectures. */
3098 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3099 arches != NULL;
3100 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3101 {
3102 tdep = gdbarch_tdep (arches->gdbarch);
3103 if (!tdep)
3104 continue;
3105 if (tdep->abi != tdep_abi)
3106 continue;
3107 if ((tdep->gpr_full_regnum != -1) != have_upper)
3108 continue;
3109 if (tdesc_data != NULL)
3110 tdesc_data_cleanup (tdesc_data);
3111 return arches->gdbarch;
3112 }
5769d3cd 3113
7803799a 3114 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 3115 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 3116 tdep->abi = tdep_abi;
d0f54f9d 3117 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3118
3119 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3120 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3121
1de90795
UW
3122 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3123 We can safely let them default to 128-bit, since the debug info
3124 will give the size of type actually used in each case. */
3125 set_gdbarch_long_double_bit (gdbarch, 128);
3126 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3127
aaab4dba 3128 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3129 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3130 always. */
5769d3cd 3131 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3132 /* Stack grows downward. */
3133 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3134 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3135 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3136 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3137
7803799a 3138 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3139 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3140 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3141 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3142 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3143 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
3144 set_gdbarch_regset_from_core_section (gdbarch,
3145 s390_regset_from_core_section);
7803799a 3146 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3147 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3148 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3149 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3150 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3151 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3152 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3153 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3154 s390_pseudo_register_reggroup_p);
3155 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3156
3157 /* Assign pseudo register numbers. */
3158 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3159 last_pseudo_reg = first_pseudo_reg;
3160 tdep->gpr_full_regnum = -1;
3161 if (have_upper)
3162 {
3163 tdep->gpr_full_regnum = last_pseudo_reg;
3164 last_pseudo_reg += 16;
3165 }
3166 tdep->pc_regnum = last_pseudo_reg++;
3167 tdep->cc_regnum = last_pseudo_reg++;
3168 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3169 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3170
b0cf273e
JB
3171 /* Inferior function calls. */
3172 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3173 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3174 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3175 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3176
a8c99f38 3177 /* Frame handling. */
a431654a 3178 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3179 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3180 dwarf2_append_unwinders (gdbarch);
a431654a 3181 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3182 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3183 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3184 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3185 frame_base_set_default (gdbarch, &s390_frame_base);
3186 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3187 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3188
1db4e8a0
UW
3189 /* Displaced stepping. */
3190 set_gdbarch_displaced_step_copy_insn (gdbarch,
3191 simple_displaced_step_copy_insn);
3192 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3193 set_gdbarch_displaced_step_free_closure (gdbarch,
3194 simple_displaced_step_free_closure);
3195 set_gdbarch_displaced_step_location (gdbarch,
3196 displaced_step_at_entry_point);
3197 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3198
70728992
PA
3199 /* Note that GNU/Linux is the only OS supported on this
3200 platform. */
3201 linux_init_abi (info, gdbarch);
3202
7803799a 3203 switch (tdep->abi)
5769d3cd 3204 {
7803799a 3205 case ABI_LINUX_S390:
d0f54f9d
JB
3206 tdep->gregset = &s390_gregset;
3207 tdep->sizeof_gregset = s390_sizeof_gregset;
3208 tdep->fpregset = &s390_fpregset;
3209 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3210
3211 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3212 set_solib_svr4_fetch_link_map_offsets
3213 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434
UW
3214
3215 if (have_upper)
3216 {
3217 if (have_linux_v2)
3218 set_gdbarch_core_regset_sections (gdbarch,
3219 s390_linux64v2_regset_sections);
3220 else if (have_linux_v1)
3221 set_gdbarch_core_regset_sections (gdbarch,
3222 s390_linux64v1_regset_sections);
3223 else
3224 set_gdbarch_core_regset_sections (gdbarch,
3225 s390_linux64_regset_sections);
3226 }
3227 else
3228 {
3229 if (have_linux_v2)
3230 set_gdbarch_core_regset_sections (gdbarch,
3231 s390_linux32v2_regset_sections);
3232 else if (have_linux_v1)
3233 set_gdbarch_core_regset_sections (gdbarch,
3234 s390_linux32v1_regset_sections);
3235 else
3236 set_gdbarch_core_regset_sections (gdbarch,
3237 s390_linux32_regset_sections);
3238 }
5769d3cd 3239 break;
b0cf273e 3240
7803799a 3241 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3242 tdep->gregset = &s390x_gregset;
3243 tdep->sizeof_gregset = s390x_sizeof_gregset;
3244 tdep->fpregset = &s390_fpregset;
3245 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3246
3247 set_gdbarch_long_bit (gdbarch, 64);
3248 set_gdbarch_long_long_bit (gdbarch, 64);
3249 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3250 set_solib_svr4_fetch_link_map_offsets
3251 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
3252 set_gdbarch_address_class_type_flags (gdbarch,
3253 s390_address_class_type_flags);
3254 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3255 s390_address_class_type_flags_to_name);
3256 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3257 s390_address_class_name_to_type_flags);
c642a434
UW
3258
3259 if (have_linux_v2)
3260 set_gdbarch_core_regset_sections (gdbarch,
3261 s390x_linux64v2_regset_sections);
3262 else if (have_linux_v1)
3263 set_gdbarch_core_regset_sections (gdbarch,
3264 s390x_linux64v1_regset_sections);
3265 else
3266 set_gdbarch_core_regset_sections (gdbarch,
3267 s390x_linux64_regset_sections);
5769d3cd
AC
3268 break;
3269 }
3270
36482093
AC
3271 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3272
982e9687
UW
3273 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3274
b2756930
KB
3275 /* Enable TLS support. */
3276 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3277 svr4_fetch_objfile_link_map);
3278
1dd635ac
UW
3279 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3280
5769d3cd
AC
3281 return gdbarch;
3282}
3283
3284
a78f21af
AC
3285extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3286
5769d3cd 3287void
5ae5f592 3288_initialize_s390_tdep (void)
5769d3cd 3289{
5769d3cd
AC
3290 /* Hook us into the gdbarch mechanism. */
3291 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a
UW
3292
3293 /* Initialize the Linux target descriptions. */
3294 initialize_tdesc_s390_linux32 ();
c642a434
UW
3295 initialize_tdesc_s390_linux32v1 ();
3296 initialize_tdesc_s390_linux32v2 ();
7803799a 3297 initialize_tdesc_s390_linux64 ();
c642a434
UW
3298 initialize_tdesc_s390_linux64v1 ();
3299 initialize_tdesc_s390_linux64v2 ();
7803799a 3300 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3301 initialize_tdesc_s390x_linux64v1 ();
3302 initialize_tdesc_s390x_linux64v2 ();
5769d3cd 3303}
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