S/390: Disassemble 31-bit binaries with "zarch" opcode set by default
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
28e7fd62 3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
27#include "symtab.h"
28#include "target.h"
29#include "gdbcore.h"
30#include "gdbcmd.h"
5769d3cd 31#include "objfiles.h"
5769d3cd
AC
32#include "floatformat.h"
33#include "regcache.h"
a8c99f38
JB
34#include "trad-frame.h"
35#include "frame-base.h"
36#include "frame-unwind.h"
a431654a 37#include "dwarf2-frame.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
d0f54f9d 46#include "s390-tdep.h"
4ac33720 47#include "auxv.h"
5769d3cd 48
55aa24fb
SDJ
49#include "stap-probe.h"
50#include "ax.h"
51#include "ax-gdb.h"
52#include "user-regs.h"
53#include "cli/cli-utils.h"
54#include <ctype.h>
04a83fee 55#include "elf/common.h"
55aa24fb 56
7803799a 57#include "features/s390-linux32.c"
c642a434
UW
58#include "features/s390-linux32v1.c"
59#include "features/s390-linux32v2.c"
7803799a 60#include "features/s390-linux64.c"
c642a434
UW
61#include "features/s390-linux64v1.c"
62#include "features/s390-linux64v2.c"
4ac33720 63#include "features/s390-te-linux64.c"
7803799a 64#include "features/s390x-linux64.c"
c642a434
UW
65#include "features/s390x-linux64v1.c"
66#include "features/s390x-linux64v2.c"
4ac33720 67#include "features/s390x-te-linux64.c"
7803799a 68
d0f54f9d
JB
69/* The tdep structure. */
70
71struct gdbarch_tdep
5769d3cd 72{
b0cf273e
JB
73 /* ABI version. */
74 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
75
7803799a
UW
76 /* Pseudo register numbers. */
77 int gpr_full_regnum;
78 int pc_regnum;
79 int cc_regnum;
80
d0f54f9d
JB
81 /* Core file register sets. */
82 const struct regset *gregset;
83 int sizeof_gregset;
84
85 const struct regset *fpregset;
86 int sizeof_fpregset;
87};
88
89
7803799a
UW
90/* ABI call-saved register information. */
91
92static int
93s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 94{
7803799a
UW
95 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
96
97 switch (tdep->abi)
6707b003 98 {
7803799a
UW
99 case ABI_LINUX_S390:
100 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
101 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
102 || regnum == S390_A0_REGNUM)
103 return 1;
6707b003 104
7803799a
UW
105 break;
106
107 case ABI_LINUX_ZSERIES:
108 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
109 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
110 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
111 return 1;
112
113 break;
114 }
115
116 return 0;
5769d3cd
AC
117}
118
c642a434
UW
119static int
120s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
121{
122 /* The last-break address is read-only. */
123 return regnum == S390_LAST_BREAK_REGNUM;
124}
125
126static void
127s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
128{
129 struct gdbarch *gdbarch = get_regcache_arch (regcache);
130 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
131
132 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
133
134 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
135 messing with the PC we just installed, if we happen to be within
136 an interrupted system call that the kernel wants to restart.
137
138 Note that after we return from the dummy call, the SYSTEM_CALL and
139 ORIG_R2 registers will be automatically restored, and the kernel
140 continues to restart the system call at this point. */
141 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
142 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
143}
144
7803799a 145
d0f54f9d
JB
146/* DWARF Register Mapping. */
147
2ccd1468 148static const short s390_dwarf_regmap[] =
d0f54f9d
JB
149{
150 /* General Purpose Registers. */
151 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
152 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
153 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
154 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
155
156 /* Floating Point Registers. */
157 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
158 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
159 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
160 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
161
162 /* Control Registers (not mapped). */
163 -1, -1, -1, -1, -1, -1, -1, -1,
164 -1, -1, -1, -1, -1, -1, -1, -1,
165
166 /* Access Registers. */
167 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
168 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
169 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
170 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
171
172 /* Program Status Word. */
173 S390_PSWM_REGNUM,
7803799a
UW
174 S390_PSWA_REGNUM,
175
176 /* GPR Lower Half Access. */
177 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
178 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
179 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
180 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 181
94eae614 182 /* GNU/Linux-specific registers (not mapped). */
c642a434 183 -1, -1, -1,
d0f54f9d
JB
184};
185
186/* Convert DWARF register number REG to the appropriate register
187 number used by GDB. */
a78f21af 188static int
d3f73121 189s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 190{
7803799a
UW
191 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
192
193 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
194 GPRs. Note that call frame information still refers to the 32-bit
195 lower halves, because s390_adjust_frame_regnum uses register numbers
196 66 .. 81 to access GPRs. */
197 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
198 return tdep->gpr_full_regnum + reg;
d0f54f9d 199
16aff9a6 200 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 201 return s390_dwarf_regmap[reg];
d0f54f9d 202
7803799a
UW
203 warning (_("Unmapped DWARF Register #%d encountered."), reg);
204 return -1;
205}
d0f54f9d 206
7803799a
UW
207/* Translate a .eh_frame register to DWARF register, or adjust a
208 .debug_frame register. */
209static int
210s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
211{
212 /* See s390_dwarf_reg_to_regnum for comments. */
213 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
214}
215
d0f54f9d 216
7803799a
UW
217/* Pseudo registers. */
218
2ccd1468
UW
219static int
220regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
221{
222 return (tdep->gpr_full_regnum != -1
223 && regnum >= tdep->gpr_full_regnum
224 && regnum <= tdep->gpr_full_regnum + 15);
225}
226
7803799a
UW
227static const char *
228s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 229{
7803799a 230 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 231
7803799a
UW
232 if (regnum == tdep->pc_regnum)
233 return "pc";
d0f54f9d 234
7803799a
UW
235 if (regnum == tdep->cc_regnum)
236 return "cc";
d0f54f9d 237
2ccd1468 238 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
239 {
240 static const char *full_name[] = {
241 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
242 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
243 };
244 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 245 }
7803799a
UW
246
247 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
248}
249
7803799a
UW
250static struct type *
251s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 252{
7803799a 253 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 254
7803799a
UW
255 if (regnum == tdep->pc_regnum)
256 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 257
7803799a
UW
258 if (regnum == tdep->cc_regnum)
259 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 260
2ccd1468 261 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
262 return builtin_type (gdbarch)->builtin_uint64;
263
264 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
265}
266
05d1431c 267static enum register_status
7803799a
UW
268s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
269 int regnum, gdb_byte *buf)
d0f54f9d 270{
7803799a 271 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 272 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 273 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
274 ULONGEST val;
275
7803799a 276 if (regnum == tdep->pc_regnum)
d0f54f9d 277 {
05d1431c
PA
278 enum register_status status;
279
280 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
281 if (status == REG_VALID)
282 {
283 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
284 val &= 0x7fffffff;
285 store_unsigned_integer (buf, regsize, byte_order, val);
286 }
287 return status;
7803799a 288 }
d0f54f9d 289
7803799a
UW
290 if (regnum == tdep->cc_regnum)
291 {
05d1431c
PA
292 enum register_status status;
293
294 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
295 if (status == REG_VALID)
296 {
297 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
298 val = (val >> 12) & 3;
299 else
300 val = (val >> 44) & 3;
301 store_unsigned_integer (buf, regsize, byte_order, val);
302 }
303 return status;
7803799a 304 }
d0f54f9d 305
2ccd1468 306 if (regnum_is_gpr_full (tdep, regnum))
7803799a 307 {
05d1431c 308 enum register_status status;
7803799a 309 ULONGEST val_upper;
05d1431c 310
7803799a
UW
311 regnum -= tdep->gpr_full_regnum;
312
05d1431c
PA
313 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
314 if (status == REG_VALID)
315 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
316 &val_upper);
317 if (status == REG_VALID)
318 {
319 val |= val_upper << 32;
320 store_unsigned_integer (buf, regsize, byte_order, val);
321 }
322 return status;
d0f54f9d 323 }
7803799a
UW
324
325 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
326}
327
328static void
7803799a
UW
329s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
330 int regnum, const gdb_byte *buf)
d0f54f9d 331{
7803799a 332 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 333 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 334 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
335 ULONGEST val, psw;
336
7803799a 337 if (regnum == tdep->pc_regnum)
d0f54f9d 338 {
7803799a
UW
339 val = extract_unsigned_integer (buf, regsize, byte_order);
340 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
341 {
342 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
343 val = (psw & 0x80000000) | (val & 0x7fffffff);
344 }
345 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
346 return;
347 }
d0f54f9d 348
7803799a
UW
349 if (regnum == tdep->cc_regnum)
350 {
351 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 352 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
353 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
354 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
355 else
356 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
357 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
358 return;
359 }
d0f54f9d 360
2ccd1468 361 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
362 {
363 regnum -= tdep->gpr_full_regnum;
364 val = extract_unsigned_integer (buf, regsize, byte_order);
365 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
366 val & 0xffffffff);
367 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
368 val >> 32);
369 return;
d0f54f9d 370 }
7803799a
UW
371
372 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
373}
374
375/* 'float' values are stored in the upper half of floating-point
376 registers, even though we are otherwise a big-endian platform. */
377
9acbedc0
UW
378static struct value *
379s390_value_from_register (struct type *type, int regnum,
380 struct frame_info *frame)
d0f54f9d 381{
9acbedc0 382 struct value *value = default_value_from_register (type, regnum, frame);
d0f54f9d 383
744a8059
SP
384 check_typedef (type);
385
386 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
387 && TYPE_LENGTH (type) < 8)
9acbedc0 388 set_value_offset (value, 0);
d0f54f9d 389
9acbedc0 390 return value;
d0f54f9d
JB
391}
392
393/* Register groups. */
394
a78f21af 395static int
7803799a
UW
396s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
397 struct reggroup *group)
d0f54f9d
JB
398{
399 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
400
d6db1fab
UW
401 /* We usually save/restore the whole PSW, which includes PC and CC.
402 However, some older gdbservers may not support saving/restoring
403 the whole PSW yet, and will return an XML register description
404 excluding those from the save/restore register groups. In those
405 cases, we still need to explicitly save/restore PC and CC in order
406 to push or pop frames. Since this doesn't hurt anything if we
407 already save/restore the whole PSW (it's just redundant), we add
408 PC and CC at this point unconditionally. */
d0f54f9d 409 if (group == save_reggroup || group == restore_reggroup)
7803799a 410 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
411
412 return default_register_reggroup_p (gdbarch, regnum, group);
413}
414
415
2ccd1468 416/* Maps for register sets. */
d0f54f9d 417
2ccd1468
UW
418const short s390_regmap_gregset[] =
419 {
420 0x00, S390_PSWM_REGNUM,
421 0x04, S390_PSWA_REGNUM,
422 0x08, S390_R0_REGNUM,
423 0x0c, S390_R1_REGNUM,
424 0x10, S390_R2_REGNUM,
425 0x14, S390_R3_REGNUM,
426 0x18, S390_R4_REGNUM,
427 0x1c, S390_R5_REGNUM,
428 0x20, S390_R6_REGNUM,
429 0x24, S390_R7_REGNUM,
430 0x28, S390_R8_REGNUM,
431 0x2c, S390_R9_REGNUM,
432 0x30, S390_R10_REGNUM,
433 0x34, S390_R11_REGNUM,
434 0x38, S390_R12_REGNUM,
435 0x3c, S390_R13_REGNUM,
436 0x40, S390_R14_REGNUM,
437 0x44, S390_R15_REGNUM,
438 0x48, S390_A0_REGNUM,
439 0x4c, S390_A1_REGNUM,
440 0x50, S390_A2_REGNUM,
441 0x54, S390_A3_REGNUM,
442 0x58, S390_A4_REGNUM,
443 0x5c, S390_A5_REGNUM,
444 0x60, S390_A6_REGNUM,
445 0x64, S390_A7_REGNUM,
446 0x68, S390_A8_REGNUM,
447 0x6c, S390_A9_REGNUM,
448 0x70, S390_A10_REGNUM,
449 0x74, S390_A11_REGNUM,
450 0x78, S390_A12_REGNUM,
451 0x7c, S390_A13_REGNUM,
452 0x80, S390_A14_REGNUM,
453 0x84, S390_A15_REGNUM,
454 0x88, S390_ORIG_R2_REGNUM,
455 -1, -1
456 };
d0f54f9d 457
2ccd1468
UW
458const short s390x_regmap_gregset[] =
459 {
460 0x00, S390_PSWM_REGNUM,
461 0x08, S390_PSWA_REGNUM,
462 0x10, S390_R0_REGNUM,
463 0x18, S390_R1_REGNUM,
464 0x20, S390_R2_REGNUM,
465 0x28, S390_R3_REGNUM,
466 0x30, S390_R4_REGNUM,
467 0x38, S390_R5_REGNUM,
468 0x40, S390_R6_REGNUM,
469 0x48, S390_R7_REGNUM,
470 0x50, S390_R8_REGNUM,
471 0x58, S390_R9_REGNUM,
472 0x60, S390_R10_REGNUM,
473 0x68, S390_R11_REGNUM,
474 0x70, S390_R12_REGNUM,
475 0x78, S390_R13_REGNUM,
476 0x80, S390_R14_REGNUM,
477 0x88, S390_R15_REGNUM,
478 0x90, S390_A0_REGNUM,
479 0x94, S390_A1_REGNUM,
480 0x98, S390_A2_REGNUM,
481 0x9c, S390_A3_REGNUM,
482 0xa0, S390_A4_REGNUM,
483 0xa4, S390_A5_REGNUM,
484 0xa8, S390_A6_REGNUM,
485 0xac, S390_A7_REGNUM,
486 0xb0, S390_A8_REGNUM,
487 0xb4, S390_A9_REGNUM,
488 0xb8, S390_A10_REGNUM,
489 0xbc, S390_A11_REGNUM,
490 0xc0, S390_A12_REGNUM,
491 0xc4, S390_A13_REGNUM,
492 0xc8, S390_A14_REGNUM,
493 0xcc, S390_A15_REGNUM,
494 0x10, S390_R0_UPPER_REGNUM,
495 0x18, S390_R1_UPPER_REGNUM,
496 0x20, S390_R2_UPPER_REGNUM,
497 0x28, S390_R3_UPPER_REGNUM,
498 0x30, S390_R4_UPPER_REGNUM,
499 0x38, S390_R5_UPPER_REGNUM,
500 0x40, S390_R6_UPPER_REGNUM,
501 0x48, S390_R7_UPPER_REGNUM,
502 0x50, S390_R8_UPPER_REGNUM,
503 0x58, S390_R9_UPPER_REGNUM,
504 0x60, S390_R10_UPPER_REGNUM,
505 0x68, S390_R11_UPPER_REGNUM,
506 0x70, S390_R12_UPPER_REGNUM,
507 0x78, S390_R13_UPPER_REGNUM,
508 0x80, S390_R14_UPPER_REGNUM,
509 0x88, S390_R15_UPPER_REGNUM,
510 0xd0, S390_ORIG_R2_REGNUM,
511 -1, -1
512 };
d0f54f9d 513
2ccd1468
UW
514const short s390_regmap_fpregset[] =
515 {
516 0x00, S390_FPC_REGNUM,
517 0x08, S390_F0_REGNUM,
518 0x10, S390_F1_REGNUM,
519 0x18, S390_F2_REGNUM,
520 0x20, S390_F3_REGNUM,
521 0x28, S390_F4_REGNUM,
522 0x30, S390_F5_REGNUM,
523 0x38, S390_F6_REGNUM,
524 0x40, S390_F7_REGNUM,
525 0x48, S390_F8_REGNUM,
526 0x50, S390_F9_REGNUM,
527 0x58, S390_F10_REGNUM,
528 0x60, S390_F11_REGNUM,
529 0x68, S390_F12_REGNUM,
530 0x70, S390_F13_REGNUM,
531 0x78, S390_F14_REGNUM,
532 0x80, S390_F15_REGNUM,
533 -1, -1
534 };
7803799a 535
2ccd1468
UW
536const short s390_regmap_upper[] =
537 {
538 0x00, S390_R0_UPPER_REGNUM,
539 0x04, S390_R1_UPPER_REGNUM,
540 0x08, S390_R2_UPPER_REGNUM,
541 0x0c, S390_R3_UPPER_REGNUM,
542 0x10, S390_R4_UPPER_REGNUM,
543 0x14, S390_R5_UPPER_REGNUM,
544 0x18, S390_R6_UPPER_REGNUM,
545 0x1c, S390_R7_UPPER_REGNUM,
546 0x20, S390_R8_UPPER_REGNUM,
547 0x24, S390_R9_UPPER_REGNUM,
548 0x28, S390_R10_UPPER_REGNUM,
549 0x2c, S390_R11_UPPER_REGNUM,
550 0x30, S390_R12_UPPER_REGNUM,
551 0x34, S390_R13_UPPER_REGNUM,
552 0x38, S390_R14_UPPER_REGNUM,
553 0x3c, S390_R15_UPPER_REGNUM,
554 -1, -1
555 };
c642a434 556
2ccd1468
UW
557const short s390_regmap_last_break[] =
558 {
559 0x04, S390_LAST_BREAK_REGNUM,
560 -1, -1
561 };
562
563const short s390x_regmap_last_break[] =
564 {
565 0x00, S390_LAST_BREAK_REGNUM,
566 -1, -1
567 };
568
569const short s390_regmap_system_call[] =
570 {
571 0x00, S390_SYSTEM_CALL_REGNUM,
572 -1, -1
573 };
c642a434 574
4ac33720
UW
575const short s390_regmap_tdb[] =
576 {
577 0x00, S390_TDB_DWORD0_REGNUM,
578 0x08, S390_TDB_ABORT_CODE_REGNUM,
579 0x10, S390_TDB_CONFLICT_TOKEN_REGNUM,
580 0x18, S390_TDB_ATIA_REGNUM,
581 0x80, S390_TDB_R0_REGNUM,
582 0x88, S390_TDB_R1_REGNUM,
583 0x90, S390_TDB_R2_REGNUM,
584 0x98, S390_TDB_R3_REGNUM,
585 0xa0, S390_TDB_R4_REGNUM,
586 0xa8, S390_TDB_R5_REGNUM,
587 0xb0, S390_TDB_R6_REGNUM,
588 0xb8, S390_TDB_R7_REGNUM,
589 0xc0, S390_TDB_R8_REGNUM,
590 0xc8, S390_TDB_R9_REGNUM,
591 0xd0, S390_TDB_R10_REGNUM,
592 0xd8, S390_TDB_R11_REGNUM,
593 0xe0, S390_TDB_R12_REGNUM,
594 0xe8, S390_TDB_R13_REGNUM,
595 0xf0, S390_TDB_R14_REGNUM,
596 0xf8, S390_TDB_R15_REGNUM,
597 -1, -1
598 };
c642a434 599
d0f54f9d
JB
600
601/* Supply register REGNUM from the register set REGSET to register cache
602 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
603static void
604s390_supply_regset (const struct regset *regset, struct regcache *regcache,
605 int regnum, const void *regs, size_t len)
606{
2ccd1468
UW
607 const short *map;
608 for (map = regset->descr; map[0] >= 0; map += 2)
609 if (regnum == -1 || regnum == map[1])
4ac33720
UW
610 regcache_raw_supply (regcache, map[1],
611 regs ? (const char *)regs + map[0] : NULL);
612}
613
614/* Supply the TDB regset. Like s390_supply_regset, but invalidate the
615 TDB registers unless the TDB format field is valid. */
616
617static void
618s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
619 int regnum, const void *regs, size_t len)
620{
621 ULONGEST tdw;
622 enum register_status ret;
623 int i;
624
625 s390_supply_regset (regset, regcache, regnum, regs, len);
626 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
627 if (ret != REG_VALID || (tdw >> 56) != 1)
628 s390_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
629}
630
92f38ec2
UW
631/* Collect register REGNUM from the register cache REGCACHE and store
632 it in the buffer specified by REGS and LEN as described by the
633 general-purpose register set REGSET. If REGNUM is -1, do this for
634 all registers in REGSET. */
635static void
636s390_collect_regset (const struct regset *regset,
637 const struct regcache *regcache,
638 int regnum, void *regs, size_t len)
639{
2ccd1468
UW
640 const short *map;
641 for (map = regset->descr; map[0] >= 0; map += 2)
642 if (regnum == -1 || regnum == map[1])
643 regcache_raw_collect (regcache, map[1], (char *)regs + map[0]);
92f38ec2
UW
644}
645
d0f54f9d
JB
646static const struct regset s390_gregset = {
647 s390_regmap_gregset,
92f38ec2
UW
648 s390_supply_regset,
649 s390_collect_regset
d0f54f9d
JB
650};
651
652static const struct regset s390x_gregset = {
653 s390x_regmap_gregset,
92f38ec2
UW
654 s390_supply_regset,
655 s390_collect_regset
d0f54f9d
JB
656};
657
658static const struct regset s390_fpregset = {
659 s390_regmap_fpregset,
92f38ec2
UW
660 s390_supply_regset,
661 s390_collect_regset
d0f54f9d
JB
662};
663
7803799a
UW
664static const struct regset s390_upper_regset = {
665 s390_regmap_upper,
666 s390_supply_regset,
667 s390_collect_regset
668};
669
c642a434
UW
670static const struct regset s390_last_break_regset = {
671 s390_regmap_last_break,
672 s390_supply_regset,
673 s390_collect_regset
674};
675
676static const struct regset s390x_last_break_regset = {
677 s390x_regmap_last_break,
678 s390_supply_regset,
679 s390_collect_regset
680};
681
682static const struct regset s390_system_call_regset = {
683 s390_regmap_system_call,
684 s390_supply_regset,
685 s390_collect_regset
686};
687
4ac33720
UW
688static const struct regset s390_tdb_regset = {
689 s390_regmap_tdb,
690 s390_supply_tdb_regset,
691 s390_collect_regset
692};
693
c642a434
UW
694static struct core_regset_section s390_linux32_regset_sections[] =
695{
696 { ".reg", s390_sizeof_gregset, "general-purpose" },
697 { ".reg2", s390_sizeof_fpregset, "floating-point" },
698 { NULL, 0}
699};
700
701static struct core_regset_section s390_linux32v1_regset_sections[] =
702{
703 { ".reg", s390_sizeof_gregset, "general-purpose" },
704 { ".reg2", s390_sizeof_fpregset, "floating-point" },
705 { ".reg-s390-last-break", 8, "s390 last-break address" },
706 { NULL, 0}
707};
708
709static struct core_regset_section s390_linux32v2_regset_sections[] =
710{
711 { ".reg", s390_sizeof_gregset, "general-purpose" },
712 { ".reg2", s390_sizeof_fpregset, "floating-point" },
713 { ".reg-s390-last-break", 8, "s390 last-break address" },
714 { ".reg-s390-system-call", 4, "s390 system-call" },
715 { NULL, 0}
716};
717
718static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
719{
720 { ".reg", s390_sizeof_gregset, "general-purpose" },
721 { ".reg2", s390_sizeof_fpregset, "floating-point" },
722 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
723 { NULL, 0}
724};
725
c642a434
UW
726static struct core_regset_section s390_linux64v1_regset_sections[] =
727{
728 { ".reg", s390_sizeof_gregset, "general-purpose" },
729 { ".reg2", s390_sizeof_fpregset, "floating-point" },
730 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
731 { ".reg-s390-last-break", 8, "s930 last-break address" },
732 { NULL, 0}
733};
734
735static struct core_regset_section s390_linux64v2_regset_sections[] =
736{
737 { ".reg", s390_sizeof_gregset, "general-purpose" },
738 { ".reg2", s390_sizeof_fpregset, "floating-point" },
739 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
740 { ".reg-s390-last-break", 8, "s930 last-break address" },
741 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 742 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
743 { NULL, 0}
744};
745
746static struct core_regset_section s390x_linux64_regset_sections[] =
747{
748 { ".reg", s390x_sizeof_gregset, "general-purpose" },
749 { ".reg2", s390_sizeof_fpregset, "floating-point" },
750 { NULL, 0}
751};
752
753static struct core_regset_section s390x_linux64v1_regset_sections[] =
754{
755 { ".reg", s390x_sizeof_gregset, "general-purpose" },
756 { ".reg2", s390_sizeof_fpregset, "floating-point" },
757 { ".reg-s390-last-break", 8, "s930 last-break address" },
758 { NULL, 0}
759};
760
761static struct core_regset_section s390x_linux64v2_regset_sections[] =
762{
763 { ".reg", s390x_sizeof_gregset, "general-purpose" },
764 { ".reg2", s390_sizeof_fpregset, "floating-point" },
765 { ".reg-s390-last-break", 8, "s930 last-break address" },
766 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 767 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
768 { NULL, 0}
769};
770
771
d0f54f9d
JB
772/* Return the appropriate register set for the core section identified
773 by SECT_NAME and SECT_SIZE. */
63807e1d 774static const struct regset *
d0f54f9d
JB
775s390_regset_from_core_section (struct gdbarch *gdbarch,
776 const char *sect_name, size_t sect_size)
777{
778 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
779
e31dcd20 780 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
781 return tdep->gregset;
782
e31dcd20 783 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
784 return tdep->fpregset;
785
7803799a
UW
786 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
787 return &s390_upper_regset;
788
c642a434
UW
789 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
790 return (gdbarch_ptr_bit (gdbarch) == 32
791 ? &s390_last_break_regset : &s390x_last_break_regset);
792
793 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
794 return &s390_system_call_regset;
795
4ac33720
UW
796 if (strcmp (sect_name, ".reg-s390-tdb") == 0 && sect_size >= 256)
797 return &s390_tdb_regset;
798
d0f54f9d 799 return NULL;
5769d3cd
AC
800}
801
7803799a
UW
802static const struct target_desc *
803s390_core_read_description (struct gdbarch *gdbarch,
804 struct target_ops *target, bfd *abfd)
805{
806 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
807 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
808 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a 809 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 810 CORE_ADDR hwcap = 0;
4ac33720
UW
811
812 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
813 if (!section)
814 return NULL;
815
816 switch (bfd_section_size (abfd, section))
817 {
818 case s390_sizeof_gregset:
c642a434 819 if (high_gprs)
4ac33720
UW
820 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 :
821 v2? tdesc_s390_linux64v2 :
c642a434
UW
822 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
823 else
824 return (v2? tdesc_s390_linux32v2 :
825 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
826
827 case s390x_sizeof_gregset:
4ac33720
UW
828 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 :
829 v2? tdesc_s390x_linux64v2 :
c642a434 830 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
831
832 default:
833 return NULL;
834 }
835}
836
d0f54f9d 837
4bc8c588
JB
838/* Decoding S/390 instructions. */
839
840/* Named opcode values for the S/390 instructions we recognize. Some
841 instructions have their opcode split across two fields; those are the
842 op1_* and op2_* enums. */
843enum
844 {
a8c99f38
JB
845 op1_lhi = 0xa7, op2_lhi = 0x08,
846 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 847 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 848 op_lr = 0x18,
a8c99f38
JB
849 op_lgr = 0xb904,
850 op_l = 0x58,
851 op1_ly = 0xe3, op2_ly = 0x58,
852 op1_lg = 0xe3, op2_lg = 0x04,
853 op_lm = 0x98,
854 op1_lmy = 0xeb, op2_lmy = 0x98,
855 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 856 op_st = 0x50,
a8c99f38 857 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 858 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 859 op_std = 0x60,
4bc8c588 860 op_stm = 0x90,
a8c99f38 861 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 862 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
863 op1_aghi = 0xa7, op2_aghi = 0x0b,
864 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
865 op1_agfi = 0xc2, op2_agfi = 0x08,
866 op1_afi = 0xc2, op2_afi = 0x09,
867 op1_algfi= 0xc2, op2_algfi= 0x0a,
868 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
869 op_ar = 0x1a,
870 op_agr = 0xb908,
871 op_a = 0x5a,
872 op1_ay = 0xe3, op2_ay = 0x5a,
873 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
874 op1_slgfi= 0xc2, op2_slgfi= 0x04,
875 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
876 op_sr = 0x1b,
877 op_sgr = 0xb909,
878 op_s = 0x5b,
879 op1_sy = 0xe3, op2_sy = 0x5b,
880 op1_sg = 0xe3, op2_sg = 0x09,
881 op_nr = 0x14,
882 op_ngr = 0xb980,
883 op_la = 0x41,
884 op1_lay = 0xe3, op2_lay = 0x71,
885 op1_larl = 0xc0, op2_larl = 0x00,
886 op_basr = 0x0d,
887 op_bas = 0x4d,
888 op_bcr = 0x07,
889 op_bc = 0x0d,
1db4e8a0
UW
890 op_bctr = 0x06,
891 op_bctgr = 0xb946,
892 op_bct = 0x46,
893 op1_bctg = 0xe3, op2_bctg = 0x46,
894 op_bxh = 0x86,
895 op1_bxhg = 0xeb, op2_bxhg = 0x44,
896 op_bxle = 0x87,
897 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
898 op1_bras = 0xa7, op2_bras = 0x05,
899 op1_brasl= 0xc0, op2_brasl= 0x05,
900 op1_brc = 0xa7, op2_brc = 0x04,
901 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
902 op1_brct = 0xa7, op2_brct = 0x06,
903 op1_brctg= 0xa7, op2_brctg= 0x07,
904 op_brxh = 0x84,
905 op1_brxhg= 0xec, op2_brxhg= 0x44,
906 op_brxle = 0x85,
907 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
908 };
909
910
a8c99f38
JB
911/* Read a single instruction from address AT. */
912
913#define S390_MAX_INSTR_SIZE 6
914static int
915s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
916{
917 static int s390_instrlen[] = { 2, 4, 4, 6 };
918 int instrlen;
919
8defab1a 920 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
921 return -1;
922 instrlen = s390_instrlen[instr[0] >> 6];
923 if (instrlen > 2)
924 {
8defab1a 925 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
926 return -1;
927 }
928 return instrlen;
929}
930
931
4bc8c588
JB
932/* The functions below are for recognizing and decoding S/390
933 instructions of various formats. Each of them checks whether INSN
934 is an instruction of the given format, with the specified opcodes.
935 If it is, it sets the remaining arguments to the values of the
936 instruction's fields, and returns a non-zero value; otherwise, it
937 returns zero.
938
939 These functions' arguments appear in the order they appear in the
940 instruction, not in the machine-language form. So, opcodes always
941 come first, even though they're sometimes scattered around the
942 instructions. And displacements appear before base and extension
943 registers, as they do in the assembly syntax, not at the end, as
944 they do in the machine language. */
a78f21af 945static int
4bc8c588
JB
946is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
947{
948 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
949 {
950 *r1 = (insn[1] >> 4) & 0xf;
951 /* i2 is a 16-bit signed quantity. */
952 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
953 return 1;
954 }
955 else
956 return 0;
957}
8ac0e65a 958
5769d3cd 959
4bc8c588
JB
960static int
961is_ril (bfd_byte *insn, int op1, int op2,
962 unsigned int *r1, int *i2)
963{
964 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
965 {
966 *r1 = (insn[1] >> 4) & 0xf;
967 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
968 no sign extension is necessary, but we don't want to assume
969 that. */
970 *i2 = (((insn[2] << 24)
971 | (insn[3] << 16)
972 | (insn[4] << 8)
973 | (insn[5])) ^ 0x80000000) - 0x80000000;
974 return 1;
975 }
976 else
977 return 0;
978}
979
980
981static int
982is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
983{
984 if (insn[0] == op)
985 {
986 *r1 = (insn[1] >> 4) & 0xf;
987 *r2 = insn[1] & 0xf;
988 return 1;
989 }
990 else
991 return 0;
992}
993
994
995static int
996is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
997{
998 if (((insn[0] << 8) | insn[1]) == op)
999 {
1000 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1001 *r1 = (insn[3] >> 4) & 0xf;
1002 *r2 = insn[3] & 0xf;
1003 return 1;
1004 }
1005 else
1006 return 0;
1007}
1008
1009
1010static int
1011is_rs (bfd_byte *insn, int op,
eb1bd1fb 1012 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1013{
1014 if (insn[0] == op)
1015 {
1016 *r1 = (insn[1] >> 4) & 0xf;
1017 *r3 = insn[1] & 0xf;
1018 *b2 = (insn[2] >> 4) & 0xf;
1019 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1020 return 1;
1021 }
1022 else
1023 return 0;
1024}
1025
1026
1027static int
a8c99f38 1028is_rsy (bfd_byte *insn, int op1, int op2,
eb1bd1fb 1029 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1030{
1031 if (insn[0] == op1
4bc8c588
JB
1032 && insn[5] == op2)
1033 {
1034 *r1 = (insn[1] >> 4) & 0xf;
1035 *r3 = insn[1] & 0xf;
1036 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1037 /* The 'long displacement' is a 20-bit signed integer. */
1038 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1039 ^ 0x80000) - 0x80000;
4bc8c588
JB
1040 return 1;
1041 }
1042 else
1043 return 0;
1044}
1045
1046
1db4e8a0
UW
1047static int
1048is_rsi (bfd_byte *insn, int op,
1049 unsigned int *r1, unsigned int *r3, int *i2)
1050{
1051 if (insn[0] == op)
1052 {
1053 *r1 = (insn[1] >> 4) & 0xf;
1054 *r3 = insn[1] & 0xf;
1055 /* i2 is a 16-bit signed quantity. */
1056 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1057 return 1;
1058 }
1059 else
1060 return 0;
1061}
1062
1063
1064static int
1065is_rie (bfd_byte *insn, int op1, int op2,
1066 unsigned int *r1, unsigned int *r3, int *i2)
1067{
1068 if (insn[0] == op1
1069 && insn[5] == op2)
1070 {
1071 *r1 = (insn[1] >> 4) & 0xf;
1072 *r3 = insn[1] & 0xf;
1073 /* i2 is a 16-bit signed quantity. */
1074 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1075 return 1;
1076 }
1077 else
1078 return 0;
1079}
1080
1081
4bc8c588
JB
1082static int
1083is_rx (bfd_byte *insn, int op,
eb1bd1fb 1084 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1085{
1086 if (insn[0] == op)
1087 {
1088 *r1 = (insn[1] >> 4) & 0xf;
1089 *x2 = insn[1] & 0xf;
1090 *b2 = (insn[2] >> 4) & 0xf;
1091 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1092 return 1;
1093 }
1094 else
1095 return 0;
1096}
1097
1098
1099static int
a8c99f38 1100is_rxy (bfd_byte *insn, int op1, int op2,
eb1bd1fb 1101 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1102{
1103 if (insn[0] == op1
4bc8c588
JB
1104 && insn[5] == op2)
1105 {
1106 *r1 = (insn[1] >> 4) & 0xf;
1107 *x2 = insn[1] & 0xf;
1108 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1109 /* The 'long displacement' is a 20-bit signed integer. */
1110 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1111 ^ 0x80000) - 0x80000;
4bc8c588
JB
1112 return 1;
1113 }
1114 else
1115 return 0;
1116}
1117
1118
3fc46200 1119/* Prologue analysis. */
4bc8c588 1120
d0f54f9d
JB
1121#define S390_NUM_GPRS 16
1122#define S390_NUM_FPRS 16
4bc8c588 1123
a8c99f38
JB
1124struct s390_prologue_data {
1125
ee1b3323
UW
1126 /* The stack. */
1127 struct pv_area *stack;
1128
e17a4113 1129 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1130 int gpr_size;
1131 int fpr_size;
e17a4113 1132 enum bfd_endian byte_order;
a8c99f38
JB
1133
1134 /* The general-purpose registers. */
3fc46200 1135 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1136
1137 /* The floating-point registers. */
3fc46200 1138 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1139
121d8485
UW
1140 /* The offset relative to the CFA where the incoming GPR N was saved
1141 by the function prologue. 0 if not saved or unknown. */
1142 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1143
121d8485
UW
1144 /* Likewise for FPRs. */
1145 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1146
121d8485
UW
1147 /* Nonzero if the backchain was saved. This is assumed to be the
1148 case when the incoming SP is saved at the current SP location. */
1149 int back_chain_saved_p;
1150};
4bc8c588 1151
3fc46200
UW
1152/* Return the effective address for an X-style instruction, like:
1153
1154 L R1, D2(X2, B2)
1155
1156 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1157 constant; the effective address is the sum of all three. If either
1158 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1159 means that r0 can't be used as either X2 or B2. */
1160static pv_t
1161s390_addr (struct s390_prologue_data *data,
1162 int d2, unsigned int x2, unsigned int b2)
1163{
1164 pv_t result;
1165
1166 result = pv_constant (d2);
1167 if (x2)
1168 result = pv_add (result, data->gpr[x2]);
1169 if (b2)
1170 result = pv_add (result, data->gpr[b2]);
1171
1172 return result;
1173}
1174
1175/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1176static void
3fc46200
UW
1177s390_store (struct s390_prologue_data *data,
1178 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1179 pv_t value)
4bc8c588 1180{
3fc46200 1181 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1182 pv_t offset;
121d8485
UW
1183
1184 /* Check whether we are storing the backchain. */
3fc46200 1185 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1186
3fc46200 1187 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1188 if (size == data->gpr_size
3fc46200 1189 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1190 {
1191 data->back_chain_saved_p = 1;
1192 return;
1193 }
1194
1195
1196 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1197 if (!pv_area_store_would_trash (data->stack, addr))
1198 pv_area_store (data->stack, addr, size, value);
4bc8c588 1199
a8c99f38 1200
121d8485
UW
1201 /* Note: If this is some store we cannot identify, you might think we
1202 should forget our cached values, as any of those might have been hit.
1203
1204 However, we make the assumption that the register save areas are only
1205 ever stored to once in any given function, and we do recognize these
1206 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1207}
4bc8c588 1208
3fc46200
UW
1209/* Do a SIZE-byte load from D2(X2,B2). */
1210static pv_t
1211s390_load (struct s390_prologue_data *data,
1212 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1213
4bc8c588 1214{
3fc46200 1215 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1216
a8c99f38
JB
1217 /* If it's a load from an in-line constant pool, then we can
1218 simulate that, under the assumption that the code isn't
1219 going to change between the time the processor actually
1220 executed it creating the current frame, and the time when
1221 we're analyzing the code to unwind past that frame. */
3fc46200 1222 if (pv_is_constant (addr))
4bc8c588 1223 {
0542c86d 1224 struct target_section *secp;
3fc46200 1225 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1226 if (secp != NULL
57e6060e
DE
1227 && (bfd_get_section_flags (secp->the_bfd_section->owner,
1228 secp->the_bfd_section)
a8c99f38 1229 & SEC_READONLY))
e17a4113
UW
1230 return pv_constant (read_memory_integer (addr.k, size,
1231 data->byte_order));
a8c99f38 1232 }
7666f43c 1233
121d8485 1234 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1235 return pv_area_fetch (data->stack, addr, size);
1236}
121d8485 1237
ee1b3323
UW
1238/* Function for finding saved registers in a 'struct pv_area'; we pass
1239 this to pv_area_scan.
121d8485 1240
ee1b3323
UW
1241 If VALUE is a saved register, ADDR says it was saved at a constant
1242 offset from the frame base, and SIZE indicates that the whole
1243 register was saved, record its offset in the reg_offset table in
1244 PROLOGUE_UNTYPED. */
1245static void
c378eb4e
MS
1246s390_check_for_saved (void *data_untyped, pv_t addr,
1247 CORE_ADDR size, pv_t value)
ee1b3323
UW
1248{
1249 struct s390_prologue_data *data = data_untyped;
1250 int i, offset;
1251
1252 if (!pv_is_register (addr, S390_SP_REGNUM))
1253 return;
1254
1255 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1256
ee1b3323
UW
1257 /* If we are storing the original value of a register, we want to
1258 record the CFA offset. If the same register is stored multiple
1259 times, the stack slot with the highest address counts. */
1260
1261 for (i = 0; i < S390_NUM_GPRS; i++)
1262 if (size == data->gpr_size
1263 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1264 if (data->gpr_slot[i] == 0
1265 || data->gpr_slot[i] > offset)
1266 {
1267 data->gpr_slot[i] = offset;
1268 return;
1269 }
1270
1271 for (i = 0; i < S390_NUM_FPRS; i++)
1272 if (size == data->fpr_size
1273 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1274 if (data->fpr_slot[i] == 0
1275 || data->fpr_slot[i] > offset)
1276 {
1277 data->fpr_slot[i] = offset;
1278 return;
1279 }
a8c99f38 1280}
4bc8c588 1281
a8c99f38
JB
1282/* Analyze the prologue of the function starting at START_PC,
1283 continuing at most until CURRENT_PC. Initialize DATA to
1284 hold all information we find out about the state of the registers
1285 and stack slots. Return the address of the instruction after
1286 the last one that changed the SP, FP, or back chain; or zero
1287 on error. */
1288static CORE_ADDR
1289s390_analyze_prologue (struct gdbarch *gdbarch,
1290 CORE_ADDR start_pc,
1291 CORE_ADDR current_pc,
1292 struct s390_prologue_data *data)
4bc8c588 1293{
a8c99f38
JB
1294 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1295
4bc8c588 1296 /* Our return value:
a8c99f38
JB
1297 The address of the instruction after the last one that changed
1298 the SP, FP, or back chain; zero if we got an error trying to
1299 read memory. */
1300 CORE_ADDR result = start_pc;
4bc8c588 1301
4bc8c588
JB
1302 /* The current PC for our abstract interpretation. */
1303 CORE_ADDR pc;
1304
1305 /* The address of the next instruction after that. */
1306 CORE_ADDR next_pc;
1307
4bc8c588
JB
1308 /* Set up everything's initial value. */
1309 {
1310 int i;
1311
55f960e1 1312 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1313
a8c99f38
JB
1314 /* For the purpose of prologue tracking, we consider the GPR size to
1315 be equal to the ABI word size, even if it is actually larger
1316 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1317 data->gpr_size = word_size;
1318 data->fpr_size = 8;
e17a4113 1319 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1320
4bc8c588 1321 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1322 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1323
1324 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1325 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1326
121d8485
UW
1327 for (i = 0; i < S390_NUM_GPRS; i++)
1328 data->gpr_slot[i] = 0;
1329
1330 for (i = 0; i < S390_NUM_FPRS; i++)
1331 data->fpr_slot[i] = 0;
4bc8c588 1332
121d8485 1333 data->back_chain_saved_p = 0;
4bc8c588
JB
1334 }
1335
a8c99f38
JB
1336 /* Start interpreting instructions, until we hit the frame's
1337 current PC or the first branch instruction. */
1338 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1339 {
4bc8c588 1340 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1341 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1342
3fc46200
UW
1343 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1344 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1345 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1346
4bc8c588 1347 /* Fields for various kinds of instructions. */
a8c99f38
JB
1348 unsigned int b2, r1, r2, x2, r3;
1349 int i2, d2;
4bc8c588 1350
121d8485 1351 /* The values of SP and FP before this instruction,
4bc8c588 1352 for detecting instructions that change them. */
3fc46200 1353 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1354 /* Likewise for the flag whether the back chain was saved. */
1355 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1356
1357 /* If we got an error trying to read the instruction, report it. */
1358 if (insn_len < 0)
8ac0e65a 1359 {
a8c99f38 1360 result = 0;
4bc8c588
JB
1361 break;
1362 }
1363
1364 next_pc = pc + insn_len;
1365
a8c99f38
JB
1366 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1367 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1368 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1369
4bc8c588 1370
3fc46200
UW
1371 /* LHI r1, i2 --- load halfword immediate. */
1372 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1373 /* LGFI r1, i2 --- load fullword immediate. */
1374 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1375 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1376 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1377 data->gpr[r1] = pv_constant (i2);
1378
1379 /* LR r1, r2 --- load from register. */
1380 /* LGR r1, r2 --- load from register (64-bit version). */
1381 else if (is_rr (insn32, op_lr, &r1, &r2)
1382 || is_rre (insn64, op_lgr, &r1, &r2))
1383 data->gpr[r1] = data->gpr[r2];
1384
1385 /* L r1, d2(x2, b2) --- load. */
1386 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1387 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1388 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1389 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1390 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1391 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1392
1393 /* ST r1, d2(x2, b2) --- store. */
1394 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1395 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1396 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1397 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1398 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1399 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1400
1401 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1402 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1403 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1404
1405 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1406 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1407 version). */
3fc46200
UW
1408 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1409 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1410 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1411 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1412 {
3fc46200
UW
1413 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1414 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1415 }
1416
3fc46200
UW
1417 /* AHI r1, i2 --- add halfword immediate. */
1418 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1419 /* AFI r1, i2 --- add fullword immediate. */
1420 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1421 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1422 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1423 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1424 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1425 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1426
1427 /* ALFI r1, i2 --- add logical immediate. */
1428 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1429 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1430 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1431 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1432 (CORE_ADDR)i2 & 0xffffffff);
1433
1434 /* AR r1, r2 -- add register. */
1435 /* AGR r1, r2 -- add register (64-bit version). */
1436 else if (is_rr (insn32, op_ar, &r1, &r2)
1437 || is_rre (insn64, op_agr, &r1, &r2))
1438 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1439
1440 /* A r1, d2(x2, b2) -- add. */
1441 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1442 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1443 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1444 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1445 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1446 data->gpr[r1] = pv_add (data->gpr[r1],
1447 s390_load (data, d2, x2, b2, data->gpr_size));
1448
1449 /* SLFI r1, i2 --- subtract logical immediate. */
1450 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1451 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1452 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1453 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1454 -((CORE_ADDR)i2 & 0xffffffff));
1455
1456 /* SR r1, r2 -- subtract register. */
1457 /* SGR r1, r2 -- subtract register (64-bit version). */
1458 else if (is_rr (insn32, op_sr, &r1, &r2)
1459 || is_rre (insn64, op_sgr, &r1, &r2))
1460 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1461
1462 /* S r1, d2(x2, b2) -- subtract. */
1463 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1464 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1465 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1466 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1467 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1468 data->gpr[r1] = pv_subtract (data->gpr[r1],
1469 s390_load (data, d2, x2, b2, data->gpr_size));
1470
1471 /* LA r1, d2(x2, b2) --- load address. */
1472 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1473 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1474 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1475 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1476
1477 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1478 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1479 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1480
3fc46200 1481 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1482 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1483 else if (is_rr (insn, op_basr, &r1, &r2)
1484 && r2 == 0)
3fc46200 1485 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1486
3fc46200 1487 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1488 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1489 {
3fc46200 1490 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1491 next_pc = pc + i2 * 2;
4bc8c588 1492
a8c99f38
JB
1493 /* We'd better not interpret any backward branches. We'll
1494 never terminate. */
1495 if (next_pc <= pc)
4bc8c588
JB
1496 break;
1497 }
1498
a8c99f38
JB
1499 /* Terminate search when hitting any other branch instruction. */
1500 else if (is_rr (insn, op_basr, &r1, &r2)
1501 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1502 || is_rr (insn, op_bcr, &r1, &r2)
1503 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1504 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1505 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1506 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1507 break;
1508
4bc8c588 1509 else
d4fb63e1
TT
1510 {
1511 /* An instruction we don't know how to simulate. The only
1512 safe thing to do would be to set every value we're tracking
1513 to 'unknown'. Instead, we'll be optimistic: we assume that
1514 we *can* interpret every instruction that the compiler uses
1515 to manipulate any of the data we're interested in here --
1516 then we can just ignore anything else. */
1517 }
4bc8c588
JB
1518
1519 /* Record the address after the last instruction that changed
1520 the FP, SP, or backlink. Ignore instructions that changed
1521 them back to their original values --- those are probably
1522 restore instructions. (The back chain is never restored,
1523 just popped.) */
1524 {
3fc46200
UW
1525 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1526 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1527
3fc46200
UW
1528 if ((! pv_is_identical (pre_insn_sp, sp)
1529 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1530 && sp.kind != pvk_unknown)
1531 || (! pv_is_identical (pre_insn_fp, fp)
1532 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1533 && fp.kind != pvk_unknown)
121d8485 1534 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1535 result = next_pc;
4bc8c588 1536 }
5769d3cd 1537 }
4bc8c588 1538
ee1b3323
UW
1539 /* Record where all the registers were saved. */
1540 pv_area_scan (data->stack, s390_check_for_saved, data);
1541
1542 free_pv_area (data->stack);
1543 data->stack = NULL;
1544
4bc8c588 1545 return result;
5769d3cd
AC
1546}
1547
a8c99f38
JB
1548/* Advance PC across any function entry prologue instructions to reach
1549 some "real" code. */
1550static CORE_ADDR
6093d2eb 1551s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1552{
1553 struct s390_prologue_data data;
1554 CORE_ADDR skip_pc;
6093d2eb 1555 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1556 return skip_pc ? skip_pc : pc;
1557}
1558
d0f54f9d
JB
1559/* Return true if we are in the functin's epilogue, i.e. after the
1560 instruction that destroyed the function's stack frame. */
1561static int
1562s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1563{
1564 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1565
1566 /* In frameless functions, there's not frame to destroy and thus
1567 we don't care about the epilogue.
1568
1569 In functions with frame, the epilogue sequence is a pair of
1570 a LM-type instruction that restores (amongst others) the
1571 return register %r14 and the stack pointer %r15, followed
1572 by a branch 'br %r14' --or equivalent-- that effects the
1573 actual return.
1574
1575 In that situation, this function needs to return 'true' in
1576 exactly one case: when pc points to that branch instruction.
1577
1578 Thus we try to disassemble the one instructions immediately
177b42fe 1579 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1580 modifying the stack pointer.
1581
1582 Note that disassembling backwards is not reliable, so there
1583 is a slight chance of false positives here ... */
1584
1585 bfd_byte insn[6];
1586 unsigned int r1, r3, b2;
1587 int d2;
1588
1589 if (word_size == 4
8defab1a 1590 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1591 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1592 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1593 return 1;
1594
a8c99f38 1595 if (word_size == 4
8defab1a 1596 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1597 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1598 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1599 return 1;
1600
d0f54f9d 1601 if (word_size == 8
8defab1a 1602 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1603 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1604 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1605 return 1;
1606
1607 return 0;
1608}
5769d3cd 1609
1db4e8a0
UW
1610/* Displaced stepping. */
1611
1612/* Fix up the state of registers and memory after having single-stepped
1613 a displaced instruction. */
1614static void
1615s390_displaced_step_fixup (struct gdbarch *gdbarch,
1616 struct displaced_step_closure *closure,
1617 CORE_ADDR from, CORE_ADDR to,
1618 struct regcache *regs)
1619{
1620 /* Since we use simple_displaced_step_copy_insn, our closure is a
1621 copy of the instruction. */
1622 gdb_byte *insn = (gdb_byte *) closure;
1623 static int s390_instrlen[] = { 2, 4, 4, 6 };
1624 int insnlen = s390_instrlen[insn[0] >> 6];
1625
1626 /* Fields for various kinds of instructions. */
1627 unsigned int b2, r1, r2, x2, r3;
1628 int i2, d2;
1629
1630 /* Get current PC and addressing mode bit. */
1631 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1632 ULONGEST amode = 0;
1db4e8a0
UW
1633
1634 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1635 {
1636 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1637 amode &= 0x80000000;
1638 }
1639
1640 if (debug_displaced)
1641 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1642 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1643 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1644 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1645
1646 /* Handle absolute branch and save instructions. */
1647 if (is_rr (insn, op_basr, &r1, &r2)
1648 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1649 {
1650 /* Recompute saved return address in R1. */
1651 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1652 amode | (from + insnlen));
1653 }
1654
1655 /* Handle absolute branch instructions. */
1656 else if (is_rr (insn, op_bcr, &r1, &r2)
1657 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1658 || is_rr (insn, op_bctr, &r1, &r2)
1659 || is_rre (insn, op_bctgr, &r1, &r2)
1660 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1661 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1662 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1663 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1664 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1665 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1666 {
1667 /* Update PC iff branch was *not* taken. */
1668 if (pc == to + insnlen)
1669 regcache_write_pc (regs, from + insnlen);
1670 }
1671
1672 /* Handle PC-relative branch and save instructions. */
1673 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1674 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1675 {
1676 /* Update PC. */
1677 regcache_write_pc (regs, pc - to + from);
1678 /* Recompute saved return address in R1. */
1679 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1680 amode | (from + insnlen));
1681 }
1682
1683 /* Handle PC-relative branch instructions. */
1684 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1685 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1686 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1687 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1688 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1689 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1690 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1691 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1692 {
1693 /* Update PC. */
1694 regcache_write_pc (regs, pc - to + from);
1695 }
1696
1697 /* Handle LOAD ADDRESS RELATIVE LONG. */
1698 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1699 {
0161e4b9
UW
1700 /* Update PC. */
1701 regcache_write_pc (regs, from + insnlen);
1db4e8a0
UW
1702 /* Recompute output address in R1. */
1703 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1704 amode | (from + i2 * 2));
1db4e8a0
UW
1705 }
1706
1707 /* If we executed a breakpoint instruction, point PC right back at it. */
1708 else if (insn[0] == 0x0 && insn[1] == 0x1)
1709 regcache_write_pc (regs, from);
1710
1711 /* For any other insn, PC points right after the original instruction. */
1712 else
1713 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1714
1715 if (debug_displaced)
1716 fprintf_unfiltered (gdb_stdlog,
1717 "displaced: (s390) pc is now %s\n",
1718 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1719}
a8c99f38 1720
d6db1fab
UW
1721
1722/* Helper routine to unwind pseudo registers. */
1723
1724static struct value *
1725s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1726{
1727 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1728 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1729 struct type *type = register_type (gdbarch, regnum);
1730
1731 /* Unwind PC via PSW address. */
1732 if (regnum == tdep->pc_regnum)
1733 {
1734 struct value *val;
1735
1736 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1737 if (!value_optimized_out (val))
1738 {
1739 LONGEST pswa = value_as_long (val);
1740
1741 if (TYPE_LENGTH (type) == 4)
1742 return value_from_pointer (type, pswa & 0x7fffffff);
1743 else
1744 return value_from_pointer (type, pswa);
1745 }
1746 }
1747
1748 /* Unwind CC via PSW mask. */
1749 if (regnum == tdep->cc_regnum)
1750 {
1751 struct value *val;
1752
1753 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1754 if (!value_optimized_out (val))
1755 {
1756 LONGEST pswm = value_as_long (val);
1757
1758 if (TYPE_LENGTH (type) == 4)
1759 return value_from_longest (type, (pswm >> 12) & 3);
1760 else
1761 return value_from_longest (type, (pswm >> 44) & 3);
1762 }
1763 }
1764
1765 /* Unwind full GPRs to show at least the lower halves (as the
1766 upper halves are undefined). */
2ccd1468 1767 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1768 {
1769 int reg = regnum - tdep->gpr_full_regnum;
1770 struct value *val;
1771
1772 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1773 if (!value_optimized_out (val))
1774 return value_cast (type, val);
1775 }
1776
1777 return allocate_optimized_out_value (type);
1778}
1779
1780static struct value *
1781s390_trad_frame_prev_register (struct frame_info *this_frame,
1782 struct trad_frame_saved_reg saved_regs[],
1783 int regnum)
1784{
1785 if (regnum < S390_NUM_REGS)
1786 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1787 else
1788 return s390_unwind_pseudo_register (this_frame, regnum);
1789}
1790
1791
a8c99f38
JB
1792/* Normal stack frames. */
1793
1794struct s390_unwind_cache {
1795
1796 CORE_ADDR func;
1797 CORE_ADDR frame_base;
1798 CORE_ADDR local_base;
1799
1800 struct trad_frame_saved_reg *saved_regs;
1801};
1802
a78f21af 1803static int
f089c433 1804s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1805 struct s390_unwind_cache *info)
5769d3cd 1806{
f089c433 1807 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1808 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1809 struct s390_prologue_data data;
3fc46200
UW
1810 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1811 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1812 int i;
1813 CORE_ADDR cfa;
a8c99f38
JB
1814 CORE_ADDR func;
1815 CORE_ADDR result;
1816 ULONGEST reg;
1817 CORE_ADDR prev_sp;
1818 int frame_pointer;
1819 int size;
edb3359d 1820 struct frame_info *next_frame;
a8c99f38
JB
1821
1822 /* Try to find the function start address. If we can't find it, we don't
1823 bother searching for it -- with modern compilers this would be mostly
1824 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1825 or else a valid backchain ... */
f089c433 1826 func = get_frame_func (this_frame);
a8c99f38
JB
1827 if (!func)
1828 return 0;
5769d3cd 1829
a8c99f38
JB
1830 /* Try to analyze the prologue. */
1831 result = s390_analyze_prologue (gdbarch, func,
f089c433 1832 get_frame_pc (this_frame), &data);
a8c99f38 1833 if (!result)
5769d3cd 1834 return 0;
5769d3cd 1835
a8c99f38
JB
1836 /* If this was successful, we should have found the instruction that
1837 sets the stack pointer register to the previous value of the stack
1838 pointer minus the frame size. */
3fc46200 1839 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1840 return 0;
a8c99f38
JB
1841
1842 /* A frame size of zero at this point can mean either a real
1843 frameless function, or else a failure to find the prologue.
1844 Perform some sanity checks to verify we really have a
1845 frameless function. */
1846 if (sp->k == 0)
5769d3cd 1847 {
a8c99f38
JB
1848 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1849 size zero. This is only possible if the next frame is a sentinel
1850 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1851 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1852 needed, instead the code should simpliy rely on its
1853 analysis. */
edb3359d
DJ
1854 next_frame = get_next_frame (this_frame);
1855 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1856 next_frame = get_next_frame (next_frame);
1857 if (next_frame
f089c433 1858 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1859 return 0;
5769d3cd 1860
a8c99f38
JB
1861 /* If we really have a frameless function, %r14 must be valid
1862 -- in particular, it must point to a different function. */
f089c433 1863 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1864 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1865 if (get_pc_function_start (reg) == func)
5769d3cd 1866 {
a8c99f38
JB
1867 /* However, there is one case where it *is* valid for %r14
1868 to point to the same function -- if this is a recursive
1869 call, and we have stopped in the prologue *before* the
1870 stack frame was allocated.
1871
1872 Recognize this case by looking ahead a bit ... */
5769d3cd 1873
a8c99f38 1874 struct s390_prologue_data data2;
3fc46200 1875 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1876
1877 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1878 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1879 && sp->k != 0))
1880 return 0;
5769d3cd 1881 }
5769d3cd 1882 }
5769d3cd
AC
1883
1884
a8c99f38
JB
1885 /* OK, we've found valid prologue data. */
1886 size = -sp->k;
5769d3cd 1887
a8c99f38
JB
1888 /* If the frame pointer originally also holds the same value
1889 as the stack pointer, we're probably using it. If it holds
1890 some other value -- even a constant offset -- it is most
1891 likely used as temp register. */
3fc46200 1892 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1893 frame_pointer = S390_FRAME_REGNUM;
1894 else
1895 frame_pointer = S390_SP_REGNUM;
1896
1897 /* If we've detected a function with stack frame, we'll still have to
1898 treat it as frameless if we're currently within the function epilog
c378eb4e 1899 code at a point where the frame pointer has already been restored.
a8c99f38 1900 This can only happen in an innermost frame. */
0e100dab
AC
1901 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1902 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1903 next_frame = get_next_frame (this_frame);
1904 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1905 next_frame = get_next_frame (next_frame);
f089c433 1906 if (size > 0
edb3359d 1907 && (next_frame == NULL
f089c433 1908 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1909 {
a8c99f38
JB
1910 /* See the comment in s390_in_function_epilogue_p on why this is
1911 not completely reliable ... */
f089c433 1912 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1913 {
a8c99f38
JB
1914 memset (&data, 0, sizeof (data));
1915 size = 0;
1916 frame_pointer = S390_SP_REGNUM;
5769d3cd 1917 }
5769d3cd 1918 }
5769d3cd 1919
a8c99f38
JB
1920 /* Once we know the frame register and the frame size, we can unwind
1921 the current value of the frame register from the next frame, and
1922 add back the frame size to arrive that the previous frame's
1923 stack pointer value. */
f089c433 1924 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1925 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1926
7803799a
UW
1927 /* Set up ABI call-saved/call-clobbered registers. */
1928 for (i = 0; i < S390_NUM_REGS; i++)
1929 if (!s390_register_call_saved (gdbarch, i))
1930 trad_frame_set_unknown (info->saved_regs, i);
1931
1932 /* CC is always call-clobbered. */
d6db1fab 1933 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1934
121d8485
UW
1935 /* Record the addresses of all register spill slots the prologue parser
1936 has recognized. Consider only registers defined as call-saved by the
1937 ABI; for call-clobbered registers the parser may have recognized
1938 spurious stores. */
5769d3cd 1939
7803799a
UW
1940 for (i = 0; i < 16; i++)
1941 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1942 && data.gpr_slot[i] != 0)
121d8485 1943 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1944
7803799a
UW
1945 for (i = 0; i < 16; i++)
1946 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1947 && data.fpr_slot[i] != 0)
1948 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1949
1950 /* Function return will set PC to %r14. */
d6db1fab 1951 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1952
1953 /* In frameless functions, we unwind simply by moving the return
1954 address to the PC. However, if we actually stored to the
1955 save area, use that -- we might only think the function frameless
1956 because we're in the middle of the prologue ... */
1957 if (size == 0
d6db1fab 1958 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1959 {
d6db1fab 1960 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1961 }
a8c99f38
JB
1962
1963 /* Another sanity check: unless this is a frameless function,
1964 we should have found spill slots for SP and PC.
1965 If not, we cannot unwind further -- this happens e.g. in
1966 libc's thread_start routine. */
1967 if (size > 0)
5769d3cd 1968 {
a8c99f38 1969 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1970 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1971 prev_sp = -1;
5769d3cd 1972 }
a8c99f38
JB
1973
1974 /* We use the current value of the frame register as local_base,
1975 and the top of the register save area as frame_base. */
1976 if (prev_sp != -1)
1977 {
1978 info->frame_base = prev_sp + 16*word_size + 32;
1979 info->local_base = prev_sp - size;
1980 }
1981
1982 info->func = func;
1983 return 1;
5769d3cd
AC
1984}
1985
a78f21af 1986static void
f089c433 1987s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1988 struct s390_unwind_cache *info)
5769d3cd 1989{
f089c433 1990 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1991 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1992 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1993 CORE_ADDR backchain;
1994 ULONGEST reg;
1995 LONGEST sp;
7803799a
UW
1996 int i;
1997
1998 /* Set up ABI call-saved/call-clobbered registers. */
1999 for (i = 0; i < S390_NUM_REGS; i++)
2000 if (!s390_register_call_saved (gdbarch, i))
2001 trad_frame_set_unknown (info->saved_regs, i);
2002
2003 /* CC is always call-clobbered. */
d6db1fab 2004 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2005
2006 /* Get the backchain. */
f089c433 2007 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 2008 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
2009
2010 /* A zero backchain terminates the frame chain. As additional
2011 sanity check, let's verify that the spill slot for SP in the
2012 save area pointed to by the backchain in fact links back to
2013 the save area. */
2014 if (backchain != 0
e17a4113
UW
2015 && safe_read_memory_integer (backchain + 15*word_size,
2016 word_size, byte_order, &sp)
a8c99f38
JB
2017 && (CORE_ADDR)sp == backchain)
2018 {
2019 /* We don't know which registers were saved, but it will have
2020 to be at least %r14 and %r15. This will allow us to continue
2021 unwinding, but other prev-frame registers may be incorrect ... */
2022 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2023 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2024
2025 /* Function return will set PC to %r14. */
d6db1fab 2026 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2027 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2028
2029 /* We use the current value of the frame register as local_base,
2030 and the top of the register save area as frame_base. */
2031 info->frame_base = backchain + 16*word_size + 32;
2032 info->local_base = reg;
2033 }
2034
f089c433 2035 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2036}
2037
a8c99f38 2038static struct s390_unwind_cache *
f089c433 2039s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2040 void **this_prologue_cache)
2041{
2042 struct s390_unwind_cache *info;
2043 if (*this_prologue_cache)
2044 return *this_prologue_cache;
2045
2046 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2047 *this_prologue_cache = info;
f089c433 2048 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2049 info->func = -1;
2050 info->frame_base = -1;
2051 info->local_base = -1;
2052
2053 /* Try to use prologue analysis to fill the unwind cache.
2054 If this fails, fall back to reading the stack backchain. */
f089c433
UW
2055 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2056 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
2057
2058 return info;
2059}
5769d3cd 2060
a78f21af 2061static void
f089c433 2062s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2063 void **this_prologue_cache,
2064 struct frame_id *this_id)
5769d3cd 2065{
a8c99f38 2066 struct s390_unwind_cache *info
f089c433 2067 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2068
a8c99f38
JB
2069 if (info->frame_base == -1)
2070 return;
5769d3cd 2071
a8c99f38 2072 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2073}
2074
f089c433
UW
2075static struct value *
2076s390_frame_prev_register (struct frame_info *this_frame,
2077 void **this_prologue_cache, int regnum)
a8c99f38 2078{
7803799a 2079 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2080 struct s390_unwind_cache *info
f089c433 2081 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2082
d6db1fab 2083 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2084}
2085
2086static const struct frame_unwind s390_frame_unwind = {
2087 NORMAL_FRAME,
8fbca658 2088 default_frame_unwind_stop_reason,
a8c99f38 2089 s390_frame_this_id,
f089c433
UW
2090 s390_frame_prev_register,
2091 NULL,
2092 default_frame_sniffer
a8c99f38
JB
2093};
2094
5769d3cd 2095
8e645ae7
AC
2096/* Code stubs and their stack frames. For things like PLTs and NULL
2097 function calls (where there is no true frame and the return address
2098 is in the RETADDR register). */
a8c99f38 2099
8e645ae7
AC
2100struct s390_stub_unwind_cache
2101{
a8c99f38
JB
2102 CORE_ADDR frame_base;
2103 struct trad_frame_saved_reg *saved_regs;
2104};
2105
8e645ae7 2106static struct s390_stub_unwind_cache *
f089c433 2107s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2108 void **this_prologue_cache)
5769d3cd 2109{
f089c433 2110 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2111 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2112 struct s390_stub_unwind_cache *info;
a8c99f38 2113 ULONGEST reg;
5c3cf190 2114
a8c99f38
JB
2115 if (*this_prologue_cache)
2116 return *this_prologue_cache;
5c3cf190 2117
8e645ae7 2118 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2119 *this_prologue_cache = info;
f089c433 2120 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2121
2122 /* The return address is in register %r14. */
d6db1fab 2123 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2124
2125 /* Retrieve stack pointer and determine our frame base. */
f089c433 2126 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2127 info->frame_base = reg + 16*word_size + 32;
2128
2129 return info;
5769d3cd
AC
2130}
2131
a8c99f38 2132static void
f089c433 2133s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2134 void **this_prologue_cache,
2135 struct frame_id *this_id)
5769d3cd 2136{
8e645ae7 2137 struct s390_stub_unwind_cache *info
f089c433
UW
2138 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2139 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2140}
5769d3cd 2141
f089c433
UW
2142static struct value *
2143s390_stub_frame_prev_register (struct frame_info *this_frame,
2144 void **this_prologue_cache, int regnum)
8e645ae7
AC
2145{
2146 struct s390_stub_unwind_cache *info
f089c433 2147 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2148 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2149}
2150
f089c433
UW
2151static int
2152s390_stub_frame_sniffer (const struct frame_unwind *self,
2153 struct frame_info *this_frame,
2154 void **this_prologue_cache)
a8c99f38 2155{
93d42b30 2156 CORE_ADDR addr_in_block;
8e645ae7
AC
2157 bfd_byte insn[S390_MAX_INSTR_SIZE];
2158
2159 /* If the current PC points to non-readable memory, we assume we
2160 have trapped due to an invalid function pointer call. We handle
2161 the non-existing current function like a PLT stub. */
f089c433 2162 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2163 if (in_plt_section (addr_in_block)
f089c433
UW
2164 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2165 return 1;
2166 return 0;
a8c99f38 2167}
5769d3cd 2168
f089c433
UW
2169static const struct frame_unwind s390_stub_frame_unwind = {
2170 NORMAL_FRAME,
8fbca658 2171 default_frame_unwind_stop_reason,
f089c433
UW
2172 s390_stub_frame_this_id,
2173 s390_stub_frame_prev_register,
2174 NULL,
2175 s390_stub_frame_sniffer
2176};
2177
5769d3cd 2178
a8c99f38 2179/* Signal trampoline stack frames. */
5769d3cd 2180
a8c99f38
JB
2181struct s390_sigtramp_unwind_cache {
2182 CORE_ADDR frame_base;
2183 struct trad_frame_saved_reg *saved_regs;
2184};
5769d3cd 2185
a8c99f38 2186static struct s390_sigtramp_unwind_cache *
f089c433 2187s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2188 void **this_prologue_cache)
5769d3cd 2189{
f089c433 2190 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2191 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2192 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2193 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2194 struct s390_sigtramp_unwind_cache *info;
2195 ULONGEST this_sp, prev_sp;
7803799a 2196 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2197 int i;
2198
2199 if (*this_prologue_cache)
2200 return *this_prologue_cache;
5769d3cd 2201
a8c99f38
JB
2202 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2203 *this_prologue_cache = info;
f089c433 2204 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2205
f089c433
UW
2206 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2207 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2208 next_cfa = this_sp + 16*word_size + 32;
2209
2210 /* New-style RT frame:
2211 retcode + alignment (8 bytes)
2212 siginfo (128 bytes)
c378eb4e 2213 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2214 if (next_ra == next_cfa)
2215 {
f0f63663 2216 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2217 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2218 upper GPR halves if present. */
2219 sigreg_high_off = 8;
a8c99f38
JB
2220 }
2221
2222 /* Old-style RT frame and all non-RT frames:
2223 old signal mask (8 bytes)
c378eb4e 2224 pointer to sigregs. */
5769d3cd
AC
2225 else
2226 {
e17a4113
UW
2227 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2228 word_size, byte_order);
7803799a
UW
2229 /* sigregs are followed by signo (4 bytes), then by the
2230 upper GPR halves if present. */
2231 sigreg_high_off = 4;
a8c99f38 2232 }
5769d3cd 2233
a8c99f38
JB
2234 /* The sigregs structure looks like this:
2235 long psw_mask;
2236 long psw_addr;
2237 long gprs[16];
2238 int acrs[16];
2239 int fpc;
2240 int __pad;
2241 double fprs[16]; */
5769d3cd 2242
7803799a
UW
2243 /* PSW mask and address. */
2244 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2245 sigreg_ptr += word_size;
7803799a 2246 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2247 sigreg_ptr += word_size;
2248
2249 /* Then the GPRs. */
2250 for (i = 0; i < 16; i++)
2251 {
2252 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2253 sigreg_ptr += word_size;
2254 }
2255
2256 /* Then the ACRs. */
2257 for (i = 0; i < 16; i++)
2258 {
2259 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2260 sigreg_ptr += 4;
5769d3cd 2261 }
5769d3cd 2262
a8c99f38
JB
2263 /* The floating-point control word. */
2264 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2265 sigreg_ptr += 8;
5769d3cd 2266
a8c99f38
JB
2267 /* And finally the FPRs. */
2268 for (i = 0; i < 16; i++)
2269 {
2270 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2271 sigreg_ptr += 8;
2272 }
2273
7803799a
UW
2274 /* If we have them, the GPR upper halves are appended at the end. */
2275 sigreg_ptr += sigreg_high_off;
2276 if (tdep->gpr_full_regnum != -1)
2277 for (i = 0; i < 16; i++)
2278 {
2279 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2280 sigreg_ptr += 4;
2281 }
2282
a8c99f38
JB
2283 /* Restore the previous frame's SP. */
2284 prev_sp = read_memory_unsigned_integer (
2285 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2286 word_size, byte_order);
5769d3cd 2287
a8c99f38
JB
2288 /* Determine our frame base. */
2289 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2290
a8c99f38 2291 return info;
5769d3cd
AC
2292}
2293
a8c99f38 2294static void
f089c433 2295s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2296 void **this_prologue_cache,
2297 struct frame_id *this_id)
5769d3cd 2298{
a8c99f38 2299 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2300 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2301 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2302}
2303
f089c433
UW
2304static struct value *
2305s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2306 void **this_prologue_cache, int regnum)
a8c99f38
JB
2307{
2308 struct s390_sigtramp_unwind_cache *info
f089c433 2309 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2310 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2311}
2312
f089c433
UW
2313static int
2314s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2315 struct frame_info *this_frame,
2316 void **this_prologue_cache)
5769d3cd 2317{
f089c433 2318 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2319 bfd_byte sigreturn[2];
4c8287ac 2320
8defab1a 2321 if (target_read_memory (pc, sigreturn, 2))
f089c433 2322 return 0;
4c8287ac 2323
a8c99f38 2324 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2325 return 0;
5769d3cd 2326
a8c99f38
JB
2327 if (sigreturn[1] != 119 /* sigreturn */
2328 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2329 return 0;
a8c99f38 2330
f089c433 2331 return 1;
5769d3cd
AC
2332}
2333
f089c433
UW
2334static const struct frame_unwind s390_sigtramp_frame_unwind = {
2335 SIGTRAMP_FRAME,
8fbca658 2336 default_frame_unwind_stop_reason,
f089c433
UW
2337 s390_sigtramp_frame_this_id,
2338 s390_sigtramp_frame_prev_register,
2339 NULL,
2340 s390_sigtramp_frame_sniffer
2341};
2342
4c8287ac 2343
a8c99f38
JB
2344/* Frame base handling. */
2345
2346static CORE_ADDR
f089c433 2347s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2348{
a8c99f38 2349 struct s390_unwind_cache *info
f089c433 2350 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2351 return info->frame_base;
2352}
2353
2354static CORE_ADDR
f089c433 2355s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2356{
2357 struct s390_unwind_cache *info
f089c433 2358 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2359 return info->local_base;
2360}
2361
2362static const struct frame_base s390_frame_base = {
2363 &s390_frame_unwind,
2364 s390_frame_base_address,
2365 s390_local_base_address,
2366 s390_local_base_address
2367};
2368
2369static CORE_ADDR
2370s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2371{
7803799a 2372 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2373 ULONGEST pc;
7803799a 2374 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2375 return gdbarch_addr_bits_remove (gdbarch, pc);
2376}
2377
2378static CORE_ADDR
2379s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2380{
2381 ULONGEST sp;
2382 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2383 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2384}
2385
2386
a431654a
AC
2387/* DWARF-2 frame support. */
2388
7803799a
UW
2389static struct value *
2390s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2391 int regnum)
2392{
d6db1fab 2393 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2394}
2395
a431654a
AC
2396static void
2397s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2398 struct dwarf2_frame_state_reg *reg,
4a4e5149 2399 struct frame_info *this_frame)
a431654a
AC
2400{
2401 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2402
d6db1fab
UW
2403 /* The condition code (and thus PSW mask) is call-clobbered. */
2404 if (regnum == S390_PSWM_REGNUM)
2405 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2406
2407 /* The PSW address unwinds to the return address. */
2408 else if (regnum == S390_PSWA_REGNUM)
2409 reg->how = DWARF2_FRAME_REG_RA;
2410
7803799a
UW
2411 /* Fixed registers are call-saved or call-clobbered
2412 depending on the ABI in use. */
d6db1fab 2413 else if (regnum < S390_NUM_REGS)
a431654a 2414 {
7803799a 2415 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2416 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2417 else
a431654a 2418 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2419 }
a431654a 2420
d6db1fab
UW
2421 /* We install a special function to unwind pseudos. */
2422 else
7803799a
UW
2423 {
2424 reg->how = DWARF2_FRAME_REG_FN;
2425 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2426 }
2427}
2428
2429
b0cf273e
JB
2430/* Dummy function calls. */
2431
78f8b424
JB
2432/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2433 "Integer-like" types are those that should be passed the way
2434 integers are: integers, enums, ranges, characters, and booleans. */
2435static int
2436is_integer_like (struct type *type)
2437{
2438 enum type_code code = TYPE_CODE (type);
2439
2440 return (code == TYPE_CODE_INT
2441 || code == TYPE_CODE_ENUM
2442 || code == TYPE_CODE_RANGE
2443 || code == TYPE_CODE_CHAR
2444 || code == TYPE_CODE_BOOL);
2445}
2446
78f8b424
JB
2447/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2448 "Pointer-like" types are those that should be passed the way
2449 pointers are: pointers and references. */
2450static int
2451is_pointer_like (struct type *type)
2452{
2453 enum type_code code = TYPE_CODE (type);
2454
2455 return (code == TYPE_CODE_PTR
2456 || code == TYPE_CODE_REF);
2457}
2458
2459
20a940cc
JB
2460/* Return non-zero if TYPE is a `float singleton' or `double
2461 singleton', zero otherwise.
2462
2463 A `T singleton' is a struct type with one member, whose type is
2464 either T or a `T singleton'. So, the following are all float
2465 singletons:
2466
2467 struct { float x };
2468 struct { struct { float x; } x; };
2469 struct { struct { struct { float x; } x; } x; };
2470
2471 ... and so on.
2472
b0cf273e
JB
2473 All such structures are passed as if they were floats or doubles,
2474 as the (revised) ABI says. */
20a940cc
JB
2475static int
2476is_float_singleton (struct type *type)
2477{
b0cf273e
JB
2478 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2479 {
2480 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2481 CHECK_TYPEDEF (singleton_type);
2482
2483 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2484 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2485 || is_float_singleton (singleton_type));
2486 }
2487
2488 return 0;
20a940cc
JB
2489}
2490
2491
2492/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2493 "Struct-like" types are those that should be passed as structs are:
2494 structs and unions.
2495
2496 As an odd quirk, not mentioned in the ABI, GCC passes float and
2497 double singletons as if they were a plain float, double, etc. (The
2498 corresponding union types are handled normally.) So we exclude
2499 those types here. *shrug* */
2500static int
2501is_struct_like (struct type *type)
2502{
2503 enum type_code code = TYPE_CODE (type);
2504
2505 return (code == TYPE_CODE_UNION
2506 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2507}
2508
2509
2510/* Return non-zero if TYPE is a float-like type, zero otherwise.
2511 "Float-like" types are those that should be passed as
2512 floating-point values are.
2513
2514 You'd think this would just be floats, doubles, long doubles, etc.
2515 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2516 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2517 corresponding union types are handled normally.) So we include
20a940cc
JB
2518 those types here. *shrug* */
2519static int
2520is_float_like (struct type *type)
2521{
2522 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2523 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2524 || is_float_singleton (type));
2525}
2526
2527
78f8b424 2528static int
b0cf273e 2529is_power_of_two (unsigned int n)
78f8b424 2530{
b0cf273e 2531 return ((n & (n - 1)) == 0);
78f8b424
JB
2532}
2533
b0cf273e
JB
2534/* Return non-zero if TYPE should be passed as a pointer to a copy,
2535 zero otherwise. */
4d819d0e 2536static int
b0cf273e 2537s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2538{
354ecfd5 2539 if (TYPE_LENGTH (type) > 8)
b0cf273e 2540 return 1;
4d819d0e 2541
56b9d9ac
UW
2542 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2543 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2544 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2545}
2546
b0cf273e
JB
2547/* Return non-zero if TYPE should be passed in a float register
2548 if possible. */
78f8b424 2549static int
b0cf273e 2550s390_function_arg_float (struct type *type)
78f8b424 2551{
354ecfd5 2552 if (TYPE_LENGTH (type) > 8)
b0cf273e 2553 return 0;
78f8b424 2554
b0cf273e 2555 return is_float_like (type);
4d819d0e
JB
2556}
2557
b0cf273e
JB
2558/* Return non-zero if TYPE should be passed in an integer register
2559 (or a pair of integer registers) if possible. */
78f8b424 2560static int
b0cf273e 2561s390_function_arg_integer (struct type *type)
78f8b424 2562{
354ecfd5 2563 if (TYPE_LENGTH (type) > 8)
b0cf273e 2564 return 0;
78f8b424 2565
b0cf273e
JB
2566 return is_integer_like (type)
2567 || is_pointer_like (type)
354ecfd5 2568 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2569}
2570
78f8b424
JB
2571/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2572 word as required for the ABI. */
2573static LONGEST
e17a4113 2574extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2575{
e17a4113 2576 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2577 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2578
2579 /* Even structs get passed in the least significant bits of the
2580 register / memory word. It's not really right to extract them as
2581 an integer, but it does take care of the extension. */
2582 if (TYPE_UNSIGNED (type))
0fd88904 2583 return extract_unsigned_integer (value_contents (arg),
e17a4113 2584 TYPE_LENGTH (type), byte_order);
78f8b424 2585 else
0fd88904 2586 return extract_signed_integer (value_contents (arg),
e17a4113 2587 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2588}
2589
2590
78f8b424
JB
2591/* Return the alignment required by TYPE. */
2592static int
2593alignment_of (struct type *type)
2594{
2595 int alignment;
2596
2597 if (is_integer_like (type)
2598 || is_pointer_like (type)
a16b8bcd
UW
2599 || TYPE_CODE (type) == TYPE_CODE_FLT
2600 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2601 alignment = TYPE_LENGTH (type);
2602 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2603 || TYPE_CODE (type) == TYPE_CODE_UNION)
2604 {
2605 int i;
2606
2607 alignment = 1;
2608 for (i = 0; i < TYPE_NFIELDS (type); i++)
2609 {
56b9d9ac
UW
2610 int field_alignment
2611 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424
JB
2612
2613 if (field_alignment > alignment)
2614 alignment = field_alignment;
2615 }
2616 }
2617 else
2618 alignment = 1;
2619
2620 /* Check that everything we ever return is a power of two. Lots of
2621 code doesn't want to deal with aligning things to arbitrary
2622 boundaries. */
2623 gdb_assert ((alignment & (alignment - 1)) == 0);
2624
2625 return alignment;
2626}
2627
2628
2629/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2630 place to be passed to a function, as specified by the "GNU/Linux
2631 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2632
2633 SP is the current stack pointer. We must put arguments, links,
2634 padding, etc. whereever they belong, and return the new stack
2635 pointer value.
2636
2637 If STRUCT_RETURN is non-zero, then the function we're calling is
2638 going to return a structure by value; STRUCT_ADDR is the address of
2639 a block we've allocated for it on the stack.
2640
2641 Our caller has taken care of any type promotions needed to satisfy
2642 prototypes or the old K&R argument-passing rules. */
a78f21af 2643static CORE_ADDR
7d9b040b 2644s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2645 struct regcache *regcache, CORE_ADDR bp_addr,
2646 int nargs, struct value **args, CORE_ADDR sp,
2647 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2648{
b0cf273e
JB
2649 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2650 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2651 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2652 int i;
5769d3cd 2653
78f8b424
JB
2654 /* If the i'th argument is passed as a reference to a copy, then
2655 copy_addr[i] is the address of the copy we made. */
2656 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2657
c0cc4c83 2658 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2659 for (i = 0; i < nargs; i++)
2660 {
2661 struct value *arg = args[i];
56b9d9ac 2662 struct type *type = check_typedef (value_type (arg));
5769d3cd 2663
b0cf273e 2664 if (s390_function_arg_pass_by_reference (type))
01c464e9 2665 {
354ecfd5 2666 sp -= TYPE_LENGTH (type);
5b03f266 2667 sp = align_down (sp, alignment_of (type));
78f8b424 2668 copy_addr[i] = sp;
01c464e9 2669 }
5769d3cd 2670 }
5769d3cd 2671
78f8b424
JB
2672 /* Reserve space for the parameter area. As a conservative
2673 simplification, we assume that everything will be passed on the
b0cf273e
JB
2674 stack. Since every argument larger than 8 bytes will be
2675 passed by reference, we use this simple upper bound. */
2676 sp -= nargs * 8;
78f8b424 2677
78f8b424
JB
2678 /* After all that, make sure it's still aligned on an eight-byte
2679 boundary. */
5b03f266 2680 sp = align_down (sp, 8);
78f8b424 2681
c0cc4c83
UW
2682 /* Allocate the standard frame areas: the register save area, the
2683 word reserved for the compiler (which seems kind of meaningless),
2684 and the back chain pointer. */
2685 sp -= 16*word_size + 32;
2686
2687 /* Now we have the final SP value. Make sure we didn't underflow;
2688 on 31-bit, this would result in addresses with the high bit set,
2689 which causes confusion elsewhere. Note that if we error out
2690 here, stack and registers remain untouched. */
2691 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2692 error (_("Stack overflow"));
2693
2694
78f8b424
JB
2695 /* Finally, place the actual parameters, working from SP towards
2696 higher addresses. The code above is supposed to reserve enough
2697 space for this. */
2698 {
2699 int fr = 0;
2700 int gr = 2;
c0cc4c83 2701 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2702
b0cf273e 2703 /* A struct is returned using general register 2. */
4d819d0e 2704 if (struct_return)
b0cf273e
JB
2705 {
2706 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2707 struct_addr);
2708 gr++;
2709 }
4d819d0e 2710
78f8b424
JB
2711 for (i = 0; i < nargs; i++)
2712 {
2713 struct value *arg = args[i];
56b9d9ac 2714 struct type *type = check_typedef (value_type (arg));
b0cf273e
JB
2715 unsigned length = TYPE_LENGTH (type);
2716
2717 if (s390_function_arg_pass_by_reference (type))
2718 {
c0cc4c83
UW
2719 /* Actually copy the argument contents to the stack slot
2720 that was reserved above. */
2721 write_memory (copy_addr[i], value_contents (arg), length);
2722
b0cf273e
JB
2723 if (gr <= 6)
2724 {
2725 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2726 copy_addr[i]);
2727 gr++;
2728 }
2729 else
2730 {
e17a4113
UW
2731 write_memory_unsigned_integer (starg, word_size, byte_order,
2732 copy_addr[i]);
b0cf273e
JB
2733 starg += word_size;
2734 }
2735 }
2736 else if (s390_function_arg_float (type))
2737 {
2738 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2739 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2740 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2741 {
2742 /* When we store a single-precision value in an FP register,
2743 it occupies the leftmost bits. */
2744 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2745 0, length, value_contents (arg));
b0cf273e
JB
2746 fr += 2;
2747 }
2748 else
2749 {
2750 /* When we store a single-precision value in a stack slot,
2751 it occupies the rightmost bits. */
2752 starg = align_up (starg + length, word_size);
0fd88904 2753 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2754 }
2755 }
2756 else if (s390_function_arg_integer (type) && length <= word_size)
2757 {
2758 if (gr <= 6)
2759 {
2760 /* Integer arguments are always extended to word size. */
2761 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2762 extend_simple_arg (gdbarch,
2763 arg));
b0cf273e
JB
2764 gr++;
2765 }
2766 else
2767 {
2768 /* Integer arguments are always extended to word size. */
e17a4113
UW
2769 write_memory_signed_integer (starg, word_size, byte_order,
2770 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2771 starg += word_size;
2772 }
2773 }
2774 else if (s390_function_arg_integer (type) && length == 2*word_size)
2775 {
2776 if (gr <= 5)
2777 {
2778 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2779 value_contents (arg));
b0cf273e 2780 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2781 value_contents (arg) + word_size);
b0cf273e
JB
2782 gr += 2;
2783 }
2784 else
2785 {
2786 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2787 in it, then don't go back and use it again later. */
2788 gr = 7;
2789
0fd88904 2790 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2791 starg += length;
2792 }
2793 }
2794 else
e2e0b3e5 2795 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2796 }
2797 }
2798
8de7d199
UW
2799 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2800 if (word_size == 4)
2801 {
2802 ULONGEST pswa;
2803 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2804 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2805 }
b0cf273e 2806 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2807
b0cf273e
JB
2808 /* Store updated stack pointer. */
2809 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2810
a8c99f38 2811 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2812 which is actually the top of the register save area. */
2813 return sp + 16*word_size + 32;
5769d3cd
AC
2814}
2815
f089c433 2816/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2817 dummy frame. The frame ID's base needs to match the TOS value
2818 returned by push_dummy_call, and the PC match the dummy frame's
2819 breakpoint. */
2820static struct frame_id
f089c433 2821s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2822{
a8c99f38 2823 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2824 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2825 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2826
121d8485 2827 return frame_id_build (sp + 16*word_size + 32,
f089c433 2828 get_frame_pc (this_frame));
b0cf273e 2829}
c8f9d51c 2830
4074e13c
JB
2831static CORE_ADDR
2832s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2833{
2834 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2835 always be aligned on an eight-byte boundary. */
2836 return (addr & -8);
2837}
2838
2839
b0cf273e
JB
2840/* Function return value access. */
2841
2842static enum return_value_convention
2843s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2844{
354ecfd5 2845 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2846 return RETURN_VALUE_STRUCT_CONVENTION;
2847
2848 switch (TYPE_CODE (type))
2849 {
2850 case TYPE_CODE_STRUCT:
2851 case TYPE_CODE_UNION:
2852 case TYPE_CODE_ARRAY:
56b9d9ac 2853 case TYPE_CODE_COMPLEX:
b0cf273e 2854 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2855
b0cf273e
JB
2856 default:
2857 return RETURN_VALUE_REGISTER_CONVENTION;
2858 }
c8f9d51c
JB
2859}
2860
b0cf273e 2861static enum return_value_convention
6a3a010b 2862s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2863 struct type *type, struct regcache *regcache,
2864 gdb_byte *out, const gdb_byte *in)
5769d3cd 2865{
e17a4113 2866 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2867 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2868 enum return_value_convention rvc;
2869 int length;
2870
2871 type = check_typedef (type);
2872 rvc = s390_return_value_convention (gdbarch, type);
2873 length = TYPE_LENGTH (type);
2874
b0cf273e
JB
2875 if (in)
2876 {
2877 switch (rvc)
2878 {
2879 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2880 if (TYPE_CODE (type) == TYPE_CODE_FLT
2881 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2882 {
2883 /* When we store a single-precision value in an FP register,
2884 it occupies the leftmost bits. */
2885 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2886 0, length, in);
2887 }
2888 else if (length <= word_size)
2889 {
2890 /* Integer arguments are always extended to word size. */
2891 if (TYPE_UNSIGNED (type))
2892 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2893 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2894 else
2895 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2896 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2897 }
2898 else if (length == 2*word_size)
2899 {
2900 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2901 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2902 }
2903 else
e2e0b3e5 2904 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2905 break;
2906
2907 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2908 error (_("Cannot set function return value."));
b0cf273e
JB
2909 break;
2910 }
2911 }
2912 else if (out)
2913 {
2914 switch (rvc)
2915 {
2916 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2917 if (TYPE_CODE (type) == TYPE_CODE_FLT
2918 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2919 {
2920 /* When we store a single-precision value in an FP register,
2921 it occupies the leftmost bits. */
2922 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2923 0, length, out);
2924 }
2925 else if (length <= word_size)
2926 {
2927 /* Integer arguments occupy the rightmost bits. */
2928 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2929 word_size - length, length, out);
2930 }
2931 else if (length == 2*word_size)
2932 {
2933 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2934 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2935 }
2936 else
e2e0b3e5 2937 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2938 break;
5769d3cd 2939
b0cf273e 2940 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2941 error (_("Function return value unknown."));
b0cf273e
JB
2942 break;
2943 }
2944 }
2945
2946 return rvc;
2947}
5769d3cd
AC
2948
2949
a8c99f38
JB
2950/* Breakpoints. */
2951
43af2100 2952static const gdb_byte *
c378eb4e
MS
2953s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2954 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2955{
43af2100 2956 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2957
2958 *lenptr = sizeof (breakpoint);
2959 return breakpoint;
2960}
2961
5769d3cd 2962
a8c99f38 2963/* Address handling. */
5769d3cd
AC
2964
2965static CORE_ADDR
24568a2c 2966s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2967{
a8c99f38 2968 return addr & 0x7fffffff;
5769d3cd
AC
2969}
2970
ffc65945
KB
2971static int
2972s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2973{
2974 if (byte_size == 4)
119ac181 2975 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2976 else
2977 return 0;
2978}
2979
2980static const char *
2981s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2982{
119ac181 2983 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2984 return "mode32";
2985 else
2986 return NULL;
2987}
2988
a78f21af 2989static int
c378eb4e
MS
2990s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2991 const char *name,
ffc65945
KB
2992 int *type_flags_ptr)
2993{
2994 if (strcmp (name, "mode32") == 0)
2995 {
119ac181 2996 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2997 return 1;
2998 }
2999 else
3000 return 0;
3001}
3002
55aa24fb
SDJ
3003/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3004 gdbarch.h. */
3005
3006static int
3007s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3008{
3009 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3010 or indirection. */
3011 || *s == '%' /* Register access. */
3012 || isdigit (*s)); /* Literal number. */
3013}
3014
a8c99f38
JB
3015/* Set up gdbarch struct. */
3016
a78f21af 3017static struct gdbarch *
5769d3cd
AC
3018s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3019{
7803799a
UW
3020 const struct target_desc *tdesc = info.target_desc;
3021 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
3022 struct gdbarch *gdbarch;
3023 struct gdbarch_tdep *tdep;
7803799a
UW
3024 int tdep_abi;
3025 int have_upper = 0;
c642a434
UW
3026 int have_linux_v1 = 0;
3027 int have_linux_v2 = 0;
7803799a
UW
3028 int first_pseudo_reg, last_pseudo_reg;
3029
3030 /* Default ABI and register size. */
3031 switch (info.bfd_arch_info->mach)
3032 {
3033 case bfd_mach_s390_31:
3034 tdep_abi = ABI_LINUX_S390;
3035 break;
3036
3037 case bfd_mach_s390_64:
3038 tdep_abi = ABI_LINUX_ZSERIES;
3039 break;
3040
3041 default:
3042 return NULL;
3043 }
3044
3045 /* Use default target description if none provided by the target. */
3046 if (!tdesc_has_registers (tdesc))
3047 {
3048 if (tdep_abi == ABI_LINUX_S390)
3049 tdesc = tdesc_s390_linux32;
3050 else
3051 tdesc = tdesc_s390x_linux64;
3052 }
3053
3054 /* Check any target description for validity. */
3055 if (tdesc_has_registers (tdesc))
3056 {
3057 static const char *const gprs[] = {
3058 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3059 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3060 };
3061 static const char *const fprs[] = {
3062 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3063 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3064 };
3065 static const char *const acrs[] = {
3066 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3067 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3068 };
3069 static const char *const gprs_lower[] = {
3070 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3071 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3072 };
3073 static const char *const gprs_upper[] = {
3074 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3075 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3076 };
4ac33720
UW
3077 static const char *const tdb_regs[] = {
3078 "tdb0", "tac", "tct", "atia",
3079 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
3080 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
3081 };
7803799a
UW
3082 const struct tdesc_feature *feature;
3083 int i, valid_p = 1;
3084
3085 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3086 if (feature == NULL)
3087 return NULL;
3088
3089 tdesc_data = tdesc_data_alloc ();
3090
3091 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3092 S390_PSWM_REGNUM, "pswm");
3093 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3094 S390_PSWA_REGNUM, "pswa");
3095
3096 if (tdesc_unnumbered_register (feature, "r0"))
3097 {
3098 for (i = 0; i < 16; i++)
3099 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3100 S390_R0_REGNUM + i, gprs[i]);
3101 }
3102 else
3103 {
3104 have_upper = 1;
3105
3106 for (i = 0; i < 16; i++)
3107 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3108 S390_R0_REGNUM + i,
3109 gprs_lower[i]);
3110 for (i = 0; i < 16; i++)
3111 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3112 S390_R0_UPPER_REGNUM + i,
3113 gprs_upper[i]);
3114 }
3115
3116 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3117 if (feature == NULL)
3118 {
3119 tdesc_data_cleanup (tdesc_data);
3120 return NULL;
3121 }
3122
3123 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3124 S390_FPC_REGNUM, "fpc");
3125 for (i = 0; i < 16; i++)
3126 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3127 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3128
7803799a
UW
3129 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3130 if (feature == NULL)
3131 {
3132 tdesc_data_cleanup (tdesc_data);
3133 return NULL;
3134 }
3135
3136 for (i = 0; i < 16; i++)
3137 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3138 S390_A0_REGNUM + i, acrs[i]);
3139
94eae614 3140 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3141 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3142 if (feature)
3143 {
3144 tdesc_numbered_register (feature, tdesc_data,
3145 S390_ORIG_R2_REGNUM, "orig_r2");
3146
3147 if (tdesc_numbered_register (feature, tdesc_data,
3148 S390_LAST_BREAK_REGNUM, "last_break"))
3149 have_linux_v1 = 1;
3150
3151 if (tdesc_numbered_register (feature, tdesc_data,
3152 S390_SYSTEM_CALL_REGNUM, "system_call"))
3153 have_linux_v2 = 1;
3154
3155 if (have_linux_v2 > have_linux_v1)
3156 valid_p = 0;
3157 }
3158
4ac33720
UW
3159 /* Transaction diagnostic block. */
3160 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3161 if (feature)
3162 {
3163 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3164 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3165 S390_TDB_DWORD0_REGNUM + i,
3166 tdb_regs[i]);
3167 }
3168
7803799a
UW
3169 if (!valid_p)
3170 {
3171 tdesc_data_cleanup (tdesc_data);
3172 return NULL;
3173 }
3174 }
5769d3cd 3175
7803799a
UW
3176 /* Find a candidate among extant architectures. */
3177 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3178 arches != NULL;
3179 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3180 {
3181 tdep = gdbarch_tdep (arches->gdbarch);
3182 if (!tdep)
3183 continue;
3184 if (tdep->abi != tdep_abi)
3185 continue;
3186 if ((tdep->gpr_full_regnum != -1) != have_upper)
3187 continue;
3188 if (tdesc_data != NULL)
3189 tdesc_data_cleanup (tdesc_data);
3190 return arches->gdbarch;
3191 }
5769d3cd 3192
7803799a 3193 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 3194 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 3195 tdep->abi = tdep_abi;
d0f54f9d 3196 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3197
3198 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3199 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3200
1de90795
UW
3201 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3202 We can safely let them default to 128-bit, since the debug info
3203 will give the size of type actually used in each case. */
3204 set_gdbarch_long_double_bit (gdbarch, 128);
3205 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3206
aaab4dba 3207 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3208 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3209 always. */
5769d3cd 3210 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3211 /* Stack grows downward. */
3212 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3213 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3214 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3215 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3216
7803799a 3217 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3218 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3219 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3220 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3221 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3222 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
3223 set_gdbarch_regset_from_core_section (gdbarch,
3224 s390_regset_from_core_section);
7803799a 3225 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3226 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3227 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3228 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3229 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3230 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3231 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3232 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3233 s390_pseudo_register_reggroup_p);
3234 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3235
3236 /* Assign pseudo register numbers. */
3237 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3238 last_pseudo_reg = first_pseudo_reg;
3239 tdep->gpr_full_regnum = -1;
3240 if (have_upper)
3241 {
3242 tdep->gpr_full_regnum = last_pseudo_reg;
3243 last_pseudo_reg += 16;
3244 }
3245 tdep->pc_regnum = last_pseudo_reg++;
3246 tdep->cc_regnum = last_pseudo_reg++;
3247 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3248 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3249
b0cf273e
JB
3250 /* Inferior function calls. */
3251 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3252 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3253 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3254 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3255
a8c99f38 3256 /* Frame handling. */
a431654a 3257 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3258 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3259 dwarf2_append_unwinders (gdbarch);
a431654a 3260 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3261 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3262 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3263 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3264 frame_base_set_default (gdbarch, &s390_frame_base);
3265 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3266 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3267
1db4e8a0
UW
3268 /* Displaced stepping. */
3269 set_gdbarch_displaced_step_copy_insn (gdbarch,
3270 simple_displaced_step_copy_insn);
3271 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3272 set_gdbarch_displaced_step_free_closure (gdbarch,
3273 simple_displaced_step_free_closure);
3274 set_gdbarch_displaced_step_location (gdbarch,
3275 displaced_step_at_entry_point);
3276 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3277
70728992
PA
3278 /* Note that GNU/Linux is the only OS supported on this
3279 platform. */
3280 linux_init_abi (info, gdbarch);
3281
7803799a 3282 switch (tdep->abi)
5769d3cd 3283 {
7803799a 3284 case ABI_LINUX_S390:
d0f54f9d
JB
3285 tdep->gregset = &s390_gregset;
3286 tdep->sizeof_gregset = s390_sizeof_gregset;
3287 tdep->fpregset = &s390_fpregset;
3288 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3289
3290 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3291 set_solib_svr4_fetch_link_map_offsets
3292 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434
UW
3293
3294 if (have_upper)
3295 {
3296 if (have_linux_v2)
3297 set_gdbarch_core_regset_sections (gdbarch,
3298 s390_linux64v2_regset_sections);
3299 else if (have_linux_v1)
3300 set_gdbarch_core_regset_sections (gdbarch,
3301 s390_linux64v1_regset_sections);
3302 else
3303 set_gdbarch_core_regset_sections (gdbarch,
3304 s390_linux64_regset_sections);
3305 }
3306 else
3307 {
3308 if (have_linux_v2)
3309 set_gdbarch_core_regset_sections (gdbarch,
3310 s390_linux32v2_regset_sections);
3311 else if (have_linux_v1)
3312 set_gdbarch_core_regset_sections (gdbarch,
3313 s390_linux32v1_regset_sections);
3314 else
3315 set_gdbarch_core_regset_sections (gdbarch,
3316 s390_linux32_regset_sections);
3317 }
5769d3cd 3318 break;
b0cf273e 3319
7803799a 3320 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3321 tdep->gregset = &s390x_gregset;
3322 tdep->sizeof_gregset = s390x_sizeof_gregset;
3323 tdep->fpregset = &s390_fpregset;
3324 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3325
3326 set_gdbarch_long_bit (gdbarch, 64);
3327 set_gdbarch_long_long_bit (gdbarch, 64);
3328 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3329 set_solib_svr4_fetch_link_map_offsets
3330 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
3331 set_gdbarch_address_class_type_flags (gdbarch,
3332 s390_address_class_type_flags);
3333 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3334 s390_address_class_type_flags_to_name);
3335 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3336 s390_address_class_name_to_type_flags);
c642a434
UW
3337
3338 if (have_linux_v2)
3339 set_gdbarch_core_regset_sections (gdbarch,
3340 s390x_linux64v2_regset_sections);
3341 else if (have_linux_v1)
3342 set_gdbarch_core_regset_sections (gdbarch,
3343 s390x_linux64v1_regset_sections);
3344 else
3345 set_gdbarch_core_regset_sections (gdbarch,
3346 s390x_linux64_regset_sections);
5769d3cd
AC
3347 break;
3348 }
3349
36482093
AC
3350 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3351
982e9687
UW
3352 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3353
b2756930
KB
3354 /* Enable TLS support. */
3355 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3356 svr4_fetch_objfile_link_map);
3357
1dd635ac
UW
3358 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3359
55aa24fb
SDJ
3360 /* SystemTap functions. */
3361 set_gdbarch_stap_register_prefix (gdbarch, "%");
3362 set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
3363 set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
3364 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3365
5769d3cd
AC
3366 return gdbarch;
3367}
3368
3369
a78f21af
AC
3370extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3371
5769d3cd 3372void
5ae5f592 3373_initialize_s390_tdep (void)
5769d3cd 3374{
5769d3cd
AC
3375 /* Hook us into the gdbarch mechanism. */
3376 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3377
94eae614 3378 /* Initialize the GNU/Linux target descriptions. */
7803799a 3379 initialize_tdesc_s390_linux32 ();
c642a434
UW
3380 initialize_tdesc_s390_linux32v1 ();
3381 initialize_tdesc_s390_linux32v2 ();
7803799a 3382 initialize_tdesc_s390_linux64 ();
c642a434
UW
3383 initialize_tdesc_s390_linux64v1 ();
3384 initialize_tdesc_s390_linux64v2 ();
4ac33720 3385 initialize_tdesc_s390_te_linux64 ();
7803799a 3386 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3387 initialize_tdesc_s390x_linux64v1 ();
3388 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3389 initialize_tdesc_s390x_te_linux64 ();
5769d3cd 3390}
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