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* objdump.c (disassemble_bytes): Remove cast.
[deliverable/binutils-gdb.git] / gdb / sparc64-tdep.c
CommitLineData
8b39fe56
MK		 1/* Target-dependent code for UltraSPARC.
2
0fd88904 3 Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
8b39fe56
MK		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "floatformat.h"
25#include "frame.h"
26#include "frame-base.h"
27#include "frame-unwind.h"
28#include "gdbcore.h"
29#include "gdbtypes.h"
386c036b
MK		 30#include "inferior.h"
31#include "symtab.h"
32#include "objfiles.h"
8b39fe56
MK		 33#include "osabi.h"
34#include "regcache.h"
35#include "target.h"
36#include "value.h"
37
38#include "gdb_assert.h"
39#include "gdb_string.h"
40
41#include "sparc64-tdep.h"
42
43/* This file implements the The SPARC 64-bit ABI as defined by the
44 section "Low-Level System Information" of the SPARC Compliance
45 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
46 SPARC. */
47
48/* Please use the sparc32_-prefix for 32-bit specific code, the
49 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50 code can handle both. */
8b39fe56
MK		 51\f
52/* The functions on this page are intended to be used to classify
53 function arguments. */
54
8b39fe56
MK		 55/* Check whether TYPE is "Integral or Pointer". */
56
57static int
58sparc64_integral_or_pointer_p (const struct type *type)
59{
60 switch (TYPE_CODE (type))
61 {
62 case TYPE_CODE_INT:
63 case TYPE_CODE_BOOL:
64 case TYPE_CODE_CHAR:
65 case TYPE_CODE_ENUM:
66 case TYPE_CODE_RANGE:
67 {
68 int len = TYPE_LENGTH (type);
69 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
70 }
71 return 1;
72 case TYPE_CODE_PTR:
73 case TYPE_CODE_REF:
74 {
75 int len = TYPE_LENGTH (type);
76 gdb_assert (len == 8);
77 }
78 return 1;
79 default:
80 break;
81 }
82
83 return 0;
84}
85
86/* Check whether TYPE is "Floating". */
87
88static int
89sparc64_floating_p (const struct type *type)
90{
91 switch (TYPE_CODE (type))
92 {
93 case TYPE_CODE_FLT:
94 {
95 int len = TYPE_LENGTH (type);
96 gdb_assert (len == 4 || len == 8 || len == 16);
97 }
98 return 1;
99 default:
100 break;
101 }
102
103 return 0;
104}
105
106/* Check whether TYPE is "Structure or Union". */
107
108static int
109sparc64_structure_or_union_p (const struct type *type)
110{
111 switch (TYPE_CODE (type))
112 {
113 case TYPE_CODE_STRUCT:
114 case TYPE_CODE_UNION:
115 return 1;
116 default:
117 break;
118 }
119
120 return 0;
121}
122
8b39fe56
MK		 123/* Register information. */
124
125struct sparc64_register_info
126{
127 char *name;
128 struct type **type;
129};
130
131static struct sparc64_register_info sparc64_register_info[] =
132{
133 { "g0", &builtin_type_int64 },
134 { "g1", &builtin_type_int64 },
135 { "g2", &builtin_type_int64 },
136 { "g3", &builtin_type_int64 },
137 { "g4", &builtin_type_int64 },
138 { "g5", &builtin_type_int64 },
139 { "g6", &builtin_type_int64 },
140 { "g7", &builtin_type_int64 },
141
142 { "o0", &builtin_type_int64 },
143 { "o1", &builtin_type_int64 },
144 { "o2", &builtin_type_int64 },
145 { "o3", &builtin_type_int64 },
146 { "o4", &builtin_type_int64 },
147 { "o5", &builtin_type_int64 },
148 { "sp", &builtin_type_void_data_ptr },
149 { "o7", &builtin_type_int64 },
150
151 { "l0", &builtin_type_int64 },
152 { "l1", &builtin_type_int64 },
153 { "l2", &builtin_type_int64 },
154 { "l3", &builtin_type_int64 },
155 { "l4", &builtin_type_int64 },
156 { "l5", &builtin_type_int64 },
157 { "l6", &builtin_type_int64 },
158 { "l7", &builtin_type_int64 },
159
160 { "i0", &builtin_type_int64 },
161 { "i1", &builtin_type_int64 },
162 { "i2", &builtin_type_int64 },
163 { "i3", &builtin_type_int64 },
164 { "i4", &builtin_type_int64 },
165 { "i5", &builtin_type_int64 },
166 { "fp", &builtin_type_void_data_ptr },
167 { "i7", &builtin_type_int64 },
168
169 { "f0", &builtin_type_float },
170 { "f1", &builtin_type_float },
171 { "f2", &builtin_type_float },
172 { "f3", &builtin_type_float },
173 { "f4", &builtin_type_float },
174 { "f5", &builtin_type_float },
175 { "f6", &builtin_type_float },
176 { "f7", &builtin_type_float },
177 { "f8", &builtin_type_float },
178 { "f9", &builtin_type_float },
179 { "f10", &builtin_type_float },
180 { "f11", &builtin_type_float },
181 { "f12", &builtin_type_float },
182 { "f13", &builtin_type_float },
183 { "f14", &builtin_type_float },
184 { "f15", &builtin_type_float },
185 { "f16", &builtin_type_float },
186 { "f17", &builtin_type_float },
187 { "f18", &builtin_type_float },
188 { "f19", &builtin_type_float },
189 { "f20", &builtin_type_float },
190 { "f21", &builtin_type_float },
191 { "f22", &builtin_type_float },
192 { "f23", &builtin_type_float },
193 { "f24", &builtin_type_float },
194 { "f25", &builtin_type_float },
195 { "f26", &builtin_type_float },
196 { "f27", &builtin_type_float },
197 { "f28", &builtin_type_float },
198 { "f29", &builtin_type_float },
199 { "f30", &builtin_type_float },
200 { "f31", &builtin_type_float },
201 { "f32", &builtin_type_double },
202 { "f34", &builtin_type_double },
203 { "f36", &builtin_type_double },
204 { "f38", &builtin_type_double },
205 { "f40", &builtin_type_double },
206 { "f42", &builtin_type_double },
207 { "f44", &builtin_type_double },
208 { "f46", &builtin_type_double },
209 { "f48", &builtin_type_double },
210 { "f50", &builtin_type_double },
211 { "f52", &builtin_type_double },
212 { "f54", &builtin_type_double },
213 { "f56", &builtin_type_double },
214 { "f58", &builtin_type_double },
215 { "f60", &builtin_type_double },
216 { "f62", &builtin_type_double },
217
218 { "pc", &builtin_type_void_func_ptr },
219 { "npc", &builtin_type_void_func_ptr },
220
221 /* This raw register contains the contents of %cwp, %pstate, %asi
222 and %ccr as laid out in a %tstate register. */
3567a8ea
MK		 223 /* FIXME: Give it a name until we start using register groups. */
224 { "state", &builtin_type_int64 },
8b39fe56
MK		 225
226 { "fsr", &builtin_type_int64 },
227 { "fprs", &builtin_type_int64 },
228
229 /* "Although Y is a 64-bit register, its high-order 32 bits are
230 reserved and always read as 0." */
231 { "y", &builtin_type_int64 }
232};
233
234/* Total number of registers. */
386c036b 235#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
8b39fe56
MK		 236
237/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
238 registers as "psuedo" registers. */
239
240static struct sparc64_register_info sparc64_pseudo_register_info[] =
241{
242 { "cwp", &builtin_type_int64 },
243 { "pstate", &builtin_type_int64 },
244 { "asi", &builtin_type_int64 },
245 { "ccr", &builtin_type_int64 },
246
247 { "d0", &builtin_type_double },
248 { "d2", &builtin_type_double },
249 { "d4", &builtin_type_double },
250 { "d6", &builtin_type_double },
251 { "d8", &builtin_type_double },
252 { "d10", &builtin_type_double },
253 { "d12", &builtin_type_double },
254 { "d14", &builtin_type_double },
255 { "d16", &builtin_type_double },
256 { "d18", &builtin_type_double },
257 { "d20", &builtin_type_double },
258 { "d22", &builtin_type_double },
259 { "d24", &builtin_type_double },
260 { "d26", &builtin_type_double },
261 { "d28", &builtin_type_double },
262 { "d30", &builtin_type_double },
263 { "d32", &builtin_type_double },
264 { "d34", &builtin_type_double },
265 { "d36", &builtin_type_double },
266 { "d38", &builtin_type_double },
267 { "d40", &builtin_type_double },
268 { "d42", &builtin_type_double },
269 { "d44", &builtin_type_double },
270 { "d46", &builtin_type_double },
271 { "d48", &builtin_type_double },
272 { "d50", &builtin_type_double },
273 { "d52", &builtin_type_double },
274 { "d54", &builtin_type_double },
275 { "d56", &builtin_type_double },
276 { "d58", &builtin_type_double },
277 { "d60", &builtin_type_double },
278 { "d62", &builtin_type_double },
279
280 { "q0", &builtin_type_long_double },
281 { "q4", &builtin_type_long_double },
282 { "q8", &builtin_type_long_double },
283 { "q12", &builtin_type_long_double },
284 { "q16", &builtin_type_long_double },
285 { "q20", &builtin_type_long_double },
286 { "q24", &builtin_type_long_double },
287 { "q28", &builtin_type_long_double },
288 { "q32", &builtin_type_long_double },
289 { "q36", &builtin_type_long_double },
290 { "q40", &builtin_type_long_double },
291 { "q44", &builtin_type_long_double },
292 { "q48", &builtin_type_long_double },
293 { "q52", &builtin_type_long_double },
294 { "q56", &builtin_type_long_double },
295 { "q60", &builtin_type_long_double }
296};
297
298/* Total number of pseudo registers. */
386c036b 299#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
8b39fe56
MK		 300
301/* Return the name of register REGNUM. */
302
303static const char *
304sparc64_register_name (int regnum)
305{
306 if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
307 return sparc64_register_info[regnum].name;
308
309 if (regnum >= SPARC64_NUM_REGS
310 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
311 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
312
313 return NULL;
314}
315
316/* Return the GDB type object for the "standard" data type of data in
317 register REGNUM. */
318
319static struct type *
320sparc64_register_type (struct gdbarch *gdbarch, int regnum)
321{
322 if (regnum >= SPARC64_NUM_REGS
323 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
324 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
325
326 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
327 return *sparc64_register_info[regnum].type;
328}
329
330static void
331sparc64_pseudo_register_read (struct gdbarch *gdbarch,
332 struct regcache *regcache,
333 int regnum, void *buf)
334{
335 gdb_assert (regnum >= SPARC64_NUM_REGS);
336
337 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
338 {
339 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
340 regcache_raw_read (regcache, regnum, buf);
341 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
342 }
343 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
344 {
345 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
346 regcache_raw_read (regcache, regnum, buf);
347 }
348 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
349 {
350 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
351 regcache_raw_read (regcache, regnum, buf);
352 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
353 regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8);
354 regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12);
355 }
356 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
357 {
358 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
359 regcache_raw_read (regcache, regnum, buf);
360 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8);
361 }
362 else if (regnum == SPARC64_CWP_REGNUM
363 || regnum == SPARC64_PSTATE_REGNUM
364 || regnum == SPARC64_ASI_REGNUM
365 || regnum == SPARC64_CCR_REGNUM)
366 {
367 ULONGEST state;
368
369 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
370 switch (regnum)
371 {
3567a8ea 372 case SPARC64_CWP_REGNUM:
8b39fe56
MK		 373 state = (state >> 0) & ((1 << 5) - 1);
374 break;
3567a8ea 375 case SPARC64_PSTATE_REGNUM:
8b39fe56
MK		 376 state = (state >> 8) & ((1 << 12) - 1);
377 break;
3567a8ea 378 case SPARC64_ASI_REGNUM:
8b39fe56
MK		 379 state = (state >> 24) & ((1 << 8) - 1);
380 break;
3567a8ea 381 case SPARC64_CCR_REGNUM:
8b39fe56
MK		 382 state = (state >> 32) & ((1 << 8) - 1);
383 break;
384 }
385 store_unsigned_integer (buf, 8, state);
386 }
387}
388
389static void
390sparc64_pseudo_register_write (struct gdbarch *gdbarch,
391 struct regcache *regcache,
392 int regnum, const void *buf)
393{
394 gdb_assert (regnum >= SPARC64_NUM_REGS);
395
396 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
397 {
398 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
399 regcache_raw_write (regcache, regnum, buf);
400 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
401 }
402 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
403 {
404 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
405 regcache_raw_write (regcache, regnum, buf);
406 }
407 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
408 {
409 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
410 regcache_raw_write (regcache, regnum, buf);
411 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
412 regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8);
413 regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12);
414 }
415 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
416 {
417 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
418 regcache_raw_write (regcache, regnum, buf);
419 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8);
420 }
3567a8ea
MK		 421 else if (regnum == SPARC64_CWP_REGNUM
422 || regnum == SPARC64_PSTATE_REGNUM
423 || regnum == SPARC64_ASI_REGNUM
424 || regnum == SPARC64_CCR_REGNUM)
425 {
426 ULONGEST state, bits;
427
428 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
429 bits = extract_unsigned_integer (buf, 8);
430 switch (regnum)
431 {
432 case SPARC64_CWP_REGNUM:
433 state |= ((bits & ((1 << 5) - 1)) << 0);
434 break;
435 case SPARC64_PSTATE_REGNUM:
436 state |= ((bits & ((1 << 12) - 1)) << 8);
437 break;
438 case SPARC64_ASI_REGNUM:
439 state |= ((bits & ((1 << 8) - 1)) << 24);
440 break;
441 case SPARC64_CCR_REGNUM:
442 state |= ((bits & ((1 << 8) - 1)) << 32);
443 break;
444 }
445 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
446 }
8b39fe56 447}
8b39fe56
MK		 448\f
449
8b39fe56
MK		 450/* Return PC of first real instruction of the function starting at
451 START_PC. */
452
453static CORE_ADDR
454sparc64_skip_prologue (CORE_ADDR start_pc)
455{
456 struct symtab_and_line sal;
457 CORE_ADDR func_start, func_end;
386c036b 458 struct sparc_frame_cache cache;
8b39fe56
MK		 459
460 /* This is the preferred method, find the end of the prologue by
461 using the debugging information. */
462 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
463 {
464 sal = find_pc_line (func_start, 0);
465
466 if (sal.end < func_end
467 && start_pc <= sal.end)
468 return sal.end;
469 }
470
386c036b 471 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
8b39fe56
MK		 472}
473
474/* Normal frames. */
475
386c036b 476static struct sparc_frame_cache *
8b39fe56
MK		 477sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
478{
386c036b 479 return sparc_frame_cache (next_frame, this_cache);
8b39fe56
MK		 480}
481
482static void
483sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
484 struct frame_id *this_id)
485{
386c036b 486 struct sparc_frame_cache *cache =
8b39fe56
MK		 487 sparc64_frame_cache (next_frame, this_cache);
488
489 /* This marks the outermost frame. */
490 if (cache->base == 0)
491 return;
492
493 (*this_id) = frame_id_build (cache->base, cache->pc);
494}
495
496static void
497sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
498 int regnum, int *optimizedp,
499 enum lval_type *lvalp, CORE_ADDR *addrp,
500 int *realnump, void *valuep)
501{
386c036b 502 struct sparc_frame_cache *cache =
8b39fe56
MK		 503 sparc64_frame_cache (next_frame, this_cache);
504
505 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
506 {
507 *optimizedp = 0;
508 *lvalp = not_lval;
509 *addrp = 0;
510 *realnump = -1;
511 if (valuep)
512 {
513 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
514
515 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
516 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
517 store_unsigned_integer (valuep, 8, pc);
518 }
519 return;
520 }
521
522 /* The previous frame's `local' and `in' registers have been saved
523 in the register save area. */
524 if (!cache->frameless_p
525 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
526 {
527 *optimizedp = 0;
528 *lvalp = lval_memory;
5b2d44a0 529 *addrp = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
8b39fe56
MK		 530 *realnump = -1;
531 if (valuep)
532 {
533 struct gdbarch *gdbarch = get_frame_arch (next_frame);
534
535 /* Read the value in from memory. */
536 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
537 }
538 return;
539 }
540
541 /* The previous frame's `out' registers are accessable as the
542 current frame's `in' registers. */
543 if (!cache->frameless_p
544 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
545 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
546
00b25ff3
AC		 547 *optimizedp = 0;
548 *lvalp = lval_register;
549 *addrp = 0;
550 *realnump = regnum;
551 if (valuep)
552 frame_unwind_register (next_frame, regnum, valuep);
8b39fe56
MK		 553}
554
555static const struct frame_unwind sparc64_frame_unwind =
556{
557 NORMAL_FRAME,
558 sparc64_frame_this_id,
559 sparc64_frame_prev_register
560};
561
562static const struct frame_unwind *
563sparc64_frame_sniffer (struct frame_info *next_frame)
564{
565 return &sparc64_frame_unwind;
566}
567\f
568
569static CORE_ADDR
570sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
571{
386c036b 572 struct sparc_frame_cache *cache =
8b39fe56
MK		 573 sparc64_frame_cache (next_frame, this_cache);
574
5b2d44a0 575 return cache->base;
8b39fe56
MK		 576}
577
578static const struct frame_base sparc64_frame_base =
579{
580 &sparc64_frame_unwind,
581 sparc64_frame_base_address,
582 sparc64_frame_base_address,
583 sparc64_frame_base_address
584};
8b39fe56
MK		 585\f
586/* Check whether TYPE must be 16-byte aligned. */
587
588static int
589sparc64_16_byte_align_p (struct type *type)
590{
591 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
592 return 1;
593
594 if (sparc64_structure_or_union_p (type))
595 {
596 int i;
597
598 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK		 599 {
600 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
601
602 if (sparc64_16_byte_align_p (subtype))
603 return 1;
604 }
8b39fe56
MK		 605 }
606
607 return 0;
608}
609
610/* Store floating fields of element ELEMENT of an "parameter array"
611 that has type TYPE and is stored at BITPOS in VALBUF in the
612 apropriate registers of REGCACHE. This function can be called
613 recursively and therefore handles floating types in addition to
614 structures. */
615
616static void
617sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
e219d7ce 618 const char *valbuf, int element, int bitpos)
8b39fe56
MK		 619{
620 gdb_assert (element < 16);
621
622 if (sparc64_floating_p (type))
623 {
624 int len = TYPE_LENGTH (type);
625 int regnum;
626
627 if (len == 16)
628 {
629 gdb_assert (bitpos == 0);
630 gdb_assert ((element % 2) == 0);
631
632 regnum = SPARC64_Q0_REGNUM + element / 2;
633 regcache_cooked_write (regcache, regnum, valbuf);
634 }
635 else if (len == 8)
636 {
637 gdb_assert (bitpos == 0 || bitpos == 64);
638
639 regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
640 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
641 }
642 else
643 {
644 gdb_assert (len == 4);
645 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
646
647 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
648 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
649 }
650 }
651 else if (sparc64_structure_or_union_p (type))
652 {
653 int i;
654
655 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK		 656 {
657 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
658 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
659
660 sparc64_store_floating_fields (regcache, subtype, valbuf,
661 element, subpos);
662 }
200cc553
MK		 663
664 /* GCC has an interesting bug. If TYPE is a structure that has
665 a single `float' member, GCC doesn't treat it as a structure
666 at all, but rather as an ordinary `float' argument. This
667 argument will be stored in %f1, as required by the psABI.
668 However, as a member of a structure the psABI requires it to
5154b0cd
MK		 669 be stored in %f0. This bug is present in GCC 3.3.2, but
670 probably in older releases to. To appease GCC, if a
671 structure has only a single `float' member, we store its
672 value in %f1 too (we already have stored in %f0). */
200cc553
MK		 673 if (TYPE_NFIELDS (type) == 1)
674 {
675 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
676
677 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
678 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
679 }
8b39fe56
MK		 680 }
681}
682
683/* Fetch floating fields from a variable of type TYPE from the
684 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
685 in VALBUF. This function can be called recursively and therefore
686 handles floating types in addition to structures. */
687
688static void
689sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
690 char *valbuf, int bitpos)
691{
692 if (sparc64_floating_p (type))
693 {
694 int len = TYPE_LENGTH (type);
695 int regnum;
696
697 if (len == 16)
698 {
699 gdb_assert (bitpos == 0 || bitpos == 128);
700
701 regnum = SPARC64_Q0_REGNUM + bitpos / 128;
702 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
703 }
704 else if (len == 8)
705 {
706 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
707
708 regnum = SPARC64_D0_REGNUM + bitpos / 64;
709 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
710 }
711 else
712 {
713 gdb_assert (len == 4);
714 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
715
716 regnum = SPARC_F0_REGNUM + bitpos / 32;
717 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
718 }
719 }
720 else if (sparc64_structure_or_union_p (type))
721 {
722 int i;
723
724 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK		 725 {
726 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
727 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
728
729 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
730 }
8b39fe56
MK		 731 }
732}
733
734/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
735 non-zero) in REGCACHE and on the stack (starting from address SP). */
736
737static CORE_ADDR
738sparc64_store_arguments (struct regcache *regcache, int nargs,
739 struct value **args, CORE_ADDR sp,
740 int struct_return, CORE_ADDR struct_addr)
741{
742 /* Number of extended words in the "parameter array". */
743 int num_elements = 0;
744 int element = 0;
745 int i;
746
747 /* Take BIAS into account. */
748 sp += BIAS;
749
750 /* First we calculate the number of extended words in the "parameter
751 array". While doing so we also convert some of the arguments. */
752
753 if (struct_return)
754 num_elements++;
755
756 for (i = 0; i < nargs; i++)
757 {
4991999e 758 struct type *type = value_type (args[i]);
8b39fe56
MK		 759 int len = TYPE_LENGTH (type);
760
761 if (sparc64_structure_or_union_p (type))
762 {
763 /* Structure or Union arguments. */
764 if (len <= 16)
765 {
766 if (num_elements % 2 && sparc64_16_byte_align_p (type))
767 num_elements++;
768 num_elements += ((len + 7) / 8);
769 }
770 else
771 {
772 /* The psABI says that "Structures or unions larger than
773 sixteen bytes are copied by the caller and passed
774 indirectly; the caller will pass the address of a
775 correctly aligned structure value. This sixty-four
776 bit address will occupy one word in the parameter
777 array, and may be promoted to an %o register like any
778 other pointer value." Allocate memory for these
779 values on the stack. */
780 sp -= len;
781
782 /* Use 16-byte alignment for these values. That's
783 always correct, and wasting a few bytes shouldn't be
784 a problem. */
785 sp &= ~0xf;
786
0fd88904 787 write_memory (sp, value_contents (args[i]), len);
8b39fe56
MK		 788 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
789 num_elements++;
790 }
791 }
792 else if (sparc64_floating_p (type))
793 {
794 /* Floating arguments. */
795
796 if (len == 16)
797 {
798 /* The psABI says that "Each quad-precision parameter
799 value will be assigned to two extended words in the
800 parameter array. */
801 num_elements += 2;
802
803 /* The psABI says that "Long doubles must be
804 quad-aligned, and thus a hole might be introduced
805 into the parameter array to force alignment." Skip
806 an element if necessary. */
807 if (num_elements % 2)
808 num_elements++;
809 }
810 else
811 num_elements++;
812 }
813 else
814 {
815 /* Integral and pointer arguments. */
816 gdb_assert (sparc64_integral_or_pointer_p (type));
817
818 /* The psABI says that "Each argument value of integral type
819 smaller than an extended word will be widened by the
820 caller to an extended word according to the signed-ness
821 of the argument type." */
822 if (len < 8)
823 args[i] = value_cast (builtin_type_int64, args[i]);
824 num_elements++;
825 }
826 }
827
828 /* Allocate the "parameter array". */
829 sp -= num_elements * 8;
830
831 /* The psABI says that "Every stack frame must be 16-byte aligned." */
832 sp &= ~0xf;
833
834 /* Now we store the arguments in to the "paramater array". Some
835 Integer or Pointer arguments and Structure or Union arguments
836 will be passed in %o registers. Some Floating arguments and
837 floating members of structures are passed in floating-point
838 registers. However, for functions with variable arguments,
839 floating arguments are stored in an %0 register, and for
840 functions without a prototype floating arguments are stored in
841 both a floating-point and an %o registers, or a floating-point
842 register and memory. To simplify the logic here we always pass
843 arguments in memory, an %o register, and a floating-point
844 register if appropriate. This should be no problem since the
845 contents of any unused memory or registers in the "parameter
846 array" are undefined. */
847
848 if (struct_return)
849 {
850 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
851 element++;
852 }
853
854 for (i = 0; i < nargs; i++)
855 {
e219d7ce 856 const char *valbuf = value_contents (args[i]);
4991999e 857 struct type *type = value_type (args[i]);
8b39fe56
MK		 858 int len = TYPE_LENGTH (type);
859 int regnum = -1;
860 char buf[16];
861
862 if (sparc64_structure_or_union_p (type))
863 {
864 /* Structure or Union arguments. */
865 gdb_assert (len <= 16);
866 memset (buf, 0, sizeof (buf));
867 valbuf = memcpy (buf, valbuf, len);
868
869 if (element % 2 && sparc64_16_byte_align_p (type))
870 element++;
871
872 if (element < 6)
873 {
874 regnum = SPARC_O0_REGNUM + element;
875 if (len > 8 && element < 5)
876 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
877 }
878
879 if (element < 16)
880 sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
881 }
882 else if (sparc64_floating_p (type))
883 {
884 /* Floating arguments. */
885 if (len == 16)
886 {
887 if (element % 2)
888 element++;
889 if (element < 16)
890 regnum = SPARC64_Q0_REGNUM + element / 2;
891 }
892 else if (len == 8)
893 {
894 if (element < 16)
895 regnum = SPARC64_D0_REGNUM + element;
896 }
897 else
898 {
899 /* The psABI says "Each single-precision parameter value
900 will be assigned to one extended word in the
901 parameter array, and right-justified within that
902 word; the left half (even floatregister) is
903 undefined." Even though the psABI says that "the
904 left half is undefined", set it to zero here. */
905 memset (buf, 0, 4);
8ada74e3
MK		 906 memcpy (buf + 4, valbuf, 4);
907 valbuf = buf;
8b39fe56
MK		 908 len = 8;
909 if (element < 16)
8ada74e3 910 regnum = SPARC64_D0_REGNUM + element;
8b39fe56
MK		 911 }
912 }
913 else
914 {
915 /* Integral and pointer arguments. */
916 gdb_assert (len == 8);
917 if (element < 6)
918 regnum = SPARC_O0_REGNUM + element;
919 }
920
921 if (regnum != -1)
922 {
923 regcache_cooked_write (regcache, regnum, valbuf);
924
925 /* If we're storing the value in a floating-point register,
926 also store it in the corresponding %0 register(s). */
927 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
928 {
929 gdb_assert (element < 6);
930 regnum = SPARC_O0_REGNUM + element;
931 regcache_cooked_write (regcache, regnum, valbuf);
932 }
933 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
934 {
935 gdb_assert (element < 6);
936 regnum = SPARC_O0_REGNUM + element;
937 regcache_cooked_write (regcache, regnum, valbuf);
d47079be 938 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
8b39fe56
MK		 939 }
940 }
941
c4f2d4d7 942 /* Always store the argument in memory. */
8b39fe56
MK		 943 write_memory (sp + element * 8, valbuf, len);
944 element += ((len + 7) / 8);
945 }
946
947 gdb_assert (element == num_elements);
948
949 /* Take BIAS into account. */
950 sp -= BIAS;
951 return sp;
952}
953
954static CORE_ADDR
7d9b040b 955sparc64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8b39fe56
MK		 956 struct regcache *regcache, CORE_ADDR bp_addr,
957 int nargs, struct value **args, CORE_ADDR sp,
958 int struct_return, CORE_ADDR struct_addr)
959{
960 /* Set return address. */
961 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
962
963 /* Set up function arguments. */
964 sp = sparc64_store_arguments (regcache, nargs, args, sp,
965 struct_return, struct_addr);
966
967 /* Allocate the register save area. */
968 sp -= 16 * 8;
969
970 /* Stack should be 16-byte aligned at this point. */
3567a8ea 971 gdb_assert ((sp + BIAS) % 16 == 0);
8b39fe56
MK		 972
973 /* Finally, update the stack pointer. */
974 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
975
5b2d44a0 976 return sp + BIAS;
8b39fe56
MK		 977}
978\f
979
980/* Extract from an array REGBUF containing the (raw) register state, a
981 function return value of TYPE, and copy that into VALBUF. */
982
983static void
984sparc64_extract_return_value (struct type *type, struct regcache *regcache,
985 void *valbuf)
986{
987 int len = TYPE_LENGTH (type);
988 char buf[32];
989 int i;
990
991 if (sparc64_structure_or_union_p (type))
992 {
993 /* Structure or Union return values. */
994 gdb_assert (len <= 32);
995
996 for (i = 0; i < ((len + 7) / 8); i++)
997 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
998 if (TYPE_CODE (type) != TYPE_CODE_UNION)
999 sparc64_extract_floating_fields (regcache, type, buf, 0);
1000 memcpy (valbuf, buf, len);
1001 }
1002 else if (sparc64_floating_p (type))
1003 {
1004 /* Floating return values. */
1005 for (i = 0; i < len / 4; i++)
1006 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1007 memcpy (valbuf, buf, len);
1008 }
1009 else
1010 {
1011 /* Integral and pointer return values. */
1012 gdb_assert (sparc64_integral_or_pointer_p (type));
1013
1014 /* Just stripping off any unused bytes should preserve the
1015 signed-ness just fine. */
1016 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1017 memcpy (valbuf, buf + 8 - len, len);
1018 }
1019}
1020
1021/* Write into the appropriate registers a function return value stored
1022 in VALBUF of type TYPE. */
1023
1024static void
1025sparc64_store_return_value (struct type *type, struct regcache *regcache,
1026 const void *valbuf)
1027{
1028 int len = TYPE_LENGTH (type);
1029 char buf[16];
1030 int i;
1031
1032 if (sparc64_structure_or_union_p (type))
1033 {
1034 /* Structure or Union return values. */
1035 gdb_assert (len <= 32);
1036
1037 /* Simplify matters by storing the complete value (including
1038 floating members) into %o0 and %o1. Floating members are
1039 also store in the appropriate floating-point registers. */
1040 memset (buf, 0, sizeof (buf));
1041 memcpy (buf, valbuf, len);
1042 for (i = 0; i < ((len + 7) / 8); i++)
60af1db2 1043 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
8b39fe56
MK		 1044 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1045 sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1046 }
1047 else if (sparc64_floating_p (type))
1048 {
1049 /* Floating return values. */
1050 memcpy (buf, valbuf, len);
1051 for (i = 0; i < len / 4; i++)
1052 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1053 }
1054 else
1055 {
1056 /* Integral and pointer return values. */
1057 gdb_assert (sparc64_integral_or_pointer_p (type));
1058
1059 /* ??? Do we need to do any sign-extension here? */
1060 memset (buf, 0, 8);
1061 memcpy (buf + 8 - len, valbuf, len);
1062 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1063 }
1064}
1065
60af1db2
MK		 1066static enum return_value_convention
1067sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
1068 struct regcache *regcache, void *readbuf,
1069 const void *writebuf)
8b39fe56 1070{
60af1db2
MK		 1071 if (TYPE_LENGTH (type) > 32)
1072 return RETURN_VALUE_STRUCT_CONVENTION;
1073
1074 if (readbuf)
1075 sparc64_extract_return_value (type, regcache, readbuf);
1076 if (writebuf)
1077 sparc64_store_return_value (type, regcache, writebuf);
1078
1079 return RETURN_VALUE_REGISTER_CONVENTION;
8b39fe56 1080}
8b39fe56 1081\f
8b39fe56
MK		 1082
1083void
386c036b 1084sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
8b39fe56 1085{
386c036b 1086 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8b39fe56 1087
386c036b
MK		 1088 tdep->pc_regnum = SPARC64_PC_REGNUM;
1089 tdep->npc_regnum = SPARC64_NPC_REGNUM;
8b39fe56 1090
386c036b 1091 /* This is what all the fuss is about. */
8b39fe56
MK		 1092 set_gdbarch_long_bit (gdbarch, 64);
1093 set_gdbarch_long_long_bit (gdbarch, 64);
1094 set_gdbarch_ptr_bit (gdbarch, 64);
8b39fe56
MK		 1095
1096 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1097 set_gdbarch_register_name (gdbarch, sparc64_register_name);
1098 set_gdbarch_register_type (gdbarch, sparc64_register_type);
1099 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1100 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1101 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1102
1103 /* Register numbers of various important registers. */
8b39fe56 1104 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
8b39fe56
MK		 1105
1106 /* Call dummy code. */
386c036b
MK		 1107 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1108 set_gdbarch_push_dummy_code (gdbarch, NULL);
8b39fe56
MK		 1109 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1110
60af1db2 1111 set_gdbarch_return_value (gdbarch, sparc64_return_value);
386c036b
MK		 1112 set_gdbarch_stabs_argument_has_addr
1113 (gdbarch, default_stabs_argument_has_addr);
8b39fe56
MK		 1114
1115 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1116
386c036b 1117 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
8b39fe56 1118 frame_base_set_default (gdbarch, &sparc64_frame_base);
386c036b
MK		 1119}
1120\f
8b39fe56 1121
386c036b 1122/* Helper functions for dealing with register sets. */
8b39fe56 1123
386c036b
MK		 1124#define TSTATE_CWP 0x000000000000001fULL
1125#define TSTATE_ICC 0x0000000f00000000ULL
1126#define TSTATE_XCC 0x000000f000000000ULL
8b39fe56 1127
386c036b
MK		 1128#define PSR_S 0x00000080
1129#define PSR_ICC 0x00f00000
1130#define PSR_VERS 0x0f000000
1131#define PSR_IMPL 0xf0000000
1132#define PSR_V8PLUS 0xff000000
1133#define PSR_XCC 0x000f0000
8b39fe56 1134
3567a8ea 1135void
386c036b
MK		 1136sparc64_supply_gregset (const struct sparc_gregset *gregset,
1137 struct regcache *regcache,
1138 int regnum, const void *gregs)
8b39fe56 1139{
386c036b
MK		 1140 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1141 const char *regs = gregs;
8b39fe56
MK		 1142 int i;
1143
386c036b 1144 if (sparc32)
8b39fe56 1145 {
386c036b
MK		 1146 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1147 {
1148 int offset = gregset->r_tstate_offset;
1149 ULONGEST tstate, psr;
1150 char buf[4];
1151
1152 tstate = extract_unsigned_integer (regs + offset, 8);
1153 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1154 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1155 store_unsigned_integer (buf, 4, psr);
1156 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1157 }
1158
1159 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1160 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1161 regs + gregset->r_pc_offset + 4);
1162
1163 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1164 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1165 regs + gregset->r_npc_offset + 4);
8b39fe56 1166
386c036b 1167 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1168 {
386c036b
MK		 1169 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1170 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK		 1171 }
1172 }
1173 else
1174 {
386c036b
MK		 1175 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1176 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1177 regs + gregset->r_tstate_offset);
8b39fe56 1178
386c036b
MK		 1179 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1180 regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1181 regs + gregset->r_pc_offset);
1182
1183 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1184 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1185 regs + gregset->r_npc_offset);
1186
1187 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1188 {
386c036b
MK		 1189 char buf[8];
1190
1191 memset (buf, 0, 8);
1192 memcpy (buf + 8 - gregset->r_y_size,
1193 regs + gregset->r_y_offset, gregset->r_y_size);
1194 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
3567a8ea 1195 }
8b39fe56 1196
386c036b
MK		 1197 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1198 && gregset->r_fprs_offset != -1)
1199 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1200 regs + gregset->r_fprs_offset);
1201 }
1202
1203 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1204 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1205
1206 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1207 {
1208 int offset = gregset->r_g1_offset;
1209
1210 if (sparc32)
1211 offset += 4;
1212
1213 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
8b39fe56 1214 {
3567a8ea 1215 if (regnum == i || regnum == -1)
386c036b
MK		 1216 regcache_raw_supply (regcache, i, regs + offset);
1217 offset += 8;
1218 }
1219 }
1220
1221 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1222 {
1223 /* Not all of the register set variants include Locals and
1224 Inputs. For those that don't, we read them off the stack. */
1225 if (gregset->r_l0_offset == -1)
1226 {
1227 ULONGEST sp;
1228
1229 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1230 sparc_supply_rwindow (regcache, sp, regnum);
1231 }
1232 else
1233 {
1234 int offset = gregset->r_l0_offset;
1235
1236 if (sparc32)
1237 offset += 4;
1238
1239 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1240 {
386c036b
MK		 1241 if (regnum == i || regnum == -1)
1242 regcache_raw_supply (regcache, i, regs + offset);
1243 offset += 8;
3567a8ea 1244 }
8b39fe56
MK		 1245 }
1246 }
1247}
1248
1249void
386c036b
MK		 1250sparc64_collect_gregset (const struct sparc_gregset *gregset,
1251 const struct regcache *regcache,
1252 int regnum, void *gregs)
8b39fe56 1253{
386c036b
MK		 1254 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1255 char *regs = gregs;
3567a8ea
MK		 1256 int i;
1257
386c036b 1258 if (sparc32)
8b39fe56 1259 {
386c036b
MK		 1260 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1261 {
1262 int offset = gregset->r_tstate_offset;
1263 ULONGEST tstate, psr;
1264 char buf[8];
1265
1266 tstate = extract_unsigned_integer (regs + offset, 8);
1267 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1268 psr = extract_unsigned_integer (buf, 4);
1269 tstate |= (psr & PSR_ICC) << 12;
1270 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1271 tstate |= (psr & PSR_XCC) << 20;
1272 store_unsigned_integer (buf, 8, tstate);
1273 memcpy (regs + offset, buf, 8);
1274 }
8b39fe56 1275
386c036b
MK		 1276 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1277 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1278 regs + gregset->r_pc_offset + 4);
1279
1280 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1281 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1282 regs + gregset->r_npc_offset + 4);
1283
1284 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1285 {
386c036b
MK		 1286 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1287 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK		 1288 }
1289 }
1290 else
1291 {
386c036b
MK		 1292 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1293 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1294 regs + gregset->r_tstate_offset);
1295
1296 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1297 regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1298 regs + gregset->r_pc_offset);
3567a8ea 1299
386c036b
MK		 1300 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1301 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1302 regs + gregset->r_npc_offset);
3567a8ea 1303
386c036b 1304 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1305 {
386c036b
MK		 1306 char buf[8];
1307
1308 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1309 memcpy (regs + gregset->r_y_offset,
1310 buf + 8 - gregset->r_y_size, gregset->r_y_size);
1311 }
1312
1313 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1314 && gregset->r_fprs_offset != -1)
1315 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1316 regs + gregset->r_fprs_offset);
1317
1318 }
1319
1320 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1321 {
1322 int offset = gregset->r_g1_offset;
1323
1324 if (sparc32)
1325 offset += 4;
1326
1327 /* %g0 is always zero. */
1328 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1329 {
1330 if (regnum == i || regnum == -1)
1331 regcache_raw_collect (regcache, i, regs + offset);
1332 offset += 8;
1333 }
1334 }
1335
1336 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1337 {
1338 /* Not all of the register set variants include Locals and
1339 Inputs. For those that don't, we read them off the stack. */
1340 if (gregset->r_l0_offset != -1)
1341 {
1342 int offset = gregset->r_l0_offset;
1343
1344 if (sparc32)
1345 offset += 4;
1346
1347 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1348 {
386c036b
MK		 1349 if (regnum == i || regnum == -1)
1350 regcache_raw_collect (regcache, i, regs + offset);
1351 offset += 8;
3567a8ea
MK		 1352 }
1353 }
8b39fe56
MK		 1354 }
1355}
8b39fe56 1356
386c036b
MK		 1357void
1358sparc64_supply_fpregset (struct regcache *regcache,
1359 int regnum, const void *fpregs)
1360{
1361 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1362 const char *regs = fpregs;
1363 int i;
1364
1365 for (i = 0; i < 32; i++)
1366 {
1367 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1368 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1369 }
1370
1371 if (sparc32)
1372 {
1373 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1374 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1375 regs + (32 * 4) + (16 * 8) + 4);
1376 }
1377 else
1378 {
1379 for (i = 0; i < 16; i++)
1380 {
1381 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1382 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1383 regs + (32 * 4) + (i * 8));
1384 }
1385
1386 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1387 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1388 regs + (32 * 4) + (16 * 8));
1389 }
1390}
8b39fe56
MK		 1391
1392void
386c036b
MK		 1393sparc64_collect_fpregset (const struct regcache *regcache,
1394 int regnum, void *fpregs)
8b39fe56 1395{
386c036b
MK		 1396 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1397 char *regs = fpregs;
1398 int i;
1399
1400 for (i = 0; i < 32; i++)
1401 {
1402 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1403 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1404 }
1405
1406 if (sparc32)
1407 {
1408 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1409 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1410 regs + (32 * 4) + (16 * 8) + 4);
1411 }
1412 else
1413 {
1414 for (i = 0; i < 16; i++)
1415 {
1416 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1417 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1418 regs + (32 * 4) + (i * 8));
1419 }
1420
1421 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1422 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1423 regs + (32 * 4) + (16 * 8));
1424 }
8b39fe56 1425}
GDB Binutils - Deliverables
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