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* config.bfd (mips*el-*-netbsd*, mips*-*-netbsd*): Add
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
CommitLineData
53e95fcf 1/* Target-dependent code for the x86-64 for GDB, the GNU debugger.
ce0eebec
AC		 2
3 Copyright 2001, 2002 Free Software Foundation, Inc.
4
53e95fcf
JS		 5 Contributed by Jiri Smid, SuSE Labs.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24#include "defs.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "gdbcmd.h"
28#include "arch-utils.h"
29#include "regcache.h"
30#include "symfile.h"
8a8ab2b9 31#include "objfiles.h"
53e95fcf
JS		 32#include "x86-64-tdep.h"
33#include "dwarf2cfi.h"
82dbc5f7 34#include "gdb_assert.h"
53e95fcf 35
53e95fcf
JS		 36/* Register numbers of various important registers. */
37#define RAX_REGNUM 0
de220d0f 38#define RDX_REGNUM 3
53e95fcf
JS		 39#define RDI_REGNUM 5
40#define EFLAGS_REGNUM 17
0e04a514 41#define ST0_REGNUM 22
de220d0f
ML		 42#define XMM1_REGNUM 39
43
44struct register_info
45{
46 int size;
47 char *name;
48 struct type **type;
49};
53e95fcf
JS		 50
51/* x86_64_register_raw_size_table[i] is the number of bytes of storage in
52 GDB's register array occupied by register i. */
de220d0f 53static struct register_info x86_64_register_info_table[] = {
91fd20f7
ML		 54 /* 0 */ {8, "rax", &builtin_type_int64},
55 /* 1 */ {8, "rbx", &builtin_type_int64},
56 /* 2 */ {8, "rcx", &builtin_type_int64},
57 /* 3 */ {8, "rdx", &builtin_type_int64},
58 /* 4 */ {8, "rsi", &builtin_type_int64},
59 /* 5 */ {8, "rdi", &builtin_type_int64},
60 /* 6 */ {8, "rbp", &builtin_type_void_func_ptr},
61 /* 7 */ {8, "rsp", &builtin_type_void_func_ptr},
62 /* 8 */ {8, "r8", &builtin_type_int64},
63 /* 9 */ {8, "r9", &builtin_type_int64},
64 /* 10 */ {8, "r10", &builtin_type_int64},
65 /* 11 */ {8, "r11", &builtin_type_int64},
66 /* 12 */ {8, "r12", &builtin_type_int64},
67 /* 13 */ {8, "r13", &builtin_type_int64},
68 /* 14 */ {8, "r14", &builtin_type_int64},
69 /* 15 */ {8, "r15", &builtin_type_int64},
70 /* 16 */ {8, "rip", &builtin_type_void_func_ptr},
71 /* 17 */ {4, "eflags", &builtin_type_int32},
72 /* 18 */ {4, "ds", &builtin_type_int32},
73 /* 19 */ {4, "es", &builtin_type_int32},
74 /* 20 */ {4, "fs", &builtin_type_int32},
75 /* 21 */ {4, "gs", &builtin_type_int32},
76 /* 22 */ {10, "st0", &builtin_type_i387_ext},
77 /* 23 */ {10, "st1", &builtin_type_i387_ext},
78 /* 24 */ {10, "st2", &builtin_type_i387_ext},
79 /* 25 */ {10, "st3", &builtin_type_i387_ext},
80 /* 26 */ {10, "st4", &builtin_type_i387_ext},
81 /* 27 */ {10, "st5", &builtin_type_i387_ext},
82 /* 28 */ {10, "st6", &builtin_type_i387_ext},
83 /* 29 */ {10, "st7", &builtin_type_i387_ext},
84 /* 30 */ {4, "fctrl", &builtin_type_int32},
85 /* 31 */ {4, "fstat", &builtin_type_int32},
86 /* 32 */ {4, "ftag", &builtin_type_int32},
87 /* 33 */ {4, "fiseg", &builtin_type_int32},
88 /* 34 */ {4, "fioff", &builtin_type_int32},
89 /* 35 */ {4, "foseg", &builtin_type_int32},
90 /* 36 */ {4, "fooff", &builtin_type_int32},
91 /* 37 */ {4, "fop", &builtin_type_int32},
92 /* 38 */ {16, "xmm0", &builtin_type_v4sf},
93 /* 39 */ {16, "xmm1", &builtin_type_v4sf},
94 /* 40 */ {16, "xmm2", &builtin_type_v4sf},
95 /* 41 */ {16, "xmm3", &builtin_type_v4sf},
96 /* 42 */ {16, "xmm4", &builtin_type_v4sf},
97 /* 43 */ {16, "xmm5", &builtin_type_v4sf},
98 /* 44 */ {16, "xmm6", &builtin_type_v4sf},
99 /* 45 */ {16, "xmm7", &builtin_type_v4sf},
100 /* 46 */ {16, "xmm8", &builtin_type_v4sf},
101 /* 47 */ {16, "xmm9", &builtin_type_v4sf},
102 /* 48 */ {16, "xmm10", &builtin_type_v4sf},
103 /* 49 */ {16, "xmm11", &builtin_type_v4sf},
104 /* 50 */ {16, "xmm12", &builtin_type_v4sf},
105 /* 51 */ {16, "xmm13", &builtin_type_v4sf},
106 /* 52 */ {16, "xmm14", &builtin_type_v4sf},
107 /* 53 */ {16, "xmm15", &builtin_type_v4sf},
108 /* 54 */ {4, "mxcsr", &builtin_type_int32}
53e95fcf
JS		 109};
110
0e04a514
ML		 111/* This array is a mapping from Dwarf-2 register
112 numbering to GDB's one. Dwarf-2 numbering is
113 defined in x86-64 ABI, section 3.6. */
114static int x86_64_dwarf2gdb_regno_map[] = {
115 0, 1, 2, 3, /* RAX - RDX */
116 4, 5, 6, 7, /* RSI, RDI, RBP, RSP */
117 8, 9, 10, 11, /* R8 - R11 */
118 12, 13, 14, 15, /* R12 - R15 */
119 -1, /* RA - not mapped */
120 XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */
121 XMM1_REGNUM + 1, XMM1_REGNUM + 2,
122 XMM1_REGNUM + 3, XMM1_REGNUM + 4,
123 XMM1_REGNUM + 5, XMM1_REGNUM + 6,
124 XMM1_REGNUM + 7, XMM1_REGNUM + 8,
125 XMM1_REGNUM + 9, XMM1_REGNUM + 10,
126 XMM1_REGNUM + 11, XMM1_REGNUM + 12,
127 XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */
128 ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */
129 ST0_REGNUM + 2, ST0_REGNUM + 3,
130 ST0_REGNUM + 4, ST0_REGNUM + 5,
131 ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */
132};
133
134static int x86_64_dwarf2gdb_regno_map_length =
135 sizeof (x86_64_dwarf2gdb_regno_map) /
136 sizeof (x86_64_dwarf2gdb_regno_map[0]);
137
de220d0f
ML		 138/* Number of all registers */
139#define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
140 sizeof (x86_64_register_info_table[0]))
141
142/* Number of general registers. */
143#define X86_64_NUM_GREGS (22)
144
145int x86_64_num_regs = X86_64_NUM_REGS;
146int x86_64_num_gregs = X86_64_NUM_GREGS;
147
b6779aa2
AC		 148/* Did we already print a note about frame pointer? */
149int omit_fp_note_printed = 0;
150
53e95fcf
JS		 151/* Number of bytes of storage in the actual machine representation for
152 register REGNO. */
153int
154x86_64_register_raw_size (int regno)
155{
de220d0f 156 return x86_64_register_info_table[regno].size;
53e95fcf
JS		 157}
158
159/* x86_64_register_byte_table[i] is the offset into the register file of the
160 start of register number i. We initialize this from
de220d0f 161 x86_64_register_info_table. */
53e95fcf
JS		 162int x86_64_register_byte_table[X86_64_NUM_REGS];
163
164/* Index within `registers' of the first byte of the space for register REGNO. */
165int
166x86_64_register_byte (int regno)
167{
168 return x86_64_register_byte_table[regno];
169}
170
171/* Return the GDB type object for the "standard" data type of data in
172 register N. */
173static struct type *
174x86_64_register_virtual_type (int regno)
175{
de220d0f 176 return *x86_64_register_info_table[regno].type;
53e95fcf
JS		 177}
178
53e95fcf
JS		 179/* x86_64_register_convertible is true if register N's virtual format is
180 different from its raw format. Note that this definition assumes
181 that the host supports IEEE 32-bit floats, since it doesn't say
182 that SSE registers need conversion. Even if we can't find a
183 counterexample, this is still sloppy. */
184int
185x86_64_register_convertible (int regno)
186{
187 return IS_FP_REGNUM (regno);
188}
189
190/* Convert data from raw format for register REGNUM in buffer FROM to
191 virtual format with type TYPE in buffer TO. In principle both
192 formats are identical except that the virtual format has two extra
193 bytes appended that aren't used. We set these to zero. */
194void
195x86_64_register_convert_to_virtual (int regnum, struct type *type,
196 char *from, char *to)
197{
82dbc5f7 198 char buf[12];
4657573b 199
82dbc5f7
AC		 200 /* We only support floating-point values. */
201 if (TYPE_CODE (type) != TYPE_CODE_FLT)
202 {
203 warning ("Cannot convert floating-point register value "
204 "to non-floating-point type.");
205 memset (to, 0, TYPE_LENGTH (type));
206 return;
207 }
208 /* First add the necessary padding. */
209 memcpy (buf, from, FPU_REG_RAW_SIZE);
210 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
211 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
212 to the extended floating-point format used by the FPU. */
ce0eebec
AC		 213 convert_typed_floating (to, type, buf,
214 x86_64_register_virtual_type (regnum));
53e95fcf
JS		 215}
216
217/* Convert data from virtual format with type TYPE in buffer FROM to
218 raw format for register REGNUM in buffer TO. Simply omit the two
219 unused bytes. */
220
221void
222x86_64_register_convert_to_raw (struct type *type, int regnum,
223 char *from, char *to)
224{
ce0eebec 225 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
82dbc5f7 226 /* Simply omit the two unused bytes. */
53e95fcf
JS		 227 memcpy (to, from, FPU_REG_RAW_SIZE);
228}
53e95fcf 229
0e04a514
ML		 230/* Dwarf-2 <-> GDB register numbers mapping. */
231int
232x86_64_dwarf2_reg_to_regnum (int dw_reg)
233{
234 if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length)
235 {
236 warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg);
237 return dw_reg;
238 }
239
240 return x86_64_dwarf2gdb_regno_map[dw_reg];
241}
242
53e95fcf
JS		 243/* This is the variable that is set with "set disassembly-flavour", and
244 its legitimate values. */
245static const char att_flavour[] = "att";
246static const char intel_flavour[] = "intel";
247static const char *valid_flavours[] = {
248 att_flavour,
249 intel_flavour,
250 NULL
251};
252static const char *disassembly_flavour = att_flavour;
253
254static CORE_ADDR
255x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
256{
257 char buf[8];
258
259 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
260
261 write_memory (sp - 8, buf, 8);
262 return sp - 8;
263}
264
265void
266x86_64_pop_frame (void)
267{
268 generic_pop_current_frame (cfi_pop_frame);
269}
270\f
271
272/* The returning of values is done according to the special algorithm.
273 Some types are returned in registers an some (big structures) in memory.
274 See ABI for details.
275 */
276
277#define MAX_CLASSES 4
278
279enum x86_64_reg_class
280{
281 X86_64_NO_CLASS,
282 X86_64_INTEGER_CLASS,
283 X86_64_INTEGERSI_CLASS,
284 X86_64_SSE_CLASS,
285 X86_64_SSESF_CLASS,
286 X86_64_SSEDF_CLASS,
287 X86_64_SSEUP_CLASS,
288 X86_64_X87_CLASS,
289 X86_64_X87UP_CLASS,
290 X86_64_MEMORY_CLASS
291};
292
293/* Return the union class of CLASS1 and CLASS2.
294 See the x86-64 ABI for details. */
295
296static enum x86_64_reg_class
297merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
298{
299 /* Rule #1: If both classes are equal, this is the resulting class. */
300 if (class1 == class2)
301 return class1;
302
303 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
304 the other class. */
305 if (class1 == X86_64_NO_CLASS)
306 return class2;
307 if (class2 == X86_64_NO_CLASS)
308 return class1;
309
310 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
311 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
312 return X86_64_MEMORY_CLASS;
313
314 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
315 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
316 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
317 return X86_64_INTEGERSI_CLASS;
318 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
319 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
320 return X86_64_INTEGER_CLASS;
321
322 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
323 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
324 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
325 return X86_64_MEMORY_CLASS;
326
327 /* Rule #6: Otherwise class SSE is used. */
328 return X86_64_SSE_CLASS;
329}
330
331
332/* Classify the argument type.
333 CLASSES will be filled by the register class used to pass each word
334 of the operand. The number of words is returned. In case the parameter
335 should be passed in memory, 0 is returned. As a special case for zero
336 sized containers, classes[0] will be NO_CLASS and 1 is returned.
337
338 See the x86-64 PS ABI for details.
339*/
340
341static int
342classify_argument (struct type *type,
343 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
344{
345 int bytes = TYPE_LENGTH (type);
346 int words = (bytes + 8 - 1) / 8;
347
348 switch (TYPE_CODE (type))
349 {
350 case TYPE_CODE_ARRAY:
351 case TYPE_CODE_STRUCT:
352 case TYPE_CODE_UNION:
353 {
354 int i;
355 enum x86_64_reg_class subclasses[MAX_CLASSES];
356
357 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
358 if (bytes > 16)
359 return 0;
360
361 for (i = 0; i < words; i++)
362 classes[i] = X86_64_NO_CLASS;
363
364 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
365 signalize memory class, so handle it as special case. */
366 if (!words)
367 {
368 classes[0] = X86_64_NO_CLASS;
369 return 1;
370 }
371 switch (TYPE_CODE (type))
372 {
373 case TYPE_CODE_STRUCT:
374 {
375 int j;
0004e5a2 376 for (j = 0; j < TYPE_NFIELDS (type); ++j)
53e95fcf 377 {
0004e5a2 378 int num = classify_argument (TYPE_FIELDS (type)[j].type,
53e95fcf 379 subclasses,
8dda9770
ML		 380 (TYPE_FIELDS (type)[j].loc.
381 bitpos + bit_offset) % 256);
53e95fcf
JS		 382 if (!num)
383 return 0;
384 for (i = 0; i < num; i++)
385 {
386 int pos =
8dda9770
ML		 387 (TYPE_FIELDS (type)[j].loc.bitpos +
388 bit_offset) / 8 / 8;
53e95fcf
JS		 389 classes[i + pos] =
390 merge_classes (subclasses[i], classes[i + pos]);
391 }
392 }
393 }
394 break;
395 case TYPE_CODE_ARRAY:
396 {
397 int num;
398
0004e5a2 399 num = classify_argument (TYPE_TARGET_TYPE (type),
53e95fcf
JS		 400 subclasses, bit_offset);
401 if (!num)
402 return 0;
403
404 /* The partial classes are now full classes. */
405 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
406 subclasses[0] = X86_64_SSE_CLASS;
407 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
408 subclasses[0] = X86_64_INTEGER_CLASS;
409
410 for (i = 0; i < words; i++)
411 classes[i] = subclasses[i % num];
412 }
413 break;
414 case TYPE_CODE_UNION:
415 {
416 int j;
417 {
0004e5a2 418 for (j = 0; j < TYPE_NFIELDS (type); ++j)
53e95fcf
JS		 419 {
420 int num;
0004e5a2 421 num = classify_argument (TYPE_FIELDS (type)[j].type,
53e95fcf
JS		 422 subclasses, bit_offset);
423 if (!num)
424 return 0;
425 for (i = 0; i < num; i++)
426 classes[i] = merge_classes (subclasses[i], classes[i]);
427 }
428 }
429 }
430 break;
4657573b
ML		 431 default:
432 break;
53e95fcf
JS		 433 }
434 /* Final merger cleanup. */
435 for (i = 0; i < words; i++)
436 {
437 /* If one class is MEMORY, everything should be passed in
438 memory. */
439 if (classes[i] == X86_64_MEMORY_CLASS)
440 return 0;
441
442 /* The X86_64_SSEUP_CLASS should be always preceeded by
443 X86_64_SSE_CLASS. */
444 if (classes[i] == X86_64_SSEUP_CLASS
445 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
446 classes[i] = X86_64_SSE_CLASS;
447
448 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
449 if (classes[i] == X86_64_X87UP_CLASS
450 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
451 classes[i] = X86_64_SSE_CLASS;
452 }
453 return words;
454 }
455 break;
456 case TYPE_CODE_FLT:
457 switch (bytes)
458 {
459 case 4:
460 if (!(bit_offset % 64))
461 classes[0] = X86_64_SSESF_CLASS;
462 else
463 classes[0] = X86_64_SSE_CLASS;
464 return 1;
465 case 8:
466 classes[0] = X86_64_SSEDF_CLASS;
467 return 1;
468 case 16:
469 classes[0] = X86_64_X87_CLASS;
470 classes[1] = X86_64_X87UP_CLASS;
471 return 2;
472 }
473 break;
474 case TYPE_CODE_INT:
475 case TYPE_CODE_PTR:
476 switch (bytes)
477 {
478 case 1:
479 case 2:
480 case 4:
481 case 8:
482 if (bytes * 8 + bit_offset <= 32)
483 classes[0] = X86_64_INTEGERSI_CLASS;
484 else
485 classes[0] = X86_64_INTEGER_CLASS;
486 return 1;
487 case 16:
488 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
489 return 2;
490 default:
491 break;
492 }
493 case TYPE_CODE_VOID:
494 return 0;
8dda9770 495 default: /* Avoid warning. */
4657573b 496 break;
53e95fcf 497 }
ce0eebec
AC		 498 internal_error (__FILE__, __LINE__,
499 "classify_argument: unknown argument type");
53e95fcf
JS		 500}
501
502/* Examine the argument and return set number of register required in each
503 class. Return 0 ifif parameter should be passed in memory. */
504
505static int
506examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
507 int n, int *int_nregs, int *sse_nregs)
508{
509 *int_nregs = 0;
510 *sse_nregs = 0;
511 if (!n)
512 return 0;
513 for (n--; n >= 0; n--)
514 switch (classes[n])
515 {
516 case X86_64_INTEGER_CLASS:
517 case X86_64_INTEGERSI_CLASS:
518 (*int_nregs)++;
519 break;
520 case X86_64_SSE_CLASS:
521 case X86_64_SSESF_CLASS:
522 case X86_64_SSEDF_CLASS:
523 (*sse_nregs)++;
524 break;
525 case X86_64_NO_CLASS:
526 case X86_64_SSEUP_CLASS:
527 case X86_64_X87_CLASS:
528 case X86_64_X87UP_CLASS:
529 break;
530 case X86_64_MEMORY_CLASS:
ce0eebec
AC		 531 internal_error (__FILE__, __LINE__,
532 "examine_argument: unexpected memory class");
53e95fcf
JS		 533 }
534 return 1;
535}
536
537#define RET_INT_REGS 2
538#define RET_SSE_REGS 2
539
540/* Check if the structure in value_type is returned in registers or in
541 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
542 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
543 will be used. */
544int
545x86_64_use_struct_convention (int gcc_p, struct type *value_type)
546{
547 enum x86_64_reg_class class[MAX_CLASSES];
548 int n = classify_argument (value_type, class, 0);
549 int needed_intregs;
550 int needed_sseregs;
551
552 return (!n ||
553 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
554 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
555}
556
557
558/* Extract from an array REGBUF containing the (raw) register state, a
559 function return value of TYPE, and copy that, in virtual format,
560 into VALBUF. */
561
562void
563x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
564{
565 enum x86_64_reg_class class[MAX_CLASSES];
566 int n = classify_argument (type, class, 0);
567 int needed_intregs;
568 int needed_sseregs;
569 int intreg = 0;
570 int ssereg = 0;
571 int offset = 0;
572 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
573 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
574
575 if (!n ||
576 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
577 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
578 { /* memory class */
579 CORE_ADDR addr;
580 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
581 read_memory (addr, valbuf, TYPE_LENGTH (type));
582 return;
583 }
584 else
585 {
586 int i;
587 for (i = 0; i < n; i++)
588 {
589 switch (class[i])
590 {
591 case X86_64_NO_CLASS:
592 break;
593 case X86_64_INTEGER_CLASS:
594 memcpy (valbuf + offset,
595 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
596 8);
597 offset += 8;
598 intreg += 2;
599 break;
600 case X86_64_INTEGERSI_CLASS:
601 memcpy (valbuf + offset,
602 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
603 offset += 8;
604 intreg++;
605 break;
606 case X86_64_SSEDF_CLASS:
607 case X86_64_SSESF_CLASS:
608 case X86_64_SSE_CLASS:
609 memcpy (valbuf + offset,
610 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
611 8);
612 offset += 8;
613 ssereg += 2;
614 break;
615 case X86_64_SSEUP_CLASS:
616 memcpy (valbuf + offset + 8,
617 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
618 offset += 8;
619 ssereg++;
620 break;
621 case X86_64_X87_CLASS:
622 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
623 8);
624 offset += 8;
625 break;
626 case X86_64_X87UP_CLASS:
627 memcpy (valbuf + offset,
628 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
629 offset += 8;
630 break;
631 case X86_64_MEMORY_CLASS:
632 default:
633 internal_error (__FILE__, __LINE__,
634 "Unexpected argument class");
635 }
636 }
637 }
638}
639
640/* Handled by unwind informations. */
641static void
642x86_64_frame_init_saved_regs (struct frame_info *fi)
643{
644}
645
646#define INT_REGS 6
647#define SSE_REGS 16
648
53e95fcf 649CORE_ADDR
d45fc520 650x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
53e95fcf
JS		 651 int struct_return, CORE_ADDR struct_addr)
652{
653 int intreg = 0;
654 int ssereg = 0;
655 int i;
ce0eebec 656 static int int_parameter_registers[INT_REGS] = {
de220d0f
ML		 657 5 /* RDI */ , 4 /* RSI */ ,
658 3 /* RDX */ , 2 /* RCX */ ,
91fd20f7 659 8 /* R8 */ , 9 /* R9 */
ce0eebec 660 };
53e95fcf 661 /* XMM0 - XMM15 */
ce0eebec 662 static int sse_parameter_registers[SSE_REGS] = {
de220d0f
ML		 663 XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
664 XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
665 XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
666 XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
ce0eebec
AC		 667 };
668 int stack_values_count = 0;
82dbc5f7 669 int *stack_values;
e9f30c21 670 stack_values = alloca (nargs * sizeof (int));
53e95fcf
JS		 671 for (i = 0; i < nargs; i++)
672 {
673 enum x86_64_reg_class class[MAX_CLASSES];
674 int n = classify_argument (args[i]->type, class, 0);
675 int needed_intregs;
676 int needed_sseregs;
677
678 if (!n ||
679 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
82dbc5f7
AC		 680 || intreg / 2 + needed_intregs > INT_REGS
681 || ssereg / 2 + needed_sseregs > SSE_REGS)
ce0eebec
AC		 682 { /* memory class */
683 stack_values[stack_values_count++] = i;
53e95fcf
JS		 684 }
685 else
686 {
687 int j;
688 for (j = 0; j < n; j++)
689 {
690 int offset = 0;
691 switch (class[j])
692 {
693 case X86_64_NO_CLASS:
694 break;
695 case X86_64_INTEGER_CLASS:
ce0eebec
AC		 696 write_register_gen (int_parameter_registers
697 [(intreg + 1) / 2],
53e95fcf
JS		 698 VALUE_CONTENTS_ALL (args[i]) + offset);
699 offset += 8;
700 intreg += 2;
701 break;
702 case X86_64_INTEGERSI_CLASS:
703 write_register_gen (int_parameter_registers[intreg / 2],
704 VALUE_CONTENTS_ALL (args[i]) + offset);
705 offset += 8;
706 intreg++;
707 break;
708 case X86_64_SSEDF_CLASS:
709 case X86_64_SSESF_CLASS:
710 case X86_64_SSE_CLASS:
ce0eebec
AC		 711 write_register_gen (sse_parameter_registers
712 [(ssereg + 1) / 2],
53e95fcf
JS		 713 VALUE_CONTENTS_ALL (args[i]) + offset);
714 offset += 8;
715 ssereg += 2;
716 break;
717 case X86_64_SSEUP_CLASS:
718 write_register_gen (sse_parameter_registers[ssereg / 2],
719 VALUE_CONTENTS_ALL (args[i]) + offset);
720 offset += 8;
721 ssereg++;
722 break;
723 case X86_64_X87_CLASS:
53e95fcf 724 case X86_64_MEMORY_CLASS:
ce0eebec 725 stack_values[stack_values_count++] = i;
82dbc5f7
AC		 726 break;
727 case X86_64_X87UP_CLASS:
53e95fcf
JS		 728 break;
729 default:
730 internal_error (__FILE__, __LINE__,
731 "Unexpected argument class");
732 }
733 intreg += intreg % 2;
734 ssereg += ssereg % 2;
735 }
736 }
737 }
82dbc5f7
AC		 738 while (--stack_values_count >= 0)
739 {
e9f30c21 740 struct value *arg = args[stack_values[stack_values_count]];
82dbc5f7
AC		 741 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
742 len += 7;
743 len -= len % 8;
744 sp -= len;
745 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
746 }
53e95fcf
JS		 747 return sp;
748}
749
750/* Write into the appropriate registers a function return value stored
751 in VALBUF of type TYPE, given in virtual format. */
752void
753x86_64_store_return_value (struct type *type, char *valbuf)
754{
755 int len = TYPE_LENGTH (type);
756
757 if (TYPE_CODE_FLT == TYPE_CODE (type))
758 {
759 /* Floating-point return values can be found in %st(0). */
760 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
761 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
762 {
763 /* Copy straight over. */
764 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
765 FPU_REG_RAW_SIZE);
766 }
767 else
768 {
769 char buf[FPU_REG_RAW_SIZE];
770 DOUBLEST val;
771
772 /* Convert the value found in VALBUF to the extended
773 floating point format used by the FPU. This is probably
774 not exactly how it would happen on the target itself, but
775 it is the best we can do. */
776 val = extract_floating (valbuf, TYPE_LENGTH (type));
777 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
778 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
779 FPU_REG_RAW_SIZE);
780 }
781 }
782 else
783 {
784 int low_size = REGISTER_RAW_SIZE (0);
785 int high_size = REGISTER_RAW_SIZE (1);
786
787 if (len <= low_size)
788 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
789 else if (len <= (low_size + high_size))
790 {
791 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
792 write_register_bytes (REGISTER_BYTE (1),
793 valbuf + low_size, len - low_size);
794 }
795 else
796 internal_error (__FILE__, __LINE__,
797 "Cannot store return value of %d bytes long.", len);
798 }
799}
800\f
801
1cf877ad
ML		 802const char *
803x86_64_register_name (int reg_nr)
53e95fcf 804{
de220d0f 805 if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
53e95fcf 806 return NULL;
de220d0f 807 return x86_64_register_info_table[reg_nr].name;
53e95fcf 808}
8dda9770
ML		 809
810int
1cf877ad 811x86_64_register_number (const char *name)
8dda9770
ML		 812{
813 int reg_nr;
814
815 for (reg_nr = 0; reg_nr < X86_64_NUM_REGS; reg_nr++)
816 if (strcmp (name, x86_64_register_info_table[reg_nr].name) == 0)
817 return reg_nr;
818 return -1;
819}
53e95fcf
JS		 820\f
821
822
823/* We have two flavours of disassembly. The machinery on this page
824 deals with switching between those. */
825
826static int
827gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
828{
829 if (disassembly_flavour == att_flavour)
830 return print_insn_i386_att (memaddr, info);
831 else if (disassembly_flavour == intel_flavour)
832 return print_insn_i386_intel (memaddr, info);
833 /* Never reached -- disassembly_flavour is always either att_flavour
834 or intel_flavour. */
835 internal_error (__FILE__, __LINE__, "failed internal consistency check");
836}
837\f
838
839/* Store the address of the place in which to copy the structure the
840 subroutine will return. This is called from call_function. */
841void
842x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
843{
844 write_register (RDI_REGNUM, addr);
845}
846
847int
848x86_64_frameless_function_invocation (struct frame_info *frame)
849{
850 return 0;
851}
852
e76e1718
ML		 853/* If a function with debugging information and known beginning
854 is detected, we will return pc of the next line in the source
855 code. With this approach we effectively skip the prolog. */
856
857#define PROLOG_BUFSIZE 4
53e95fcf
JS		 858CORE_ADDR
859x86_64_skip_prologue (CORE_ADDR pc)
860{
482a4d06 861 int i;
e76e1718
ML		 862 struct symtab_and_line v_sal;
863 struct symbol *v_function;
482a4d06 864 CORE_ADDR endaddr;
e76e1718
ML		 865
866 /* We will handle only functions beginning with:
867 55 pushq %rbp
868 48 89 e5 movq %rsp,%rbp
869 */
870 unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
871 prolog_buf[PROLOG_BUFSIZE];
872
873 read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
874
b1ab997b
ML		 875 /* First check, whether pc points to pushq %rbp, movq %rsp,%rbp. */
876 for (i = 0; i < PROLOG_BUFSIZE; i++)
b6779aa2 877 if (prolog_expect[i] != prolog_buf[i])
8dda9770 878 return pc; /* ... no, it doesn't. Nothing to skip. */
b1ab997b
ML		 879
880 /* OK, we have found the prologue and want PC of the first
881 non-prologue instruction. */
882 pc += PROLOG_BUFSIZE;
e76e1718
ML		 883
884 v_function = find_pc_function (pc);
885 v_sal = find_pc_line (pc, 0);
886
887 /* If pc doesn't point to a function with debuginfo,
888 some of the following may be NULL. */
889 if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
890 return pc;
891
8da065d5 892 endaddr = BLOCK_END (SYMBOL_BLOCK_VALUE (v_function));
e76e1718
ML		 893
894 for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
482a4d06 895 if (v_sal.symtab->linetable->item[i].pc >= pc
e76e1718
ML		 896 && v_sal.symtab->linetable->item[i].pc < endaddr)
897 {
898 pc = v_sal.symtab->linetable->item[i].pc;
e76e1718
ML		 899 break;
900 }
901
53e95fcf
JS		 902 return pc;
903}
904
905/* Sequence of bytes for breakpoint instruction. */
906static unsigned char *
b64bbf8c 907x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr)
53e95fcf
JS		 908{
909 static unsigned char breakpoint[] = { 0xcc };
910 *lenptr = 1;
911 return breakpoint;
912}
913
914static struct gdbarch *
0e04a514 915x86_64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
53e95fcf
JS		 916{
917 struct gdbarch *gdbarch;
918 struct gdbarch_tdep *tdep;
de220d0f 919 int i, sum;
53e95fcf
JS		 920
921 /* Find a candidate among the list of pre-declared architectures. */
922 for (arches = gdbarch_list_lookup_by_info (arches, &info);
923 arches != NULL;
924 arches = gdbarch_list_lookup_by_info (arches->next, &info))
925 {
926 switch (info.bfd_arch_info->mach)
927 {
928 case bfd_mach_x86_64:
929 case bfd_mach_x86_64_intel_syntax:
930 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
931 {
932 case bfd_mach_x86_64:
933 case bfd_mach_x86_64_intel_syntax:
934 return arches->gdbarch;
935 case bfd_mach_i386_i386:
936 case bfd_mach_i386_i8086:
937 case bfd_mach_i386_i386_intel_syntax:
938 break;
939 default:
940 internal_error (__FILE__, __LINE__,
0e04a514 941 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 942 }
943 break;
944 case bfd_mach_i386_i386:
945 case bfd_mach_i386_i8086:
946 case bfd_mach_i386_i386_intel_syntax:
947 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
948 {
949 case bfd_mach_x86_64:
950 case bfd_mach_x86_64_intel_syntax:
951 break;
952 case bfd_mach_i386_i386:
953 case bfd_mach_i386_i8086:
954 case bfd_mach_i386_i386_intel_syntax:
955 return arches->gdbarch;
956 default:
957 internal_error (__FILE__, __LINE__,
0e04a514 958 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 959 }
960 break;
961 default:
962 internal_error (__FILE__, __LINE__,
0e04a514 963 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 964 }
965 }
966
967 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
968 gdbarch = gdbarch_alloc (&info, tdep);
969
970 switch (info.bfd_arch_info->mach)
971 {
972 case bfd_mach_x86_64:
973 case bfd_mach_x86_64_intel_syntax:
96297dab 974 tdep->num_xmm_regs = 16;
53e95fcf
JS		 975 break;
976 case bfd_mach_i386_i386:
977 case bfd_mach_i386_i8086:
978 case bfd_mach_i386_i386_intel_syntax:
979 /* This is place for definition of i386 target vector. */
980 break;
981 default:
982 internal_error (__FILE__, __LINE__,
0e04a514 983 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 984 }
985
986 set_gdbarch_long_bit (gdbarch, 64);
987 set_gdbarch_long_long_bit (gdbarch, 64);
988 set_gdbarch_ptr_bit (gdbarch, 64);
989
990 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
53e95fcf
JS		 991
992 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
1cf877ad 993 set_gdbarch_register_name (gdbarch, x86_64_register_name);
53e95fcf
JS		 994 set_gdbarch_register_size (gdbarch, 8);
995 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
996 set_gdbarch_max_register_raw_size (gdbarch, 16);
997 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
de220d0f 998
53e95fcf
JS		 999 /* Total amount of space needed to store our copies of the machine's register
1000 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
de220d0f
ML		 1001 for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
1002 sum += x86_64_register_info_table[i].size;
1003 set_gdbarch_register_bytes (gdbarch, sum);
b2e75d78 1004 set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
53e95fcf
JS		 1005 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1006
1007 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
1008
1009 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
1010 set_gdbarch_register_convert_to_virtual (gdbarch,
1011 x86_64_register_convert_to_virtual);
1012 set_gdbarch_register_convert_to_raw (gdbarch,
1013 x86_64_register_convert_to_raw);
1014
1015/* Register numbers of various important registers. */
1016 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
1017 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
1018 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
1019
de220d0f 1020 set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */
53e95fcf
JS		 1021
1022 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
53e95fcf
JS		 1023
1024/* Discard from the stack the innermost frame, restoring all registers. */
1025 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
1026
1027 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
1028 chain-pointer. */
baed091b 1029 set_gdbarch_frame_chain (gdbarch, x86_64_linux_frame_chain);
53e95fcf
JS		 1030
1031 set_gdbarch_frameless_function_invocation (gdbarch,
1032 x86_64_frameless_function_invocation);
1033 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
1034
1035 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
1036 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
1037
1038/* Return number of bytes at start of arglist that are not really args. */
1039 set_gdbarch_frame_args_skip (gdbarch, 8);
1040
1041 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1042
1043/* Frame pc initialization is handled by unwind informations. */
baed091b 1044 set_gdbarch_init_frame_pc (gdbarch, x86_64_init_frame_pc);
53e95fcf
JS		 1045
1046/* Initialization of unwind informations. */
baed091b 1047 set_gdbarch_init_extra_frame_info (gdbarch, x86_64_init_extra_frame_info);
53e95fcf
JS		 1048
1049/* Getting saved registers is handled by unwind informations. */
1050 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
1051
1052 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1053
1054/* Cons up virtual frame pointer for trace */
1055 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
1056
baed091b 1057 set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
53e95fcf
JS		 1058
1059 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1060 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1061 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1062 set_gdbarch_call_dummy_length (gdbarch, 0);
1063 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1064 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1065 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
1066 set_gdbarch_call_dummy_words (gdbarch, 0);
1067 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1068 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1069 set_gdbarch_call_dummy_p (gdbarch, 1);
1070 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1071 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1072 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1073 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
1074 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
1075
1076/* Return number of args passed to a frame, no way to tell. */
1077 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1078/* Don't use default structure extract routine */
26e9b323 1079 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, 0);
53e95fcf
JS		 1080
1081/* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
1082 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
1083 the case when structure is returned in registers. */
1084 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
1085
1086/* Store the address of the place in which to copy the structure the
1087 subroutine will return. This is called from call_function. */
1088 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
1089
1090/* Extract from an array REGBUF containing the (raw) register state
1091 a function return value of type TYPE, and copy that, in virtual format,
1092 into VALBUF. */
b64bbf8c
ML		 1093 set_gdbarch_deprecated_extract_return_value (gdbarch,
1094 x86_64_extract_return_value);
53e95fcf
JS		 1095
1096
1097/* Write into the appropriate registers a function return value stored
1098 in VALBUF of type TYPE, given in virtual format. */
b64bbf8c
ML		 1099 set_gdbarch_deprecated_store_return_value (gdbarch,
1100 x86_64_store_return_value);
53e95fcf
JS		 1101\f
1102
1103/* Offset from address of function to start of its code. */
1104 set_gdbarch_function_start_offset (gdbarch, 0);
1105
1106 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
1107
1108 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
1109
1110 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1111
91fd20f7
ML		 1112 set_gdbarch_breakpoint_from_pc (gdbarch,
1113 (gdbarch_breakpoint_from_pc_ftype *)
1114 x86_64_breakpoint_from_pc);
53e95fcf 1115
8a8ab2b9 1116 set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
53e95fcf
JS		 1117
1118/* Amount PC must be decremented by after a breakpoint. This is often the
1119 number of bytes in BREAKPOINT but not always. */
1120 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1121
b6af0555
JS		 1122/* Use dwarf2 debug frame informations. */
1123 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
0e04a514
ML		 1124 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
1125
baed091b
ML		 1126 set_gdbarch_pc_in_sigtramp (gdbarch, x86_64_linux_in_sigtramp);
1127
53e95fcf
JS		 1128 return gdbarch;
1129}
1130
1131void
1132_initialize_x86_64_tdep (void)
1133{
0e04a514 1134 register_gdbarch_init (bfd_arch_i386, x86_64_gdbarch_init);
53e95fcf
JS		 1135
1136 /* Initialize the table saying where each register starts in the
1137 register file. */
1138 {
1139 int i, offset;
1140
1141 offset = 0;
1142 for (i = 0; i < X86_64_NUM_REGS; i++)
1143 {
1144 x86_64_register_byte_table[i] = offset;
de220d0f 1145 offset += x86_64_register_info_table[i].size;
53e95fcf
JS		 1146 }
1147 }
1148
1149 tm_print_insn = gdb_print_insn_x86_64;
ecd1107e 1150 tm_print_insn_info.mach = bfd_mach_x86_64;
53e95fcf
JS		 1151
1152 /* Add the variable that controls the disassembly flavour. */
1153 {
1154 struct cmd_list_element *new_cmd;
1155
1156 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1157 valid_flavours, &disassembly_flavour, "\
1158Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1159and the default value is \"att\".", &setlist);
1160 add_show_from_set (new_cmd, &showlist);
1161 }
1162}
GDB Binutils - Deliverables
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