Fix gdbserver build when intl already built
[deliverable/binutils-gdb.git] / gdbserver / linux-arm-low.cc
CommitLineData
0a30fbc4 1/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
b811d2c2 2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
0a30fbc4
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3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
a9762ec7 8 the Free Software Foundation; either version 3 of the License, or
0a30fbc4
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9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
a9762ec7 17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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18
19#include "server.h"
58caa3dc 20#include "linux-low.h"
deca266c 21#include "arch/arm.h"
d9311bfa
AT
22#include "arch/arm-linux.h"
23#include "arch/arm-get-next-pcs.h"
bd9e6534 24#include "linux-aarch32-low.h"
7cc17433
AH
25#include "linux-aarch32-tdesc.h"
26#include "linux-arm-tdesc.h"
0a30fbc4 27
bd9e6534 28#include <sys/uio.h>
3743bb4f
DE
29/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
30 On Bionic elf.h and linux/elf.h have conflicting definitions. */
31#ifndef ELFMAG0
58d6951d 32#include <elf.h>
3743bb4f 33#endif
5826e159 34#include "nat/gdb_ptrace.h"
09b4ad9f 35#include <signal.h>
d9311bfa 36#include <sys/syscall.h>
9308fc88 37
9308fc88
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38#ifndef PTRACE_GET_THREAD_AREA
39#define PTRACE_GET_THREAD_AREA 22
40#endif
41
fb1e4ffc
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42#ifndef PTRACE_GETWMMXREGS
43# define PTRACE_GETWMMXREGS 18
44# define PTRACE_SETWMMXREGS 19
45#endif
46
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47#ifndef PTRACE_GETVFPREGS
48# define PTRACE_GETVFPREGS 27
49# define PTRACE_SETVFPREGS 28
50#endif
51
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52#ifndef PTRACE_GETHBPREGS
53#define PTRACE_GETHBPREGS 29
54#define PTRACE_SETHBPREGS 30
55#endif
56
57/* Information describing the hardware breakpoint capabilities. */
71487fd7 58static struct
09b4ad9f
UW
59{
60 unsigned char arch;
61 unsigned char max_wp_length;
62 unsigned char wp_count;
63 unsigned char bp_count;
71487fd7 64} arm_linux_hwbp_cap;
09b4ad9f
UW
65
66/* Enum describing the different types of ARM hardware break-/watch-points. */
67typedef enum
68{
69 arm_hwbp_break = 0,
70 arm_hwbp_load = 1,
71 arm_hwbp_store = 2,
72 arm_hwbp_access = 3
73} arm_hwbp_type;
74
75/* Type describing an ARM Hardware Breakpoint Control register value. */
76typedef unsigned int arm_hwbp_control_t;
77
78/* Structure used to keep track of hardware break-/watch-points. */
79struct arm_linux_hw_breakpoint
80{
81 /* Address to break on, or being watched. */
82 unsigned int address;
83 /* Control register for break-/watch- point. */
84 arm_hwbp_control_t control;
85};
86
87/* Since we cannot dynamically allocate subfields of arch_process_info,
88 assume a maximum number of supported break-/watchpoints. */
89#define MAX_BPTS 32
90#define MAX_WPTS 32
91
92/* Per-process arch-specific data we want to keep. */
93struct arch_process_info
94{
95 /* Hardware breakpoints for this process. */
96 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
97 /* Hardware watchpoints for this process. */
98 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
99};
100
101/* Per-thread arch-specific data we want to keep. */
102struct arch_lwp_info
103{
104 /* Non-zero if our copy differs from what's recorded in the thread. */
105 char bpts_changed[MAX_BPTS];
106 char wpts_changed[MAX_WPTS];
107 /* Cached stopped data address. */
108 CORE_ADDR stopped_data_address;
109};
110
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111/* These are in <asm/elf.h> in current kernels. */
112#define HWCAP_VFP 64
113#define HWCAP_IWMMXT 512
114#define HWCAP_NEON 4096
115#define HWCAP_VFPv3 8192
116#define HWCAP_VFPv3D16 16384
117
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118#ifdef HAVE_SYS_REG_H
119#include <sys/reg.h>
120#endif
121
23ce3b1c 122#define arm_num_regs 26
0a30fbc4 123
2ec06d2e 124static int arm_regmap[] = {
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125 0, 4, 8, 12, 16, 20, 24, 28,
126 32, 36, 40, 44, 48, 52, 56, 60,
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127 -1, -1, -1, -1, -1, -1, -1, -1, -1,
128 64
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129};
130
d9311bfa
AT
131/* Forward declarations needed for get_next_pcs ops. */
132static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
133 int len,
134 int byte_order);
135
136static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
137 CORE_ADDR val);
138
553cb527 139static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
d9311bfa
AT
140
141static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
142
143/* get_next_pcs operations. */
144static struct arm_get_next_pcs_ops get_next_pcs_ops = {
145 get_next_pcs_read_memory_unsigned_integer,
146 get_next_pcs_syscall_next_pc,
147 get_next_pcs_addr_bits_remove,
ed443b61
YQ
148 get_next_pcs_is_thumb,
149 arm_linux_get_next_pcs_fixup,
d9311bfa
AT
150};
151
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152static int
153arm_cannot_store_register (int regno)
0a30fbc4 154{
2ec06d2e 155 return (regno >= arm_num_regs);
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156}
157
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158static int
159arm_cannot_fetch_register (int regno)
0a30fbc4 160{
2ec06d2e 161 return (regno >= arm_num_regs);
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162}
163
fb1e4ffc 164static void
442ea881 165arm_fill_wmmxregset (struct regcache *regcache, void *buf)
fb1e4ffc 166{
7cc17433 167 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
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168 return;
169
166a82be 170 for (int i = 0; i < 16; i++)
442ea881 171 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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DJ
172
173 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
166a82be 174 for (int i = 0; i < 6; i++)
442ea881
PA
175 collect_register (regcache, arm_num_regs + i + 16,
176 (char *) buf + 16 * 8 + i * 4);
fb1e4ffc
DJ
177}
178
179static void
442ea881 180arm_store_wmmxregset (struct regcache *regcache, const void *buf)
fb1e4ffc 181{
7cc17433 182 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
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183 return;
184
166a82be 185 for (int i = 0; i < 16; i++)
442ea881 186 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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187
188 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
166a82be 189 for (int i = 0; i < 6; i++)
442ea881
PA
190 supply_register (regcache, arm_num_regs + i + 16,
191 (char *) buf + 16 * 8 + i * 4);
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192}
193
58d6951d 194static void
442ea881 195arm_fill_vfpregset (struct regcache *regcache, void *buf)
58d6951d 196{
bd9e6534 197 int num;
58d6951d 198
7cc17433 199 if (is_aarch32_linux_description (regcache->tdesc))
58d6951d 200 num = 32;
89abb039 201 else
7cc17433
AH
202 {
203 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
204
205 if (fp_type == ARM_FP_TYPE_VFPV3)
206 num = 32;
207 else if (fp_type == ARM_FP_TYPE_VFPV2)
208 num = 16;
209 else
210 return;
211 }
58d6951d 212
bd9e6534 213 arm_fill_vfpregset_num (regcache, buf, num);
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214}
215
d9311bfa
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216/* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs. */
217static CORE_ADDR
218get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
219{
220 return UNMAKE_THUMB_ADDR (val);
221}
222
58d6951d 223static void
442ea881 224arm_store_vfpregset (struct regcache *regcache, const void *buf)
58d6951d 225{
bd9e6534 226 int num;
58d6951d 227
7cc17433 228 if (is_aarch32_linux_description (regcache->tdesc))
58d6951d 229 num = 32;
89abb039 230 else
7cc17433
AH
231 {
232 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
233
234 if (fp_type == ARM_FP_TYPE_VFPV3)
235 num = 32;
236 else if (fp_type == ARM_FP_TYPE_VFPV2)
237 num = 16;
238 else
239 return;
240 }
58d6951d 241
bd9e6534 242 arm_store_vfpregset_num (regcache, buf, num);
58d6951d 243}
fb1e4ffc 244
d9311bfa
AT
245/* Wrapper of arm_is_thumb_mode for get_next_pcs. */
246static int
247get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
248{
249 return arm_is_thumb_mode ();
250}
251
30baf67b 252/* Read memory from the inferior.
d9311bfa
AT
253 BYTE_ORDER is ignored and there to keep compatiblity with GDB's
254 read_memory_unsigned_integer. */
255static ULONGEST
256get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
257 int len,
258 int byte_order)
259{
260 ULONGEST res;
261
9e784964 262 res = 0;
694b382c
AT
263 target_read_memory (memaddr, (unsigned char *) &res, len);
264
d9311bfa
AT
265 return res;
266}
267
9308fc88
DJ
268/* Fetch the thread-local storage pointer for libthread_db. */
269
270ps_err_e
754653a7 271ps_get_thread_area (struct ps_prochandle *ph,
1b3f6016 272 lwpid_t lwpid, int idx, void **base)
9308fc88
DJ
273{
274 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
275 return PS_ERR;
276
277 /* IDX is the bias from the thread pointer to the beginning of the
278 thread descriptor. It has to be subtracted due to implementation
279 quirks in libthread_db. */
280 *base = (void *) ((char *)*base - idx);
281
282 return PS_OK;
283}
284
09b4ad9f 285
71487fd7
UW
286/* Query Hardware Breakpoint information for the target we are attached to
287 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
288static void
289arm_linux_init_hwbp_cap (int pid)
09b4ad9f 290{
71487fd7 291 unsigned int val;
09b4ad9f 292
71487fd7
UW
293 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
294 return;
09b4ad9f 295
71487fd7
UW
296 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
297 if (arm_linux_hwbp_cap.arch == 0)
298 return;
09b4ad9f 299
71487fd7
UW
300 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
301 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
302 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
09b4ad9f 303
71487fd7
UW
304 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
305 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
306 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
307 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
09b4ad9f
UW
308}
309
310/* How many hardware breakpoints are available? */
311static int
312arm_linux_get_hw_breakpoint_count (void)
313{
71487fd7 314 return arm_linux_hwbp_cap.bp_count;
09b4ad9f
UW
315}
316
317/* How many hardware watchpoints are available? */
318static int
319arm_linux_get_hw_watchpoint_count (void)
320{
71487fd7 321 return arm_linux_hwbp_cap.wp_count;
09b4ad9f
UW
322}
323
324/* Maximum length of area watched by hardware watchpoint. */
325static int
326arm_linux_get_hw_watchpoint_max_length (void)
327{
71487fd7 328 return arm_linux_hwbp_cap.max_wp_length;
09b4ad9f
UW
329}
330
331/* Initialize an ARM hardware break-/watch-point control register value.
332 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
333 type of break-/watch-point; ENABLE indicates whether the point is enabled.
334 */
335static arm_hwbp_control_t
336arm_hwbp_control_initialize (unsigned byte_address_select,
337 arm_hwbp_type hwbp_type,
338 int enable)
339{
340 gdb_assert ((byte_address_select & ~0xffU) == 0);
341 gdb_assert (hwbp_type != arm_hwbp_break
342 || ((byte_address_select & 0xfU) != 0));
343
344 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
345}
346
347/* Does the breakpoint control value CONTROL have the enable bit set? */
348static int
349arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
350{
351 return control & 0x1;
352}
353
354/* Is the breakpoint control value CONTROL initialized? */
355static int
356arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
357{
358 return control != 0;
359}
360
361/* Change a breakpoint control word so that it is in the disabled state. */
362static arm_hwbp_control_t
363arm_hwbp_control_disable (arm_hwbp_control_t control)
364{
365 return control & ~0x1;
366}
367
368/* Are two break-/watch-points equal? */
369static int
370arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
371 const struct arm_linux_hw_breakpoint *p2)
372{
373 return p1->address == p2->address && p1->control == p2->control;
374}
375
802e8e6d
PA
376/* Convert a raw breakpoint type to an enum arm_hwbp_type. */
377
171de4b8 378static arm_hwbp_type
802e8e6d
PA
379raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
380{
381 switch (raw_type)
382 {
383 case raw_bkpt_type_hw:
384 return arm_hwbp_break;
385 case raw_bkpt_type_write_wp:
386 return arm_hwbp_store;
387 case raw_bkpt_type_read_wp:
388 return arm_hwbp_load;
389 case raw_bkpt_type_access_wp:
390 return arm_hwbp_access;
391 default:
392 gdb_assert_not_reached ("unhandled raw type");
393 }
394}
395
09b4ad9f
UW
396/* Initialize the hardware breakpoint structure P for a breakpoint or
397 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
b62e2b27
UW
398 Returns -1 if TYPE is unsupported, or -2 if the particular combination
399 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
400 represents a breakpoint and 1 if type represents a watchpoint. */
09b4ad9f 401static int
802e8e6d
PA
402arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
403 int len, struct arm_linux_hw_breakpoint *p)
09b4ad9f
UW
404{
405 arm_hwbp_type hwbp_type;
406 unsigned mask;
407
802e8e6d 408 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
09b4ad9f
UW
409
410 if (hwbp_type == arm_hwbp_break)
411 {
412 /* For breakpoints, the length field encodes the mode. */
413 switch (len)
414 {
415 case 2: /* 16-bit Thumb mode breakpoint */
416 case 3: /* 32-bit Thumb mode breakpoint */
fcf303ab
UW
417 mask = 0x3;
418 addr &= ~1;
09b4ad9f
UW
419 break;
420 case 4: /* 32-bit ARM mode breakpoint */
421 mask = 0xf;
fcf303ab 422 addr &= ~3;
09b4ad9f
UW
423 break;
424 default:
425 /* Unsupported. */
b62e2b27 426 return -2;
09b4ad9f 427 }
09b4ad9f
UW
428 }
429 else
430 {
431 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
432 CORE_ADDR aligned_addr;
433
434 /* Can not set watchpoints for zero or negative lengths. */
435 if (len <= 0)
b62e2b27 436 return -2;
09b4ad9f
UW
437 /* The current ptrace interface can only handle watchpoints that are a
438 power of 2. */
439 if ((len & (len - 1)) != 0)
b62e2b27 440 return -2;
09b4ad9f
UW
441
442 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
443 range covered by a watchpoint. */
444 aligned_addr = addr & ~(max_wp_length - 1);
445 if (aligned_addr + max_wp_length < addr + len)
b62e2b27 446 return -2;
09b4ad9f
UW
447
448 mask = (1 << len) - 1;
449 }
450
451 p->address = (unsigned int) addr;
452 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
453
454 return hwbp_type != arm_hwbp_break;
455}
456
457/* Callback to mark a watch-/breakpoint to be updated in all threads of
458 the current process. */
459
00192f77
SM
460static void
461update_registers_callback (thread_info *thread, int watch, int i)
09b4ad9f 462{
d86d4aaf 463 struct lwp_info *lwp = get_thread_lwp (thread);
09b4ad9f 464
00192f77
SM
465 /* The actual update is done later just before resuming the lwp,
466 we just mark that the registers need updating. */
467 if (watch)
468 lwp->arch_private->wpts_changed[i] = 1;
469 else
470 lwp->arch_private->bpts_changed[i] = 1;
09b4ad9f 471
00192f77
SM
472 /* If the lwp isn't stopped, force it to momentarily pause, so
473 we can update its breakpoint registers. */
474 if (!lwp->stopped)
475 linux_stop_lwp (lwp);
09b4ad9f
UW
476}
477
802e8e6d
PA
478static int
479arm_supports_z_point_type (char z_type)
480{
481 switch (z_type)
482 {
abeead09 483 case Z_PACKET_SW_BP:
802e8e6d
PA
484 case Z_PACKET_HW_BP:
485 case Z_PACKET_WRITE_WP:
486 case Z_PACKET_READ_WP:
487 case Z_PACKET_ACCESS_WP:
488 return 1;
489 default:
490 /* Leave the handling of sw breakpoints with the gdb client. */
491 return 0;
492 }
493}
494
09b4ad9f
UW
495/* Insert hardware break-/watchpoint. */
496static int
802e8e6d
PA
497arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
498 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
499{
500 struct process_info *proc = current_process ();
501 struct arm_linux_hw_breakpoint p, *pts;
502 int watch, i, count;
503
504 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
505 if (watch < 0)
506 {
507 /* Unsupported. */
b62e2b27 508 return watch == -1 ? 1 : -1;
09b4ad9f
UW
509 }
510
511 if (watch)
512 {
513 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 514 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
515 }
516 else
517 {
518 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 519 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
520 }
521
522 for (i = 0; i < count; i++)
523 if (!arm_hwbp_control_is_enabled (pts[i].control))
524 {
09b4ad9f 525 pts[i] = p;
00192f77
SM
526
527 /* Only update the threads of the current process. */
528 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
529 {
530 update_registers_callback (thread, watch, i);
531 });
532
09b4ad9f
UW
533 return 0;
534 }
535
536 /* We're out of watchpoints. */
537 return -1;
538}
539
540/* Remove hardware break-/watchpoint. */
541static int
802e8e6d
PA
542arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
543 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
544{
545 struct process_info *proc = current_process ();
546 struct arm_linux_hw_breakpoint p, *pts;
547 int watch, i, count;
548
549 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
550 if (watch < 0)
551 {
552 /* Unsupported. */
553 return -1;
554 }
555
556 if (watch)
557 {
558 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 559 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
560 }
561 else
562 {
563 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 564 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
565 }
566
567 for (i = 0; i < count; i++)
568 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
569 {
09b4ad9f 570 pts[i].control = arm_hwbp_control_disable (pts[i].control);
00192f77
SM
571
572 /* Only update the threads of the current process. */
573 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
574 {
575 update_registers_callback (thread, watch, i);
576 });
577
09b4ad9f
UW
578 return 0;
579 }
580
581 /* No watchpoint matched. */
582 return -1;
583}
584
585/* Return whether current thread is stopped due to a watchpoint. */
586static int
587arm_stopped_by_watchpoint (void)
588{
0bfdf32f 589 struct lwp_info *lwp = get_thread_lwp (current_thread);
a5362b9a 590 siginfo_t siginfo;
09b4ad9f
UW
591
592 /* We must be able to set hardware watchpoints. */
593 if (arm_linux_get_hw_watchpoint_count () == 0)
594 return 0;
595
596 /* Retrieve siginfo. */
597 errno = 0;
0bfdf32f 598 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
09b4ad9f
UW
599 if (errno != 0)
600 return 0;
601
602 /* This must be a hardware breakpoint. */
603 if (siginfo.si_signo != SIGTRAP
604 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
605 return 0;
606
607 /* If we are in a positive slot then we're looking at a breakpoint and not
608 a watchpoint. */
609 if (siginfo.si_errno >= 0)
610 return 0;
611
612 /* Cache stopped data address for use by arm_stopped_data_address. */
613 lwp->arch_private->stopped_data_address
614 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
615
616 return 1;
617}
618
619/* Return data address that triggered watchpoint. Called only if
620 arm_stopped_by_watchpoint returned true. */
621static CORE_ADDR
622arm_stopped_data_address (void)
623{
0bfdf32f 624 struct lwp_info *lwp = get_thread_lwp (current_thread);
09b4ad9f
UW
625 return lwp->arch_private->stopped_data_address;
626}
627
628/* Called when a new process is created. */
629static struct arch_process_info *
630arm_new_process (void)
631{
8d749320 632 struct arch_process_info *info = XCNEW (struct arch_process_info);
09b4ad9f
UW
633 return info;
634}
635
04ec7890
SM
636/* Called when a process is being deleted. */
637
638static void
639arm_delete_process (struct arch_process_info *info)
640{
641 xfree (info);
642}
643
09b4ad9f 644/* Called when a new thread is detected. */
34c703da
GB
645static void
646arm_new_thread (struct lwp_info *lwp)
09b4ad9f 647{
8d749320 648 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
09b4ad9f
UW
649 int i;
650
651 for (i = 0; i < MAX_BPTS; i++)
652 info->bpts_changed[i] = 1;
653 for (i = 0; i < MAX_WPTS; i++)
654 info->wpts_changed[i] = 1;
655
34c703da 656 lwp->arch_private = info;
09b4ad9f
UW
657}
658
466eecee
SM
659/* Function to call when a thread is being deleted. */
660
661static void
662arm_delete_thread (struct arch_lwp_info *arch_lwp)
663{
664 xfree (arch_lwp);
665}
666
3a8a0396
DB
667static void
668arm_new_fork (struct process_info *parent, struct process_info *child)
669{
69291610
HW
670 struct arch_process_info *parent_proc_info;
671 struct arch_process_info *child_proc_info;
3a8a0396
DB
672 struct lwp_info *child_lwp;
673 struct arch_lwp_info *child_lwp_info;
674 int i;
675
676 /* These are allocated by linux_add_process. */
61a7418c
DB
677 gdb_assert (parent->priv != NULL
678 && parent->priv->arch_private != NULL);
679 gdb_assert (child->priv != NULL
680 && child->priv->arch_private != NULL);
3a8a0396 681
69291610
HW
682 parent_proc_info = parent->priv->arch_private;
683 child_proc_info = child->priv->arch_private;
684
3a8a0396
DB
685 /* Linux kernel before 2.6.33 commit
686 72f674d203cd230426437cdcf7dd6f681dad8b0d
687 will inherit hardware debug registers from parent
688 on fork/vfork/clone. Newer Linux kernels create such tasks with
689 zeroed debug registers.
690
691 GDB core assumes the child inherits the watchpoints/hw
692 breakpoints of the parent, and will remove them all from the
693 forked off process. Copy the debug registers mirrors into the
694 new process so that all breakpoints and watchpoints can be
695 removed together. The debug registers mirror will become zeroed
696 in the end before detaching the forked off process, thus making
697 this compatible with older Linux kernels too. */
698
699 *child_proc_info = *parent_proc_info;
700
701 /* Mark all the hardware breakpoints and watchpoints as changed to
702 make sure that the registers will be updated. */
9179355e 703 child_lwp = find_lwp_pid (ptid_t (child->pid));
3a8a0396
DB
704 child_lwp_info = child_lwp->arch_private;
705 for (i = 0; i < MAX_BPTS; i++)
706 child_lwp_info->bpts_changed[i] = 1;
707 for (i = 0; i < MAX_WPTS; i++)
708 child_lwp_info->wpts_changed[i] = 1;
709}
710
09b4ad9f
UW
711/* Called when resuming a thread.
712 If the debug regs have changed, update the thread's copies. */
713static void
714arm_prepare_to_resume (struct lwp_info *lwp)
715{
d86d4aaf
DE
716 struct thread_info *thread = get_lwp_thread (lwp);
717 int pid = lwpid_of (thread);
718 struct process_info *proc = find_process_pid (pid_of (thread));
fe978cb0 719 struct arch_process_info *proc_info = proc->priv->arch_private;
09b4ad9f
UW
720 struct arch_lwp_info *lwp_info = lwp->arch_private;
721 int i;
722
723 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
724 if (lwp_info->bpts_changed[i])
725 {
726 errno = 0;
727
728 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
f15f9948 729 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 730 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
f15f9948 731 &proc_info->bpts[i].address) < 0)
71487fd7 732 perror_with_name ("Unexpected error setting breakpoint address");
09b4ad9f
UW
733
734 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
f15f9948 735 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 736 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
f15f9948 737 &proc_info->bpts[i].control) < 0)
71487fd7 738 perror_with_name ("Unexpected error setting breakpoint");
09b4ad9f
UW
739
740 lwp_info->bpts_changed[i] = 0;
741 }
742
743 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
744 if (lwp_info->wpts_changed[i])
745 {
746 errno = 0;
747
748 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
f15f9948 749 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 750 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
f15f9948 751 &proc_info->wpts[i].address) < 0)
71487fd7 752 perror_with_name ("Unexpected error setting watchpoint address");
09b4ad9f
UW
753
754 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
f15f9948 755 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 756 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
f15f9948 757 &proc_info->wpts[i].control) < 0)
71487fd7 758 perror_with_name ("Unexpected error setting watchpoint");
09b4ad9f
UW
759
760 lwp_info->wpts_changed[i] = 0;
761 }
762}
763
f7a6a40d
YQ
764/* Find the next pc for a sigreturn or rt_sigreturn syscall. In
765 addition, set IS_THUMB depending on whether we will return to ARM
766 or Thumb code.
d9311bfa
AT
767 See arm-linux.h for stack layout details. */
768static CORE_ADDR
f7a6a40d
YQ
769arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
770 int *is_thumb)
d9311bfa
AT
771{
772 unsigned long sp;
773 unsigned long sp_data;
774 /* Offset of PC register. */
775 int pc_offset = 0;
776 CORE_ADDR next_pc = 0;
cf2ebb6e 777 uint32_t cpsr;
d9311bfa
AT
778
779 gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
780
781 collect_register_by_name (regcache, "sp", &sp);
52405d85 782 the_target->read_memory (sp, (unsigned char *) &sp_data, 4);
d9311bfa
AT
783
784 pc_offset = arm_linux_sigreturn_next_pc_offset
785 (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
786
52405d85 787 the_target->read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4);
d9311bfa 788
f7a6a40d 789 /* Set IS_THUMB according the CPSR saved on the stack. */
52405d85 790 the_target->read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
f7a6a40d
YQ
791 *is_thumb = ((cpsr & CPSR_T) != 0);
792
d9311bfa
AT
793 return next_pc;
794}
795
796/* When PC is at a syscall instruction, return the PC of the next
797 instruction to be executed. */
798static CORE_ADDR
553cb527 799get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
d9311bfa
AT
800{
801 CORE_ADDR next_pc = 0;
553cb527 802 CORE_ADDR pc = regcache_read_pc (self->regcache);
d9311bfa
AT
803 int is_thumb = arm_is_thumb_mode ();
804 ULONGEST svc_number = 0;
805 struct regcache *regcache = self->regcache;
806
807 if (is_thumb)
808 {
809 collect_register (regcache, 7, &svc_number);
810 next_pc = pc + 2;
811 }
812 else
813 {
814 unsigned long this_instr;
815 unsigned long svc_operand;
816
694b382c 817 target_read_memory (pc, (unsigned char *) &this_instr, 4);
d9311bfa
AT
818 svc_operand = (0x00ffffff & this_instr);
819
820 if (svc_operand) /* OABI. */
821 {
822 svc_number = svc_operand - 0x900000;
823 }
824 else /* EABI. */
825 {
826 collect_register (regcache, 7, &svc_number);
827 }
828
829 next_pc = pc + 4;
830 }
831
832 /* This is a sigreturn or sigreturn_rt syscall. */
833 if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
834 {
f7a6a40d
YQ
835 /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
836 update IS_THUMB. */
837 next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
d9311bfa
AT
838 }
839
840 /* Addresses for calling Thumb functions have the bit 0 set. */
841 if (is_thumb)
842 next_pc = MAKE_THUMB_ADDR (next_pc);
843
844 return next_pc;
845}
09b4ad9f 846
3aee8918
PA
847static const struct target_desc *
848arm_read_description (void)
58d6951d 849{
974c89e0 850 unsigned long arm_hwcap = linux_get_hwcap (4);
71487fd7 851
58d6951d 852 if (arm_hwcap & HWCAP_IWMMXT)
7cc17433 853 return arm_linux_read_description (ARM_FP_TYPE_IWMMXT);
58d6951d
DJ
854
855 if (arm_hwcap & HWCAP_VFP)
856 {
166a82be
AH
857 /* Make sure that the kernel supports reading VFP registers. Support was
858 added in 2.6.30. */
859 int pid = lwpid_of (current_thread);
860 errno = 0;
861 char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
862 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
7cc17433 863 return arm_linux_read_description (ARM_FP_TYPE_NONE);
58d6951d
DJ
864
865 /* NEON implies either no VFP, or VFPv3-D32. We only support
866 it with VFP. */
867 if (arm_hwcap & HWCAP_NEON)
7cc17433 868 return aarch32_linux_read_description ();
58d6951d 869 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
7cc17433 870 return arm_linux_read_description (ARM_FP_TYPE_VFPV3);
58d6951d 871 else
7cc17433 872 return arm_linux_read_description (ARM_FP_TYPE_VFPV2);
58d6951d
DJ
873 }
874
875 /* The default configuration uses legacy FPA registers, probably
876 simulated. */
7cc17433 877 return arm_linux_read_description (ARM_FP_TYPE_NONE);
58d6951d
DJ
878}
879
3aee8918
PA
880static void
881arm_arch_setup (void)
882{
bd9e6534
YQ
883 int tid = lwpid_of (current_thread);
884 int gpregs[18];
885 struct iovec iov;
886
166a82be
AH
887 /* Query hardware watchpoint/breakpoint capabilities. */
888 arm_linux_init_hwbp_cap (tid);
889
3aee8918 890 current_process ()->tdesc = arm_read_description ();
bd9e6534
YQ
891
892 iov.iov_base = gpregs;
893 iov.iov_len = sizeof (gpregs);
894
895 /* Check if PTRACE_GETREGSET works. */
896 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
897 have_ptrace_getregset = 1;
898 else
899 have_ptrace_getregset = 0;
3aee8918
PA
900}
901
d9311bfa
AT
902/* Fetch the next possible PCs after the current instruction executes. */
903
a0ff9e1a 904static std::vector<CORE_ADDR>
4d18591b 905arm_gdbserver_get_next_pcs (struct regcache *regcache)
d9311bfa
AT
906{
907 struct arm_get_next_pcs next_pcs_ctx;
d9311bfa
AT
908
909 arm_get_next_pcs_ctor (&next_pcs_ctx,
910 &get_next_pcs_ops,
911 /* Byte order is ignored assumed as host. */
912 0,
913 0,
1b451dda 914 1,
d9311bfa
AT
915 regcache);
916
a0ff9e1a 917 return arm_get_next_pcs (&next_pcs_ctx);
d9311bfa
AT
918}
919
7d00775e
AT
920/* Support for hardware single step. */
921
922static int
923arm_supports_hardware_single_step (void)
924{
925 return 0;
926}
927
79e7fd4f
YQ
928/* Implementation of linux_target_ops method "get_syscall_trapinfo". */
929
930static void
931arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
932{
933 if (arm_is_thumb_mode ())
934 collect_register_by_name (regcache, "r7", sysno);
935 else
936 {
937 unsigned long pc;
938 unsigned long insn;
939
940 collect_register_by_name (regcache, "pc", &pc);
941
52405d85 942 if (the_target->read_memory (pc - 4, (unsigned char *) &insn, 4))
79e7fd4f
YQ
943 *sysno = UNKNOWN_SYSCALL;
944 else
945 {
946 unsigned long svc_operand = (0x00ffffff & insn);
947
948 if (svc_operand)
949 {
950 /* OABI */
951 *sysno = svc_operand - 0x900000;
952 }
953 else
954 {
955 /* EABI */
956 collect_register_by_name (regcache, "r7", sysno);
957 }
958 }
959 }
960}
961
bd9e6534
YQ
962/* Register sets without using PTRACE_GETREGSET. */
963
3aee8918 964static struct regset_info arm_regsets[] = {
350fab54
AH
965 { PTRACE_GETREGS, PTRACE_SETREGS, 0,
966 ARM_CORE_REGS_SIZE + ARM_INT_REGISTER_SIZE, GENERAL_REGS,
fb1e4ffc 967 arm_fill_gregset, arm_store_gregset },
350fab54 968 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, IWMMXT_REGS_SIZE, EXTENDED_REGS,
fb1e4ffc 969 arm_fill_wmmxregset, arm_store_wmmxregset },
350fab54 970 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, ARM_VFP3_REGS_SIZE, EXTENDED_REGS,
58d6951d 971 arm_fill_vfpregset, arm_store_vfpregset },
50bc912a 972 NULL_REGSET
fb1e4ffc
DJ
973};
974
3aee8918
PA
975static struct regsets_info arm_regsets_info =
976 {
977 arm_regsets, /* regsets */
978 0, /* num_regsets */
979 NULL, /* disabled_regsets */
980 };
981
982static struct usrregs_info arm_usrregs_info =
983 {
984 arm_num_regs,
985 arm_regmap,
986 };
987
bd9e6534 988static struct regs_info regs_info_arm =
3aee8918
PA
989 {
990 NULL, /* regset_bitmap */
991 &arm_usrregs_info,
992 &arm_regsets_info
993 };
994
995static const struct regs_info *
996arm_regs_info (void)
997{
bd9e6534
YQ
998 const struct target_desc *tdesc = current_process ()->tdesc;
999
1000 if (have_ptrace_getregset == 1
7cc17433
AH
1001 && (is_aarch32_linux_description (tdesc)
1002 || arm_linux_get_tdesc_fp_type (tdesc) == ARM_FP_TYPE_VFPV3))
bd9e6534 1003 return &regs_info_aarch32;
7cc17433
AH
1004
1005 return &regs_info_arm;
3aee8918
PA
1006}
1007
dd373349
AT
1008struct linux_target_ops the_low_target = {
1009 arm_arch_setup,
1010 arm_regs_info,
1011 arm_cannot_fetch_register,
1012 arm_cannot_store_register,
1013 NULL, /* fetch_register */
276d4552
YQ
1014 linux_get_pc_32bit,
1015 linux_set_pc_32bit,
8689682c 1016 arm_breakpoint_kind_from_pc,
dd373349 1017 arm_sw_breakpoint_from_kind,
d9311bfa 1018 arm_gdbserver_get_next_pcs,
0d62e5e8
DJ
1019 0,
1020 arm_breakpoint_at,
802e8e6d 1021 arm_supports_z_point_type,
09b4ad9f
UW
1022 arm_insert_point,
1023 arm_remove_point,
1024 arm_stopped_by_watchpoint,
1025 arm_stopped_data_address,
1026 NULL, /* collect_ptrace_register */
1027 NULL, /* supply_ptrace_register */
1028 NULL, /* siginfo_fixup */
1029 arm_new_process,
04ec7890 1030 arm_delete_process,
09b4ad9f 1031 arm_new_thread,
466eecee 1032 arm_delete_thread,
3a8a0396 1033 arm_new_fork,
09b4ad9f 1034 arm_prepare_to_resume,
769ef81f
AT
1035 NULL, /* process_qsupported */
1036 NULL, /* supports_tracepoints */
1037 NULL, /* get_thread_area */
1038 NULL, /* install_fast_tracepoint_jump_pad */
1039 NULL, /* emit_ops */
1040 NULL, /* get_min_fast_tracepoint_insn_len */
1041 NULL, /* supports_range_stepping */
7d00775e 1042 arm_breakpoint_kind_from_current_state,
79e7fd4f
YQ
1043 arm_supports_hardware_single_step,
1044 arm_get_syscall_trapinfo,
2ec06d2e 1045};
3aee8918
PA
1046
1047void
1048initialize_low_arch (void)
1049{
bd9e6534 1050 initialize_low_arch_aarch32 ();
3aee8918
PA
1051 initialize_regsets_info (&arm_regsets_info);
1052}
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