[deliverable/binutils-gdb.git] / gdbserver / linux-ia64-low.cc

/* GNU/Linux/IA64 specific low level interface, for the remote server for GDB.
   Copyright (C) 1995-2020 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "server.h"
#include "linux-low.h"

#ifdef HAVE_SYS_REG_H
#include <sys/reg.h>
#endif

/* Linux target op definitions for the IA64 architecture.  */

class ia64_target : public linux_process_target
{
public:

  const regs_info *get_regs_info () override;

protected:

  void low_arch_setup () override;

  bool low_cannot_fetch_register (int regno) override;

  bool low_cannot_store_register (int regno) override;

  bool low_fetch_register (regcache *regcache, int regno) override;
};

/* The singleton target ops object.  */

static ia64_target the_ia64_target;

/* Defined in auto-generated file reg-ia64.c.  */
void init_registers_ia64 (void);
extern const struct target_desc *tdesc_ia64;

#define ia64_num_regs 462

#include <asm/ptrace_offsets.h>

static int ia64_regmap[] =
  {
    /* general registers */
    -1,		/* gr0 not available; i.e, it's always zero */
    PT_R1,
    PT_R2,
    PT_R3,
    PT_R4,
    PT_R5,
    PT_R6,
    PT_R7,
    PT_R8,
    PT_R9,
    PT_R10,
    PT_R11,
    PT_R12,
    PT_R13,
    PT_R14,
    PT_R15,
    PT_R16,
    PT_R17,
    PT_R18,
    PT_R19,
    PT_R20,
    PT_R21,
    PT_R22,
    PT_R23,
    PT_R24,
    PT_R25,
    PT_R26,
    PT_R27,
    PT_R28,
    PT_R29,
    PT_R30,
    PT_R31,
    /* gr32 through gr127 not directly available via the ptrace interface */
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    /* Floating point registers */
    -1, -1,	/* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
    PT_F2,
    PT_F3,
    PT_F4,
    PT_F5,
    PT_F6,
    PT_F7,
    PT_F8,
    PT_F9,
    PT_F10,
    PT_F11,
    PT_F12,
    PT_F13,
    PT_F14,
    PT_F15,
    PT_F16,
    PT_F17,
    PT_F18,
    PT_F19,
    PT_F20,
    PT_F21,
    PT_F22,
    PT_F23,
    PT_F24,
    PT_F25,
    PT_F26,
    PT_F27,
    PT_F28,
    PT_F29,
    PT_F30,
    PT_F31,
    PT_F32,
    PT_F33,
    PT_F34,
    PT_F35,
    PT_F36,
    PT_F37,
    PT_F38,
    PT_F39,
    PT_F40,
    PT_F41,
    PT_F42,
    PT_F43,
    PT_F44,
    PT_F45,
    PT_F46,
    PT_F47,
    PT_F48,
    PT_F49,
    PT_F50,
    PT_F51,
    PT_F52,
    PT_F53,
    PT_F54,
    PT_F55,
    PT_F56,
    PT_F57,
    PT_F58,
    PT_F59,
    PT_F60,
    PT_F61,
    PT_F62,
    PT_F63,
    PT_F64,
    PT_F65,
    PT_F66,
    PT_F67,
    PT_F68,
    PT_F69,
    PT_F70,
    PT_F71,
    PT_F72,
    PT_F73,
    PT_F74,
    PT_F75,
    PT_F76,
    PT_F77,
    PT_F78,
    PT_F79,
    PT_F80,
    PT_F81,
    PT_F82,
    PT_F83,
    PT_F84,
    PT_F85,
    PT_F86,
    PT_F87,
    PT_F88,
    PT_F89,
    PT_F90,
    PT_F91,
    PT_F92,
    PT_F93,
    PT_F94,
    PT_F95,
    PT_F96,
    PT_F97,
    PT_F98,
    PT_F99,
    PT_F100,
    PT_F101,
    PT_F102,
    PT_F103,
    PT_F104,
    PT_F105,
    PT_F106,
    PT_F107,
    PT_F108,
    PT_F109,
    PT_F110,
    PT_F111,
    PT_F112,
    PT_F113,
    PT_F114,
    PT_F115,
    PT_F116,
    PT_F117,
    PT_F118,
    PT_F119,
    PT_F120,
    PT_F121,
    PT_F122,
    PT_F123,
    PT_F124,
    PT_F125,
    PT_F126,
    PT_F127,
    /* predicate registers - we don't fetch these individually */
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1,
    /* branch registers */
    PT_B0,
    PT_B1,
    PT_B2,
    PT_B3,
    PT_B4,
    PT_B5,
    PT_B6,
    PT_B7,
    /* virtual frame pointer and virtual return address pointer */
    -1, -1,
    /* other registers */
    PT_PR,
    PT_CR_IIP,	/* ip */
    PT_CR_IPSR, /* psr */
    PT_CFM,	/* cfm */
    /* kernel registers not visible via ptrace interface (?) */
    -1, -1, -1, -1, -1, -1, -1, -1,
    /* hole */
    -1, -1, -1, -1, -1, -1, -1, -1,
    PT_AR_RSC,
    PT_AR_BSP,
    PT_AR_BSPSTORE,
    PT_AR_RNAT,
    -1,
    -1,		/* Not available: FCR, IA32 floating control register */
    -1, -1,
    -1,		/* Not available: EFLAG */
    -1,		/* Not available: CSD */
    -1,		/* Not available: SSD */
    -1,		/* Not available: CFLG */
    -1,		/* Not available: FSR */
    -1,		/* Not available: FIR */
    -1,		/* Not available: FDR */
    -1,
    PT_AR_CCV,
    -1, -1, -1,
    PT_AR_UNAT,
    -1, -1, -1,
    PT_AR_FPSR,
    -1, -1, -1,
    -1,		/* Not available: ITC */
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1,
    PT_AR_PFS,
    PT_AR_LC,
    PT_AR_EC,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
    -1,
  };

bool
ia64_target::low_cannot_store_register (int regno)
{
  return false;
}

bool
ia64_target::low_cannot_fetch_register (int regno)
{
  return false;
}

/* GDB register numbers.  */
#define IA64_GR0_REGNUM		0
#define IA64_FR0_REGNUM		128
#define IA64_FR1_REGNUM		129

bool
ia64_target::low_fetch_register (regcache *regcache, int regnum)
{
  /* r0 cannot be fetched but is always zero.  */
  if (regnum == IA64_GR0_REGNUM)
    {
      const gdb_byte zero[8] = { 0 };

      gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum));
      supply_register (regcache, regnum, zero);
      return true;
    }

  /* fr0 cannot be fetched but is always zero.  */
  if (regnum == IA64_FR0_REGNUM)
    {
      const gdb_byte f_zero[16] = { 0 };

      gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum));
      supply_register (regcache, regnum, f_zero);
      return true;
    }

  /* fr1 cannot be fetched but is always one (1.0).  */
  if (regnum == IA64_FR1_REGNUM)
    {
      const gdb_byte f_one[16] =
	{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };

      gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum));
      supply_register (regcache, regnum, f_one);
      return true;
    }

  return false;
}

static struct usrregs_info ia64_usrregs_info =
  {
    ia64_num_regs,
    ia64_regmap,
  };

static struct regs_info myregs_info =
  {
    NULL, /* regset_bitmap */
    &ia64_usrregs_info
  };

const regs_info *
ia64_target::get_regs_info ()
{
  return &myregs_info;
}

void
ia64_target::low_arch_setup ()
{
  current_process ()->tdesc = tdesc_ia64;
}


struct linux_target_ops the_low_target = {
};

/* The linux target ops object.  */

linux_process_target *the_linux_target = &the_ia64_target;

void
initialize_low_arch (void)
{
  init_registers_ia64 ();
}
Commit	Line	Data
0a30fbc4	1	/* GNU/Linux/IA64 specific low level interface, for the remote server for GDB.
b811d2c2	2	Copyright (C) 1995-2020 Free Software Foundation, Inc.
0a30fbc4 DJ	3
	4	This file is part of GDB.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
a9762ec7	8	the Free Software Foundation; either version 3 of the License, or
0a30fbc4 DJ	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
a9762ec7	17	along with this program. If not, see <http://www.gnu.org/licenses/>. */
0a30fbc4 DJ	18
0a30fbc4 DJ	19	#include "server.h"
58caa3dc	20	#include "linux-low.h"
0a30fbc4 DJ	21
	22	#ifdef HAVE_SYS_REG_H
	23	#include <sys/reg.h>
	24	#endif
	25
ef0478f6 TBA	26	/* Linux target op definitions for the IA64 architecture. */
	27
	28	class ia64_target : public linux_process_target
	29	{
	30	public:
	31
aa8d21c9 TBA	32	const regs_info *get_regs_info () override;
aa8d21c9 TBA	33
797bcff5 TBA	34	protected:
	35
	36	void low_arch_setup () override;
daca57a7 TBA	37
	38	bool low_cannot_fetch_register (int regno) override;
	39
	40	bool low_cannot_store_register (int regno) override;
bd70b1f2 TBA	41
bd70b1f2 TBA	42	bool low_fetch_register (regcache *regcache, int regno) override;
ef0478f6 TBA	43	};
	44
	45	/* The singleton target ops object. */
	46
	47	static ia64_target the_ia64_target;
	48
d05b4ac3 UW	49	/* Defined in auto-generated file reg-ia64.c. */
d05b4ac3 UW	50	void init_registers_ia64 (void);
3aee8918	51	extern const struct target_desc *tdesc_ia64;
d05b4ac3	52
7fb85e41	53	#define ia64_num_regs 462
0a30fbc4 DJ	54
	55	#include <asm/ptrace_offsets.h>
	56
2ec06d2e	57	static int ia64_regmap[] =
0a30fbc4 DJ	58	{
	59	/* general registers */
	60	-1, /* gr0 not available; i.e, it's always zero */
	61	PT_R1,
	62	PT_R2,
	63	PT_R3,
	64	PT_R4,
	65	PT_R5,
	66	PT_R6,
	67	PT_R7,
	68	PT_R8,
	69	PT_R9,
	70	PT_R10,
	71	PT_R11,
	72	PT_R12,
	73	PT_R13,
	74	PT_R14,
	75	PT_R15,
	76	PT_R16,
	77	PT_R17,
	78	PT_R18,
	79	PT_R19,
	80	PT_R20,
	81	PT_R21,
	82	PT_R22,
	83	PT_R23,
	84	PT_R24,
	85	PT_R25,
	86	PT_R26,
	87	PT_R27,
	88	PT_R28,
	89	PT_R29,
	90	PT_R30,
	91	PT_R31,
	92	/* gr32 through gr127 not directly available via the ptrace interface */
	93	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	94	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	95	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	96	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	97	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	98	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	99	/* Floating point registers */
	100	-1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
	101	PT_F2,
	102	PT_F3,
	103	PT_F4,
	104	PT_F5,
	105	PT_F6,
	106	PT_F7,
	107	PT_F8,
	108	PT_F9,
	109	PT_F10,
	110	PT_F11,
	111	PT_F12,
	112	PT_F13,
	113	PT_F14,
	114	PT_F15,
	115	PT_F16,
	116	PT_F17,
	117	PT_F18,
	118	PT_F19,
	119	PT_F20,
	120	PT_F21,
	121	PT_F22,
122	PT_F23,
123	PT_F24,
124	PT_F25,
125	PT_F26,
126	PT_F27,
127	PT_F28,
128	PT_F29,
129	PT_F30,
130	PT_F31,
131	PT_F32,
132	PT_F33,
133	PT_F34,
134	PT_F35,
135	PT_F36,
136	PT_F37,
137	PT_F38,
138	PT_F39,
139	PT_F40,
140	PT_F41,
141	PT_F42,
142	PT_F43,
143	PT_F44,
144	PT_F45,
145	PT_F46,
146	PT_F47,
147	PT_F48,
148	PT_F49,
149	PT_F50,
150	PT_F51,
151	PT_F52,
152	PT_F53,
153	PT_F54,
154	PT_F55,
155	PT_F56,
156	PT_F57,
157	PT_F58,
158	PT_F59,
159	PT_F60,
160	PT_F61,
161	PT_F62,
162	PT_F63,
163	PT_F64,
164	PT_F65,
165	PT_F66,
166	PT_F67,
167	PT_F68,
168	PT_F69,
169	PT_F70,
170	PT_F71,
171	PT_F72,
172	PT_F73,
173	PT_F74,
174	PT_F75,
175	PT_F76,
176	PT_F77,
177	PT_F78,
178	PT_F79,
179	PT_F80,
180	PT_F81,
181	PT_F82,
182	PT_F83,
183	PT_F84,
184	PT_F85,
185	PT_F86,
186	PT_F87,
187	PT_F88,
188	PT_F89,
189	PT_F90,
190	PT_F91,
191	PT_F92,
192	PT_F93,
193	PT_F94,
194	PT_F95,
195	PT_F96,
196	PT_F97,
197	PT_F98,
198	PT_F99,
199	PT_F100,
200	PT_F101,
201	PT_F102,
202	PT_F103,
203	PT_F104,
204	PT_F105,
205	PT_F106,
206	PT_F107,
207	PT_F108,
208	PT_F109,
209	PT_F110,
210	PT_F111,
211	PT_F112,
212	PT_F113,
213	PT_F114,
214	PT_F115,
215	PT_F116,
216	PT_F117,
217	PT_F118,
218	PT_F119,
219	PT_F120,
220	PT_F121,
221	PT_F122,
222	PT_F123,
223	PT_F124,
224	PT_F125,
225	PT_F126,
226	PT_F127,
227	/* predicate registers - we don't fetch these individually */
228	-1, -1, -1, -1, -1, -1, -1, -1,
229	-1, -1, -1, -1, -1, -1, -1, -1,
230	-1, -1, -1, -1, -1, -1, -1, -1,
231	-1, -1, -1, -1, -1, -1, -1, -1,
232	-1, -1, -1, -1, -1, -1, -1, -1,
233	-1, -1, -1, -1, -1, -1, -1, -1,
234	-1, -1, -1, -1, -1, -1, -1, -1,
235	-1, -1, -1, -1, -1, -1, -1, -1,
236	/* branch registers */
237	PT_B0,
238	PT_B1,
239	PT_B2,
240	PT_B3,
241	PT_B4,
242	PT_B5,
243	PT_B6,
244	PT_B7,
245	/* virtual frame pointer and virtual return address pointer */
246	-1, -1,
247	/* other registers */
248	PT_PR,
249	PT_CR_IIP, /* ip */
250	PT_CR_IPSR, /* psr */
251	PT_CFM, /* cfm */
252	/* kernel registers not visible via ptrace interface (?) */
253	-1, -1, -1, -1, -1, -1, -1, -1,
254	/* hole */
255	-1, -1, -1, -1, -1, -1, -1, -1,
256	PT_AR_RSC,
257	PT_AR_BSP,
258	PT_AR_BSPSTORE,
259	PT_AR_RNAT,
260	-1,
261	-1, /* Not available: FCR, IA32 floating control register */
262	-1, -1,
263	-1, /* Not available: EFLAG */
264	-1, /* Not available: CSD */
265	-1, /* Not available: SSD */
266	-1, /* Not available: CFLG */
267	-1, /* Not available: FSR */
268	-1, /* Not available: FIR */
269	-1, /* Not available: FDR */
270	-1,
271	PT_AR_CCV,
272	-1, -1, -1,
273	PT_AR_UNAT,
274	-1, -1, -1,
275	PT_AR_FPSR,
276	-1, -1, -1,
277	-1, /* Not available: ITC */
278	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
279	-1, -1, -1, -1, -1, -1, -1, -1, -1,
280	PT_AR_PFS,
281	PT_AR_LC,
c14dfd32	282	PT_AR_EC,
0a30fbc4 DJ	283	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	284	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	285	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	286	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	287	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	288	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
	289	-1,
0a30fbc4 DJ	290	};
0a30fbc4 DJ	291
daca57a7 TBA	292	bool
daca57a7 TBA	293	ia64_target::low_cannot_store_register (int regno)
0a30fbc4	294	{
daca57a7	295	return false;
0a30fbc4 DJ	296	}
0a30fbc4 DJ	297
daca57a7 TBA	298	bool
daca57a7 TBA	299	ia64_target::low_cannot_fetch_register (int regno)
0a30fbc4	300	{
daca57a7	301	return false;
0a30fbc4 DJ	302	}
0a30fbc4 DJ	303
c14dfd32 PA	304	/* GDB register numbers. */
	305	#define IA64_GR0_REGNUM 0
	306	#define IA64_FR0_REGNUM 128
	307	#define IA64_FR1_REGNUM 129
	308
bd70b1f2 TBA	309	bool
bd70b1f2 TBA	310	ia64_target::low_fetch_register (regcache *regcache, int regnum)
c14dfd32 PA	311	{
	312	/* r0 cannot be fetched but is always zero. */
	313	if (regnum == IA64_GR0_REGNUM)
	314	{
	315	const gdb_byte zero[8] = { 0 };
	316
3aee8918	317	gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum));
c14dfd32	318	supply_register (regcache, regnum, zero);
bd70b1f2	319	return true;
c14dfd32 PA	320	}
	321
	322	/* fr0 cannot be fetched but is always zero. */
	323	if (regnum == IA64_FR0_REGNUM)
	324	{
	325	const gdb_byte f_zero[16] = { 0 };
	326
3aee8918	327	gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum));
c14dfd32	328	supply_register (regcache, regnum, f_zero);
bd70b1f2	329	return true;
c14dfd32 PA	330	}
	331
	332	/* fr1 cannot be fetched but is always one (1.0). */
	333	if (regnum == IA64_FR1_REGNUM)
	334	{
	335	const gdb_byte f_one[16] =
	336	{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
	337
3aee8918	338	gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum));
c14dfd32	339	supply_register (regcache, regnum, f_one);
bd70b1f2	340	return true;
c14dfd32 PA	341	}
c14dfd32 PA	342
bd70b1f2	343	return false;
c14dfd32 PA	344	}
c14dfd32 PA	345
3aee8918 PA	346	static struct usrregs_info ia64_usrregs_info =
	347	{
	348	ia64_num_regs,
	349	ia64_regmap,
	350	};
	351
aa8d21c9	352	static struct regs_info myregs_info =
3aee8918 PA	353	{
	354	NULL, /* regset_bitmap */
	355	&ia64_usrregs_info
	356	};
	357
aa8d21c9 TBA	358	const regs_info *
aa8d21c9 TBA	359	ia64_target::get_regs_info ()
3aee8918	360	{
aa8d21c9	361	return &myregs_info;
3aee8918 PA	362	}
3aee8918 PA	363
797bcff5 TBA	364	void
797bcff5 TBA	365	ia64_target::low_arch_setup ()
3aee8918 PA	366	{
	367	current_process ()->tdesc = tdesc_ia64;
	368	}
	369
	370
2ec06d2e	371	struct linux_target_ops the_low_target = {
2ec06d2e	372	};
3aee8918	373
ef0478f6 TBA	374	/* The linux target ops object. */
	375
	376	linux_process_target *the_linux_target = &the_ia64_target;
	377
3aee8918 PA	378	void
	379	initialize_low_arch (void)
	380	{
	381	init_registers_ia64 ();
	382	}