gdbserver/linux-low: turn the 'decr_pc_after_break' field into a method
[deliverable/binutils-gdb.git] / gdbserver / linux-m32r-low.cc
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7cfbc4a0 1/* GNU/Linux/m32r specific low level interface, for the remote server for GDB.
b811d2c2 2 Copyright (C) 2005-2020 Free Software Foundation, Inc.
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3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
a9762ec7 8 the Free Software Foundation; either version 3 of the License, or
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9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
a9762ec7 17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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18
19#include "server.h"
20#include "linux-low.h"
21
22#ifdef HAVE_SYS_REG_H
23#include <sys/reg.h>
24#endif
25
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26/* Linux target op definitions for the m32r architecture. */
27
28class m32r_target : public linux_process_target
29{
30public:
31
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32 const regs_info *get_regs_info () override;
33
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34 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
35
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36protected:
37
38 void low_arch_setup () override;
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39
40 bool low_cannot_fetch_register (int regno) override;
41
42 bool low_cannot_store_register (int regno) override;
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43
44 bool low_supports_breakpoints () override;
45
46 CORE_ADDR low_get_pc (regcache *regcache) override;
47
48 void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
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49};
50
51/* The singleton target ops object. */
52
53static m32r_target the_m32r_target;
54
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55bool
56m32r_target::low_supports_breakpoints ()
57{
58 return true;
59}
60
61CORE_ADDR
62m32r_target::low_get_pc (regcache *regcache)
63{
64 return linux_get_pc_32bit (regcache);
65}
66
67void
68m32r_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
69{
70 linux_set_pc_32bit (regcache, pc);
71}
72
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73/* Defined in auto-generated file reg-m32r.c. */
74void init_registers_m32r (void);
3aee8918 75extern const struct target_desc *tdesc_m32r;
d05b4ac3 76
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77#define m32r_num_regs 25
78
79static int m32r_regmap[] = {
80#ifdef PT_R0
81 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
82 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU,
83 PT_PSW, PT_CBR, PT_SPI, PT_SPU, PT_BPC, PT_PC, PT_ACCL, PT_ACCH, PT_EVB
84#else
85 4 * 4, 4 * 5, 4 * 6, 4 * 7, 4 * 0, 4 * 1, 4 * 2, 4 * 8,
86 4 * 9, 4 * 10, 4 * 11, 4 * 12, 4 * 13, 4 * 24, 4 * 25, 4 * 23,
87 4 * 19, 4 * 31, 4 * 26, 4 * 23, 4 * 20, 4 * 30, 4 * 16, 4 * 15, 4 * 32
88#endif
89};
90
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91bool
92m32r_target::low_cannot_store_register (int regno)
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93{
94 return (regno >= m32r_num_regs);
95}
96
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97bool
98m32r_target::low_cannot_fetch_register (int regno)
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99{
100 return (regno >= m32r_num_regs);
101}
102
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103static const unsigned short m32r_breakpoint = 0x10f1;
104#define m32r_breakpoint_len 2
105
3ca4edb6 106/* Implementation of target ops method "sw_breakpoint_from_kind". */
dd373349 107
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108const gdb_byte *
109m32r_target::sw_breakpoint_from_kind (int kind, int *size)
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110{
111 *size = m32r_breakpoint_len;
112 return (const gdb_byte *) &m32r_breakpoint;
113}
114
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115static int
116m32r_breakpoint_at (CORE_ADDR where)
117{
118 unsigned short insn;
119
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120 the_target->read_memory (where, (unsigned char *) &insn,
121 m32r_breakpoint_len);
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122 if (insn == m32r_breakpoint)
123 return 1;
124
125 /* If necessary, recognize more trap instructions here. GDB only uses the
126 one. */
127 return 0;
128}
129
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130void
131m32r_target::low_arch_setup ()
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132{
133 current_process ()->tdesc = tdesc_m32r;
134}
135
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136/* Support for hardware single step. */
137
138static int
139m32r_supports_hardware_single_step (void)
140{
141 return 1;
142}
143
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144static struct usrregs_info m32r_usrregs_info =
145 {
146 m32r_num_regs,
147 m32r_regmap,
148 };
149
aa8d21c9 150static struct regs_info myregs_info =
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151 {
152 NULL, /* regset_bitmap */
153 &m32r_usrregs_info,
154 };
155
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156const regs_info *
157m32r_target::get_regs_info ()
3aee8918 158{
aa8d21c9 159 return &myregs_info;
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160}
161
7cfbc4a0 162struct linux_target_ops the_low_target = {
7cfbc4a0 163 m32r_breakpoint_at,
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164 NULL, /* supports_z_point_type */
165 NULL, /* insert_point */
166 NULL, /* remove_point */
167 NULL, /* stopped_by_watchpoint */
168 NULL, /* stopped_data_address */
169 NULL, /* collect_ptrace_register */
170 NULL, /* supply_ptrace_register */
171 NULL, /* siginfo_fixup */
172 NULL, /* new_process */
04ec7890 173 NULL, /* delete_process */
7d00775e 174 NULL, /* new_thread */
466eecee 175 NULL, /* delete_thread */
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176 NULL, /* new_fork */
177 NULL, /* prepare_to_resume */
178 NULL, /* process_qsupported */
179 NULL, /* supports_tracepoints */
180 NULL, /* get_thread_area */
181 NULL, /* install_fast_tracepoint_jump_pad */
182 NULL, /* emit_ops */
183 NULL, /* get_min_fast_tracepoint_insn_len */
184 NULL, /* supports_range_stepping */
7d00775e 185 m32r_supports_hardware_single_step,
7cfbc4a0 186};
3aee8918 187
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188/* The linux target ops object. */
189
190linux_process_target *the_linux_target = &the_m32r_target;
191
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192void
193initialize_low_arch (void)
194{
195 init_registers_m32r ();
196}
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