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dfb64f85 | 1 | /* Low level interface to ptrace, for the remote server for GDB. |
b811d2c2 | 2 | Copyright (C) 1995-2020 Free Software Foundation, Inc. |
dfb64f85 DJ |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
18 | ||
19 | #include "server.h" | |
20 | #include "linux-low.h" | |
21 | ||
5826e159 | 22 | #include "nat/gdb_ptrace.h" |
dfb64f85 DJ |
23 | |
24 | #include "gdb_proc_service.h" | |
25 | ||
26 | /* The stack pointer is offset from the stack frame by a BIAS of 2047 | |
27 | (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC | |
28 | hosts, so undefine it first. */ | |
29 | #undef BIAS | |
30 | #define BIAS 2047 | |
31 | ||
32 | #ifdef HAVE_SYS_REG_H | |
33 | #include <sys/reg.h> | |
34 | #endif | |
35 | ||
36 | #define INSN_SIZE 4 | |
37 | ||
38 | #define SPARC_R_REGS_NUM 32 | |
39 | #define SPARC_F_REGS_NUM 48 | |
40 | #define SPARC_CONTROL_REGS_NUM 6 | |
41 | ||
493e2a69 MS |
42 | #define sparc_num_regs \ |
43 | (SPARC_R_REGS_NUM + SPARC_F_REGS_NUM + SPARC_CONTROL_REGS_NUM) | |
dfb64f85 | 44 | |
ef0478f6 TBA |
45 | /* Linux target op definitions for the SPARC architecture. */ |
46 | ||
47 | class sparc_target : public linux_process_target | |
48 | { | |
49 | public: | |
50 | ||
aa8d21c9 TBA |
51 | const regs_info *get_regs_info () override; |
52 | ||
797bcff5 TBA |
53 | protected: |
54 | ||
55 | void low_arch_setup () override; | |
daca57a7 TBA |
56 | |
57 | bool low_cannot_fetch_register (int regno) override; | |
58 | ||
59 | bool low_cannot_store_register (int regno) override; | |
bf9ae9d8 TBA |
60 | |
61 | bool low_supports_breakpoints () override; | |
62 | ||
63 | CORE_ADDR low_get_pc (regcache *regcache) override; | |
64 | ||
65 | /* No low_set_pc is needed. */ | |
ef0478f6 TBA |
66 | }; |
67 | ||
68 | /* The singleton target ops object. */ | |
69 | ||
70 | static sparc_target the_sparc_target; | |
71 | ||
bf9ae9d8 TBA |
72 | bool |
73 | sparc_target::low_supports_breakpoints () | |
74 | { | |
75 | return true; | |
76 | } | |
77 | ||
78 | CORE_ADDR | |
79 | sparc_target::low_get_pc (regcache *regcache) | |
80 | { | |
81 | return linux_get_pc_64bit (regcache); | |
82 | } | |
83 | ||
dfb64f85 DJ |
84 | /* Each offset is multiplied by 8, because of the register size. |
85 | These offsets apply to the buffer sent/filled by ptrace. | |
86 | Additionally, the array elements order corresponds to the .dat file, and the | |
87 | gdb's registers enumeration order. */ | |
88 | ||
89 | static int sparc_regmap[] = { | |
90 | /* These offsets correspond to GET/SETREGSET. */ | |
493e2a69 MS |
91 | -1, 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, /* g0 .. g7 */ |
92 | 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, /* o0 .. o5, sp, o7 */ | |
93 | -1, -1, -1, -1, -1, -1, -1, -1, /* l0 .. l7 */ | |
94 | -1, -1, -1, -1, -1, -1, -1, -1, /* i0 .. i5, fp, i7 */ | |
dfb64f85 DJ |
95 | |
96 | /* Floating point registers offsets correspond to GET/SETFPREGSET. */ | |
97 | 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, /* f0 .. f7 */ | |
98 | 8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4, /* f8 .. f15 */ | |
99 | 16*4, 17*4, 18*4, 19*4, 20*4, 21*4, 22*4, 23*4, /* f16 .. f23 */ | |
100 | 24*4, 25*4, 26*4, 27*4, 28*4, 29*4, 30*4, 31*4, /* f24 .. f31 */ | |
101 | ||
102 | /* F32 offset starts next to f31: 31*4+4 = 16 * 8. */ | |
1b3f6016 PA |
103 | 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8, /* f32 .. f46 */ |
104 | 24*8, 25*8, 26*8, 27*8, 28*8, 29*8, 30*8, 31*8, /* f48 .. f62 */ | |
dfb64f85 DJ |
105 | |
106 | 17 *8, /* pc */ | |
107 | 18 *8, /* npc */ | |
108 | 16 *8, /* state */ | |
493e2a69 MS |
109 | /* FSR offset also corresponds to GET/SETFPREGSET, ans is placed |
110 | next to f62. */ | |
dfb64f85 DJ |
111 | 32 *8, /* fsr */ |
112 | -1, /* fprs */ | |
113 | /* Y register is 32-bits length, but gdb takes care of that. */ | |
114 | 19 *8, /* y */ | |
115 | ||
116 | }; | |
117 | ||
118 | ||
119 | struct regs_range_t | |
120 | { | |
121 | int regno_start; | |
122 | int regno_end; | |
123 | }; | |
124 | ||
125 | static const struct regs_range_t gregs_ranges[] = { | |
126 | { 0, 31 }, /* g0 .. i7 */ | |
127 | { 80, 82 }, /* pc .. state */ | |
128 | { 84, 85 } /* fprs .. y */ | |
129 | }; | |
130 | ||
131 | #define N_GREGS_RANGES (sizeof (gregs_ranges) / sizeof (struct regs_range_t)) | |
132 | ||
133 | static const struct regs_range_t fpregs_ranges[] = { | |
134 | { 32, 79 }, /* f0 .. f62 */ | |
135 | { 83, 83 } /* fsr */ | |
136 | }; | |
137 | ||
138 | #define N_FPREGS_RANGES (sizeof (fpregs_ranges) / sizeof (struct regs_range_t)) | |
139 | ||
140 | /* Defined in auto-generated file reg-sparc64.c. */ | |
141 | void init_registers_sparc64 (void); | |
3aee8918 | 142 | extern const struct target_desc *tdesc_sparc64; |
dfb64f85 | 143 | |
daca57a7 TBA |
144 | bool |
145 | sparc_target::low_cannot_store_register (int regno) | |
dfb64f85 DJ |
146 | { |
147 | return (regno >= sparc_num_regs || sparc_regmap[regno] == -1); | |
148 | } | |
149 | ||
daca57a7 TBA |
150 | bool |
151 | sparc_target::low_cannot_fetch_register (int regno) | |
dfb64f85 DJ |
152 | { |
153 | return (regno >= sparc_num_regs || sparc_regmap[regno] == -1); | |
154 | } | |
155 | ||
156 | static void | |
442ea881 | 157 | sparc_fill_gregset_to_stack (struct regcache *regcache, const void *buf) |
dfb64f85 DJ |
158 | { |
159 | int i; | |
160 | CORE_ADDR addr = 0; | |
161 | unsigned char tmp_reg_buf[8]; | |
3aee8918 | 162 | const int l0_regno = find_regno (regcache->tdesc, "l0"); |
dfb64f85 DJ |
163 | const int i7_regno = l0_regno + 15; |
164 | ||
165 | /* These registers have to be stored in the stack. */ | |
111217b3 | 166 | memcpy (&addr, |
3aee8918 | 167 | ((char *) buf) + sparc_regmap[find_regno (regcache->tdesc, "sp")], |
111217b3 | 168 | sizeof (addr)); |
dfb64f85 DJ |
169 | |
170 | addr += BIAS; | |
1b3f6016 | 171 | |
dfb64f85 DJ |
172 | for (i = l0_regno; i <= i7_regno; i++) |
173 | { | |
442ea881 | 174 | collect_register (regcache, i, tmp_reg_buf); |
52405d85 | 175 | the_target->write_memory (addr, tmp_reg_buf, sizeof (tmp_reg_buf)); |
111217b3 | 176 | addr += sizeof (tmp_reg_buf); |
dfb64f85 DJ |
177 | } |
178 | } | |
179 | ||
180 | static void | |
442ea881 | 181 | sparc_fill_gregset (struct regcache *regcache, void *buf) |
dfb64f85 DJ |
182 | { |
183 | int i; | |
184 | int range; | |
1b3f6016 | 185 | |
dfb64f85 | 186 | for (range = 0; range < N_GREGS_RANGES; range++) |
493e2a69 MS |
187 | for (i = gregs_ranges[range].regno_start; |
188 | i <= gregs_ranges[range].regno_end; i++) | |
dfb64f85 | 189 | if (sparc_regmap[i] != -1) |
442ea881 | 190 | collect_register (regcache, i, ((char *) buf) + sparc_regmap[i]); |
1b3f6016 | 191 | |
442ea881 | 192 | sparc_fill_gregset_to_stack (regcache, buf); |
dfb64f85 DJ |
193 | } |
194 | ||
195 | static void | |
442ea881 | 196 | sparc_fill_fpregset (struct regcache *regcache, void *buf) |
dfb64f85 DJ |
197 | { |
198 | int i; | |
199 | int range; | |
1b3f6016 | 200 | |
dfb64f85 | 201 | for (range = 0; range < N_FPREGS_RANGES; range++) |
493e2a69 MS |
202 | for (i = fpregs_ranges[range].regno_start; |
203 | i <= fpregs_ranges[range].regno_end; i++) | |
442ea881 | 204 | collect_register (regcache, i, ((char *) buf) + sparc_regmap[i]); |
1b3f6016 | 205 | |
dfb64f85 DJ |
206 | } |
207 | ||
208 | static void | |
442ea881 | 209 | sparc_store_gregset_from_stack (struct regcache *regcache, const void *buf) |
dfb64f85 DJ |
210 | { |
211 | int i; | |
212 | CORE_ADDR addr = 0; | |
213 | unsigned char tmp_reg_buf[8]; | |
3aee8918 | 214 | const int l0_regno = find_regno (regcache->tdesc, "l0"); |
dfb64f85 DJ |
215 | const int i7_regno = l0_regno + 15; |
216 | ||
217 | /* These registers have to be obtained from the stack. */ | |
111217b3 | 218 | memcpy (&addr, |
3aee8918 | 219 | ((char *) buf) + sparc_regmap[find_regno (regcache->tdesc, "sp")], |
111217b3 | 220 | sizeof (addr)); |
dfb64f85 DJ |
221 | |
222 | addr += BIAS; | |
1b3f6016 | 223 | |
dfb64f85 DJ |
224 | for (i = l0_regno; i <= i7_regno; i++) |
225 | { | |
52405d85 | 226 | the_target->read_memory (addr, tmp_reg_buf, sizeof (tmp_reg_buf)); |
442ea881 | 227 | supply_register (regcache, i, tmp_reg_buf); |
111217b3 | 228 | addr += sizeof (tmp_reg_buf); |
dfb64f85 DJ |
229 | } |
230 | } | |
231 | ||
232 | static void | |
442ea881 | 233 | sparc_store_gregset (struct regcache *regcache, const void *buf) |
dfb64f85 DJ |
234 | { |
235 | int i; | |
236 | char zerobuf[8]; | |
237 | int range; | |
238 | ||
111217b3 | 239 | memset (zerobuf, 0, sizeof (zerobuf)); |
1b3f6016 | 240 | |
dfb64f85 | 241 | for (range = 0; range < N_GREGS_RANGES; range++) |
493e2a69 MS |
242 | for (i = gregs_ranges[range].regno_start; |
243 | i <= gregs_ranges[range].regno_end; i++) | |
dfb64f85 | 244 | if (sparc_regmap[i] != -1) |
442ea881 | 245 | supply_register (regcache, i, ((char *) buf) + sparc_regmap[i]); |
dfb64f85 | 246 | else |
442ea881 | 247 | supply_register (regcache, i, zerobuf); |
1b3f6016 | 248 | |
442ea881 | 249 | sparc_store_gregset_from_stack (regcache, buf); |
dfb64f85 DJ |
250 | } |
251 | ||
252 | static void | |
442ea881 | 253 | sparc_store_fpregset (struct regcache *regcache, const void *buf) |
dfb64f85 DJ |
254 | { |
255 | int i; | |
256 | int range; | |
1b3f6016 | 257 | |
dfb64f85 | 258 | for (range = 0; range < N_FPREGS_RANGES; range++) |
442ea881 PA |
259 | for (i = fpregs_ranges[range].regno_start; |
260 | i <= fpregs_ranges[range].regno_end; | |
261 | i++) | |
262 | supply_register (regcache, i, ((char *) buf) + sparc_regmap[i]); | |
dfb64f85 DJ |
263 | } |
264 | ||
dd373349 | 265 | static const gdb_byte sparc_breakpoint[INSN_SIZE] = { |
493e2a69 MS |
266 | 0x91, 0xd0, 0x20, 0x01 |
267 | }; | |
dfb64f85 DJ |
268 | #define sparc_breakpoint_len INSN_SIZE |
269 | ||
dd373349 AT |
270 | /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ |
271 | ||
272 | static const unsigned char * | |
273 | sparc_sw_breakpoint_from_kind (int kind, int *size) | |
274 | { | |
275 | *size = sparc_breakpoint_len; | |
276 | return sparc_breakpoint; | |
277 | } | |
dfb64f85 DJ |
278 | |
279 | static int | |
280 | sparc_breakpoint_at (CORE_ADDR where) | |
281 | { | |
282 | unsigned char insn[INSN_SIZE]; | |
283 | ||
52405d85 | 284 | the_target->read_memory (where, (unsigned char *) insn, sizeof (insn)); |
1b3f6016 | 285 | |
111217b3 | 286 | if (memcmp (sparc_breakpoint, insn, sizeof (insn)) == 0) |
dfb64f85 DJ |
287 | return 1; |
288 | ||
493e2a69 MS |
289 | /* If necessary, recognize more trap instructions here. GDB only |
290 | uses TRAP Always. */ | |
dfb64f85 DJ |
291 | |
292 | return 0; | |
293 | } | |
294 | ||
797bcff5 TBA |
295 | void |
296 | sparc_target::low_arch_setup () | |
3aee8918 PA |
297 | { |
298 | current_process ()->tdesc = tdesc_sparc64; | |
299 | } | |
dfb64f85 | 300 | |
3aee8918 | 301 | static struct regset_info sparc_regsets[] = { |
1570b33e | 302 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), |
dfb64f85 DJ |
303 | GENERAL_REGS, |
304 | sparc_fill_gregset, sparc_store_gregset }, | |
1570b33e | 305 | { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (fpregset_t), |
dfb64f85 DJ |
306 | FP_REGS, |
307 | sparc_fill_fpregset, sparc_store_fpregset }, | |
50bc912a | 308 | NULL_REGSET |
dfb64f85 DJ |
309 | }; |
310 | ||
3aee8918 PA |
311 | static struct regsets_info sparc_regsets_info = |
312 | { | |
313 | sparc_regsets, /* regsets */ | |
314 | 0, /* num_regsets */ | |
315 | NULL, /* disabled_regsets */ | |
316 | }; | |
317 | ||
318 | static struct usrregs_info sparc_usrregs_info = | |
319 | { | |
320 | sparc_num_regs, | |
321 | /* No regmap needs to be provided since this impl. doesn't use | |
322 | USRREGS. */ | |
323 | NULL | |
324 | }; | |
325 | ||
aa8d21c9 | 326 | static struct regs_info myregs_info = |
3aee8918 PA |
327 | { |
328 | NULL, /* regset_bitmap */ | |
329 | &sparc_usrregs_info, | |
330 | &sparc_regsets_info | |
331 | }; | |
332 | ||
aa8d21c9 TBA |
333 | const regs_info * |
334 | sparc_target::get_regs_info () | |
3aee8918 | 335 | { |
aa8d21c9 | 336 | return &myregs_info; |
3aee8918 PA |
337 | } |
338 | ||
dfb64f85 | 339 | struct linux_target_ops the_low_target = { |
dd373349 | 340 | sparc_sw_breakpoint_from_kind, |
fa5308bd | 341 | NULL, /* get_next_pcs */ |
dfb64f85 DJ |
342 | 0, |
343 | sparc_breakpoint_at, | |
802e8e6d | 344 | NULL, /* supports_z_point_type */ |
dfb64f85 DJ |
345 | NULL, NULL, NULL, NULL, |
346 | NULL, NULL | |
347 | }; | |
3aee8918 | 348 | |
ef0478f6 TBA |
349 | /* The linux target ops object. */ |
350 | ||
351 | linux_process_target *the_linux_target = &the_sparc_target; | |
352 | ||
3aee8918 PA |
353 | void |
354 | initialize_low_arch (void) | |
355 | { | |
356 | /* Initialize the Linux target descriptions. */ | |
357 | init_registers_sparc64 (); | |
358 | ||
359 | initialize_regsets_info (&sparc_regsets_info); | |
360 | } |