gdbserver/linux-low: turn 'supports_software_single_step' and 'get_next_pcs' into...
[deliverable/binutils-gdb.git] / gdbserver / linux-sparc-low.cc
CommitLineData
dfb64f85 1/* Low level interface to ptrace, for the remote server for GDB.
b811d2c2 2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
dfb64f85
DJ
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19#include "server.h"
20#include "linux-low.h"
21
5826e159 22#include "nat/gdb_ptrace.h"
dfb64f85
DJ
23
24#include "gdb_proc_service.h"
25
26/* The stack pointer is offset from the stack frame by a BIAS of 2047
27 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
28 hosts, so undefine it first. */
29#undef BIAS
30#define BIAS 2047
31
32#ifdef HAVE_SYS_REG_H
33#include <sys/reg.h>
34#endif
35
36#define INSN_SIZE 4
37
38#define SPARC_R_REGS_NUM 32
39#define SPARC_F_REGS_NUM 48
40#define SPARC_CONTROL_REGS_NUM 6
41
493e2a69
MS
42#define sparc_num_regs \
43 (SPARC_R_REGS_NUM + SPARC_F_REGS_NUM + SPARC_CONTROL_REGS_NUM)
dfb64f85 44
ef0478f6
TBA
45/* Linux target op definitions for the SPARC architecture. */
46
47class sparc_target : public linux_process_target
48{
49public:
50
aa8d21c9
TBA
51 const regs_info *get_regs_info () override;
52
3ca4edb6
TBA
53 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
54
797bcff5
TBA
55protected:
56
57 void low_arch_setup () override;
daca57a7
TBA
58
59 bool low_cannot_fetch_register (int regno) override;
60
61 bool low_cannot_store_register (int regno) override;
bf9ae9d8
TBA
62
63 bool low_supports_breakpoints () override;
64
65 CORE_ADDR low_get_pc (regcache *regcache) override;
66
67 /* No low_set_pc is needed. */
ef0478f6
TBA
68};
69
70/* The singleton target ops object. */
71
72static sparc_target the_sparc_target;
73
bf9ae9d8
TBA
74bool
75sparc_target::low_supports_breakpoints ()
76{
77 return true;
78}
79
80CORE_ADDR
81sparc_target::low_get_pc (regcache *regcache)
82{
83 return linux_get_pc_64bit (regcache);
84}
85
dfb64f85
DJ
86/* Each offset is multiplied by 8, because of the register size.
87 These offsets apply to the buffer sent/filled by ptrace.
88 Additionally, the array elements order corresponds to the .dat file, and the
89 gdb's registers enumeration order. */
90
91static int sparc_regmap[] = {
92 /* These offsets correspond to GET/SETREGSET. */
493e2a69
MS
93 -1, 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, /* g0 .. g7 */
94 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, /* o0 .. o5, sp, o7 */
95 -1, -1, -1, -1, -1, -1, -1, -1, /* l0 .. l7 */
96 -1, -1, -1, -1, -1, -1, -1, -1, /* i0 .. i5, fp, i7 */
dfb64f85
DJ
97
98 /* Floating point registers offsets correspond to GET/SETFPREGSET. */
99 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, /* f0 .. f7 */
100 8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4, /* f8 .. f15 */
101 16*4, 17*4, 18*4, 19*4, 20*4, 21*4, 22*4, 23*4, /* f16 .. f23 */
102 24*4, 25*4, 26*4, 27*4, 28*4, 29*4, 30*4, 31*4, /* f24 .. f31 */
103
104 /* F32 offset starts next to f31: 31*4+4 = 16 * 8. */
1b3f6016
PA
105 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8, /* f32 .. f46 */
106 24*8, 25*8, 26*8, 27*8, 28*8, 29*8, 30*8, 31*8, /* f48 .. f62 */
dfb64f85
DJ
107
108 17 *8, /* pc */
109 18 *8, /* npc */
110 16 *8, /* state */
493e2a69
MS
111 /* FSR offset also corresponds to GET/SETFPREGSET, ans is placed
112 next to f62. */
dfb64f85
DJ
113 32 *8, /* fsr */
114 -1, /* fprs */
115 /* Y register is 32-bits length, but gdb takes care of that. */
116 19 *8, /* y */
117
118};
119
120
121struct regs_range_t
122{
123 int regno_start;
124 int regno_end;
125};
126
127static const struct regs_range_t gregs_ranges[] = {
128 { 0, 31 }, /* g0 .. i7 */
129 { 80, 82 }, /* pc .. state */
130 { 84, 85 } /* fprs .. y */
131};
132
133#define N_GREGS_RANGES (sizeof (gregs_ranges) / sizeof (struct regs_range_t))
134
135static const struct regs_range_t fpregs_ranges[] = {
136 { 32, 79 }, /* f0 .. f62 */
137 { 83, 83 } /* fsr */
138};
139
140#define N_FPREGS_RANGES (sizeof (fpregs_ranges) / sizeof (struct regs_range_t))
141
142/* Defined in auto-generated file reg-sparc64.c. */
143void init_registers_sparc64 (void);
3aee8918 144extern const struct target_desc *tdesc_sparc64;
dfb64f85 145
daca57a7
TBA
146bool
147sparc_target::low_cannot_store_register (int regno)
dfb64f85
DJ
148{
149 return (regno >= sparc_num_regs || sparc_regmap[regno] == -1);
150}
151
daca57a7
TBA
152bool
153sparc_target::low_cannot_fetch_register (int regno)
dfb64f85
DJ
154{
155 return (regno >= sparc_num_regs || sparc_regmap[regno] == -1);
156}
157
158static void
442ea881 159sparc_fill_gregset_to_stack (struct regcache *regcache, const void *buf)
dfb64f85
DJ
160{
161 int i;
162 CORE_ADDR addr = 0;
163 unsigned char tmp_reg_buf[8];
3aee8918 164 const int l0_regno = find_regno (regcache->tdesc, "l0");
dfb64f85
DJ
165 const int i7_regno = l0_regno + 15;
166
167 /* These registers have to be stored in the stack. */
111217b3 168 memcpy (&addr,
3aee8918 169 ((char *) buf) + sparc_regmap[find_regno (regcache->tdesc, "sp")],
111217b3 170 sizeof (addr));
dfb64f85
DJ
171
172 addr += BIAS;
1b3f6016 173
dfb64f85
DJ
174 for (i = l0_regno; i <= i7_regno; i++)
175 {
442ea881 176 collect_register (regcache, i, tmp_reg_buf);
52405d85 177 the_target->write_memory (addr, tmp_reg_buf, sizeof (tmp_reg_buf));
111217b3 178 addr += sizeof (tmp_reg_buf);
dfb64f85
DJ
179 }
180}
181
182static void
442ea881 183sparc_fill_gregset (struct regcache *regcache, void *buf)
dfb64f85
DJ
184{
185 int i;
186 int range;
1b3f6016 187
dfb64f85 188 for (range = 0; range < N_GREGS_RANGES; range++)
493e2a69
MS
189 for (i = gregs_ranges[range].regno_start;
190 i <= gregs_ranges[range].regno_end; i++)
dfb64f85 191 if (sparc_regmap[i] != -1)
442ea881 192 collect_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
1b3f6016 193
442ea881 194 sparc_fill_gregset_to_stack (regcache, buf);
dfb64f85
DJ
195}
196
197static void
442ea881 198sparc_fill_fpregset (struct regcache *regcache, void *buf)
dfb64f85
DJ
199{
200 int i;
201 int range;
1b3f6016 202
dfb64f85 203 for (range = 0; range < N_FPREGS_RANGES; range++)
493e2a69
MS
204 for (i = fpregs_ranges[range].regno_start;
205 i <= fpregs_ranges[range].regno_end; i++)
442ea881 206 collect_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
1b3f6016 207
dfb64f85
DJ
208}
209
210static void
442ea881 211sparc_store_gregset_from_stack (struct regcache *regcache, const void *buf)
dfb64f85
DJ
212{
213 int i;
214 CORE_ADDR addr = 0;
215 unsigned char tmp_reg_buf[8];
3aee8918 216 const int l0_regno = find_regno (regcache->tdesc, "l0");
dfb64f85
DJ
217 const int i7_regno = l0_regno + 15;
218
219 /* These registers have to be obtained from the stack. */
111217b3 220 memcpy (&addr,
3aee8918 221 ((char *) buf) + sparc_regmap[find_regno (regcache->tdesc, "sp")],
111217b3 222 sizeof (addr));
dfb64f85
DJ
223
224 addr += BIAS;
1b3f6016 225
dfb64f85
DJ
226 for (i = l0_regno; i <= i7_regno; i++)
227 {
52405d85 228 the_target->read_memory (addr, tmp_reg_buf, sizeof (tmp_reg_buf));
442ea881 229 supply_register (regcache, i, tmp_reg_buf);
111217b3 230 addr += sizeof (tmp_reg_buf);
dfb64f85
DJ
231 }
232}
233
234static void
442ea881 235sparc_store_gregset (struct regcache *regcache, const void *buf)
dfb64f85
DJ
236{
237 int i;
238 char zerobuf[8];
239 int range;
240
111217b3 241 memset (zerobuf, 0, sizeof (zerobuf));
1b3f6016 242
dfb64f85 243 for (range = 0; range < N_GREGS_RANGES; range++)
493e2a69
MS
244 for (i = gregs_ranges[range].regno_start;
245 i <= gregs_ranges[range].regno_end; i++)
dfb64f85 246 if (sparc_regmap[i] != -1)
442ea881 247 supply_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
dfb64f85 248 else
442ea881 249 supply_register (regcache, i, zerobuf);
1b3f6016 250
442ea881 251 sparc_store_gregset_from_stack (regcache, buf);
dfb64f85
DJ
252}
253
254static void
442ea881 255sparc_store_fpregset (struct regcache *regcache, const void *buf)
dfb64f85
DJ
256{
257 int i;
258 int range;
1b3f6016 259
dfb64f85 260 for (range = 0; range < N_FPREGS_RANGES; range++)
442ea881
PA
261 for (i = fpregs_ranges[range].regno_start;
262 i <= fpregs_ranges[range].regno_end;
263 i++)
264 supply_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
dfb64f85
DJ
265}
266
dd373349 267static const gdb_byte sparc_breakpoint[INSN_SIZE] = {
493e2a69
MS
268 0x91, 0xd0, 0x20, 0x01
269};
dfb64f85
DJ
270#define sparc_breakpoint_len INSN_SIZE
271
3ca4edb6 272/* Implementation of target ops method "sw_breakpoint_from_kind". */
dd373349 273
3ca4edb6
TBA
274const gdb_byte *
275sparc_target::sw_breakpoint_from_kind (int kind, int *size)
dd373349
AT
276{
277 *size = sparc_breakpoint_len;
278 return sparc_breakpoint;
279}
dfb64f85
DJ
280
281static int
282sparc_breakpoint_at (CORE_ADDR where)
283{
284 unsigned char insn[INSN_SIZE];
285
52405d85 286 the_target->read_memory (where, (unsigned char *) insn, sizeof (insn));
1b3f6016 287
111217b3 288 if (memcmp (sparc_breakpoint, insn, sizeof (insn)) == 0)
dfb64f85
DJ
289 return 1;
290
493e2a69
MS
291 /* If necessary, recognize more trap instructions here. GDB only
292 uses TRAP Always. */
dfb64f85
DJ
293
294 return 0;
295}
296
797bcff5
TBA
297void
298sparc_target::low_arch_setup ()
3aee8918
PA
299{
300 current_process ()->tdesc = tdesc_sparc64;
301}
dfb64f85 302
3aee8918 303static struct regset_info sparc_regsets[] = {
1570b33e 304 { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
dfb64f85
DJ
305 GENERAL_REGS,
306 sparc_fill_gregset, sparc_store_gregset },
1570b33e 307 { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (fpregset_t),
dfb64f85
DJ
308 FP_REGS,
309 sparc_fill_fpregset, sparc_store_fpregset },
50bc912a 310 NULL_REGSET
dfb64f85
DJ
311};
312
3aee8918
PA
313static struct regsets_info sparc_regsets_info =
314 {
315 sparc_regsets, /* regsets */
316 0, /* num_regsets */
317 NULL, /* disabled_regsets */
318 };
319
320static struct usrregs_info sparc_usrregs_info =
321 {
322 sparc_num_regs,
323 /* No regmap needs to be provided since this impl. doesn't use
324 USRREGS. */
325 NULL
326 };
327
aa8d21c9 328static struct regs_info myregs_info =
3aee8918
PA
329 {
330 NULL, /* regset_bitmap */
331 &sparc_usrregs_info,
332 &sparc_regsets_info
333 };
334
aa8d21c9
TBA
335const regs_info *
336sparc_target::get_regs_info ()
3aee8918 337{
aa8d21c9 338 return &myregs_info;
3aee8918
PA
339}
340
dfb64f85 341struct linux_target_ops the_low_target = {
dfb64f85
DJ
342 0,
343 sparc_breakpoint_at,
802e8e6d 344 NULL, /* supports_z_point_type */
dfb64f85
DJ
345 NULL, NULL, NULL, NULL,
346 NULL, NULL
347};
3aee8918 348
ef0478f6
TBA
349/* The linux target ops object. */
350
351linux_process_target *the_linux_target = &the_sparc_target;
352
3aee8918
PA
353void
354initialize_low_arch (void)
355{
356 /* Initialize the Linux target descriptions. */
357 init_registers_sparc64 ();
358
359 initialize_regsets_info (&sparc_regsets_info);
360}
This page took 0.982878 seconds and 4 git commands to generate.