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4a657b0d DK |
1 | // arm.cc -- arm target support for gold. |
2 | ||
b10d2873 | 3 | // Copyright 2009, 2010 Free Software Foundation, Inc. |
4a657b0d DK |
4 | // Written by Doug Kwan <dougkwan@google.com> based on the i386 code |
5 | // by Ian Lance Taylor <iant@google.com>. | |
b569affa DK |
6 | // This file also contains borrowed and adapted code from |
7 | // bfd/elf32-arm.c. | |
4a657b0d DK |
8 | |
9 | // This file is part of gold. | |
10 | ||
11 | // This program is free software; you can redistribute it and/or modify | |
12 | // it under the terms of the GNU General Public License as published by | |
13 | // the Free Software Foundation; either version 3 of the License, or | |
14 | // (at your option) any later version. | |
15 | ||
16 | // This program is distributed in the hope that it will be useful, | |
17 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | // GNU General Public License for more details. | |
20 | ||
21 | // You should have received a copy of the GNU General Public License | |
22 | // along with this program; if not, write to the Free Software | |
23 | // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
24 | // MA 02110-1301, USA. | |
25 | ||
26 | #include "gold.h" | |
27 | ||
28 | #include <cstring> | |
29 | #include <limits> | |
30 | #include <cstdio> | |
31 | #include <string> | |
56ee5e00 | 32 | #include <algorithm> |
41263c05 DK |
33 | #include <map> |
34 | #include <utility> | |
2b328d4e | 35 | #include <set> |
4a657b0d DK |
36 | |
37 | #include "elfcpp.h" | |
38 | #include "parameters.h" | |
39 | #include "reloc.h" | |
40 | #include "arm.h" | |
41 | #include "object.h" | |
42 | #include "symtab.h" | |
43 | #include "layout.h" | |
44 | #include "output.h" | |
45 | #include "copy-relocs.h" | |
46 | #include "target.h" | |
47 | #include "target-reloc.h" | |
48 | #include "target-select.h" | |
49 | #include "tls.h" | |
50 | #include "defstd.h" | |
f345227a | 51 | #include "gc.h" |
a0351a69 | 52 | #include "attributes.h" |
4a657b0d DK |
53 | |
54 | namespace | |
55 | { | |
56 | ||
57 | using namespace gold; | |
58 | ||
94cdfcff DK |
59 | template<bool big_endian> |
60 | class Output_data_plt_arm; | |
61 | ||
56ee5e00 DK |
62 | template<bool big_endian> |
63 | class Stub_table; | |
64 | ||
65 | template<bool big_endian> | |
66 | class Arm_input_section; | |
67 | ||
af2cdeae DK |
68 | class Arm_exidx_cantunwind; |
69 | ||
70 | class Arm_exidx_merged_section; | |
71 | ||
80d0d023 DK |
72 | class Arm_exidx_fixup; |
73 | ||
07f508a2 DK |
74 | template<bool big_endian> |
75 | class Arm_output_section; | |
76 | ||
993d07c1 DK |
77 | class Arm_exidx_input_section; |
78 | ||
07f508a2 DK |
79 | template<bool big_endian> |
80 | class Arm_relobj; | |
81 | ||
b569affa DK |
82 | template<bool big_endian> |
83 | class Target_arm; | |
84 | ||
85 | // For convenience. | |
86 | typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address; | |
87 | ||
88 | // Maximum branch offsets for ARM, THUMB and THUMB2. | |
89 | const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8); | |
90 | const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8); | |
91 | const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4); | |
92 | const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4); | |
93 | const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4); | |
94 | const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4); | |
95 | ||
4a657b0d DK |
96 | // The arm target class. |
97 | // | |
98 | // This is a very simple port of gold for ARM-EABI. It is intended for | |
b10d2873 | 99 | // supporting Android only for the time being. |
4a657b0d | 100 | // |
4a657b0d | 101 | // TODOs: |
b10d2873 ILT |
102 | // - Support the following relocation types as needed: |
103 | // R_ARM_SBREL32 | |
104 | // R_ARM_THM_PC8 | |
105 | // R_ARM_LDR_SBREL_11_0_NC | |
106 | // R_ARM_ALU_SBREL_19_12_NC | |
107 | // R_ARM_ALU_SBREL_27_20_CK | |
108 | // R_ARM_SBREL31 | |
109 | // R_ARM_THM_ALU_PREL_11_0 | |
110 | // R_ARM_THM_PC12 | |
111 | // R_ARM_REL32_NOI | |
b10d2873 ILT |
112 | // R_ARM_PLT32_ABS |
113 | // R_ARM_GOT_ABS | |
114 | // R_ARM_GOT_BREL12 | |
115 | // R_ARM_GOTOFF12 | |
116 | // R_ARM_TLS_GD32 | |
117 | // R_ARM_TLS_LDM32 | |
118 | // R_ARM_TLS_LDO32 | |
119 | // R_ARM_TLS_IE32 | |
120 | // R_ARM_TLS_LE32 | |
121 | // R_ARM_TLS_LDO12 | |
122 | // R_ARM_TLS_LE12 | |
123 | // R_ARM_TLS_IE12GP | |
124 | // | |
94cdfcff DK |
125 | // - Make PLTs more flexible for different architecture features like |
126 | // Thumb-2 and BE8. | |
11af873f | 127 | // There are probably a lot more. |
4a657b0d | 128 | |
b569affa DK |
129 | // Instruction template class. This class is similar to the insn_sequence |
130 | // struct in bfd/elf32-arm.c. | |
131 | ||
132 | class Insn_template | |
133 | { | |
134 | public: | |
135 | // Types of instruction templates. | |
136 | enum Type | |
137 | { | |
138 | THUMB16_TYPE = 1, | |
bb0d3eb0 DK |
139 | // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction |
140 | // templates with class-specific semantics. Currently this is used | |
141 | // only by the Cortex_a8_stub class for handling condition codes in | |
142 | // conditional branches. | |
143 | THUMB16_SPECIAL_TYPE, | |
b569affa DK |
144 | THUMB32_TYPE, |
145 | ARM_TYPE, | |
146 | DATA_TYPE | |
147 | }; | |
148 | ||
bb0d3eb0 | 149 | // Factory methods to create instruction templates in different formats. |
b569affa DK |
150 | |
151 | static const Insn_template | |
152 | thumb16_insn(uint32_t data) | |
153 | { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); } | |
154 | ||
bb0d3eb0 DK |
155 | // A Thumb conditional branch, in which the proper condition is inserted |
156 | // when we build the stub. | |
b569affa DK |
157 | static const Insn_template |
158 | thumb16_bcond_insn(uint32_t data) | |
bb0d3eb0 | 159 | { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); } |
b569affa DK |
160 | |
161 | static const Insn_template | |
162 | thumb32_insn(uint32_t data) | |
163 | { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); } | |
164 | ||
165 | static const Insn_template | |
166 | thumb32_b_insn(uint32_t data, int reloc_addend) | |
167 | { | |
168 | return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24, | |
169 | reloc_addend); | |
170 | } | |
171 | ||
172 | static const Insn_template | |
173 | arm_insn(uint32_t data) | |
174 | { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); } | |
175 | ||
176 | static const Insn_template | |
177 | arm_rel_insn(unsigned data, int reloc_addend) | |
178 | { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); } | |
179 | ||
180 | static const Insn_template | |
181 | data_word(unsigned data, unsigned int r_type, int reloc_addend) | |
182 | { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); } | |
183 | ||
184 | // Accessors. This class is used for read-only objects so no modifiers | |
185 | // are provided. | |
186 | ||
187 | uint32_t | |
188 | data() const | |
189 | { return this->data_; } | |
190 | ||
191 | // Return the instruction sequence type of this. | |
192 | Type | |
193 | type() const | |
194 | { return this->type_; } | |
195 | ||
196 | // Return the ARM relocation type of this. | |
197 | unsigned int | |
198 | r_type() const | |
199 | { return this->r_type_; } | |
200 | ||
201 | int32_t | |
202 | reloc_addend() const | |
203 | { return this->reloc_addend_; } | |
204 | ||
bb0d3eb0 | 205 | // Return size of instruction template in bytes. |
b569affa DK |
206 | size_t |
207 | size() const; | |
208 | ||
bb0d3eb0 | 209 | // Return byte-alignment of instruction template. |
b569affa DK |
210 | unsigned |
211 | alignment() const; | |
212 | ||
213 | private: | |
214 | // We make the constructor private to ensure that only the factory | |
215 | // methods are used. | |
216 | inline | |
2ea97941 ILT |
217 | Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend) |
218 | : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend) | |
b569affa DK |
219 | { } |
220 | ||
221 | // Instruction specific data. This is used to store information like | |
222 | // some of the instruction bits. | |
223 | uint32_t data_; | |
224 | // Instruction template type. | |
225 | Type type_; | |
226 | // Relocation type if there is a relocation or R_ARM_NONE otherwise. | |
227 | unsigned int r_type_; | |
228 | // Relocation addend. | |
229 | int32_t reloc_addend_; | |
230 | }; | |
231 | ||
232 | // Macro for generating code to stub types. One entry per long/short | |
233 | // branch stub | |
234 | ||
235 | #define DEF_STUBS \ | |
236 | DEF_STUB(long_branch_any_any) \ | |
237 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
238 | DEF_STUB(long_branch_thumb_only) \ | |
239 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
240 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
241 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
242 | DEF_STUB(long_branch_any_arm_pic) \ | |
243 | DEF_STUB(long_branch_any_thumb_pic) \ | |
244 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
245 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
246 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
247 | DEF_STUB(long_branch_thumb_only_pic) \ | |
248 | DEF_STUB(a8_veneer_b_cond) \ | |
249 | DEF_STUB(a8_veneer_b) \ | |
250 | DEF_STUB(a8_veneer_bl) \ | |
a2162063 ILT |
251 | DEF_STUB(a8_veneer_blx) \ |
252 | DEF_STUB(v4_veneer_bx) | |
b569affa DK |
253 | |
254 | // Stub types. | |
255 | ||
256 | #define DEF_STUB(x) arm_stub_##x, | |
257 | typedef enum | |
258 | { | |
259 | arm_stub_none, | |
260 | DEF_STUBS | |
261 | ||
262 | // First reloc stub type. | |
263 | arm_stub_reloc_first = arm_stub_long_branch_any_any, | |
264 | // Last reloc stub type. | |
265 | arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic, | |
266 | ||
267 | // First Cortex-A8 stub type. | |
268 | arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond, | |
269 | // Last Cortex-A8 stub type. | |
270 | arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx, | |
271 | ||
272 | // Last stub type. | |
a2162063 | 273 | arm_stub_type_last = arm_stub_v4_veneer_bx |
b569affa DK |
274 | } Stub_type; |
275 | #undef DEF_STUB | |
276 | ||
277 | // Stub template class. Templates are meant to be read-only objects. | |
278 | // A stub template for a stub type contains all read-only attributes | |
279 | // common to all stubs of the same type. | |
280 | ||
281 | class Stub_template | |
282 | { | |
283 | public: | |
284 | Stub_template(Stub_type, const Insn_template*, size_t); | |
285 | ||
286 | ~Stub_template() | |
287 | { } | |
288 | ||
289 | // Return stub type. | |
290 | Stub_type | |
291 | type() const | |
292 | { return this->type_; } | |
293 | ||
294 | // Return an array of instruction templates. | |
295 | const Insn_template* | |
296 | insns() const | |
297 | { return this->insns_; } | |
298 | ||
299 | // Return size of template in number of instructions. | |
300 | size_t | |
301 | insn_count() const | |
302 | { return this->insn_count_; } | |
303 | ||
304 | // Return size of template in bytes. | |
305 | size_t | |
306 | size() const | |
307 | { return this->size_; } | |
308 | ||
309 | // Return alignment of the stub template. | |
310 | unsigned | |
311 | alignment() const | |
312 | { return this->alignment_; } | |
313 | ||
314 | // Return whether entry point is in thumb mode. | |
315 | bool | |
316 | entry_in_thumb_mode() const | |
317 | { return this->entry_in_thumb_mode_; } | |
318 | ||
319 | // Return number of relocations in this template. | |
320 | size_t | |
321 | reloc_count() const | |
322 | { return this->relocs_.size(); } | |
323 | ||
324 | // Return index of the I-th instruction with relocation. | |
325 | size_t | |
326 | reloc_insn_index(size_t i) const | |
327 | { | |
328 | gold_assert(i < this->relocs_.size()); | |
329 | return this->relocs_[i].first; | |
330 | } | |
331 | ||
332 | // Return the offset of the I-th instruction with relocation from the | |
333 | // beginning of the stub. | |
334 | section_size_type | |
335 | reloc_offset(size_t i) const | |
336 | { | |
337 | gold_assert(i < this->relocs_.size()); | |
338 | return this->relocs_[i].second; | |
339 | } | |
340 | ||
341 | private: | |
342 | // This contains information about an instruction template with a relocation | |
343 | // and its offset from start of stub. | |
344 | typedef std::pair<size_t, section_size_type> Reloc; | |
345 | ||
346 | // A Stub_template may not be copied. We want to share templates as much | |
347 | // as possible. | |
348 | Stub_template(const Stub_template&); | |
349 | Stub_template& operator=(const Stub_template&); | |
350 | ||
351 | // Stub type. | |
352 | Stub_type type_; | |
353 | // Points to an array of Insn_templates. | |
354 | const Insn_template* insns_; | |
355 | // Number of Insn_templates in insns_[]. | |
356 | size_t insn_count_; | |
357 | // Size of templated instructions in bytes. | |
358 | size_t size_; | |
359 | // Alignment of templated instructions. | |
360 | unsigned alignment_; | |
361 | // Flag to indicate if entry is in thumb mode. | |
362 | bool entry_in_thumb_mode_; | |
363 | // A table of reloc instruction indices and offsets. We can find these by | |
364 | // looking at the instruction templates but we pre-compute and then stash | |
365 | // them here for speed. | |
366 | std::vector<Reloc> relocs_; | |
367 | }; | |
368 | ||
369 | // | |
370 | // A class for code stubs. This is a base class for different type of | |
371 | // stubs used in the ARM target. | |
372 | // | |
373 | ||
374 | class Stub | |
375 | { | |
376 | private: | |
377 | static const section_offset_type invalid_offset = | |
378 | static_cast<section_offset_type>(-1); | |
379 | ||
380 | public: | |
2ea97941 ILT |
381 | Stub(const Stub_template* stub_template) |
382 | : stub_template_(stub_template), offset_(invalid_offset) | |
b569affa DK |
383 | { } |
384 | ||
385 | virtual | |
386 | ~Stub() | |
387 | { } | |
388 | ||
389 | // Return the stub template. | |
390 | const Stub_template* | |
391 | stub_template() const | |
392 | { return this->stub_template_; } | |
393 | ||
394 | // Return offset of code stub from beginning of its containing stub table. | |
395 | section_offset_type | |
396 | offset() const | |
397 | { | |
398 | gold_assert(this->offset_ != invalid_offset); | |
399 | return this->offset_; | |
400 | } | |
401 | ||
402 | // Set offset of code stub from beginning of its containing stub table. | |
403 | void | |
2ea97941 ILT |
404 | set_offset(section_offset_type offset) |
405 | { this->offset_ = offset; } | |
b569affa DK |
406 | |
407 | // Return the relocation target address of the i-th relocation in the | |
408 | // stub. This must be defined in a child class. | |
409 | Arm_address | |
410 | reloc_target(size_t i) | |
411 | { return this->do_reloc_target(i); } | |
412 | ||
413 | // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written. | |
414 | void | |
415 | write(unsigned char* view, section_size_type view_size, bool big_endian) | |
416 | { this->do_write(view, view_size, big_endian); } | |
417 | ||
bb0d3eb0 DK |
418 | // Return the instruction for THUMB16_SPECIAL_TYPE instruction template |
419 | // for the i-th instruction. | |
420 | uint16_t | |
421 | thumb16_special(size_t i) | |
422 | { return this->do_thumb16_special(i); } | |
423 | ||
b569affa DK |
424 | protected: |
425 | // This must be defined in the child class. | |
426 | virtual Arm_address | |
427 | do_reloc_target(size_t) = 0; | |
428 | ||
bb0d3eb0 | 429 | // This may be overridden in the child class. |
b569affa | 430 | virtual void |
bb0d3eb0 DK |
431 | do_write(unsigned char* view, section_size_type view_size, bool big_endian) |
432 | { | |
433 | if (big_endian) | |
434 | this->do_fixed_endian_write<true>(view, view_size); | |
435 | else | |
436 | this->do_fixed_endian_write<false>(view, view_size); | |
437 | } | |
b569affa | 438 | |
bb0d3eb0 DK |
439 | // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE |
440 | // instruction template. | |
441 | virtual uint16_t | |
442 | do_thumb16_special(size_t) | |
443 | { gold_unreachable(); } | |
444 | ||
b569affa | 445 | private: |
bb0d3eb0 DK |
446 | // A template to implement do_write. |
447 | template<bool big_endian> | |
448 | void inline | |
449 | do_fixed_endian_write(unsigned char*, section_size_type); | |
450 | ||
b569affa DK |
451 | // Its template. |
452 | const Stub_template* stub_template_; | |
453 | // Offset within the section of containing this stub. | |
454 | section_offset_type offset_; | |
455 | }; | |
456 | ||
457 | // Reloc stub class. These are stubs we use to fix up relocation because | |
458 | // of limited branch ranges. | |
459 | ||
460 | class Reloc_stub : public Stub | |
461 | { | |
462 | public: | |
463 | static const unsigned int invalid_index = static_cast<unsigned int>(-1); | |
464 | // We assume we never jump to this address. | |
465 | static const Arm_address invalid_address = static_cast<Arm_address>(-1); | |
466 | ||
467 | // Return destination address. | |
468 | Arm_address | |
469 | destination_address() const | |
470 | { | |
471 | gold_assert(this->destination_address_ != this->invalid_address); | |
472 | return this->destination_address_; | |
473 | } | |
474 | ||
475 | // Set destination address. | |
476 | void | |
477 | set_destination_address(Arm_address address) | |
478 | { | |
479 | gold_assert(address != this->invalid_address); | |
480 | this->destination_address_ = address; | |
481 | } | |
482 | ||
483 | // Reset destination address. | |
484 | void | |
485 | reset_destination_address() | |
486 | { this->destination_address_ = this->invalid_address; } | |
487 | ||
488 | // Determine stub type for a branch of a relocation of R_TYPE going | |
489 | // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set, | |
490 | // the branch target is a thumb instruction. TARGET is used for look | |
491 | // up ARM-specific linker settings. | |
492 | static Stub_type | |
493 | stub_type_for_reloc(unsigned int r_type, Arm_address branch_address, | |
494 | Arm_address branch_target, bool target_is_thumb); | |
495 | ||
496 | // Reloc_stub key. A key is logically a triplet of a stub type, a symbol | |
497 | // and an addend. Since we treat global and local symbol differently, we | |
498 | // use a Symbol object for a global symbol and a object-index pair for | |
499 | // a local symbol. | |
500 | class Key | |
501 | { | |
502 | public: | |
503 | // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and | |
504 | // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL | |
505 | // and R_SYM must not be invalid_index. | |
2ea97941 ILT |
506 | Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj, |
507 | unsigned int r_sym, int32_t addend) | |
508 | : stub_type_(stub_type), addend_(addend) | |
b569affa | 509 | { |
2ea97941 | 510 | if (symbol != NULL) |
b569affa DK |
511 | { |
512 | this->r_sym_ = Reloc_stub::invalid_index; | |
2ea97941 | 513 | this->u_.symbol = symbol; |
b569affa DK |
514 | } |
515 | else | |
516 | { | |
2ea97941 ILT |
517 | gold_assert(relobj != NULL && r_sym != invalid_index); |
518 | this->r_sym_ = r_sym; | |
519 | this->u_.relobj = relobj; | |
b569affa DK |
520 | } |
521 | } | |
522 | ||
523 | ~Key() | |
524 | { } | |
525 | ||
526 | // Accessors: Keys are meant to be read-only object so no modifiers are | |
527 | // provided. | |
528 | ||
529 | // Return stub type. | |
530 | Stub_type | |
531 | stub_type() const | |
532 | { return this->stub_type_; } | |
533 | ||
534 | // Return the local symbol index or invalid_index. | |
535 | unsigned int | |
536 | r_sym() const | |
537 | { return this->r_sym_; } | |
538 | ||
539 | // Return the symbol if there is one. | |
540 | const Symbol* | |
541 | symbol() const | |
542 | { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; } | |
543 | ||
544 | // Return the relobj if there is one. | |
545 | const Relobj* | |
546 | relobj() const | |
547 | { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; } | |
548 | ||
549 | // Whether this equals to another key k. | |
550 | bool | |
551 | eq(const Key& k) const | |
552 | { | |
553 | return ((this->stub_type_ == k.stub_type_) | |
554 | && (this->r_sym_ == k.r_sym_) | |
555 | && ((this->r_sym_ != Reloc_stub::invalid_index) | |
556 | ? (this->u_.relobj == k.u_.relobj) | |
557 | : (this->u_.symbol == k.u_.symbol)) | |
558 | && (this->addend_ == k.addend_)); | |
559 | } | |
560 | ||
561 | // Return a hash value. | |
562 | size_t | |
563 | hash_value() const | |
564 | { | |
565 | return (this->stub_type_ | |
566 | ^ this->r_sym_ | |
567 | ^ gold::string_hash<char>( | |
568 | (this->r_sym_ != Reloc_stub::invalid_index) | |
569 | ? this->u_.relobj->name().c_str() | |
570 | : this->u_.symbol->name()) | |
571 | ^ this->addend_); | |
572 | } | |
573 | ||
574 | // Functors for STL associative containers. | |
575 | struct hash | |
576 | { | |
577 | size_t | |
578 | operator()(const Key& k) const | |
579 | { return k.hash_value(); } | |
580 | }; | |
581 | ||
582 | struct equal_to | |
583 | { | |
584 | bool | |
585 | operator()(const Key& k1, const Key& k2) const | |
586 | { return k1.eq(k2); } | |
587 | }; | |
588 | ||
589 | // Name of key. This is mainly for debugging. | |
590 | std::string | |
591 | name() const; | |
592 | ||
593 | private: | |
594 | // Stub type. | |
595 | Stub_type stub_type_; | |
596 | // If this is a local symbol, this is the index in the defining object. | |
597 | // Otherwise, it is invalid_index for a global symbol. | |
598 | unsigned int r_sym_; | |
599 | // If r_sym_ is invalid index. This points to a global symbol. | |
600 | // Otherwise, this points a relobj. We used the unsized and target | |
eb44217c | 601 | // independent Symbol and Relobj classes instead of Sized_symbol<32> and |
b569affa DK |
602 | // Arm_relobj. This is done to avoid making the stub class a template |
603 | // as most of the stub machinery is endianity-neutral. However, it | |
604 | // may require a bit of casting done by users of this class. | |
605 | union | |
606 | { | |
607 | const Symbol* symbol; | |
608 | const Relobj* relobj; | |
609 | } u_; | |
610 | // Addend associated with a reloc. | |
611 | int32_t addend_; | |
612 | }; | |
613 | ||
614 | protected: | |
615 | // Reloc_stubs are created via a stub factory. So these are protected. | |
2ea97941 ILT |
616 | Reloc_stub(const Stub_template* stub_template) |
617 | : Stub(stub_template), destination_address_(invalid_address) | |
b569affa DK |
618 | { } |
619 | ||
620 | ~Reloc_stub() | |
621 | { } | |
622 | ||
623 | friend class Stub_factory; | |
624 | ||
b569affa DK |
625 | // Return the relocation target address of the i-th relocation in the |
626 | // stub. | |
627 | Arm_address | |
628 | do_reloc_target(size_t i) | |
629 | { | |
630 | // All reloc stub have only one relocation. | |
631 | gold_assert(i == 0); | |
632 | return this->destination_address_; | |
633 | } | |
634 | ||
bb0d3eb0 DK |
635 | private: |
636 | // Address of destination. | |
637 | Arm_address destination_address_; | |
638 | }; | |
b569affa | 639 | |
bb0d3eb0 DK |
640 | // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit |
641 | // THUMB branch that meets the following conditions: | |
642 | // | |
643 | // 1. The branch straddles across a page boundary. i.e. lower 12-bit of | |
644 | // branch address is 0xffe. | |
645 | // 2. The branch target address is in the same page as the first word of the | |
646 | // branch. | |
647 | // 3. The branch follows a 32-bit instruction which is not a branch. | |
648 | // | |
649 | // To do the fix up, we need to store the address of the branch instruction | |
650 | // and its target at least. We also need to store the original branch | |
651 | // instruction bits for the condition code in a conditional branch. The | |
652 | // condition code is used in a special instruction template. We also want | |
653 | // to identify input sections needing Cortex-A8 workaround quickly. We store | |
654 | // extra information about object and section index of the code section | |
655 | // containing a branch being fixed up. The information is used to mark | |
656 | // the code section when we finalize the Cortex-A8 stubs. | |
657 | // | |
b569affa | 658 | |
bb0d3eb0 DK |
659 | class Cortex_a8_stub : public Stub |
660 | { | |
661 | public: | |
662 | ~Cortex_a8_stub() | |
663 | { } | |
664 | ||
665 | // Return the object of the code section containing the branch being fixed | |
666 | // up. | |
667 | Relobj* | |
668 | relobj() const | |
669 | { return this->relobj_; } | |
670 | ||
671 | // Return the section index of the code section containing the branch being | |
672 | // fixed up. | |
673 | unsigned int | |
674 | shndx() const | |
675 | { return this->shndx_; } | |
676 | ||
677 | // Return the source address of stub. This is the address of the original | |
678 | // branch instruction. LSB is 1 always set to indicate that it is a THUMB | |
679 | // instruction. | |
680 | Arm_address | |
681 | source_address() const | |
682 | { return this->source_address_; } | |
683 | ||
684 | // Return the destination address of the stub. This is the branch taken | |
685 | // address of the original branch instruction. LSB is 1 if it is a THUMB | |
686 | // instruction address. | |
687 | Arm_address | |
688 | destination_address() const | |
689 | { return this->destination_address_; } | |
690 | ||
691 | // Return the instruction being fixed up. | |
692 | uint32_t | |
693 | original_insn() const | |
694 | { return this->original_insn_; } | |
695 | ||
696 | protected: | |
697 | // Cortex_a8_stubs are created via a stub factory. So these are protected. | |
698 | Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj, | |
699 | unsigned int shndx, Arm_address source_address, | |
700 | Arm_address destination_address, uint32_t original_insn) | |
701 | : Stub(stub_template), relobj_(relobj), shndx_(shndx), | |
702 | source_address_(source_address | 1U), | |
703 | destination_address_(destination_address), | |
704 | original_insn_(original_insn) | |
705 | { } | |
706 | ||
707 | friend class Stub_factory; | |
708 | ||
709 | // Return the relocation target address of the i-th relocation in the | |
710 | // stub. | |
711 | Arm_address | |
712 | do_reloc_target(size_t i) | |
713 | { | |
714 | if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond) | |
715 | { | |
716 | // The conditional branch veneer has two relocations. | |
717 | gold_assert(i < 2); | |
718 | return i == 0 ? this->source_address_ + 4 : this->destination_address_; | |
719 | } | |
720 | else | |
721 | { | |
722 | // All other Cortex-A8 stubs have only one relocation. | |
723 | gold_assert(i == 0); | |
724 | return this->destination_address_; | |
725 | } | |
726 | } | |
727 | ||
728 | // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template. | |
729 | uint16_t | |
730 | do_thumb16_special(size_t); | |
731 | ||
732 | private: | |
733 | // Object of the code section containing the branch being fixed up. | |
734 | Relobj* relobj_; | |
735 | // Section index of the code section containing the branch begin fixed up. | |
736 | unsigned int shndx_; | |
737 | // Source address of original branch. | |
738 | Arm_address source_address_; | |
739 | // Destination address of the original branch. | |
b569affa | 740 | Arm_address destination_address_; |
bb0d3eb0 DK |
741 | // Original branch instruction. This is needed for copying the condition |
742 | // code from a condition branch to its stub. | |
743 | uint32_t original_insn_; | |
b569affa DK |
744 | }; |
745 | ||
a2162063 ILT |
746 | // ARMv4 BX Rx branch relocation stub class. |
747 | class Arm_v4bx_stub : public Stub | |
748 | { | |
749 | public: | |
750 | ~Arm_v4bx_stub() | |
751 | { } | |
752 | ||
753 | // Return the associated register. | |
754 | uint32_t | |
755 | reg() const | |
756 | { return this->reg_; } | |
757 | ||
758 | protected: | |
759 | // Arm V4BX stubs are created via a stub factory. So these are protected. | |
760 | Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg) | |
761 | : Stub(stub_template), reg_(reg) | |
762 | { } | |
763 | ||
764 | friend class Stub_factory; | |
765 | ||
766 | // Return the relocation target address of the i-th relocation in the | |
767 | // stub. | |
768 | Arm_address | |
769 | do_reloc_target(size_t) | |
770 | { gold_unreachable(); } | |
771 | ||
772 | // This may be overridden in the child class. | |
773 | virtual void | |
774 | do_write(unsigned char* view, section_size_type view_size, bool big_endian) | |
775 | { | |
776 | if (big_endian) | |
777 | this->do_fixed_endian_v4bx_write<true>(view, view_size); | |
778 | else | |
779 | this->do_fixed_endian_v4bx_write<false>(view, view_size); | |
780 | } | |
781 | ||
782 | private: | |
783 | // A template to implement do_write. | |
784 | template<bool big_endian> | |
785 | void inline | |
786 | do_fixed_endian_v4bx_write(unsigned char* view, section_size_type) | |
787 | { | |
788 | const Insn_template* insns = this->stub_template()->insns(); | |
789 | elfcpp::Swap<32, big_endian>::writeval(view, | |
790 | (insns[0].data() | |
791 | + (this->reg_ << 16))); | |
792 | view += insns[0].size(); | |
793 | elfcpp::Swap<32, big_endian>::writeval(view, | |
794 | (insns[1].data() + this->reg_)); | |
795 | view += insns[1].size(); | |
796 | elfcpp::Swap<32, big_endian>::writeval(view, | |
797 | (insns[2].data() + this->reg_)); | |
798 | } | |
799 | ||
800 | // A register index (r0-r14), which is associated with the stub. | |
801 | uint32_t reg_; | |
802 | }; | |
803 | ||
b569affa DK |
804 | // Stub factory class. |
805 | ||
806 | class Stub_factory | |
807 | { | |
808 | public: | |
809 | // Return the unique instance of this class. | |
810 | static const Stub_factory& | |
811 | get_instance() | |
812 | { | |
813 | static Stub_factory singleton; | |
814 | return singleton; | |
815 | } | |
816 | ||
817 | // Make a relocation stub. | |
818 | Reloc_stub* | |
819 | make_reloc_stub(Stub_type stub_type) const | |
820 | { | |
821 | gold_assert(stub_type >= arm_stub_reloc_first | |
822 | && stub_type <= arm_stub_reloc_last); | |
823 | return new Reloc_stub(this->stub_templates_[stub_type]); | |
824 | } | |
825 | ||
bb0d3eb0 DK |
826 | // Make a Cortex-A8 stub. |
827 | Cortex_a8_stub* | |
828 | make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx, | |
829 | Arm_address source, Arm_address destination, | |
830 | uint32_t original_insn) const | |
831 | { | |
832 | gold_assert(stub_type >= arm_stub_cortex_a8_first | |
833 | && stub_type <= arm_stub_cortex_a8_last); | |
834 | return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx, | |
835 | source, destination, original_insn); | |
836 | } | |
837 | ||
a2162063 ILT |
838 | // Make an ARM V4BX relocation stub. |
839 | // This method creates a stub from the arm_stub_v4_veneer_bx template only. | |
840 | Arm_v4bx_stub* | |
841 | make_arm_v4bx_stub(uint32_t reg) const | |
842 | { | |
843 | gold_assert(reg < 0xf); | |
844 | return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx], | |
845 | reg); | |
846 | } | |
847 | ||
b569affa DK |
848 | private: |
849 | // Constructor and destructor are protected since we only return a single | |
850 | // instance created in Stub_factory::get_instance(). | |
851 | ||
852 | Stub_factory(); | |
853 | ||
854 | // A Stub_factory may not be copied since it is a singleton. | |
855 | Stub_factory(const Stub_factory&); | |
856 | Stub_factory& operator=(Stub_factory&); | |
857 | ||
858 | // Stub templates. These are initialized in the constructor. | |
859 | const Stub_template* stub_templates_[arm_stub_type_last+1]; | |
860 | }; | |
861 | ||
56ee5e00 DK |
862 | // A class to hold stubs for the ARM target. |
863 | ||
864 | template<bool big_endian> | |
865 | class Stub_table : public Output_data | |
866 | { | |
867 | public: | |
2ea97941 | 868 | Stub_table(Arm_input_section<big_endian>* owner) |
2fb7225c | 869 | : Output_data(), owner_(owner), reloc_stubs_(), cortex_a8_stubs_(), |
a2162063 | 870 | arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1) |
56ee5e00 DK |
871 | { } |
872 | ||
873 | ~Stub_table() | |
874 | { } | |
875 | ||
876 | // Owner of this stub table. | |
877 | Arm_input_section<big_endian>* | |
878 | owner() const | |
879 | { return this->owner_; } | |
880 | ||
881 | // Whether this stub table is empty. | |
882 | bool | |
883 | empty() const | |
a2162063 ILT |
884 | { |
885 | return (this->reloc_stubs_.empty() | |
886 | && this->cortex_a8_stubs_.empty() | |
887 | && this->arm_v4bx_stubs_.empty()); | |
888 | } | |
56ee5e00 DK |
889 | |
890 | // Return the current data size. | |
891 | off_t | |
892 | current_data_size() const | |
893 | { return this->current_data_size_for_child(); } | |
894 | ||
895 | // Add a STUB with using KEY. Caller is reponsible for avoid adding | |
896 | // if already a STUB with the same key has been added. | |
897 | void | |
2fb7225c DK |
898 | add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key) |
899 | { | |
900 | const Stub_template* stub_template = stub->stub_template(); | |
901 | gold_assert(stub_template->type() == key.stub_type()); | |
902 | this->reloc_stubs_[key] = stub; | |
903 | } | |
904 | ||
905 | // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS. | |
906 | // Caller is reponsible for avoid adding if already a STUB with the same | |
907 | // address has been added. | |
908 | void | |
909 | add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub) | |
910 | { | |
911 | std::pair<Arm_address, Cortex_a8_stub*> value(address, stub); | |
912 | this->cortex_a8_stubs_.insert(value); | |
913 | } | |
914 | ||
a2162063 ILT |
915 | // Add an ARM V4BX relocation stub. A register index will be retrieved |
916 | // from the stub. | |
917 | void | |
918 | add_arm_v4bx_stub(Arm_v4bx_stub* stub) | |
919 | { | |
920 | gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL); | |
921 | this->arm_v4bx_stubs_[stub->reg()] = stub; | |
922 | } | |
923 | ||
2fb7225c DK |
924 | // Remove all Cortex-A8 stubs. |
925 | void | |
926 | remove_all_cortex_a8_stubs(); | |
56ee5e00 DK |
927 | |
928 | // Look up a relocation stub using KEY. Return NULL if there is none. | |
929 | Reloc_stub* | |
930 | find_reloc_stub(const Reloc_stub::Key& key) const | |
931 | { | |
932 | typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key); | |
933 | return (p != this->reloc_stubs_.end()) ? p->second : NULL; | |
934 | } | |
935 | ||
a2162063 ILT |
936 | // Look up an arm v4bx relocation stub using the register index. |
937 | // Return NULL if there is none. | |
938 | Arm_v4bx_stub* | |
939 | find_arm_v4bx_stub(const uint32_t reg) const | |
940 | { | |
941 | gold_assert(reg < 0xf); | |
942 | return this->arm_v4bx_stubs_[reg]; | |
943 | } | |
944 | ||
56ee5e00 DK |
945 | // Relocate stubs in this stub table. |
946 | void | |
947 | relocate_stubs(const Relocate_info<32, big_endian>*, | |
948 | Target_arm<big_endian>*, Output_section*, | |
949 | unsigned char*, Arm_address, section_size_type); | |
950 | ||
2fb7225c DK |
951 | // Update data size and alignment at the end of a relaxation pass. Return |
952 | // true if either data size or alignment is different from that of the | |
953 | // previous relaxation pass. | |
954 | bool | |
955 | update_data_size_and_addralign(); | |
956 | ||
957 | // Finalize stubs. Set the offsets of all stubs and mark input sections | |
958 | // needing the Cortex-A8 workaround. | |
959 | void | |
960 | finalize_stubs(); | |
961 | ||
962 | // Apply Cortex-A8 workaround to an address range. | |
963 | void | |
964 | apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*, | |
965 | unsigned char*, Arm_address, | |
966 | section_size_type); | |
967 | ||
56ee5e00 DK |
968 | protected: |
969 | // Write out section contents. | |
970 | void | |
971 | do_write(Output_file*); | |
972 | ||
973 | // Return the required alignment. | |
974 | uint64_t | |
975 | do_addralign() const | |
2fb7225c | 976 | { return this->prev_addralign_; } |
56ee5e00 DK |
977 | |
978 | // Reset address and file offset. | |
979 | void | |
2fb7225c DK |
980 | do_reset_address_and_file_offset() |
981 | { this->set_current_data_size_for_child(this->prev_data_size_); } | |
56ee5e00 | 982 | |
2fb7225c DK |
983 | // Set final data size. |
984 | void | |
985 | set_final_data_size() | |
986 | { this->set_data_size(this->current_data_size()); } | |
987 | ||
56ee5e00 | 988 | private: |
2fb7225c DK |
989 | // Relocate one stub. |
990 | void | |
991 | relocate_stub(Stub*, const Relocate_info<32, big_endian>*, | |
992 | Target_arm<big_endian>*, Output_section*, | |
993 | unsigned char*, Arm_address, section_size_type); | |
994 | ||
995 | // Unordered map of relocation stubs. | |
56ee5e00 DK |
996 | typedef |
997 | Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash, | |
998 | Reloc_stub::Key::equal_to> | |
999 | Reloc_stub_map; | |
1000 | ||
2fb7225c DK |
1001 | // List of Cortex-A8 stubs ordered by addresses of branches being |
1002 | // fixed up in output. | |
1003 | typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list; | |
a2162063 ILT |
1004 | // List of Arm V4BX relocation stubs ordered by associated registers. |
1005 | typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list; | |
2fb7225c | 1006 | |
56ee5e00 DK |
1007 | // Owner of this stub table. |
1008 | Arm_input_section<big_endian>* owner_; | |
56ee5e00 DK |
1009 | // The relocation stubs. |
1010 | Reloc_stub_map reloc_stubs_; | |
2fb7225c DK |
1011 | // The cortex_a8_stubs. |
1012 | Cortex_a8_stub_list cortex_a8_stubs_; | |
a2162063 ILT |
1013 | // The Arm V4BX relocation stubs. |
1014 | Arm_v4bx_stub_list arm_v4bx_stubs_; | |
2fb7225c DK |
1015 | // data size of this in the previous pass. |
1016 | off_t prev_data_size_; | |
1017 | // address alignment of this in the previous pass. | |
1018 | uint64_t prev_addralign_; | |
56ee5e00 DK |
1019 | }; |
1020 | ||
af2cdeae DK |
1021 | // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry |
1022 | // we add to the end of an EXIDX input section that goes into the output. | |
1023 | ||
1024 | class Arm_exidx_cantunwind : public Output_section_data | |
1025 | { | |
1026 | public: | |
1027 | Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx) | |
1028 | : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx) | |
1029 | { } | |
1030 | ||
1031 | // Return the object containing the section pointed by this. | |
1032 | Relobj* | |
1033 | relobj() const | |
1034 | { return this->relobj_; } | |
1035 | ||
1036 | // Return the section index of the section pointed by this. | |
1037 | unsigned int | |
1038 | shndx() const | |
1039 | { return this->shndx_; } | |
1040 | ||
1041 | protected: | |
1042 | void | |
1043 | do_write(Output_file* of) | |
1044 | { | |
1045 | if (parameters->target().is_big_endian()) | |
1046 | this->do_fixed_endian_write<true>(of); | |
1047 | else | |
1048 | this->do_fixed_endian_write<false>(of); | |
1049 | } | |
1050 | ||
1051 | private: | |
1052 | // Implement do_write for a given endianity. | |
1053 | template<bool big_endian> | |
1054 | void inline | |
1055 | do_fixed_endian_write(Output_file*); | |
1056 | ||
1057 | // The object containing the section pointed by this. | |
1058 | Relobj* relobj_; | |
1059 | // The section index of the section pointed by this. | |
1060 | unsigned int shndx_; | |
1061 | }; | |
1062 | ||
1063 | // During EXIDX coverage fix-up, we compact an EXIDX section. The | |
1064 | // Offset map is used to map input section offset within the EXIDX section | |
1065 | // to the output offset from the start of this EXIDX section. | |
1066 | ||
1067 | typedef std::map<section_offset_type, section_offset_type> | |
1068 | Arm_exidx_section_offset_map; | |
1069 | ||
1070 | // Arm_exidx_merged_section class. This represents an EXIDX input section | |
1071 | // with some of its entries merged. | |
1072 | ||
1073 | class Arm_exidx_merged_section : public Output_relaxed_input_section | |
1074 | { | |
1075 | public: | |
1076 | // Constructor for Arm_exidx_merged_section. | |
1077 | // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. | |
1078 | // SECTION_OFFSET_MAP points to a section offset map describing how | |
1079 | // parts of the input section are mapped to output. DELETED_BYTES is | |
1080 | // the number of bytes deleted from the EXIDX input section. | |
1081 | Arm_exidx_merged_section( | |
1082 | const Arm_exidx_input_section& exidx_input_section, | |
1083 | const Arm_exidx_section_offset_map& section_offset_map, | |
1084 | uint32_t deleted_bytes); | |
1085 | ||
1086 | // Return the original EXIDX input section. | |
1087 | const Arm_exidx_input_section& | |
1088 | exidx_input_section() const | |
1089 | { return this->exidx_input_section_; } | |
1090 | ||
1091 | // Return the section offset map. | |
1092 | const Arm_exidx_section_offset_map& | |
1093 | section_offset_map() const | |
1094 | { return this->section_offset_map_; } | |
1095 | ||
1096 | protected: | |
1097 | // Write merged section into file OF. | |
1098 | void | |
1099 | do_write(Output_file* of); | |
1100 | ||
1101 | bool | |
1102 | do_output_offset(const Relobj*, unsigned int, section_offset_type, | |
1103 | section_offset_type*) const; | |
1104 | ||
1105 | private: | |
1106 | // Original EXIDX input section. | |
1107 | const Arm_exidx_input_section& exidx_input_section_; | |
1108 | // Section offset map. | |
1109 | const Arm_exidx_section_offset_map& section_offset_map_; | |
1110 | }; | |
1111 | ||
10ad9fe5 DK |
1112 | // A class to wrap an ordinary input section containing executable code. |
1113 | ||
1114 | template<bool big_endian> | |
1115 | class Arm_input_section : public Output_relaxed_input_section | |
1116 | { | |
1117 | public: | |
2ea97941 ILT |
1118 | Arm_input_section(Relobj* relobj, unsigned int shndx) |
1119 | : Output_relaxed_input_section(relobj, shndx, 1), | |
10ad9fe5 DK |
1120 | original_addralign_(1), original_size_(0), stub_table_(NULL) |
1121 | { } | |
1122 | ||
1123 | ~Arm_input_section() | |
1124 | { } | |
1125 | ||
1126 | // Initialize. | |
1127 | void | |
1128 | init(); | |
1129 | ||
1130 | // Whether this is a stub table owner. | |
1131 | bool | |
1132 | is_stub_table_owner() const | |
1133 | { return this->stub_table_ != NULL && this->stub_table_->owner() == this; } | |
1134 | ||
1135 | // Return the stub table. | |
1136 | Stub_table<big_endian>* | |
1137 | stub_table() const | |
1138 | { return this->stub_table_; } | |
1139 | ||
1140 | // Set the stub_table. | |
1141 | void | |
2ea97941 ILT |
1142 | set_stub_table(Stub_table<big_endian>* stub_table) |
1143 | { this->stub_table_ = stub_table; } | |
10ad9fe5 | 1144 | |
07f508a2 DK |
1145 | // Downcast a base pointer to an Arm_input_section pointer. This is |
1146 | // not type-safe but we only use Arm_input_section not the base class. | |
1147 | static Arm_input_section<big_endian>* | |
1148 | as_arm_input_section(Output_relaxed_input_section* poris) | |
1149 | { return static_cast<Arm_input_section<big_endian>*>(poris); } | |
1150 | ||
10ad9fe5 DK |
1151 | protected: |
1152 | // Write data to output file. | |
1153 | void | |
1154 | do_write(Output_file*); | |
1155 | ||
1156 | // Return required alignment of this. | |
1157 | uint64_t | |
1158 | do_addralign() const | |
1159 | { | |
1160 | if (this->is_stub_table_owner()) | |
1161 | return std::max(this->stub_table_->addralign(), | |
1162 | this->original_addralign_); | |
1163 | else | |
1164 | return this->original_addralign_; | |
1165 | } | |
1166 | ||
1167 | // Finalize data size. | |
1168 | void | |
1169 | set_final_data_size(); | |
1170 | ||
1171 | // Reset address and file offset. | |
1172 | void | |
1173 | do_reset_address_and_file_offset(); | |
1174 | ||
1175 | // Output offset. | |
1176 | bool | |
2ea97941 ILT |
1177 | do_output_offset(const Relobj* object, unsigned int shndx, |
1178 | section_offset_type offset, | |
10ad9fe5 DK |
1179 | section_offset_type* poutput) const |
1180 | { | |
1181 | if ((object == this->relobj()) | |
2ea97941 ILT |
1182 | && (shndx == this->shndx()) |
1183 | && (offset >= 0) | |
1184 | && (convert_types<uint64_t, section_offset_type>(offset) | |
10ad9fe5 DK |
1185 | <= this->original_size_)) |
1186 | { | |
2ea97941 | 1187 | *poutput = offset; |
10ad9fe5 DK |
1188 | return true; |
1189 | } | |
1190 | else | |
1191 | return false; | |
1192 | } | |
1193 | ||
1194 | private: | |
1195 | // Copying is not allowed. | |
1196 | Arm_input_section(const Arm_input_section&); | |
1197 | Arm_input_section& operator=(const Arm_input_section&); | |
1198 | ||
1199 | // Address alignment of the original input section. | |
1200 | uint64_t original_addralign_; | |
1201 | // Section size of the original input section. | |
1202 | uint64_t original_size_; | |
1203 | // Stub table. | |
1204 | Stub_table<big_endian>* stub_table_; | |
1205 | }; | |
1206 | ||
80d0d023 DK |
1207 | // Arm_exidx_fixup class. This is used to define a number of methods |
1208 | // and keep states for fixing up EXIDX coverage. | |
1209 | ||
1210 | class Arm_exidx_fixup | |
1211 | { | |
1212 | public: | |
1213 | Arm_exidx_fixup(Output_section* exidx_output_section) | |
1214 | : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE), | |
1215 | last_inlined_entry_(0), last_input_section_(NULL), | |
1216 | section_offset_map_(NULL) | |
1217 | { } | |
1218 | ||
1219 | ~Arm_exidx_fixup() | |
1220 | { delete this->section_offset_map_; } | |
1221 | ||
1222 | // Process an EXIDX section for entry merging. Return number of bytes to | |
1223 | // be deleted in output. If parts of the input EXIDX section are merged | |
1224 | // a heap allocated Arm_exidx_section_offset_map is store in the located | |
1225 | // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for | |
1226 | // releasing it. | |
1227 | template<bool big_endian> | |
1228 | uint32_t | |
1229 | process_exidx_section(const Arm_exidx_input_section* exidx_input_section, | |
1230 | Arm_exidx_section_offset_map** psection_offset_map); | |
1231 | ||
1232 | // Append an EXIDX_CANTUNWIND entry pointing at the end of the last | |
1233 | // input section, if there is not one already. | |
1234 | void | |
1235 | add_exidx_cantunwind_as_needed(); | |
1236 | ||
1237 | private: | |
1238 | // Copying is not allowed. | |
1239 | Arm_exidx_fixup(const Arm_exidx_fixup&); | |
1240 | Arm_exidx_fixup& operator=(const Arm_exidx_fixup&); | |
1241 | ||
1242 | // Type of EXIDX unwind entry. | |
1243 | enum Unwind_type | |
1244 | { | |
1245 | // No type. | |
1246 | UT_NONE, | |
1247 | // EXIDX_CANTUNWIND. | |
1248 | UT_EXIDX_CANTUNWIND, | |
1249 | // Inlined entry. | |
1250 | UT_INLINED_ENTRY, | |
1251 | // Normal entry. | |
1252 | UT_NORMAL_ENTRY, | |
1253 | }; | |
1254 | ||
1255 | // Process an EXIDX entry. We only care about the second word of the | |
1256 | // entry. Return true if the entry can be deleted. | |
1257 | bool | |
1258 | process_exidx_entry(uint32_t second_word); | |
1259 | ||
1260 | // Update the current section offset map during EXIDX section fix-up. | |
1261 | // If there is no map, create one. INPUT_OFFSET is the offset of a | |
1262 | // reference point, DELETED_BYTES is the number of deleted by in the | |
1263 | // section so far. If DELETE_ENTRY is true, the reference point and | |
1264 | // all offsets after the previous reference point are discarded. | |
1265 | void | |
1266 | update_offset_map(section_offset_type input_offset, | |
1267 | section_size_type deleted_bytes, bool delete_entry); | |
1268 | ||
1269 | // EXIDX output section. | |
1270 | Output_section* exidx_output_section_; | |
1271 | // Unwind type of the last EXIDX entry processed. | |
1272 | Unwind_type last_unwind_type_; | |
1273 | // Last seen inlined EXIDX entry. | |
1274 | uint32_t last_inlined_entry_; | |
1275 | // Last processed EXIDX input section. | |
2b328d4e | 1276 | const Arm_exidx_input_section* last_input_section_; |
80d0d023 DK |
1277 | // Section offset map created in process_exidx_section. |
1278 | Arm_exidx_section_offset_map* section_offset_map_; | |
1279 | }; | |
1280 | ||
07f508a2 DK |
1281 | // Arm output section class. This is defined mainly to add a number of |
1282 | // stub generation methods. | |
1283 | ||
1284 | template<bool big_endian> | |
1285 | class Arm_output_section : public Output_section | |
1286 | { | |
1287 | public: | |
2b328d4e DK |
1288 | typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list; |
1289 | ||
2ea97941 ILT |
1290 | Arm_output_section(const char* name, elfcpp::Elf_Word type, |
1291 | elfcpp::Elf_Xword flags) | |
1292 | : Output_section(name, type, flags) | |
07f508a2 DK |
1293 | { } |
1294 | ||
1295 | ~Arm_output_section() | |
1296 | { } | |
1297 | ||
1298 | // Group input sections for stub generation. | |
1299 | void | |
1300 | group_sections(section_size_type, bool, Target_arm<big_endian>*); | |
1301 | ||
1302 | // Downcast a base pointer to an Arm_output_section pointer. This is | |
1303 | // not type-safe but we only use Arm_output_section not the base class. | |
1304 | static Arm_output_section<big_endian>* | |
1305 | as_arm_output_section(Output_section* os) | |
1306 | { return static_cast<Arm_output_section<big_endian>*>(os); } | |
1307 | ||
2b328d4e DK |
1308 | // Append all input text sections in this into LIST. |
1309 | void | |
1310 | append_text_sections_to_list(Text_section_list* list); | |
1311 | ||
1312 | // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION | |
1313 | // is a list of text input sections sorted in ascending order of their | |
1314 | // output addresses. | |
1315 | void | |
1316 | fix_exidx_coverage(const Text_section_list& sorted_text_section, | |
1317 | Symbol_table* symtab); | |
1318 | ||
07f508a2 DK |
1319 | private: |
1320 | // For convenience. | |
1321 | typedef Output_section::Input_section Input_section; | |
1322 | typedef Output_section::Input_section_list Input_section_list; | |
1323 | ||
1324 | // Create a stub group. | |
1325 | void create_stub_group(Input_section_list::const_iterator, | |
1326 | Input_section_list::const_iterator, | |
1327 | Input_section_list::const_iterator, | |
1328 | Target_arm<big_endian>*, | |
1329 | std::vector<Output_relaxed_input_section*>*); | |
1330 | }; | |
1331 | ||
993d07c1 DK |
1332 | // Arm_exidx_input_section class. This represents an EXIDX input section. |
1333 | ||
1334 | class Arm_exidx_input_section | |
1335 | { | |
1336 | public: | |
1337 | static const section_offset_type invalid_offset = | |
1338 | static_cast<section_offset_type>(-1); | |
1339 | ||
1340 | Arm_exidx_input_section(Relobj* relobj, unsigned int shndx, | |
1341 | unsigned int link, uint32_t size, uint32_t addralign) | |
1342 | : relobj_(relobj), shndx_(shndx), link_(link), size_(size), | |
1343 | addralign_(addralign) | |
1344 | { } | |
1345 | ||
1346 | ~Arm_exidx_input_section() | |
1347 | { } | |
1348 | ||
1349 | // Accessors: This is a read-only class. | |
1350 | ||
1351 | // Return the object containing this EXIDX input section. | |
1352 | Relobj* | |
1353 | relobj() const | |
1354 | { return this->relobj_; } | |
1355 | ||
1356 | // Return the section index of this EXIDX input section. | |
1357 | unsigned int | |
1358 | shndx() const | |
1359 | { return this->shndx_; } | |
1360 | ||
1361 | // Return the section index of linked text section in the same object. | |
1362 | unsigned int | |
1363 | link() const | |
1364 | { return this->link_; } | |
1365 | ||
1366 | // Return size of the EXIDX input section. | |
1367 | uint32_t | |
1368 | size() const | |
1369 | { return this->size_; } | |
1370 | ||
1371 | // Reutnr address alignment of EXIDX input section. | |
1372 | uint32_t | |
1373 | addralign() const | |
1374 | { return this->addralign_; } | |
1375 | ||
1376 | private: | |
1377 | // Object containing this. | |
1378 | Relobj* relobj_; | |
1379 | // Section index of this. | |
1380 | unsigned int shndx_; | |
1381 | // text section linked to this in the same object. | |
1382 | unsigned int link_; | |
1383 | // Size of this. For ARM 32-bit is sufficient. | |
1384 | uint32_t size_; | |
1385 | // Address alignment of this. For ARM 32-bit is sufficient. | |
1386 | uint32_t addralign_; | |
1387 | }; | |
1388 | ||
8ffa3667 DK |
1389 | // Arm_relobj class. |
1390 | ||
1391 | template<bool big_endian> | |
1392 | class Arm_relobj : public Sized_relobj<32, big_endian> | |
1393 | { | |
1394 | public: | |
1395 | static const Arm_address invalid_address = static_cast<Arm_address>(-1); | |
1396 | ||
2ea97941 | 1397 | Arm_relobj(const std::string& name, Input_file* input_file, off_t offset, |
8ffa3667 | 1398 | const typename elfcpp::Ehdr<32, big_endian>& ehdr) |
2ea97941 | 1399 | : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr), |
a0351a69 | 1400 | stub_tables_(), local_symbol_is_thumb_function_(), |
20138696 | 1401 | attributes_section_data_(NULL), mapping_symbols_info_(), |
e7eca48c DK |
1402 | section_has_cortex_a8_workaround_(NULL), exidx_section_map_(), |
1403 | output_local_symbol_count_needs_update_(false) | |
8ffa3667 DK |
1404 | { } |
1405 | ||
1406 | ~Arm_relobj() | |
a0351a69 | 1407 | { delete this->attributes_section_data_; } |
8ffa3667 DK |
1408 | |
1409 | // Return the stub table of the SHNDX-th section if there is one. | |
1410 | Stub_table<big_endian>* | |
2ea97941 | 1411 | stub_table(unsigned int shndx) const |
8ffa3667 | 1412 | { |
2ea97941 ILT |
1413 | gold_assert(shndx < this->stub_tables_.size()); |
1414 | return this->stub_tables_[shndx]; | |
8ffa3667 DK |
1415 | } |
1416 | ||
1417 | // Set STUB_TABLE to be the stub_table of the SHNDX-th section. | |
1418 | void | |
2ea97941 | 1419 | set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table) |
8ffa3667 | 1420 | { |
2ea97941 ILT |
1421 | gold_assert(shndx < this->stub_tables_.size()); |
1422 | this->stub_tables_[shndx] = stub_table; | |
8ffa3667 DK |
1423 | } |
1424 | ||
1425 | // Whether a local symbol is a THUMB function. R_SYM is the symbol table | |
1426 | // index. This is only valid after do_count_local_symbol is called. | |
1427 | bool | |
1428 | local_symbol_is_thumb_function(unsigned int r_sym) const | |
1429 | { | |
1430 | gold_assert(r_sym < this->local_symbol_is_thumb_function_.size()); | |
1431 | return this->local_symbol_is_thumb_function_[r_sym]; | |
1432 | } | |
1433 | ||
1434 | // Scan all relocation sections for stub generation. | |
1435 | void | |
1436 | scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*, | |
1437 | const Layout*); | |
1438 | ||
1439 | // Convert regular input section with index SHNDX to a relaxed section. | |
1440 | void | |
2ea97941 | 1441 | convert_input_section_to_relaxed_section(unsigned shndx) |
8ffa3667 DK |
1442 | { |
1443 | // The stubs have relocations and we need to process them after writing | |
1444 | // out the stubs. So relocation now must follow section write. | |
2b328d4e | 1445 | this->set_section_offset(shndx, -1ULL); |
8ffa3667 DK |
1446 | this->set_relocs_must_follow_section_writes(); |
1447 | } | |
1448 | ||
1449 | // Downcast a base pointer to an Arm_relobj pointer. This is | |
1450 | // not type-safe but we only use Arm_relobj not the base class. | |
1451 | static Arm_relobj<big_endian>* | |
2ea97941 ILT |
1452 | as_arm_relobj(Relobj* relobj) |
1453 | { return static_cast<Arm_relobj<big_endian>*>(relobj); } | |
8ffa3667 | 1454 | |
d5b40221 DK |
1455 | // Processor-specific flags in ELF file header. This is valid only after |
1456 | // reading symbols. | |
1457 | elfcpp::Elf_Word | |
1458 | processor_specific_flags() const | |
1459 | { return this->processor_specific_flags_; } | |
1460 | ||
a0351a69 DK |
1461 | // Attribute section data This is the contents of the .ARM.attribute section |
1462 | // if there is one. | |
1463 | const Attributes_section_data* | |
1464 | attributes_section_data() const | |
1465 | { return this->attributes_section_data_; } | |
1466 | ||
20138696 DK |
1467 | // Mapping symbol location. |
1468 | typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position; | |
1469 | ||
1470 | // Functor for STL container. | |
1471 | struct Mapping_symbol_position_less | |
1472 | { | |
1473 | bool | |
1474 | operator()(const Mapping_symbol_position& p1, | |
1475 | const Mapping_symbol_position& p2) const | |
1476 | { | |
1477 | return (p1.first < p2.first | |
1478 | || (p1.first == p2.first && p1.second < p2.second)); | |
1479 | } | |
1480 | }; | |
1481 | ||
1482 | // We only care about the first character of a mapping symbol, so | |
1483 | // we only store that instead of the whole symbol name. | |
1484 | typedef std::map<Mapping_symbol_position, char, | |
1485 | Mapping_symbol_position_less> Mapping_symbols_info; | |
1486 | ||
2fb7225c DK |
1487 | // Whether a section contains any Cortex-A8 workaround. |
1488 | bool | |
1489 | section_has_cortex_a8_workaround(unsigned int shndx) const | |
1490 | { | |
1491 | return (this->section_has_cortex_a8_workaround_ != NULL | |
1492 | && (*this->section_has_cortex_a8_workaround_)[shndx]); | |
1493 | } | |
1494 | ||
1495 | // Mark a section that has Cortex-A8 workaround. | |
1496 | void | |
1497 | mark_section_for_cortex_a8_workaround(unsigned int shndx) | |
1498 | { | |
1499 | if (this->section_has_cortex_a8_workaround_ == NULL) | |
1500 | this->section_has_cortex_a8_workaround_ = | |
1501 | new std::vector<bool>(this->shnum(), false); | |
1502 | (*this->section_has_cortex_a8_workaround_)[shndx] = true; | |
1503 | } | |
1504 | ||
993d07c1 DK |
1505 | // Return the EXIDX section of an text section with index SHNDX or NULL |
1506 | // if the text section has no associated EXIDX section. | |
1507 | const Arm_exidx_input_section* | |
1508 | exidx_input_section_by_link(unsigned int shndx) const | |
1509 | { | |
1510 | Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); | |
1511 | return ((p != this->exidx_section_map_.end() | |
1512 | && p->second->link() == shndx) | |
1513 | ? p->second | |
1514 | : NULL); | |
1515 | } | |
1516 | ||
1517 | // Return the EXIDX section with index SHNDX or NULL if there is none. | |
1518 | const Arm_exidx_input_section* | |
1519 | exidx_input_section_by_shndx(unsigned shndx) const | |
1520 | { | |
1521 | Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); | |
1522 | return ((p != this->exidx_section_map_.end() | |
1523 | && p->second->shndx() == shndx) | |
1524 | ? p->second | |
1525 | : NULL); | |
1526 | } | |
1527 | ||
e7eca48c DK |
1528 | // Whether output local symbol count needs updating. |
1529 | bool | |
1530 | output_local_symbol_count_needs_update() const | |
1531 | { return this->output_local_symbol_count_needs_update_; } | |
1532 | ||
1533 | // Set output_local_symbol_count_needs_update flag to be true. | |
1534 | void | |
1535 | set_output_local_symbol_count_needs_update() | |
1536 | { this->output_local_symbol_count_needs_update_ = true; } | |
1537 | ||
1538 | // Update output local symbol count at the end of relaxation. | |
1539 | void | |
1540 | update_output_local_symbol_count(); | |
1541 | ||
8ffa3667 DK |
1542 | protected: |
1543 | // Post constructor setup. | |
1544 | void | |
1545 | do_setup() | |
1546 | { | |
1547 | // Call parent's setup method. | |
1548 | Sized_relobj<32, big_endian>::do_setup(); | |
1549 | ||
1550 | // Initialize look-up tables. | |
1551 | Stub_table_list empty_stub_table_list(this->shnum(), NULL); | |
1552 | this->stub_tables_.swap(empty_stub_table_list); | |
1553 | } | |
1554 | ||
1555 | // Count the local symbols. | |
1556 | void | |
1557 | do_count_local_symbols(Stringpool_template<char>*, | |
1558 | Stringpool_template<char>*); | |
1559 | ||
1560 | void | |
43d12afe | 1561 | do_relocate_sections(const Symbol_table* symtab, const Layout* layout, |
8ffa3667 DK |
1562 | const unsigned char* pshdrs, |
1563 | typename Sized_relobj<32, big_endian>::Views* pivews); | |
1564 | ||
d5b40221 DK |
1565 | // Read the symbol information. |
1566 | void | |
1567 | do_read_symbols(Read_symbols_data* sd); | |
1568 | ||
99e5bff2 DK |
1569 | // Process relocs for garbage collection. |
1570 | void | |
1571 | do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*); | |
1572 | ||
8ffa3667 | 1573 | private: |
44272192 DK |
1574 | |
1575 | // Whether a section needs to be scanned for relocation stubs. | |
1576 | bool | |
1577 | section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&, | |
1578 | const Relobj::Output_sections&, | |
2b328d4e | 1579 | const Symbol_table *, const unsigned char*); |
44272192 DK |
1580 | |
1581 | // Whether a section needs to be scanned for the Cortex-A8 erratum. | |
1582 | bool | |
1583 | section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&, | |
1584 | unsigned int, Output_section*, | |
1585 | const Symbol_table *); | |
1586 | ||
1587 | // Scan a section for the Cortex-A8 erratum. | |
1588 | void | |
1589 | scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&, | |
1590 | unsigned int, Output_section*, | |
1591 | Target_arm<big_endian>*); | |
1592 | ||
993d07c1 DK |
1593 | // Make a new Arm_exidx_input_section object for EXIDX section with |
1594 | // index SHNDX and section header SHDR. | |
1595 | void | |
1596 | make_exidx_input_section(unsigned int shndx, | |
1597 | const elfcpp::Shdr<32, big_endian>& shdr); | |
1598 | ||
8ffa3667 | 1599 | typedef std::vector<Stub_table<big_endian>*> Stub_table_list; |
993d07c1 DK |
1600 | typedef Unordered_map<unsigned int, const Arm_exidx_input_section*> |
1601 | Exidx_section_map; | |
1602 | ||
1603 | // List of stub tables. | |
8ffa3667 DK |
1604 | Stub_table_list stub_tables_; |
1605 | // Bit vector to tell if a local symbol is a thumb function or not. | |
1606 | // This is only valid after do_count_local_symbol is called. | |
1607 | std::vector<bool> local_symbol_is_thumb_function_; | |
d5b40221 DK |
1608 | // processor-specific flags in ELF file header. |
1609 | elfcpp::Elf_Word processor_specific_flags_; | |
a0351a69 DK |
1610 | // Object attributes if there is an .ARM.attributes section or NULL. |
1611 | Attributes_section_data* attributes_section_data_; | |
20138696 DK |
1612 | // Mapping symbols information. |
1613 | Mapping_symbols_info mapping_symbols_info_; | |
2fb7225c DK |
1614 | // Bitmap to indicate sections with Cortex-A8 workaround or NULL. |
1615 | std::vector<bool>* section_has_cortex_a8_workaround_; | |
993d07c1 DK |
1616 | // Map a text section to its associated .ARM.exidx section, if there is one. |
1617 | Exidx_section_map exidx_section_map_; | |
e7eca48c DK |
1618 | // Whether output local symbol count needs updating. |
1619 | bool output_local_symbol_count_needs_update_; | |
d5b40221 DK |
1620 | }; |
1621 | ||
1622 | // Arm_dynobj class. | |
1623 | ||
1624 | template<bool big_endian> | |
1625 | class Arm_dynobj : public Sized_dynobj<32, big_endian> | |
1626 | { | |
1627 | public: | |
2ea97941 | 1628 | Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset, |
d5b40221 | 1629 | const elfcpp::Ehdr<32, big_endian>& ehdr) |
2ea97941 ILT |
1630 | : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr), |
1631 | processor_specific_flags_(0), attributes_section_data_(NULL) | |
d5b40221 DK |
1632 | { } |
1633 | ||
1634 | ~Arm_dynobj() | |
a0351a69 | 1635 | { delete this->attributes_section_data_; } |
d5b40221 DK |
1636 | |
1637 | // Downcast a base pointer to an Arm_relobj pointer. This is | |
1638 | // not type-safe but we only use Arm_relobj not the base class. | |
1639 | static Arm_dynobj<big_endian>* | |
1640 | as_arm_dynobj(Dynobj* dynobj) | |
1641 | { return static_cast<Arm_dynobj<big_endian>*>(dynobj); } | |
1642 | ||
1643 | // Processor-specific flags in ELF file header. This is valid only after | |
1644 | // reading symbols. | |
1645 | elfcpp::Elf_Word | |
1646 | processor_specific_flags() const | |
1647 | { return this->processor_specific_flags_; } | |
1648 | ||
a0351a69 DK |
1649 | // Attributes section data. |
1650 | const Attributes_section_data* | |
1651 | attributes_section_data() const | |
1652 | { return this->attributes_section_data_; } | |
1653 | ||
d5b40221 DK |
1654 | protected: |
1655 | // Read the symbol information. | |
1656 | void | |
1657 | do_read_symbols(Read_symbols_data* sd); | |
1658 | ||
1659 | private: | |
1660 | // processor-specific flags in ELF file header. | |
1661 | elfcpp::Elf_Word processor_specific_flags_; | |
a0351a69 DK |
1662 | // Object attributes if there is an .ARM.attributes section or NULL. |
1663 | Attributes_section_data* attributes_section_data_; | |
8ffa3667 DK |
1664 | }; |
1665 | ||
e9bbb538 DK |
1666 | // Functor to read reloc addends during stub generation. |
1667 | ||
1668 | template<int sh_type, bool big_endian> | |
1669 | struct Stub_addend_reader | |
1670 | { | |
1671 | // Return the addend for a relocation of a particular type. Depending | |
1672 | // on whether this is a REL or RELA relocation, read the addend from a | |
1673 | // view or from a Reloc object. | |
1674 | elfcpp::Elf_types<32>::Elf_Swxword | |
1675 | operator()( | |
1676 | unsigned int /* r_type */, | |
1677 | const unsigned char* /* view */, | |
1678 | const typename Reloc_types<sh_type, | |
ebd95253 | 1679 | 32, big_endian>::Reloc& /* reloc */) const; |
e9bbb538 DK |
1680 | }; |
1681 | ||
1682 | // Specialized Stub_addend_reader for SHT_REL type relocation sections. | |
1683 | ||
1684 | template<bool big_endian> | |
1685 | struct Stub_addend_reader<elfcpp::SHT_REL, big_endian> | |
1686 | { | |
1687 | elfcpp::Elf_types<32>::Elf_Swxword | |
1688 | operator()( | |
1689 | unsigned int, | |
1690 | const unsigned char*, | |
1691 | const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const; | |
1692 | }; | |
1693 | ||
1694 | // Specialized Stub_addend_reader for RELA type relocation sections. | |
1695 | // We currently do not handle RELA type relocation sections but it is trivial | |
1696 | // to implement the addend reader. This is provided for completeness and to | |
1697 | // make it easier to add support for RELA relocation sections in the future. | |
1698 | ||
1699 | template<bool big_endian> | |
1700 | struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian> | |
1701 | { | |
1702 | elfcpp::Elf_types<32>::Elf_Swxword | |
1703 | operator()( | |
1704 | unsigned int, | |
1705 | const unsigned char*, | |
1706 | const typename Reloc_types<elfcpp::SHT_RELA, 32, | |
ebd95253 DK |
1707 | big_endian>::Reloc& reloc) const |
1708 | { return reloc.get_r_addend(); } | |
e9bbb538 DK |
1709 | }; |
1710 | ||
a120bc7f DK |
1711 | // Cortex_a8_reloc class. We keep record of relocation that may need |
1712 | // the Cortex-A8 erratum workaround. | |
1713 | ||
1714 | class Cortex_a8_reloc | |
1715 | { | |
1716 | public: | |
1717 | Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type, | |
1718 | Arm_address destination) | |
1719 | : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination) | |
1720 | { } | |
1721 | ||
1722 | ~Cortex_a8_reloc() | |
1723 | { } | |
1724 | ||
1725 | // Accessors: This is a read-only class. | |
1726 | ||
1727 | // Return the relocation stub associated with this relocation if there is | |
1728 | // one. | |
1729 | const Reloc_stub* | |
1730 | reloc_stub() const | |
1731 | { return this->reloc_stub_; } | |
1732 | ||
1733 | // Return the relocation type. | |
1734 | unsigned int | |
1735 | r_type() const | |
1736 | { return this->r_type_; } | |
1737 | ||
1738 | // Return the destination address of the relocation. LSB stores the THUMB | |
1739 | // bit. | |
1740 | Arm_address | |
1741 | destination() const | |
1742 | { return this->destination_; } | |
1743 | ||
1744 | private: | |
1745 | // Associated relocation stub if there is one, or NULL. | |
1746 | const Reloc_stub* reloc_stub_; | |
1747 | // Relocation type. | |
1748 | unsigned int r_type_; | |
1749 | // Destination address of this relocation. LSB is used to distinguish | |
1750 | // ARM/THUMB mode. | |
1751 | Arm_address destination_; | |
1752 | }; | |
1753 | ||
c121c671 DK |
1754 | // Utilities for manipulating integers of up to 32-bits |
1755 | ||
1756 | namespace utils | |
1757 | { | |
1758 | // Sign extend an n-bit unsigned integer stored in an uint32_t into | |
1759 | // an int32_t. NO_BITS must be between 1 to 32. | |
1760 | template<int no_bits> | |
1761 | static inline int32_t | |
1762 | sign_extend(uint32_t bits) | |
1763 | { | |
96d49306 | 1764 | gold_assert(no_bits >= 0 && no_bits <= 32); |
c121c671 DK |
1765 | if (no_bits == 32) |
1766 | return static_cast<int32_t>(bits); | |
1767 | uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits); | |
1768 | bits &= mask; | |
1769 | uint32_t top_bit = 1U << (no_bits - 1); | |
1770 | int32_t as_signed = static_cast<int32_t>(bits); | |
1771 | return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed; | |
1772 | } | |
1773 | ||
1774 | // Detects overflow of an NO_BITS integer stored in a uint32_t. | |
1775 | template<int no_bits> | |
1776 | static inline bool | |
1777 | has_overflow(uint32_t bits) | |
1778 | { | |
96d49306 | 1779 | gold_assert(no_bits >= 0 && no_bits <= 32); |
c121c671 DK |
1780 | if (no_bits == 32) |
1781 | return false; | |
1782 | int32_t max = (1 << (no_bits - 1)) - 1; | |
1783 | int32_t min = -(1 << (no_bits - 1)); | |
1784 | int32_t as_signed = static_cast<int32_t>(bits); | |
1785 | return as_signed > max || as_signed < min; | |
1786 | } | |
1787 | ||
5e445df6 ILT |
1788 | // Detects overflow of an NO_BITS integer stored in a uint32_t when it |
1789 | // fits in the given number of bits as either a signed or unsigned value. | |
1790 | // For example, has_signed_unsigned_overflow<8> would check | |
1791 | // -128 <= bits <= 255 | |
1792 | template<int no_bits> | |
1793 | static inline bool | |
1794 | has_signed_unsigned_overflow(uint32_t bits) | |
1795 | { | |
1796 | gold_assert(no_bits >= 2 && no_bits <= 32); | |
1797 | if (no_bits == 32) | |
1798 | return false; | |
1799 | int32_t max = static_cast<int32_t>((1U << no_bits) - 1); | |
1800 | int32_t min = -(1 << (no_bits - 1)); | |
1801 | int32_t as_signed = static_cast<int32_t>(bits); | |
1802 | return as_signed > max || as_signed < min; | |
1803 | } | |
1804 | ||
c121c671 DK |
1805 | // Select bits from A and B using bits in MASK. For each n in [0..31], |
1806 | // the n-th bit in the result is chosen from the n-th bits of A and B. | |
1807 | // A zero selects A and a one selects B. | |
1808 | static inline uint32_t | |
1809 | bit_select(uint32_t a, uint32_t b, uint32_t mask) | |
1810 | { return (a & ~mask) | (b & mask); } | |
1811 | }; | |
1812 | ||
4a657b0d DK |
1813 | template<bool big_endian> |
1814 | class Target_arm : public Sized_target<32, big_endian> | |
1815 | { | |
1816 | public: | |
1817 | typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> | |
1818 | Reloc_section; | |
1819 | ||
2daedcd6 DK |
1820 | // When were are relocating a stub, we pass this as the relocation number. |
1821 | static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1); | |
1822 | ||
a6d1ef57 DK |
1823 | Target_arm() |
1824 | : Sized_target<32, big_endian>(&arm_info), | |
1825 | got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL), | |
1826 | copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), stub_tables_(), | |
a0351a69 DK |
1827 | stub_factory_(Stub_factory::get_instance()), may_use_blx_(false), |
1828 | should_force_pic_veneer_(false), arm_input_section_map_(), | |
a120bc7f | 1829 | attributes_section_data_(NULL), fix_cortex_a8_(false), |
9b2fd367 | 1830 | cortex_a8_relocs_info_() |
a6d1ef57 | 1831 | { } |
4a657b0d | 1832 | |
b569affa DK |
1833 | // Whether we can use BLX. |
1834 | bool | |
1835 | may_use_blx() const | |
1836 | { return this->may_use_blx_; } | |
1837 | ||
1838 | // Set use-BLX flag. | |
1839 | void | |
1840 | set_may_use_blx(bool value) | |
1841 | { this->may_use_blx_ = value; } | |
1842 | ||
1843 | // Whether we force PCI branch veneers. | |
1844 | bool | |
1845 | should_force_pic_veneer() const | |
1846 | { return this->should_force_pic_veneer_; } | |
1847 | ||
1848 | // Set PIC veneer flag. | |
1849 | void | |
1850 | set_should_force_pic_veneer(bool value) | |
1851 | { this->should_force_pic_veneer_ = value; } | |
1852 | ||
1853 | // Whether we use THUMB-2 instructions. | |
1854 | bool | |
1855 | using_thumb2() const | |
1856 | { | |
a0351a69 DK |
1857 | Object_attribute* attr = |
1858 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); | |
1859 | int arch = attr->int_value(); | |
1860 | return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7; | |
b569affa DK |
1861 | } |
1862 | ||
1863 | // Whether we use THUMB/THUMB-2 instructions only. | |
1864 | bool | |
1865 | using_thumb_only() const | |
1866 | { | |
a0351a69 DK |
1867 | Object_attribute* attr = |
1868 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); | |
1869 | if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7 | |
1870 | && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M) | |
1871 | return false; | |
1872 | attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); | |
1873 | return attr->int_value() == 'M'; | |
b569affa DK |
1874 | } |
1875 | ||
d204b6e9 DK |
1876 | // Whether we have an NOP instruction. If not, use mov r0, r0 instead. |
1877 | bool | |
1878 | may_use_arm_nop() const | |
1879 | { | |
a0351a69 DK |
1880 | Object_attribute* attr = |
1881 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); | |
1882 | int arch = attr->int_value(); | |
1883 | return (arch == elfcpp::TAG_CPU_ARCH_V6T2 | |
1884 | || arch == elfcpp::TAG_CPU_ARCH_V6K | |
1885 | || arch == elfcpp::TAG_CPU_ARCH_V7 | |
1886 | || arch == elfcpp::TAG_CPU_ARCH_V7E_M); | |
d204b6e9 DK |
1887 | } |
1888 | ||
51938283 DK |
1889 | // Whether we have THUMB-2 NOP.W instruction. |
1890 | bool | |
1891 | may_use_thumb2_nop() const | |
1892 | { | |
a0351a69 DK |
1893 | Object_attribute* attr = |
1894 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); | |
1895 | int arch = attr->int_value(); | |
1896 | return (arch == elfcpp::TAG_CPU_ARCH_V6T2 | |
1897 | || arch == elfcpp::TAG_CPU_ARCH_V7 | |
1898 | || arch == elfcpp::TAG_CPU_ARCH_V7E_M); | |
51938283 DK |
1899 | } |
1900 | ||
4a657b0d DK |
1901 | // Process the relocations to determine unreferenced sections for |
1902 | // garbage collection. | |
1903 | void | |
ad0f2072 | 1904 | gc_process_relocs(Symbol_table* symtab, |
4a657b0d DK |
1905 | Layout* layout, |
1906 | Sized_relobj<32, big_endian>* object, | |
1907 | unsigned int data_shndx, | |
1908 | unsigned int sh_type, | |
1909 | const unsigned char* prelocs, | |
1910 | size_t reloc_count, | |
1911 | Output_section* output_section, | |
1912 | bool needs_special_offset_handling, | |
1913 | size_t local_symbol_count, | |
1914 | const unsigned char* plocal_symbols); | |
1915 | ||
1916 | // Scan the relocations to look for symbol adjustments. | |
1917 | void | |
ad0f2072 | 1918 | scan_relocs(Symbol_table* symtab, |
4a657b0d DK |
1919 | Layout* layout, |
1920 | Sized_relobj<32, big_endian>* object, | |
1921 | unsigned int data_shndx, | |
1922 | unsigned int sh_type, | |
1923 | const unsigned char* prelocs, | |
1924 | size_t reloc_count, | |
1925 | Output_section* output_section, | |
1926 | bool needs_special_offset_handling, | |
1927 | size_t local_symbol_count, | |
1928 | const unsigned char* plocal_symbols); | |
1929 | ||
1930 | // Finalize the sections. | |
1931 | void | |
f59f41f3 | 1932 | do_finalize_sections(Layout*, const Input_objects*, Symbol_table*); |
4a657b0d | 1933 | |
94cdfcff | 1934 | // Return the value to use for a dynamic symbol which requires special |
4a657b0d DK |
1935 | // treatment. |
1936 | uint64_t | |
1937 | do_dynsym_value(const Symbol*) const; | |
1938 | ||
1939 | // Relocate a section. | |
1940 | void | |
1941 | relocate_section(const Relocate_info<32, big_endian>*, | |
1942 | unsigned int sh_type, | |
1943 | const unsigned char* prelocs, | |
1944 | size_t reloc_count, | |
1945 | Output_section* output_section, | |
1946 | bool needs_special_offset_handling, | |
1947 | unsigned char* view, | |
ebabffbd | 1948 | Arm_address view_address, |
364c7fa5 ILT |
1949 | section_size_type view_size, |
1950 | const Reloc_symbol_changes*); | |
4a657b0d DK |
1951 | |
1952 | // Scan the relocs during a relocatable link. | |
1953 | void | |
ad0f2072 | 1954 | scan_relocatable_relocs(Symbol_table* symtab, |
4a657b0d DK |
1955 | Layout* layout, |
1956 | Sized_relobj<32, big_endian>* object, | |
1957 | unsigned int data_shndx, | |
1958 | unsigned int sh_type, | |
1959 | const unsigned char* prelocs, | |
1960 | size_t reloc_count, | |
1961 | Output_section* output_section, | |
1962 | bool needs_special_offset_handling, | |
1963 | size_t local_symbol_count, | |
1964 | const unsigned char* plocal_symbols, | |
1965 | Relocatable_relocs*); | |
1966 | ||
1967 | // Relocate a section during a relocatable link. | |
1968 | void | |
1969 | relocate_for_relocatable(const Relocate_info<32, big_endian>*, | |
1970 | unsigned int sh_type, | |
1971 | const unsigned char* prelocs, | |
1972 | size_t reloc_count, | |
1973 | Output_section* output_section, | |
1974 | off_t offset_in_output_section, | |
1975 | const Relocatable_relocs*, | |
1976 | unsigned char* view, | |
ebabffbd | 1977 | Arm_address view_address, |
4a657b0d DK |
1978 | section_size_type view_size, |
1979 | unsigned char* reloc_view, | |
1980 | section_size_type reloc_view_size); | |
1981 | ||
1982 | // Return whether SYM is defined by the ABI. | |
1983 | bool | |
1984 | do_is_defined_by_abi(Symbol* sym) const | |
1985 | { return strcmp(sym->name(), "__tls_get_addr") == 0; } | |
1986 | ||
94cdfcff DK |
1987 | // Return the size of the GOT section. |
1988 | section_size_type | |
1989 | got_size() | |
1990 | { | |
1991 | gold_assert(this->got_ != NULL); | |
1992 | return this->got_->data_size(); | |
1993 | } | |
1994 | ||
4a657b0d | 1995 | // Map platform-specific reloc types |
a6d1ef57 DK |
1996 | static unsigned int |
1997 | get_real_reloc_type (unsigned int r_type); | |
4a657b0d | 1998 | |
55da9579 DK |
1999 | // |
2000 | // Methods to support stub-generations. | |
2001 | // | |
2002 | ||
2003 | // Return the stub factory | |
2004 | const Stub_factory& | |
2005 | stub_factory() const | |
2006 | { return this->stub_factory_; } | |
2007 | ||
2008 | // Make a new Arm_input_section object. | |
2009 | Arm_input_section<big_endian>* | |
2010 | new_arm_input_section(Relobj*, unsigned int); | |
2011 | ||
2012 | // Find the Arm_input_section object corresponding to the SHNDX-th input | |
2013 | // section of RELOBJ. | |
2014 | Arm_input_section<big_endian>* | |
2ea97941 | 2015 | find_arm_input_section(Relobj* relobj, unsigned int shndx) const; |
55da9579 DK |
2016 | |
2017 | // Make a new Stub_table | |
2018 | Stub_table<big_endian>* | |
2019 | new_stub_table(Arm_input_section<big_endian>*); | |
2020 | ||
eb44217c DK |
2021 | // Scan a section for stub generation. |
2022 | void | |
2023 | scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int, | |
2024 | const unsigned char*, size_t, Output_section*, | |
2025 | bool, const unsigned char*, Arm_address, | |
2026 | section_size_type); | |
2027 | ||
43d12afe DK |
2028 | // Relocate a stub. |
2029 | void | |
2fb7225c | 2030 | relocate_stub(Stub*, const Relocate_info<32, big_endian>*, |
43d12afe DK |
2031 | Output_section*, unsigned char*, Arm_address, |
2032 | section_size_type); | |
2033 | ||
b569affa | 2034 | // Get the default ARM target. |
43d12afe | 2035 | static Target_arm<big_endian>* |
b569affa DK |
2036 | default_target() |
2037 | { | |
2038 | gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM | |
2039 | && parameters->target().is_big_endian() == big_endian); | |
43d12afe DK |
2040 | return static_cast<Target_arm<big_endian>*>( |
2041 | parameters->sized_target<32, big_endian>()); | |
b569affa DK |
2042 | } |
2043 | ||
55da9579 DK |
2044 | // Whether relocation type uses LSB to distinguish THUMB addresses. |
2045 | static bool | |
2046 | reloc_uses_thumb_bit(unsigned int r_type); | |
2047 | ||
20138696 DK |
2048 | // Whether NAME belongs to a mapping symbol. |
2049 | static bool | |
2050 | is_mapping_symbol_name(const char* name) | |
2051 | { | |
2052 | return (name | |
2053 | && name[0] == '$' | |
2054 | && (name[1] == 'a' || name[1] == 't' || name[1] == 'd') | |
2055 | && (name[2] == '\0' || name[2] == '.')); | |
2056 | } | |
2057 | ||
a120bc7f DK |
2058 | // Whether we work around the Cortex-A8 erratum. |
2059 | bool | |
2060 | fix_cortex_a8() const | |
2061 | { return this->fix_cortex_a8_; } | |
2062 | ||
a2162063 ILT |
2063 | // Whether we fix R_ARM_V4BX relocation. |
2064 | // 0 - do not fix | |
2065 | // 1 - replace with MOV instruction (armv4 target) | |
2066 | // 2 - make interworking veneer (>= armv4t targets only) | |
9b2fd367 | 2067 | General_options::Fix_v4bx |
a2162063 | 2068 | fix_v4bx() const |
9b2fd367 | 2069 | { return parameters->options().fix_v4bx(); } |
a2162063 | 2070 | |
44272192 DK |
2071 | // Scan a span of THUMB code section for Cortex-A8 erratum. |
2072 | void | |
2073 | scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int, | |
2074 | section_size_type, section_size_type, | |
2075 | const unsigned char*, Arm_address); | |
2076 | ||
41263c05 DK |
2077 | // Apply Cortex-A8 workaround to a branch. |
2078 | void | |
2079 | apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address, | |
2080 | unsigned char*, Arm_address); | |
2081 | ||
d5b40221 | 2082 | protected: |
eb44217c DK |
2083 | // Make an ELF object. |
2084 | Object* | |
2085 | do_make_elf_object(const std::string&, Input_file*, off_t, | |
2086 | const elfcpp::Ehdr<32, big_endian>& ehdr); | |
2087 | ||
2088 | Object* | |
2089 | do_make_elf_object(const std::string&, Input_file*, off_t, | |
2090 | const elfcpp::Ehdr<32, !big_endian>&) | |
2091 | { gold_unreachable(); } | |
2092 | ||
2093 | Object* | |
2094 | do_make_elf_object(const std::string&, Input_file*, off_t, | |
2095 | const elfcpp::Ehdr<64, false>&) | |
2096 | { gold_unreachable(); } | |
2097 | ||
2098 | Object* | |
2099 | do_make_elf_object(const std::string&, Input_file*, off_t, | |
2100 | const elfcpp::Ehdr<64, true>&) | |
2101 | { gold_unreachable(); } | |
2102 | ||
2103 | // Make an output section. | |
2104 | Output_section* | |
2105 | do_make_output_section(const char* name, elfcpp::Elf_Word type, | |
2106 | elfcpp::Elf_Xword flags) | |
2107 | { return new Arm_output_section<big_endian>(name, type, flags); } | |
2108 | ||
d5b40221 DK |
2109 | void |
2110 | do_adjust_elf_header(unsigned char* view, int len) const; | |
2111 | ||
eb44217c DK |
2112 | // We only need to generate stubs, and hence perform relaxation if we are |
2113 | // not doing relocatable linking. | |
2114 | bool | |
2115 | do_may_relax() const | |
2116 | { return !parameters->options().relocatable(); } | |
2117 | ||
2118 | bool | |
2119 | do_relax(int, const Input_objects*, Symbol_table*, Layout*); | |
2120 | ||
a0351a69 DK |
2121 | // Determine whether an object attribute tag takes an integer, a |
2122 | // string or both. | |
2123 | int | |
2124 | do_attribute_arg_type(int tag) const; | |
2125 | ||
2126 | // Reorder tags during output. | |
2127 | int | |
2128 | do_attributes_order(int num) const; | |
2129 | ||
4a657b0d DK |
2130 | private: |
2131 | // The class which scans relocations. | |
2132 | class Scan | |
2133 | { | |
2134 | public: | |
2135 | Scan() | |
bec53400 | 2136 | : issued_non_pic_error_(false) |
4a657b0d DK |
2137 | { } |
2138 | ||
2139 | inline void | |
ad0f2072 | 2140 | local(Symbol_table* symtab, Layout* layout, Target_arm* target, |
4a657b0d DK |
2141 | Sized_relobj<32, big_endian>* object, |
2142 | unsigned int data_shndx, | |
2143 | Output_section* output_section, | |
2144 | const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, | |
2145 | const elfcpp::Sym<32, big_endian>& lsym); | |
2146 | ||
2147 | inline void | |
ad0f2072 | 2148 | global(Symbol_table* symtab, Layout* layout, Target_arm* target, |
4a657b0d DK |
2149 | Sized_relobj<32, big_endian>* object, |
2150 | unsigned int data_shndx, | |
2151 | Output_section* output_section, | |
2152 | const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, | |
2153 | Symbol* gsym); | |
2154 | ||
2155 | private: | |
2156 | static void | |
2157 | unsupported_reloc_local(Sized_relobj<32, big_endian>*, | |
2158 | unsigned int r_type); | |
2159 | ||
2160 | static void | |
2161 | unsupported_reloc_global(Sized_relobj<32, big_endian>*, | |
2162 | unsigned int r_type, Symbol*); | |
bec53400 DK |
2163 | |
2164 | void | |
2165 | check_non_pic(Relobj*, unsigned int r_type); | |
2166 | ||
2167 | // Almost identical to Symbol::needs_plt_entry except that it also | |
2168 | // handles STT_ARM_TFUNC. | |
2169 | static bool | |
2170 | symbol_needs_plt_entry(const Symbol* sym) | |
2171 | { | |
2172 | // An undefined symbol from an executable does not need a PLT entry. | |
2173 | if (sym->is_undefined() && !parameters->options().shared()) | |
2174 | return false; | |
2175 | ||
2176 | return (!parameters->doing_static_link() | |
2177 | && (sym->type() == elfcpp::STT_FUNC | |
2178 | || sym->type() == elfcpp::STT_ARM_TFUNC) | |
2179 | && (sym->is_from_dynobj() | |
2180 | || sym->is_undefined() | |
2181 | || sym->is_preemptible())); | |
2182 | } | |
2183 | ||
2184 | // Whether we have issued an error about a non-PIC compilation. | |
2185 | bool issued_non_pic_error_; | |
4a657b0d DK |
2186 | }; |
2187 | ||
2188 | // The class which implements relocation. | |
2189 | class Relocate | |
2190 | { | |
2191 | public: | |
2192 | Relocate() | |
2193 | { } | |
2194 | ||
2195 | ~Relocate() | |
2196 | { } | |
2197 | ||
bec53400 DK |
2198 | // Return whether the static relocation needs to be applied. |
2199 | inline bool | |
2200 | should_apply_static_reloc(const Sized_symbol<32>* gsym, | |
2201 | int ref_flags, | |
2202 | bool is_32bit, | |
2203 | Output_section* output_section); | |
2204 | ||
4a657b0d DK |
2205 | // Do a relocation. Return false if the caller should not issue |
2206 | // any warnings about this relocation. | |
2207 | inline bool | |
2208 | relocate(const Relocate_info<32, big_endian>*, Target_arm*, | |
2209 | Output_section*, size_t relnum, | |
2210 | const elfcpp::Rel<32, big_endian>&, | |
2211 | unsigned int r_type, const Sized_symbol<32>*, | |
2212 | const Symbol_value<32>*, | |
ebabffbd | 2213 | unsigned char*, Arm_address, |
4a657b0d | 2214 | section_size_type); |
c121c671 DK |
2215 | |
2216 | // Return whether we want to pass flag NON_PIC_REF for this | |
f4e5969c DK |
2217 | // reloc. This means the relocation type accesses a symbol not via |
2218 | // GOT or PLT. | |
c121c671 DK |
2219 | static inline bool |
2220 | reloc_is_non_pic (unsigned int r_type) | |
2221 | { | |
2222 | switch (r_type) | |
2223 | { | |
f4e5969c DK |
2224 | // These relocation types reference GOT or PLT entries explicitly. |
2225 | case elfcpp::R_ARM_GOT_BREL: | |
2226 | case elfcpp::R_ARM_GOT_ABS: | |
2227 | case elfcpp::R_ARM_GOT_PREL: | |
2228 | case elfcpp::R_ARM_GOT_BREL12: | |
2229 | case elfcpp::R_ARM_PLT32_ABS: | |
2230 | case elfcpp::R_ARM_TLS_GD32: | |
2231 | case elfcpp::R_ARM_TLS_LDM32: | |
2232 | case elfcpp::R_ARM_TLS_IE32: | |
2233 | case elfcpp::R_ARM_TLS_IE12GP: | |
2234 | ||
2235 | // These relocate types may use PLT entries. | |
c121c671 | 2236 | case elfcpp::R_ARM_CALL: |
f4e5969c | 2237 | case elfcpp::R_ARM_THM_CALL: |
c121c671 | 2238 | case elfcpp::R_ARM_JUMP24: |
f4e5969c DK |
2239 | case elfcpp::R_ARM_THM_JUMP24: |
2240 | case elfcpp::R_ARM_THM_JUMP19: | |
2241 | case elfcpp::R_ARM_PLT32: | |
2242 | case elfcpp::R_ARM_THM_XPC22: | |
c121c671 | 2243 | return false; |
f4e5969c DK |
2244 | |
2245 | default: | |
2246 | return true; | |
c121c671 DK |
2247 | } |
2248 | } | |
b10d2873 ILT |
2249 | |
2250 | // Return whether we need to calculate the addressing origin of | |
2251 | // the output segment defining the symbol - B(S). | |
2252 | static bool | |
2253 | reloc_needs_sym_origin(unsigned int r_type) | |
2254 | { | |
2255 | switch (r_type) | |
2256 | { | |
2257 | case elfcpp::R_ARM_SBREL32: | |
2258 | case elfcpp::R_ARM_BASE_PREL: | |
2259 | case elfcpp::R_ARM_BASE_ABS: | |
2260 | case elfcpp::R_ARM_LDR_SBREL_11_0_NC: | |
2261 | case elfcpp::R_ARM_ALU_SBREL_19_12_NC: | |
2262 | case elfcpp::R_ARM_ALU_SBREL_27_20_CK: | |
2263 | case elfcpp::R_ARM_SBREL31: | |
2264 | case elfcpp::R_ARM_ALU_SB_G0_NC: | |
2265 | case elfcpp::R_ARM_ALU_SB_G0: | |
2266 | case elfcpp::R_ARM_ALU_SB_G1_NC: | |
2267 | case elfcpp::R_ARM_ALU_SB_G1: | |
2268 | case elfcpp::R_ARM_ALU_SB_G2: | |
2269 | case elfcpp::R_ARM_LDR_SB_G0: | |
2270 | case elfcpp::R_ARM_LDR_SB_G1: | |
2271 | case elfcpp::R_ARM_LDR_SB_G2: | |
2272 | case elfcpp::R_ARM_LDRS_SB_G0: | |
2273 | case elfcpp::R_ARM_LDRS_SB_G1: | |
2274 | case elfcpp::R_ARM_LDRS_SB_G2: | |
2275 | case elfcpp::R_ARM_LDC_SB_G0: | |
2276 | case elfcpp::R_ARM_LDC_SB_G1: | |
2277 | case elfcpp::R_ARM_LDC_SB_G2: | |
2278 | case elfcpp::R_ARM_MOVW_BREL_NC: | |
2279 | case elfcpp::R_ARM_MOVT_BREL: | |
2280 | case elfcpp::R_ARM_MOVW_BREL: | |
2281 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: | |
2282 | case elfcpp::R_ARM_THM_MOVT_BREL: | |
2283 | case elfcpp::R_ARM_THM_MOVW_BREL: | |
2284 | return true; | |
2285 | ||
2286 | default: | |
2287 | return false; | |
2288 | } | |
2289 | } | |
4a657b0d DK |
2290 | }; |
2291 | ||
2292 | // A class which returns the size required for a relocation type, | |
2293 | // used while scanning relocs during a relocatable link. | |
2294 | class Relocatable_size_for_reloc | |
2295 | { | |
2296 | public: | |
2297 | unsigned int | |
2298 | get_size_for_reloc(unsigned int, Relobj*); | |
2299 | }; | |
2300 | ||
94cdfcff DK |
2301 | // Get the GOT section, creating it if necessary. |
2302 | Output_data_got<32, big_endian>* | |
2303 | got_section(Symbol_table*, Layout*); | |
2304 | ||
2305 | // Get the GOT PLT section. | |
2306 | Output_data_space* | |
2307 | got_plt_section() const | |
2308 | { | |
2309 | gold_assert(this->got_plt_ != NULL); | |
2310 | return this->got_plt_; | |
2311 | } | |
2312 | ||
2313 | // Create a PLT entry for a global symbol. | |
2314 | void | |
2315 | make_plt_entry(Symbol_table*, Layout*, Symbol*); | |
2316 | ||
2317 | // Get the PLT section. | |
2318 | const Output_data_plt_arm<big_endian>* | |
2319 | plt_section() const | |
2320 | { | |
2321 | gold_assert(this->plt_ != NULL); | |
2322 | return this->plt_; | |
2323 | } | |
2324 | ||
2325 | // Get the dynamic reloc section, creating it if necessary. | |
2326 | Reloc_section* | |
2327 | rel_dyn_section(Layout*); | |
2328 | ||
2329 | // Return true if the symbol may need a COPY relocation. | |
2330 | // References from an executable object to non-function symbols | |
2331 | // defined in a dynamic object may need a COPY relocation. | |
2332 | bool | |
2333 | may_need_copy_reloc(Symbol* gsym) | |
2334 | { | |
966d4097 DK |
2335 | return (gsym->type() != elfcpp::STT_ARM_TFUNC |
2336 | && gsym->may_need_copy_reloc()); | |
94cdfcff DK |
2337 | } |
2338 | ||
2339 | // Add a potential copy relocation. | |
2340 | void | |
2341 | copy_reloc(Symbol_table* symtab, Layout* layout, | |
2342 | Sized_relobj<32, big_endian>* object, | |
2ea97941 | 2343 | unsigned int shndx, Output_section* output_section, |
94cdfcff DK |
2344 | Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc) |
2345 | { | |
2346 | this->copy_relocs_.copy_reloc(symtab, layout, | |
2347 | symtab->get_sized_symbol<32>(sym), | |
2ea97941 | 2348 | object, shndx, output_section, reloc, |
94cdfcff DK |
2349 | this->rel_dyn_section(layout)); |
2350 | } | |
2351 | ||
d5b40221 DK |
2352 | // Whether two EABI versions are compatible. |
2353 | static bool | |
2354 | are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2); | |
2355 | ||
2356 | // Merge processor-specific flags from input object and those in the ELF | |
2357 | // header of the output. | |
2358 | void | |
2359 | merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word); | |
2360 | ||
a0351a69 DK |
2361 | // Get the secondary compatible architecture. |
2362 | static int | |
2363 | get_secondary_compatible_arch(const Attributes_section_data*); | |
2364 | ||
2365 | // Set the secondary compatible architecture. | |
2366 | static void | |
2367 | set_secondary_compatible_arch(Attributes_section_data*, int); | |
2368 | ||
2369 | static int | |
2370 | tag_cpu_arch_combine(const char*, int, int*, int, int); | |
2371 | ||
2372 | // Helper to print AEABI enum tag value. | |
2373 | static std::string | |
2374 | aeabi_enum_name(unsigned int); | |
2375 | ||
2376 | // Return string value for TAG_CPU_name. | |
2377 | static std::string | |
2378 | tag_cpu_name_value(unsigned int); | |
2379 | ||
2380 | // Merge object attributes from input object and those in the output. | |
2381 | void | |
2382 | merge_object_attributes(const char*, const Attributes_section_data*); | |
2383 | ||
2384 | // Helper to get an AEABI object attribute | |
2385 | Object_attribute* | |
2386 | get_aeabi_object_attribute(int tag) const | |
2387 | { | |
2388 | Attributes_section_data* pasd = this->attributes_section_data_; | |
2389 | gold_assert(pasd != NULL); | |
2390 | Object_attribute* attr = | |
2391 | pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag); | |
2392 | gold_assert(attr != NULL); | |
2393 | return attr; | |
2394 | } | |
2395 | ||
eb44217c DK |
2396 | // |
2397 | // Methods to support stub-generations. | |
2398 | // | |
d5b40221 | 2399 | |
eb44217c DK |
2400 | // Group input sections for stub generation. |
2401 | void | |
2402 | group_sections(Layout*, section_size_type, bool); | |
d5b40221 | 2403 | |
eb44217c DK |
2404 | // Scan a relocation for stub generation. |
2405 | void | |
2406 | scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int, | |
2407 | const Sized_symbol<32>*, unsigned int, | |
2408 | const Symbol_value<32>*, | |
2409 | elfcpp::Elf_types<32>::Elf_Swxword, Arm_address); | |
d5b40221 | 2410 | |
eb44217c DK |
2411 | // Scan a relocation section for stub. |
2412 | template<int sh_type> | |
2413 | void | |
2414 | scan_reloc_section_for_stubs( | |
2415 | const Relocate_info<32, big_endian>* relinfo, | |
2416 | const unsigned char* prelocs, | |
2417 | size_t reloc_count, | |
2418 | Output_section* output_section, | |
2419 | bool needs_special_offset_handling, | |
2420 | const unsigned char* view, | |
2421 | elfcpp::Elf_types<32>::Elf_Addr view_address, | |
2422 | section_size_type); | |
d5b40221 | 2423 | |
2b328d4e DK |
2424 | // Fix .ARM.exidx section coverage. |
2425 | void | |
2426 | fix_exidx_coverage(Layout*, Arm_output_section<big_endian>*, Symbol_table*); | |
2427 | ||
2428 | // Functors for STL set. | |
2429 | struct output_section_address_less_than | |
2430 | { | |
2431 | bool | |
2432 | operator()(const Output_section* s1, const Output_section* s2) const | |
2433 | { return s1->address() < s2->address(); } | |
2434 | }; | |
2435 | ||
4a657b0d DK |
2436 | // Information about this specific target which we pass to the |
2437 | // general Target structure. | |
2438 | static const Target::Target_info arm_info; | |
94cdfcff DK |
2439 | |
2440 | // The types of GOT entries needed for this platform. | |
2441 | enum Got_type | |
2442 | { | |
2443 | GOT_TYPE_STANDARD = 0 // GOT entry for a regular symbol | |
2444 | }; | |
2445 | ||
55da9579 DK |
2446 | typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list; |
2447 | ||
2448 | // Map input section to Arm_input_section. | |
5ac169d4 | 2449 | typedef Unordered_map<Section_id, |
55da9579 | 2450 | Arm_input_section<big_endian>*, |
5ac169d4 | 2451 | Section_id_hash> |
55da9579 DK |
2452 | Arm_input_section_map; |
2453 | ||
a120bc7f DK |
2454 | // Map output addresses to relocs for Cortex-A8 erratum. |
2455 | typedef Unordered_map<Arm_address, const Cortex_a8_reloc*> | |
2456 | Cortex_a8_relocs_info; | |
2457 | ||
94cdfcff DK |
2458 | // The GOT section. |
2459 | Output_data_got<32, big_endian>* got_; | |
2460 | // The PLT section. | |
2461 | Output_data_plt_arm<big_endian>* plt_; | |
2462 | // The GOT PLT section. | |
2463 | Output_data_space* got_plt_; | |
2464 | // The dynamic reloc section. | |
2465 | Reloc_section* rel_dyn_; | |
2466 | // Relocs saved to avoid a COPY reloc. | |
2467 | Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_; | |
2468 | // Space for variables copied with a COPY reloc. | |
2469 | Output_data_space* dynbss_; | |
55da9579 DK |
2470 | // Vector of Stub_tables created. |
2471 | Stub_table_list stub_tables_; | |
2472 | // Stub factory. | |
2473 | const Stub_factory &stub_factory_; | |
b569affa DK |
2474 | // Whether we can use BLX. |
2475 | bool may_use_blx_; | |
2476 | // Whether we force PIC branch veneers. | |
2477 | bool should_force_pic_veneer_; | |
eb44217c DK |
2478 | // Map for locating Arm_input_sections. |
2479 | Arm_input_section_map arm_input_section_map_; | |
a0351a69 DK |
2480 | // Attributes section data in output. |
2481 | Attributes_section_data* attributes_section_data_; | |
a120bc7f DK |
2482 | // Whether we want to fix code for Cortex-A8 erratum. |
2483 | bool fix_cortex_a8_; | |
2484 | // Map addresses to relocs for Cortex-A8 erratum. | |
2485 | Cortex_a8_relocs_info cortex_a8_relocs_info_; | |
4a657b0d DK |
2486 | }; |
2487 | ||
2488 | template<bool big_endian> | |
2489 | const Target::Target_info Target_arm<big_endian>::arm_info = | |
2490 | { | |
2491 | 32, // size | |
2492 | big_endian, // is_big_endian | |
2493 | elfcpp::EM_ARM, // machine_code | |
2494 | false, // has_make_symbol | |
2495 | false, // has_resolve | |
2496 | false, // has_code_fill | |
2497 | true, // is_default_stack_executable | |
2498 | '\0', // wrap_char | |
2499 | "/usr/lib/libc.so.1", // dynamic_linker | |
2500 | 0x8000, // default_text_segment_address | |
2501 | 0x1000, // abi_pagesize (overridable by -z max-page-size) | |
8a5e3e08 ILT |
2502 | 0x1000, // common_pagesize (overridable by -z common-page-size) |
2503 | elfcpp::SHN_UNDEF, // small_common_shndx | |
2504 | elfcpp::SHN_UNDEF, // large_common_shndx | |
2505 | 0, // small_common_section_flags | |
05a352e6 DK |
2506 | 0, // large_common_section_flags |
2507 | ".ARM.attributes", // attributes_section | |
2508 | "aeabi" // attributes_vendor | |
4a657b0d DK |
2509 | }; |
2510 | ||
c121c671 DK |
2511 | // Arm relocate functions class |
2512 | // | |
2513 | ||
2514 | template<bool big_endian> | |
2515 | class Arm_relocate_functions : public Relocate_functions<32, big_endian> | |
2516 | { | |
2517 | public: | |
2518 | typedef enum | |
2519 | { | |
2520 | STATUS_OKAY, // No error during relocation. | |
2521 | STATUS_OVERFLOW, // Relocation oveflow. | |
2522 | STATUS_BAD_RELOC // Relocation cannot be applied. | |
2523 | } Status; | |
2524 | ||
2525 | private: | |
2526 | typedef Relocate_functions<32, big_endian> Base; | |
2527 | typedef Arm_relocate_functions<big_endian> This; | |
2528 | ||
fd3c5f0b ILT |
2529 | // Encoding of imm16 argument for movt and movw ARM instructions |
2530 | // from ARM ARM: | |
2531 | // | |
2532 | // imm16 := imm4 | imm12 | |
2533 | // | |
2534 | // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 | |
2535 | // +-------+---------------+-------+-------+-----------------------+ | |
2536 | // | | |imm4 | |imm12 | | |
2537 | // +-------+---------------+-------+-------+-----------------------+ | |
2538 | ||
2539 | // Extract the relocation addend from VAL based on the ARM | |
2540 | // instruction encoding described above. | |
2541 | static inline typename elfcpp::Swap<32, big_endian>::Valtype | |
2542 | extract_arm_movw_movt_addend( | |
2543 | typename elfcpp::Swap<32, big_endian>::Valtype val) | |
2544 | { | |
2545 | // According to the Elf ABI for ARM Architecture the immediate | |
2546 | // field is sign-extended to form the addend. | |
2547 | return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff)); | |
2548 | } | |
2549 | ||
2550 | // Insert X into VAL based on the ARM instruction encoding described | |
2551 | // above. | |
2552 | static inline typename elfcpp::Swap<32, big_endian>::Valtype | |
2553 | insert_val_arm_movw_movt( | |
2554 | typename elfcpp::Swap<32, big_endian>::Valtype val, | |
2555 | typename elfcpp::Swap<32, big_endian>::Valtype x) | |
2556 | { | |
2557 | val &= 0xfff0f000; | |
2558 | val |= x & 0x0fff; | |
2559 | val |= (x & 0xf000) << 4; | |
2560 | return val; | |
2561 | } | |
2562 | ||
2563 | // Encoding of imm16 argument for movt and movw Thumb2 instructions | |
2564 | // from ARM ARM: | |
2565 | // | |
2566 | // imm16 := imm4 | i | imm3 | imm8 | |
2567 | // | |
2568 | // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 | |
2569 | // +---------+-+-----------+-------++-+-----+-------+---------------+ | |
2570 | // | |i| |imm4 || |imm3 | |imm8 | | |
2571 | // +---------+-+-----------+-------++-+-----+-------+---------------+ | |
2572 | ||
2573 | // Extract the relocation addend from VAL based on the Thumb2 | |
2574 | // instruction encoding described above. | |
2575 | static inline typename elfcpp::Swap<32, big_endian>::Valtype | |
2576 | extract_thumb_movw_movt_addend( | |
2577 | typename elfcpp::Swap<32, big_endian>::Valtype val) | |
2578 | { | |
2579 | // According to the Elf ABI for ARM Architecture the immediate | |
2580 | // field is sign-extended to form the addend. | |
2581 | return utils::sign_extend<16>(((val >> 4) & 0xf000) | |
2582 | | ((val >> 15) & 0x0800) | |
2583 | | ((val >> 4) & 0x0700) | |
2584 | | (val & 0x00ff)); | |
2585 | } | |
2586 | ||
2587 | // Insert X into VAL based on the Thumb2 instruction encoding | |
2588 | // described above. | |
2589 | static inline typename elfcpp::Swap<32, big_endian>::Valtype | |
2590 | insert_val_thumb_movw_movt( | |
2591 | typename elfcpp::Swap<32, big_endian>::Valtype val, | |
2592 | typename elfcpp::Swap<32, big_endian>::Valtype x) | |
2593 | { | |
2594 | val &= 0xfbf08f00; | |
2595 | val |= (x & 0xf000) << 4; | |
2596 | val |= (x & 0x0800) << 15; | |
2597 | val |= (x & 0x0700) << 4; | |
2598 | val |= (x & 0x00ff); | |
2599 | return val; | |
2600 | } | |
2601 | ||
b10d2873 ILT |
2602 | // Calculate the smallest constant Kn for the specified residual. |
2603 | // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) | |
2604 | static uint32_t | |
2605 | calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual) | |
2606 | { | |
2607 | int32_t msb; | |
2608 | ||
2609 | if (residual == 0) | |
2610 | return 0; | |
2611 | // Determine the most significant bit in the residual and | |
2612 | // align the resulting value to a 2-bit boundary. | |
2613 | for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2) | |
2614 | ; | |
2615 | // The desired shift is now (msb - 6), or zero, whichever | |
2616 | // is the greater. | |
2617 | return (((msb - 6) < 0) ? 0 : (msb - 6)); | |
2618 | } | |
2619 | ||
2620 | // Calculate the final residual for the specified group index. | |
2621 | // If the passed group index is less than zero, the method will return | |
2622 | // the value of the specified residual without any change. | |
2623 | // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) | |
2624 | static typename elfcpp::Swap<32, big_endian>::Valtype | |
2625 | calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual, | |
2626 | const int group) | |
2627 | { | |
2628 | for (int n = 0; n <= group; n++) | |
2629 | { | |
2630 | // Calculate which part of the value to mask. | |
2631 | uint32_t shift = calc_grp_kn(residual); | |
2632 | // Calculate the residual for the next time around. | |
2633 | residual &= ~(residual & (0xff << shift)); | |
2634 | } | |
2635 | ||
2636 | return residual; | |
2637 | } | |
2638 | ||
2639 | // Calculate the value of Gn for the specified group index. | |
2640 | // We return it in the form of an encoded constant-and-rotation. | |
2641 | // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) | |
2642 | static typename elfcpp::Swap<32, big_endian>::Valtype | |
2643 | calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual, | |
2644 | const int group) | |
2645 | { | |
2646 | typename elfcpp::Swap<32, big_endian>::Valtype gn = 0; | |
2647 | uint32_t shift = 0; | |
2648 | ||
2649 | for (int n = 0; n <= group; n++) | |
2650 | { | |
2651 | // Calculate which part of the value to mask. | |
2652 | shift = calc_grp_kn(residual); | |
2653 | // Calculate Gn in 32-bit as well as encoded constant-and-rotation form. | |
2654 | gn = residual & (0xff << shift); | |
2655 | // Calculate the residual for the next time around. | |
2656 | residual &= ~gn; | |
2657 | } | |
2658 | // Return Gn in the form of an encoded constant-and-rotation. | |
2659 | return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8)); | |
2660 | } | |
2661 | ||
d204b6e9 DK |
2662 | // Handle ARM long branches. |
2663 | static typename This::Status | |
2664 | arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*, | |
2665 | unsigned char *, const Sized_symbol<32>*, | |
2666 | const Arm_relobj<big_endian>*, unsigned int, | |
2667 | const Symbol_value<32>*, Arm_address, Arm_address, bool); | |
c121c671 | 2668 | |
51938283 DK |
2669 | // Handle THUMB long branches. |
2670 | static typename This::Status | |
2671 | thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*, | |
2672 | unsigned char *, const Sized_symbol<32>*, | |
2673 | const Arm_relobj<big_endian>*, unsigned int, | |
2674 | const Symbol_value<32>*, Arm_address, Arm_address, bool); | |
2675 | ||
c121c671 | 2676 | public: |
5e445df6 | 2677 | |
089d69dc DK |
2678 | // Return the branch offset of a 32-bit THUMB branch. |
2679 | static inline int32_t | |
2680 | thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn) | |
2681 | { | |
2682 | // We use the Thumb-2 encoding (backwards compatible with Thumb-1) | |
2683 | // involving the J1 and J2 bits. | |
2684 | uint32_t s = (upper_insn & (1U << 10)) >> 10; | |
2685 | uint32_t upper = upper_insn & 0x3ffU; | |
2686 | uint32_t lower = lower_insn & 0x7ffU; | |
2687 | uint32_t j1 = (lower_insn & (1U << 13)) >> 13; | |
2688 | uint32_t j2 = (lower_insn & (1U << 11)) >> 11; | |
2689 | uint32_t i1 = j1 ^ s ? 0 : 1; | |
2690 | uint32_t i2 = j2 ^ s ? 0 : 1; | |
2691 | ||
2692 | return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22) | |
2693 | | (upper << 12) | (lower << 1)); | |
2694 | } | |
2695 | ||
2696 | // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction. | |
2697 | // UPPER_INSN is the original upper instruction of the branch. Caller is | |
2698 | // responsible for overflow checking and BLX offset adjustment. | |
2699 | static inline uint16_t | |
2700 | thumb32_branch_upper(uint16_t upper_insn, int32_t offset) | |
2701 | { | |
2702 | uint32_t s = offset < 0 ? 1 : 0; | |
2703 | uint32_t bits = static_cast<uint32_t>(offset); | |
2704 | return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10); | |
2705 | } | |
2706 | ||
2707 | // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction. | |
2708 | // LOWER_INSN is the original lower instruction of the branch. Caller is | |
2709 | // responsible for overflow checking and BLX offset adjustment. | |
2710 | static inline uint16_t | |
2711 | thumb32_branch_lower(uint16_t lower_insn, int32_t offset) | |
2712 | { | |
2713 | uint32_t s = offset < 0 ? 1 : 0; | |
2714 | uint32_t bits = static_cast<uint32_t>(offset); | |
2715 | return ((lower_insn & ~0x2fffU) | |
2716 | | ((((bits >> 23) & 1) ^ !s) << 13) | |
2717 | | ((((bits >> 22) & 1) ^ !s) << 11) | |
2718 | | ((bits >> 1) & 0x7ffU)); | |
2719 | } | |
2720 | ||
2721 | // Return the branch offset of a 32-bit THUMB conditional branch. | |
2722 | static inline int32_t | |
2723 | thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn) | |
2724 | { | |
2725 | uint32_t s = (upper_insn & 0x0400U) >> 10; | |
2726 | uint32_t j1 = (lower_insn & 0x2000U) >> 13; | |
2727 | uint32_t j2 = (lower_insn & 0x0800U) >> 11; | |
2728 | uint32_t lower = (lower_insn & 0x07ffU); | |
2729 | uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU); | |
2730 | ||
2731 | return utils::sign_extend<21>((upper << 12) | (lower << 1)); | |
2732 | } | |
2733 | ||
2734 | // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper | |
2735 | // instruction. UPPER_INSN is the original upper instruction of the branch. | |
2736 | // Caller is responsible for overflow checking. | |
2737 | static inline uint16_t | |
2738 | thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset) | |
2739 | { | |
2740 | uint32_t s = offset < 0 ? 1 : 0; | |
2741 | uint32_t bits = static_cast<uint32_t>(offset); | |
2742 | return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12); | |
2743 | } | |
2744 | ||
2745 | // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower | |
2746 | // instruction. LOWER_INSN is the original lower instruction of the branch. | |
2747 | // Caller is reponsible for overflow checking. | |
2748 | static inline uint16_t | |
2749 | thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset) | |
2750 | { | |
2751 | uint32_t bits = static_cast<uint32_t>(offset); | |
2752 | uint32_t j2 = (bits & 0x00080000U) >> 19; | |
2753 | uint32_t j1 = (bits & 0x00040000U) >> 18; | |
2754 | uint32_t lo = (bits & 0x00000ffeU) >> 1; | |
2755 | ||
2756 | return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo; | |
2757 | } | |
2758 | ||
5e445df6 ILT |
2759 | // R_ARM_ABS8: S + A |
2760 | static inline typename This::Status | |
2761 | abs8(unsigned char *view, | |
2762 | const Sized_relobj<32, big_endian>* object, | |
be8fcb75 | 2763 | const Symbol_value<32>* psymval) |
5e445df6 ILT |
2764 | { |
2765 | typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype; | |
2766 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
2767 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2768 | Valtype val = elfcpp::Swap<8, big_endian>::readval(wv); | |
2769 | Reltype addend = utils::sign_extend<8>(val); | |
2daedcd6 | 2770 | Reltype x = psymval->value(object, addend); |
5e445df6 ILT |
2771 | val = utils::bit_select(val, x, 0xffU); |
2772 | elfcpp::Swap<8, big_endian>::writeval(wv, val); | |
2773 | return (utils::has_signed_unsigned_overflow<8>(x) | |
2774 | ? This::STATUS_OVERFLOW | |
2775 | : This::STATUS_OKAY); | |
2776 | } | |
2777 | ||
be8fcb75 ILT |
2778 | // R_ARM_THM_ABS5: S + A |
2779 | static inline typename This::Status | |
2780 | thm_abs5(unsigned char *view, | |
2781 | const Sized_relobj<32, big_endian>* object, | |
2782 | const Symbol_value<32>* psymval) | |
2783 | { | |
2784 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
2785 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
2786 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2787 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); | |
2788 | Reltype addend = (val & 0x7e0U) >> 6; | |
2daedcd6 | 2789 | Reltype x = psymval->value(object, addend); |
be8fcb75 ILT |
2790 | val = utils::bit_select(val, x << 6, 0x7e0U); |
2791 | elfcpp::Swap<16, big_endian>::writeval(wv, val); | |
2792 | return (utils::has_overflow<5>(x) | |
2793 | ? This::STATUS_OVERFLOW | |
2794 | : This::STATUS_OKAY); | |
2795 | } | |
2796 | ||
2797 | // R_ARM_ABS12: S + A | |
2798 | static inline typename This::Status | |
2799 | abs12(unsigned char *view, | |
51938283 DK |
2800 | const Sized_relobj<32, big_endian>* object, |
2801 | const Symbol_value<32>* psymval) | |
be8fcb75 ILT |
2802 | { |
2803 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
2804 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
2805 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2806 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
2807 | Reltype addend = val & 0x0fffU; | |
2daedcd6 | 2808 | Reltype x = psymval->value(object, addend); |
be8fcb75 ILT |
2809 | val = utils::bit_select(val, x, 0x0fffU); |
2810 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
2811 | return (utils::has_overflow<12>(x) | |
2812 | ? This::STATUS_OVERFLOW | |
2813 | : This::STATUS_OKAY); | |
2814 | } | |
2815 | ||
2816 | // R_ARM_ABS16: S + A | |
2817 | static inline typename This::Status | |
2818 | abs16(unsigned char *view, | |
51938283 DK |
2819 | const Sized_relobj<32, big_endian>* object, |
2820 | const Symbol_value<32>* psymval) | |
be8fcb75 ILT |
2821 | { |
2822 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
2823 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
2824 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2825 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); | |
2826 | Reltype addend = utils::sign_extend<16>(val); | |
2daedcd6 | 2827 | Reltype x = psymval->value(object, addend); |
be8fcb75 ILT |
2828 | val = utils::bit_select(val, x, 0xffffU); |
2829 | elfcpp::Swap<16, big_endian>::writeval(wv, val); | |
2830 | return (utils::has_signed_unsigned_overflow<16>(x) | |
2831 | ? This::STATUS_OVERFLOW | |
2832 | : This::STATUS_OKAY); | |
2833 | } | |
2834 | ||
c121c671 DK |
2835 | // R_ARM_ABS32: (S + A) | T |
2836 | static inline typename This::Status | |
2837 | abs32(unsigned char *view, | |
2838 | const Sized_relobj<32, big_endian>* object, | |
2839 | const Symbol_value<32>* psymval, | |
2daedcd6 | 2840 | Arm_address thumb_bit) |
c121c671 DK |
2841 | { |
2842 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
2843 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2844 | Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv); | |
2daedcd6 | 2845 | Valtype x = psymval->value(object, addend) | thumb_bit; |
c121c671 DK |
2846 | elfcpp::Swap<32, big_endian>::writeval(wv, x); |
2847 | return This::STATUS_OKAY; | |
2848 | } | |
2849 | ||
2850 | // R_ARM_REL32: (S + A) | T - P | |
2851 | static inline typename This::Status | |
2852 | rel32(unsigned char *view, | |
2853 | const Sized_relobj<32, big_endian>* object, | |
2854 | const Symbol_value<32>* psymval, | |
ebabffbd | 2855 | Arm_address address, |
2daedcd6 | 2856 | Arm_address thumb_bit) |
c121c671 DK |
2857 | { |
2858 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
2859 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2860 | Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv); | |
2daedcd6 | 2861 | Valtype x = (psymval->value(object, addend) | thumb_bit) - address; |
c121c671 DK |
2862 | elfcpp::Swap<32, big_endian>::writeval(wv, x); |
2863 | return This::STATUS_OKAY; | |
2864 | } | |
2865 | ||
2866 | // R_ARM_THM_CALL: (S + A) | T - P | |
2867 | static inline typename This::Status | |
51938283 DK |
2868 | thm_call(const Relocate_info<32, big_endian>* relinfo, unsigned char *view, |
2869 | const Sized_symbol<32>* gsym, const Arm_relobj<big_endian>* object, | |
2870 | unsigned int r_sym, const Symbol_value<32>* psymval, | |
2871 | Arm_address address, Arm_address thumb_bit, | |
2872 | bool is_weakly_undefined_without_plt) | |
c121c671 | 2873 | { |
51938283 DK |
2874 | return thumb_branch_common(elfcpp::R_ARM_THM_CALL, relinfo, view, gsym, |
2875 | object, r_sym, psymval, address, thumb_bit, | |
2876 | is_weakly_undefined_without_plt); | |
2877 | } | |
c121c671 | 2878 | |
51938283 DK |
2879 | // R_ARM_THM_JUMP24: (S + A) | T - P |
2880 | static inline typename This::Status | |
2881 | thm_jump24(const Relocate_info<32, big_endian>* relinfo, unsigned char *view, | |
2882 | const Sized_symbol<32>* gsym, const Arm_relobj<big_endian>* object, | |
2883 | unsigned int r_sym, const Symbol_value<32>* psymval, | |
2884 | Arm_address address, Arm_address thumb_bit, | |
2885 | bool is_weakly_undefined_without_plt) | |
2886 | { | |
2887 | return thumb_branch_common(elfcpp::R_ARM_THM_JUMP24, relinfo, view, gsym, | |
2888 | object, r_sym, psymval, address, thumb_bit, | |
2889 | is_weakly_undefined_without_plt); | |
2890 | } | |
2891 | ||
089d69dc DK |
2892 | // R_ARM_THM_JUMP24: (S + A) | T - P |
2893 | static typename This::Status | |
2894 | thm_jump19(unsigned char *view, const Arm_relobj<big_endian>* object, | |
2895 | const Symbol_value<32>* psymval, Arm_address address, | |
2896 | Arm_address thumb_bit); | |
2897 | ||
51938283 DK |
2898 | // R_ARM_THM_XPC22: (S + A) | T - P |
2899 | static inline typename This::Status | |
2900 | thm_xpc22(const Relocate_info<32, big_endian>* relinfo, unsigned char *view, | |
2901 | const Sized_symbol<32>* gsym, const Arm_relobj<big_endian>* object, | |
2902 | unsigned int r_sym, const Symbol_value<32>* psymval, | |
2903 | Arm_address address, Arm_address thumb_bit, | |
2904 | bool is_weakly_undefined_without_plt) | |
2905 | { | |
2906 | return thumb_branch_common(elfcpp::R_ARM_THM_XPC22, relinfo, view, gsym, | |
2907 | object, r_sym, psymval, address, thumb_bit, | |
2908 | is_weakly_undefined_without_plt); | |
c121c671 DK |
2909 | } |
2910 | ||
800d0f56 ILT |
2911 | // R_ARM_THM_JUMP6: S + A – P |
2912 | static inline typename This::Status | |
2913 | thm_jump6(unsigned char *view, | |
2914 | const Sized_relobj<32, big_endian>* object, | |
2915 | const Symbol_value<32>* psymval, | |
2916 | Arm_address address) | |
2917 | { | |
2918 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
2919 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; | |
2920 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2921 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); | |
2922 | // bit[9]:bit[7:3]:’0’ (mask: 0x02f8) | |
2923 | Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2)); | |
2924 | Reltype x = (psymval->value(object, addend) - address); | |
2925 | val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2); | |
2926 | elfcpp::Swap<16, big_endian>::writeval(wv, val); | |
2927 | // CZB does only forward jumps. | |
2928 | return ((x > 0x007e) | |
2929 | ? This::STATUS_OVERFLOW | |
2930 | : This::STATUS_OKAY); | |
2931 | } | |
2932 | ||
2933 | // R_ARM_THM_JUMP8: S + A – P | |
2934 | static inline typename This::Status | |
2935 | thm_jump8(unsigned char *view, | |
2936 | const Sized_relobj<32, big_endian>* object, | |
2937 | const Symbol_value<32>* psymval, | |
2938 | Arm_address address) | |
2939 | { | |
2940 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
2941 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; | |
2942 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2943 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); | |
2944 | Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1); | |
2945 | Reltype x = (psymval->value(object, addend) - address); | |
2946 | elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1)); | |
2947 | return (utils::has_overflow<8>(x) | |
2948 | ? This::STATUS_OVERFLOW | |
2949 | : This::STATUS_OKAY); | |
2950 | } | |
2951 | ||
2952 | // R_ARM_THM_JUMP11: S + A – P | |
2953 | static inline typename This::Status | |
2954 | thm_jump11(unsigned char *view, | |
2955 | const Sized_relobj<32, big_endian>* object, | |
2956 | const Symbol_value<32>* psymval, | |
2957 | Arm_address address) | |
2958 | { | |
2959 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
2960 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; | |
2961 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
2962 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); | |
2963 | Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1); | |
2964 | Reltype x = (psymval->value(object, addend) - address); | |
2965 | elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1)); | |
2966 | return (utils::has_overflow<11>(x) | |
2967 | ? This::STATUS_OVERFLOW | |
2968 | : This::STATUS_OKAY); | |
2969 | } | |
2970 | ||
c121c671 DK |
2971 | // R_ARM_BASE_PREL: B(S) + A - P |
2972 | static inline typename This::Status | |
2973 | base_prel(unsigned char* view, | |
ebabffbd DK |
2974 | Arm_address origin, |
2975 | Arm_address address) | |
c121c671 DK |
2976 | { |
2977 | Base::rel32(view, origin - address); | |
2978 | return STATUS_OKAY; | |
2979 | } | |
2980 | ||
be8fcb75 ILT |
2981 | // R_ARM_BASE_ABS: B(S) + A |
2982 | static inline typename This::Status | |
2983 | base_abs(unsigned char* view, | |
f4e5969c | 2984 | Arm_address origin) |
be8fcb75 ILT |
2985 | { |
2986 | Base::rel32(view, origin); | |
2987 | return STATUS_OKAY; | |
2988 | } | |
2989 | ||
c121c671 DK |
2990 | // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG |
2991 | static inline typename This::Status | |
2992 | got_brel(unsigned char* view, | |
2993 | typename elfcpp::Swap<32, big_endian>::Valtype got_offset) | |
2994 | { | |
2995 | Base::rel32(view, got_offset); | |
2996 | return This::STATUS_OKAY; | |
2997 | } | |
2998 | ||
f4e5969c | 2999 | // R_ARM_GOT_PREL: GOT(S) + A - P |
7f5309a5 | 3000 | static inline typename This::Status |
f4e5969c DK |
3001 | got_prel(unsigned char *view, |
3002 | Arm_address got_entry, | |
ebabffbd | 3003 | Arm_address address) |
7f5309a5 | 3004 | { |
f4e5969c | 3005 | Base::rel32(view, got_entry - address); |
7f5309a5 ILT |
3006 | return This::STATUS_OKAY; |
3007 | } | |
3008 | ||
c121c671 DK |
3009 | // R_ARM_PLT32: (S + A) | T - P |
3010 | static inline typename This::Status | |
d204b6e9 DK |
3011 | plt32(const Relocate_info<32, big_endian>* relinfo, |
3012 | unsigned char *view, | |
3013 | const Sized_symbol<32>* gsym, | |
3014 | const Arm_relobj<big_endian>* object, | |
3015 | unsigned int r_sym, | |
c121c671 | 3016 | const Symbol_value<32>* psymval, |
ebabffbd | 3017 | Arm_address address, |
d204b6e9 DK |
3018 | Arm_address thumb_bit, |
3019 | bool is_weakly_undefined_without_plt) | |
3020 | { | |
3021 | return arm_branch_common(elfcpp::R_ARM_PLT32, relinfo, view, gsym, | |
3022 | object, r_sym, psymval, address, thumb_bit, | |
3023 | is_weakly_undefined_without_plt); | |
3024 | } | |
3025 | ||
3026 | // R_ARM_XPC25: (S + A) | T - P | |
3027 | static inline typename This::Status | |
3028 | xpc25(const Relocate_info<32, big_endian>* relinfo, | |
3029 | unsigned char *view, | |
3030 | const Sized_symbol<32>* gsym, | |
3031 | const Arm_relobj<big_endian>* object, | |
3032 | unsigned int r_sym, | |
3033 | const Symbol_value<32>* psymval, | |
3034 | Arm_address address, | |
3035 | Arm_address thumb_bit, | |
3036 | bool is_weakly_undefined_without_plt) | |
c121c671 | 3037 | { |
d204b6e9 DK |
3038 | return arm_branch_common(elfcpp::R_ARM_XPC25, relinfo, view, gsym, |
3039 | object, r_sym, psymval, address, thumb_bit, | |
3040 | is_weakly_undefined_without_plt); | |
c121c671 DK |
3041 | } |
3042 | ||
3043 | // R_ARM_CALL: (S + A) | T - P | |
3044 | static inline typename This::Status | |
d204b6e9 DK |
3045 | call(const Relocate_info<32, big_endian>* relinfo, |
3046 | unsigned char *view, | |
3047 | const Sized_symbol<32>* gsym, | |
3048 | const Arm_relobj<big_endian>* object, | |
3049 | unsigned int r_sym, | |
c121c671 | 3050 | const Symbol_value<32>* psymval, |
ebabffbd | 3051 | Arm_address address, |
d204b6e9 DK |
3052 | Arm_address thumb_bit, |
3053 | bool is_weakly_undefined_without_plt) | |
c121c671 | 3054 | { |
d204b6e9 DK |
3055 | return arm_branch_common(elfcpp::R_ARM_CALL, relinfo, view, gsym, |
3056 | object, r_sym, psymval, address, thumb_bit, | |
3057 | is_weakly_undefined_without_plt); | |
c121c671 DK |
3058 | } |
3059 | ||
3060 | // R_ARM_JUMP24: (S + A) | T - P | |
3061 | static inline typename This::Status | |
d204b6e9 DK |
3062 | jump24(const Relocate_info<32, big_endian>* relinfo, |
3063 | unsigned char *view, | |
3064 | const Sized_symbol<32>* gsym, | |
3065 | const Arm_relobj<big_endian>* object, | |
3066 | unsigned int r_sym, | |
c121c671 | 3067 | const Symbol_value<32>* psymval, |
ebabffbd | 3068 | Arm_address address, |
d204b6e9 DK |
3069 | Arm_address thumb_bit, |
3070 | bool is_weakly_undefined_without_plt) | |
c121c671 | 3071 | { |
d204b6e9 DK |
3072 | return arm_branch_common(elfcpp::R_ARM_JUMP24, relinfo, view, gsym, |
3073 | object, r_sym, psymval, address, thumb_bit, | |
3074 | is_weakly_undefined_without_plt); | |
c121c671 DK |
3075 | } |
3076 | ||
3077 | // R_ARM_PREL: (S + A) | T - P | |
3078 | static inline typename This::Status | |
3079 | prel31(unsigned char *view, | |
3080 | const Sized_relobj<32, big_endian>* object, | |
3081 | const Symbol_value<32>* psymval, | |
ebabffbd | 3082 | Arm_address address, |
2daedcd6 | 3083 | Arm_address thumb_bit) |
c121c671 DK |
3084 | { |
3085 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3086 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3087 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3088 | Valtype addend = utils::sign_extend<31>(val); | |
2daedcd6 | 3089 | Valtype x = (psymval->value(object, addend) | thumb_bit) - address; |
c121c671 DK |
3090 | val = utils::bit_select(val, x, 0x7fffffffU); |
3091 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3092 | return (utils::has_overflow<31>(x) ? | |
3093 | This::STATUS_OVERFLOW : This::STATUS_OKAY); | |
3094 | } | |
fd3c5f0b ILT |
3095 | |
3096 | // R_ARM_MOVW_ABS_NC: (S + A) | T | |
3097 | static inline typename This::Status | |
3098 | movw_abs_nc(unsigned char *view, | |
3099 | const Sized_relobj<32, big_endian>* object, | |
3100 | const Symbol_value<32>* psymval, | |
2daedcd6 | 3101 | Arm_address thumb_bit) |
fd3c5f0b ILT |
3102 | { |
3103 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3104 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3105 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3106 | Valtype addend = This::extract_arm_movw_movt_addend(val); | |
2daedcd6 | 3107 | Valtype x = psymval->value(object, addend) | thumb_bit; |
fd3c5f0b ILT |
3108 | val = This::insert_val_arm_movw_movt(val, x); |
3109 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3110 | return This::STATUS_OKAY; | |
3111 | } | |
3112 | ||
3113 | // R_ARM_MOVT_ABS: S + A | |
3114 | static inline typename This::Status | |
3115 | movt_abs(unsigned char *view, | |
3116 | const Sized_relobj<32, big_endian>* object, | |
3117 | const Symbol_value<32>* psymval) | |
3118 | { | |
3119 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3120 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3121 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3122 | Valtype addend = This::extract_arm_movw_movt_addend(val); | |
2daedcd6 | 3123 | Valtype x = psymval->value(object, addend) >> 16; |
fd3c5f0b ILT |
3124 | val = This::insert_val_arm_movw_movt(val, x); |
3125 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3126 | return This::STATUS_OKAY; | |
3127 | } | |
3128 | ||
3129 | // R_ARM_THM_MOVW_ABS_NC: S + A | T | |
3130 | static inline typename This::Status | |
3131 | thm_movw_abs_nc(unsigned char *view, | |
3132 | const Sized_relobj<32, big_endian>* object, | |
3133 | const Symbol_value<32>* psymval, | |
2daedcd6 | 3134 | Arm_address thumb_bit) |
fd3c5f0b ILT |
3135 | { |
3136 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3137 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
3138 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3139 | Reltype val = ((elfcpp::Swap<16, big_endian>::readval(wv) << 16) | |
3140 | | elfcpp::Swap<16, big_endian>::readval(wv + 1)); | |
3141 | Reltype addend = extract_thumb_movw_movt_addend(val); | |
2daedcd6 | 3142 | Reltype x = psymval->value(object, addend) | thumb_bit; |
fd3c5f0b ILT |
3143 | val = This::insert_val_thumb_movw_movt(val, x); |
3144 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); | |
3145 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); | |
3146 | return This::STATUS_OKAY; | |
3147 | } | |
3148 | ||
3149 | // R_ARM_THM_MOVT_ABS: S + A | |
3150 | static inline typename This::Status | |
3151 | thm_movt_abs(unsigned char *view, | |
3152 | const Sized_relobj<32, big_endian>* object, | |
3153 | const Symbol_value<32>* psymval) | |
3154 | { | |
3155 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3156 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
3157 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3158 | Reltype val = ((elfcpp::Swap<16, big_endian>::readval(wv) << 16) | |
3159 | | elfcpp::Swap<16, big_endian>::readval(wv + 1)); | |
3160 | Reltype addend = This::extract_thumb_movw_movt_addend(val); | |
2daedcd6 | 3161 | Reltype x = psymval->value(object, addend) >> 16; |
fd3c5f0b ILT |
3162 | val = This::insert_val_thumb_movw_movt(val, x); |
3163 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); | |
3164 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); | |
3165 | return This::STATUS_OKAY; | |
3166 | } | |
3167 | ||
c2a122b6 | 3168 | // R_ARM_MOVW_PREL_NC: (S + A) | T - P |
02961d7e | 3169 | // R_ARM_MOVW_BREL_NC: ((S + A) | T) – B(S) |
c2a122b6 | 3170 | static inline typename This::Status |
02961d7e ILT |
3171 | movw_rel_nc(unsigned char* view, |
3172 | const Sized_relobj<32, big_endian>* object, | |
3173 | const Symbol_value<32>* psymval, | |
3174 | Arm_address address, | |
3175 | Arm_address thumb_bit) | |
c2a122b6 ILT |
3176 | { |
3177 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3178 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3179 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3180 | Valtype addend = This::extract_arm_movw_movt_addend(val); | |
2daedcd6 | 3181 | Valtype x = (psymval->value(object, addend) | thumb_bit) - address; |
c2a122b6 ILT |
3182 | val = This::insert_val_arm_movw_movt(val, x); |
3183 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3184 | return This::STATUS_OKAY; | |
3185 | } | |
3186 | ||
02961d7e ILT |
3187 | // R_ARM_MOVW_BREL: ((S + A) | T) – B(S) |
3188 | static inline typename This::Status | |
3189 | movw_rel(unsigned char* view, | |
3190 | const Sized_relobj<32, big_endian>* object, | |
3191 | const Symbol_value<32>* psymval, | |
3192 | Arm_address address, | |
3193 | Arm_address thumb_bit) | |
3194 | { | |
3195 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3196 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3197 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3198 | Valtype addend = This::extract_arm_movw_movt_addend(val); | |
3199 | Valtype x = (psymval->value(object, addend) | thumb_bit) - address; | |
3200 | val = This::insert_val_arm_movw_movt(val, x); | |
3201 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3202 | return ((x >= 0x10000) ? | |
3203 | This::STATUS_OVERFLOW : This::STATUS_OKAY); | |
3204 | } | |
3205 | ||
c2a122b6 | 3206 | // R_ARM_MOVT_PREL: S + A - P |
02961d7e | 3207 | // R_ARM_MOVT_BREL: S + A – B(S) |
c2a122b6 | 3208 | static inline typename This::Status |
02961d7e ILT |
3209 | movt_rel(unsigned char* view, |
3210 | const Sized_relobj<32, big_endian>* object, | |
3211 | const Symbol_value<32>* psymval, | |
3212 | Arm_address address) | |
c2a122b6 ILT |
3213 | { |
3214 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3215 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3216 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3217 | Valtype addend = This::extract_arm_movw_movt_addend(val); | |
2daedcd6 | 3218 | Valtype x = (psymval->value(object, addend) - address) >> 16; |
c2a122b6 ILT |
3219 | val = This::insert_val_arm_movw_movt(val, x); |
3220 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3221 | return This::STATUS_OKAY; | |
3222 | } | |
3223 | ||
3224 | // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P | |
02961d7e | 3225 | // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) – B(S) |
c2a122b6 | 3226 | static inline typename This::Status |
02961d7e ILT |
3227 | thm_movw_rel_nc(unsigned char *view, |
3228 | const Sized_relobj<32, big_endian>* object, | |
3229 | const Symbol_value<32>* psymval, | |
3230 | Arm_address address, | |
3231 | Arm_address thumb_bit) | |
c2a122b6 ILT |
3232 | { |
3233 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3234 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
3235 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3236 | Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) | |
3237 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
3238 | Reltype addend = This::extract_thumb_movw_movt_addend(val); | |
2daedcd6 | 3239 | Reltype x = (psymval->value(object, addend) | thumb_bit) - address; |
c2a122b6 ILT |
3240 | val = This::insert_val_thumb_movw_movt(val, x); |
3241 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); | |
3242 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); | |
3243 | return This::STATUS_OKAY; | |
3244 | } | |
3245 | ||
02961d7e ILT |
3246 | // R_ARM_THM_MOVW_BREL: ((S + A) | T) – B(S) |
3247 | static inline typename This::Status | |
3248 | thm_movw_rel(unsigned char *view, | |
3249 | const Sized_relobj<32, big_endian>* object, | |
3250 | const Symbol_value<32>* psymval, | |
3251 | Arm_address address, | |
3252 | Arm_address thumb_bit) | |
3253 | { | |
3254 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3255 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
3256 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3257 | Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) | |
3258 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
3259 | Reltype addend = This::extract_thumb_movw_movt_addend(val); | |
3260 | Reltype x = (psymval->value(object, addend) | thumb_bit) - address; | |
3261 | val = This::insert_val_thumb_movw_movt(val, x); | |
3262 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); | |
3263 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); | |
3264 | return ((x >= 0x10000) ? | |
3265 | This::STATUS_OVERFLOW : This::STATUS_OKAY); | |
3266 | } | |
3267 | ||
c2a122b6 | 3268 | // R_ARM_THM_MOVT_PREL: S + A - P |
02961d7e | 3269 | // R_ARM_THM_MOVT_BREL: S + A – B(S) |
c2a122b6 | 3270 | static inline typename This::Status |
02961d7e ILT |
3271 | thm_movt_rel(unsigned char* view, |
3272 | const Sized_relobj<32, big_endian>* object, | |
3273 | const Symbol_value<32>* psymval, | |
3274 | Arm_address address) | |
c2a122b6 ILT |
3275 | { |
3276 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3277 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; | |
3278 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3279 | Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) | |
3280 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
3281 | Reltype addend = This::extract_thumb_movw_movt_addend(val); | |
2daedcd6 | 3282 | Reltype x = (psymval->value(object, addend) - address) >> 16; |
c2a122b6 ILT |
3283 | val = This::insert_val_thumb_movw_movt(val, x); |
3284 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); | |
3285 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); | |
3286 | return This::STATUS_OKAY; | |
3287 | } | |
a2162063 ILT |
3288 | |
3289 | // R_ARM_V4BX | |
3290 | static inline typename This::Status | |
3291 | v4bx(const Relocate_info<32, big_endian>* relinfo, | |
3292 | unsigned char *view, | |
3293 | const Arm_relobj<big_endian>* object, | |
3294 | const Arm_address address, | |
3295 | const bool is_interworking) | |
3296 | { | |
3297 | ||
3298 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3299 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3300 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3301 | ||
3302 | // Ensure that we have a BX instruction. | |
3303 | gold_assert((val & 0x0ffffff0) == 0x012fff10); | |
3304 | const uint32_t reg = (val & 0xf); | |
3305 | if (is_interworking && reg != 0xf) | |
3306 | { | |
3307 | Stub_table<big_endian>* stub_table = | |
3308 | object->stub_table(relinfo->data_shndx); | |
3309 | gold_assert(stub_table != NULL); | |
3310 | ||
3311 | Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg); | |
3312 | gold_assert(stub != NULL); | |
3313 | ||
3314 | int32_t veneer_address = | |
3315 | stub_table->address() + stub->offset() - 8 - address; | |
3316 | gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET) | |
3317 | && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET)); | |
3318 | // Replace with a branch to veneer (B <addr>) | |
3319 | val = (val & 0xf0000000) | 0x0a000000 | |
3320 | | ((veneer_address >> 2) & 0x00ffffff); | |
3321 | } | |
3322 | else | |
3323 | { | |
3324 | // Preserve Rm (lowest four bits) and the condition code | |
3325 | // (highest four bits). Other bits encode MOV PC,Rm. | |
3326 | val = (val & 0xf000000f) | 0x01a0f000; | |
3327 | } | |
3328 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3329 | return This::STATUS_OKAY; | |
3330 | } | |
b10d2873 ILT |
3331 | |
3332 | // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P | |
3333 | // R_ARM_ALU_PC_G0: ((S + A) | T) - P | |
3334 | // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P | |
3335 | // R_ARM_ALU_PC_G1: ((S + A) | T) - P | |
3336 | // R_ARM_ALU_PC_G2: ((S + A) | T) - P | |
3337 | // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S) | |
3338 | // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S) | |
3339 | // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S) | |
3340 | // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S) | |
3341 | // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S) | |
3342 | static inline typename This::Status | |
3343 | arm_grp_alu(unsigned char* view, | |
3344 | const Sized_relobj<32, big_endian>* object, | |
3345 | const Symbol_value<32>* psymval, | |
3346 | const int group, | |
3347 | Arm_address address, | |
3348 | Arm_address thumb_bit, | |
3349 | bool check_overflow) | |
3350 | { | |
3351 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3352 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3353 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); | |
3354 | ||
3355 | // ALU group relocations are allowed only for the ADD/SUB instructions. | |
3356 | // (0x00800000 - ADD, 0x00400000 - SUB) | |
3357 | const Valtype opcode = insn & 0x01e00000; | |
3358 | if (opcode != 0x00800000 && opcode != 0x00400000) | |
3359 | return This::STATUS_BAD_RELOC; | |
3360 | ||
3361 | // Determine a sign for the addend. | |
3362 | const int sign = (opcode == 0x00800000) ? 1 : -1; | |
3363 | // shifter = rotate_imm * 2 | |
3364 | const uint32_t shifter = (insn & 0xf00) >> 7; | |
3365 | // Initial addend value. | |
3366 | int32_t addend = insn & 0xff; | |
3367 | // Rotate addend right by shifter. | |
3368 | addend = (addend >> shifter) | (addend << (32 - shifter)); | |
3369 | // Apply a sign to the added. | |
3370 | addend *= sign; | |
3371 | ||
3372 | int32_t x = ((psymval->value(object, addend) | thumb_bit) - address); | |
3373 | Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group); | |
3374 | // Check for overflow if required | |
3375 | if (check_overflow | |
3376 | && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0)) | |
3377 | return This::STATUS_OVERFLOW; | |
3378 | ||
3379 | // Mask out the value and the ADD/SUB part of the opcode; take care | |
3380 | // not to destroy the S bit. | |
3381 | insn &= 0xff1ff000; | |
3382 | // Set the opcode according to whether the value to go in the | |
3383 | // place is negative. | |
3384 | insn |= ((x < 0) ? 0x00400000 : 0x00800000); | |
3385 | // Encode the offset (encoded Gn). | |
3386 | insn |= gn; | |
3387 | ||
3388 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); | |
3389 | return This::STATUS_OKAY; | |
3390 | } | |
3391 | ||
3392 | // R_ARM_LDR_PC_G0: S + A - P | |
3393 | // R_ARM_LDR_PC_G1: S + A - P | |
3394 | // R_ARM_LDR_PC_G2: S + A - P | |
3395 | // R_ARM_LDR_SB_G0: S + A - B(S) | |
3396 | // R_ARM_LDR_SB_G1: S + A - B(S) | |
3397 | // R_ARM_LDR_SB_G2: S + A - B(S) | |
3398 | static inline typename This::Status | |
3399 | arm_grp_ldr(unsigned char* view, | |
3400 | const Sized_relobj<32, big_endian>* object, | |
3401 | const Symbol_value<32>* psymval, | |
3402 | const int group, | |
3403 | Arm_address address) | |
3404 | { | |
3405 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3406 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3407 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); | |
3408 | ||
3409 | const int sign = (insn & 0x00800000) ? 1 : -1; | |
3410 | int32_t addend = (insn & 0xfff) * sign; | |
3411 | int32_t x = (psymval->value(object, addend) - address); | |
3412 | // Calculate the relevant G(n-1) value to obtain this stage residual. | |
3413 | Valtype residual = | |
3414 | Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); | |
3415 | if (residual >= 0x1000) | |
3416 | return This::STATUS_OVERFLOW; | |
3417 | ||
3418 | // Mask out the value and U bit. | |
3419 | insn &= 0xff7ff000; | |
3420 | // Set the U bit for non-negative values. | |
3421 | if (x >= 0) | |
3422 | insn |= 0x00800000; | |
3423 | insn |= residual; | |
3424 | ||
3425 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); | |
3426 | return This::STATUS_OKAY; | |
3427 | } | |
3428 | ||
3429 | // R_ARM_LDRS_PC_G0: S + A - P | |
3430 | // R_ARM_LDRS_PC_G1: S + A - P | |
3431 | // R_ARM_LDRS_PC_G2: S + A - P | |
3432 | // R_ARM_LDRS_SB_G0: S + A - B(S) | |
3433 | // R_ARM_LDRS_SB_G1: S + A - B(S) | |
3434 | // R_ARM_LDRS_SB_G2: S + A - B(S) | |
3435 | static inline typename This::Status | |
3436 | arm_grp_ldrs(unsigned char* view, | |
3437 | const Sized_relobj<32, big_endian>* object, | |
3438 | const Symbol_value<32>* psymval, | |
3439 | const int group, | |
3440 | Arm_address address) | |
3441 | { | |
3442 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3443 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3444 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); | |
3445 | ||
3446 | const int sign = (insn & 0x00800000) ? 1 : -1; | |
3447 | int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign; | |
3448 | int32_t x = (psymval->value(object, addend) - address); | |
3449 | // Calculate the relevant G(n-1) value to obtain this stage residual. | |
3450 | Valtype residual = | |
3451 | Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); | |
3452 | if (residual >= 0x100) | |
3453 | return This::STATUS_OVERFLOW; | |
3454 | ||
3455 | // Mask out the value and U bit. | |
3456 | insn &= 0xff7ff0f0; | |
3457 | // Set the U bit for non-negative values. | |
3458 | if (x >= 0) | |
3459 | insn |= 0x00800000; | |
3460 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
3461 | ||
3462 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); | |
3463 | return This::STATUS_OKAY; | |
3464 | } | |
3465 | ||
3466 | // R_ARM_LDC_PC_G0: S + A - P | |
3467 | // R_ARM_LDC_PC_G1: S + A - P | |
3468 | // R_ARM_LDC_PC_G2: S + A - P | |
3469 | // R_ARM_LDC_SB_G0: S + A - B(S) | |
3470 | // R_ARM_LDC_SB_G1: S + A - B(S) | |
3471 | // R_ARM_LDC_SB_G2: S + A - B(S) | |
3472 | static inline typename This::Status | |
3473 | arm_grp_ldc(unsigned char* view, | |
3474 | const Sized_relobj<32, big_endian>* object, | |
3475 | const Symbol_value<32>* psymval, | |
3476 | const int group, | |
3477 | Arm_address address) | |
3478 | { | |
3479 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3480 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3481 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); | |
3482 | ||
3483 | const int sign = (insn & 0x00800000) ? 1 : -1; | |
3484 | int32_t addend = ((insn & 0xff) << 2) * sign; | |
3485 | int32_t x = (psymval->value(object, addend) - address); | |
3486 | // Calculate the relevant G(n-1) value to obtain this stage residual. | |
3487 | Valtype residual = | |
3488 | Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); | |
3489 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
3490 | return This::STATUS_OVERFLOW; | |
3491 | ||
3492 | // Mask out the value and U bit. | |
3493 | insn &= 0xff7fff00; | |
3494 | // Set the U bit for non-negative values. | |
3495 | if (x >= 0) | |
3496 | insn |= 0x00800000; | |
3497 | insn |= (residual >> 2); | |
3498 | ||
3499 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); | |
3500 | return This::STATUS_OKAY; | |
3501 | } | |
c121c671 DK |
3502 | }; |
3503 | ||
d204b6e9 DK |
3504 | // Relocate ARM long branches. This handles relocation types |
3505 | // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25. | |
3506 | // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly | |
3507 | // undefined and we do not use PLT in this relocation. In such a case, | |
3508 | // the branch is converted into an NOP. | |
3509 | ||
3510 | template<bool big_endian> | |
3511 | typename Arm_relocate_functions<big_endian>::Status | |
3512 | Arm_relocate_functions<big_endian>::arm_branch_common( | |
3513 | unsigned int r_type, | |
3514 | const Relocate_info<32, big_endian>* relinfo, | |
3515 | unsigned char *view, | |
3516 | const Sized_symbol<32>* gsym, | |
3517 | const Arm_relobj<big_endian>* object, | |
3518 | unsigned int r_sym, | |
3519 | const Symbol_value<32>* psymval, | |
3520 | Arm_address address, | |
3521 | Arm_address thumb_bit, | |
3522 | bool is_weakly_undefined_without_plt) | |
3523 | { | |
3524 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
3525 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3526 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
3527 | ||
3528 | bool insn_is_b = (((val >> 28) & 0xf) <= 0xe) | |
3529 | && ((val & 0x0f000000UL) == 0x0a000000UL); | |
3530 | bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL; | |
3531 | bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe) | |
3532 | && ((val & 0x0f000000UL) == 0x0b000000UL); | |
3533 | bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL; | |
3534 | bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL; | |
3535 | ||
3536 | // Check that the instruction is valid. | |
3537 | if (r_type == elfcpp::R_ARM_CALL) | |
3538 | { | |
3539 | if (!insn_is_uncond_bl && !insn_is_blx) | |
3540 | return This::STATUS_BAD_RELOC; | |
3541 | } | |
3542 | else if (r_type == elfcpp::R_ARM_JUMP24) | |
3543 | { | |
3544 | if (!insn_is_b && !insn_is_cond_bl) | |
3545 | return This::STATUS_BAD_RELOC; | |
3546 | } | |
3547 | else if (r_type == elfcpp::R_ARM_PLT32) | |
3548 | { | |
3549 | if (!insn_is_any_branch) | |
3550 | return This::STATUS_BAD_RELOC; | |
3551 | } | |
3552 | else if (r_type == elfcpp::R_ARM_XPC25) | |
3553 | { | |
3554 | // FIXME: AAELF document IH0044C does not say much about it other | |
3555 | // than it being obsolete. | |
3556 | if (!insn_is_any_branch) | |
3557 | return This::STATUS_BAD_RELOC; | |
3558 | } | |
3559 | else | |
3560 | gold_unreachable(); | |
3561 | ||
3562 | // A branch to an undefined weak symbol is turned into a jump to | |
3563 | // the next instruction unless a PLT entry will be created. | |
3564 | // Do the same for local undefined symbols. | |
3565 | // The jump to the next instruction is optimized as a NOP depending | |
3566 | // on the architecture. | |
3567 | const Target_arm<big_endian>* arm_target = | |
3568 | Target_arm<big_endian>::default_target(); | |
3569 | if (is_weakly_undefined_without_plt) | |
3570 | { | |
3571 | Valtype cond = val & 0xf0000000U; | |
3572 | if (arm_target->may_use_arm_nop()) | |
3573 | val = cond | 0x0320f000; | |
3574 | else | |
3575 | val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0. | |
3576 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3577 | return This::STATUS_OKAY; | |
3578 | } | |
3579 | ||
3580 | Valtype addend = utils::sign_extend<26>(val << 2); | |
3581 | Valtype branch_target = psymval->value(object, addend); | |
3582 | int32_t branch_offset = branch_target - address; | |
3583 | ||
3584 | // We need a stub if the branch offset is too large or if we need | |
3585 | // to switch mode. | |
3586 | bool may_use_blx = arm_target->may_use_blx(); | |
3587 | Reloc_stub* stub = NULL; | |
3588 | if ((branch_offset > ARM_MAX_FWD_BRANCH_OFFSET) | |
3589 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
3590 | || ((thumb_bit != 0) && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))) | |
3591 | { | |
3592 | Stub_type stub_type = | |
3593 | Reloc_stub::stub_type_for_reloc(r_type, address, branch_target, | |
3594 | (thumb_bit != 0)); | |
3595 | if (stub_type != arm_stub_none) | |
3596 | { | |
2ea97941 | 3597 | Stub_table<big_endian>* stub_table = |
d204b6e9 | 3598 | object->stub_table(relinfo->data_shndx); |
2ea97941 | 3599 | gold_assert(stub_table != NULL); |
d204b6e9 DK |
3600 | |
3601 | Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); | |
2ea97941 | 3602 | stub = stub_table->find_reloc_stub(stub_key); |
d204b6e9 DK |
3603 | gold_assert(stub != NULL); |
3604 | thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; | |
2ea97941 | 3605 | branch_target = stub_table->address() + stub->offset() + addend; |
d204b6e9 DK |
3606 | branch_offset = branch_target - address; |
3607 | gold_assert((branch_offset <= ARM_MAX_FWD_BRANCH_OFFSET) | |
3608 | && (branch_offset >= ARM_MAX_BWD_BRANCH_OFFSET)); | |
3609 | } | |
3610 | } | |
3611 | ||
3612 | // At this point, if we still need to switch mode, the instruction | |
3613 | // must either be a BLX or a BL that can be converted to a BLX. | |
3614 | if (thumb_bit != 0) | |
3615 | { | |
3616 | // Turn BL to BLX. | |
3617 | gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL); | |
3618 | val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23); | |
3619 | } | |
3620 | ||
3621 | val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL); | |
3622 | elfcpp::Swap<32, big_endian>::writeval(wv, val); | |
3623 | return (utils::has_overflow<26>(branch_offset) | |
3624 | ? This::STATUS_OVERFLOW : This::STATUS_OKAY); | |
3625 | } | |
3626 | ||
51938283 DK |
3627 | // Relocate THUMB long branches. This handles relocation types |
3628 | // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22. | |
3629 | // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly | |
3630 | // undefined and we do not use PLT in this relocation. In such a case, | |
3631 | // the branch is converted into an NOP. | |
3632 | ||
3633 | template<bool big_endian> | |
3634 | typename Arm_relocate_functions<big_endian>::Status | |
3635 | Arm_relocate_functions<big_endian>::thumb_branch_common( | |
3636 | unsigned int r_type, | |
3637 | const Relocate_info<32, big_endian>* relinfo, | |
3638 | unsigned char *view, | |
3639 | const Sized_symbol<32>* gsym, | |
3640 | const Arm_relobj<big_endian>* object, | |
3641 | unsigned int r_sym, | |
3642 | const Symbol_value<32>* psymval, | |
3643 | Arm_address address, | |
3644 | Arm_address thumb_bit, | |
3645 | bool is_weakly_undefined_without_plt) | |
3646 | { | |
3647 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3648 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3649 | uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); | |
3650 | uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
3651 | ||
3652 | // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference | |
3653 | // into account. | |
3654 | bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U; | |
3655 | bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U; | |
3656 | ||
3657 | // Check that the instruction is valid. | |
3658 | if (r_type == elfcpp::R_ARM_THM_CALL) | |
3659 | { | |
3660 | if (!is_bl_insn && !is_blx_insn) | |
3661 | return This::STATUS_BAD_RELOC; | |
3662 | } | |
3663 | else if (r_type == elfcpp::R_ARM_THM_JUMP24) | |
3664 | { | |
3665 | // This cannot be a BLX. | |
3666 | if (!is_bl_insn) | |
3667 | return This::STATUS_BAD_RELOC; | |
3668 | } | |
3669 | else if (r_type == elfcpp::R_ARM_THM_XPC22) | |
3670 | { | |
3671 | // Check for Thumb to Thumb call. | |
3672 | if (!is_blx_insn) | |
3673 | return This::STATUS_BAD_RELOC; | |
3674 | if (thumb_bit != 0) | |
3675 | { | |
3676 | gold_warning(_("%s: Thumb BLX instruction targets " | |
3677 | "thumb function '%s'."), | |
3678 | object->name().c_str(), | |
3679 | (gsym ? gsym->name() : "(local)")); | |
3680 | // Convert BLX to BL. | |
3681 | lower_insn |= 0x1000U; | |
3682 | } | |
3683 | } | |
3684 | else | |
3685 | gold_unreachable(); | |
3686 | ||
3687 | // A branch to an undefined weak symbol is turned into a jump to | |
3688 | // the next instruction unless a PLT entry will be created. | |
3689 | // The jump to the next instruction is optimized as a NOP.W for | |
3690 | // Thumb-2 enabled architectures. | |
3691 | const Target_arm<big_endian>* arm_target = | |
3692 | Target_arm<big_endian>::default_target(); | |
3693 | if (is_weakly_undefined_without_plt) | |
3694 | { | |
3695 | if (arm_target->may_use_thumb2_nop()) | |
3696 | { | |
3697 | elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af); | |
3698 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000); | |
3699 | } | |
3700 | else | |
3701 | { | |
3702 | elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000); | |
3703 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00); | |
3704 | } | |
3705 | return This::STATUS_OKAY; | |
3706 | } | |
3707 | ||
089d69dc | 3708 | int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn); |
51938283 DK |
3709 | Arm_address branch_target = psymval->value(object, addend); |
3710 | int32_t branch_offset = branch_target - address; | |
3711 | ||
3712 | // We need a stub if the branch offset is too large or if we need | |
3713 | // to switch mode. | |
3714 | bool may_use_blx = arm_target->may_use_blx(); | |
3715 | bool thumb2 = arm_target->using_thumb2(); | |
3716 | if ((!thumb2 | |
3717 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
3718 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
3719 | || (thumb2 | |
3720 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
3721 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
3722 | || ((thumb_bit == 0) | |
3723 | && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) | |
3724 | || r_type == elfcpp::R_ARM_THM_JUMP24))) | |
3725 | { | |
3726 | Stub_type stub_type = | |
3727 | Reloc_stub::stub_type_for_reloc(r_type, address, branch_target, | |
3728 | (thumb_bit != 0)); | |
3729 | if (stub_type != arm_stub_none) | |
3730 | { | |
2ea97941 | 3731 | Stub_table<big_endian>* stub_table = |
51938283 | 3732 | object->stub_table(relinfo->data_shndx); |
2ea97941 | 3733 | gold_assert(stub_table != NULL); |
51938283 DK |
3734 | |
3735 | Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); | |
2ea97941 | 3736 | Reloc_stub* stub = stub_table->find_reloc_stub(stub_key); |
51938283 DK |
3737 | gold_assert(stub != NULL); |
3738 | thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; | |
2ea97941 | 3739 | branch_target = stub_table->address() + stub->offset() + addend; |
51938283 DK |
3740 | branch_offset = branch_target - address; |
3741 | } | |
3742 | } | |
3743 | ||
3744 | // At this point, if we still need to switch mode, the instruction | |
3745 | // must either be a BLX or a BL that can be converted to a BLX. | |
3746 | if (thumb_bit == 0) | |
3747 | { | |
3748 | gold_assert(may_use_blx | |
3749 | && (r_type == elfcpp::R_ARM_THM_CALL | |
3750 | || r_type == elfcpp::R_ARM_THM_XPC22)); | |
3751 | // Make sure this is a BLX. | |
3752 | lower_insn &= ~0x1000U; | |
3753 | } | |
3754 | else | |
3755 | { | |
3756 | // Make sure this is a BL. | |
3757 | lower_insn |= 0x1000U; | |
3758 | } | |
3759 | ||
51938283 DK |
3760 | if ((lower_insn & 0x5000U) == 0x4000U) |
3761 | // For a BLX instruction, make sure that the relocation is rounded up | |
3762 | // to a word boundary. This follows the semantics of the instruction | |
3763 | // which specifies that bit 1 of the target address will come from bit | |
3764 | // 1 of the base address. | |
089d69dc | 3765 | branch_offset = (branch_offset + 2) & ~3; |
51938283 DK |
3766 | |
3767 | // Put BRANCH_OFFSET back into the insn. Assumes two's complement. | |
3768 | // We use the Thumb-2 encoding, which is safe even if dealing with | |
3769 | // a Thumb-1 instruction by virtue of our overflow check above. */ | |
089d69dc DK |
3770 | upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset); |
3771 | lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset); | |
51938283 DK |
3772 | |
3773 | elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); | |
3774 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); | |
3775 | ||
3776 | return ((thumb2 | |
089d69dc DK |
3777 | ? utils::has_overflow<25>(branch_offset) |
3778 | : utils::has_overflow<23>(branch_offset)) | |
3779 | ? This::STATUS_OVERFLOW | |
3780 | : This::STATUS_OKAY); | |
3781 | } | |
3782 | ||
3783 | // Relocate THUMB-2 long conditional branches. | |
3784 | // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly | |
3785 | // undefined and we do not use PLT in this relocation. In such a case, | |
3786 | // the branch is converted into an NOP. | |
3787 | ||
3788 | template<bool big_endian> | |
3789 | typename Arm_relocate_functions<big_endian>::Status | |
3790 | Arm_relocate_functions<big_endian>::thm_jump19( | |
3791 | unsigned char *view, | |
3792 | const Arm_relobj<big_endian>* object, | |
3793 | const Symbol_value<32>* psymval, | |
3794 | Arm_address address, | |
3795 | Arm_address thumb_bit) | |
3796 | { | |
3797 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
3798 | Valtype* wv = reinterpret_cast<Valtype*>(view); | |
3799 | uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); | |
3800 | uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
3801 | int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn); | |
3802 | ||
3803 | Arm_address branch_target = psymval->value(object, addend); | |
3804 | int32_t branch_offset = branch_target - address; | |
3805 | ||
3806 | // ??? Should handle interworking? GCC might someday try to | |
3807 | // use this for tail calls. | |
3808 | // FIXME: We do support thumb entry to PLT yet. | |
3809 | if (thumb_bit == 0) | |
3810 | { | |
3811 | gold_error(_("conditional branch to PLT in THUMB-2 not supported yet.")); | |
3812 | return This::STATUS_BAD_RELOC; | |
3813 | } | |
3814 | ||
3815 | // Put RELOCATION back into the insn. | |
3816 | upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset); | |
3817 | lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset); | |
3818 | ||
3819 | // Put the relocated value back in the object file: | |
3820 | elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); | |
3821 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); | |
3822 | ||
3823 | return (utils::has_overflow<21>(branch_offset) | |
51938283 DK |
3824 | ? This::STATUS_OVERFLOW |
3825 | : This::STATUS_OKAY); | |
3826 | } | |
3827 | ||
94cdfcff DK |
3828 | // Get the GOT section, creating it if necessary. |
3829 | ||
3830 | template<bool big_endian> | |
3831 | Output_data_got<32, big_endian>* | |
3832 | Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout) | |
3833 | { | |
3834 | if (this->got_ == NULL) | |
3835 | { | |
3836 | gold_assert(symtab != NULL && layout != NULL); | |
3837 | ||
3838 | this->got_ = new Output_data_got<32, big_endian>(); | |
3839 | ||
3840 | Output_section* os; | |
3841 | os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, | |
3842 | (elfcpp::SHF_ALLOC | |
3843 | | elfcpp::SHF_WRITE), | |
1a2dff53 ILT |
3844 | this->got_, false, true, true, |
3845 | false); | |
94cdfcff DK |
3846 | |
3847 | // The old GNU linker creates a .got.plt section. We just | |
3848 | // create another set of data in the .got section. Note that we | |
3849 | // always create a PLT if we create a GOT, although the PLT | |
3850 | // might be empty. | |
3851 | this->got_plt_ = new Output_data_space(4, "** GOT PLT"); | |
3852 | os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, | |
3853 | (elfcpp::SHF_ALLOC | |
3854 | | elfcpp::SHF_WRITE), | |
1a2dff53 ILT |
3855 | this->got_plt_, false, false, |
3856 | false, true); | |
94cdfcff DK |
3857 | |
3858 | // The first three entries are reserved. | |
3859 | this->got_plt_->set_current_data_size(3 * 4); | |
3860 | ||
3861 | // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. | |
3862 | symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, | |
99fff23b | 3863 | Symbol_table::PREDEFINED, |
94cdfcff DK |
3864 | this->got_plt_, |
3865 | 0, 0, elfcpp::STT_OBJECT, | |
3866 | elfcpp::STB_LOCAL, | |
3867 | elfcpp::STV_HIDDEN, 0, | |
3868 | false, false); | |
3869 | } | |
3870 | return this->got_; | |
3871 | } | |
3872 | ||
3873 | // Get the dynamic reloc section, creating it if necessary. | |
3874 | ||
3875 | template<bool big_endian> | |
3876 | typename Target_arm<big_endian>::Reloc_section* | |
3877 | Target_arm<big_endian>::rel_dyn_section(Layout* layout) | |
3878 | { | |
3879 | if (this->rel_dyn_ == NULL) | |
3880 | { | |
3881 | gold_assert(layout != NULL); | |
3882 | this->rel_dyn_ = new Reloc_section(parameters->options().combreloc()); | |
3883 | layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, | |
1a2dff53 ILT |
3884 | elfcpp::SHF_ALLOC, this->rel_dyn_, true, |
3885 | false, false, false); | |
94cdfcff DK |
3886 | } |
3887 | return this->rel_dyn_; | |
3888 | } | |
3889 | ||
b569affa DK |
3890 | // Insn_template methods. |
3891 | ||
3892 | // Return byte size of an instruction template. | |
3893 | ||
3894 | size_t | |
3895 | Insn_template::size() const | |
3896 | { | |
3897 | switch (this->type()) | |
3898 | { | |
3899 | case THUMB16_TYPE: | |
2fb7225c | 3900 | case THUMB16_SPECIAL_TYPE: |
b569affa DK |
3901 | return 2; |
3902 | case ARM_TYPE: | |
3903 | case THUMB32_TYPE: | |
3904 | case DATA_TYPE: | |
3905 | return 4; | |
3906 | default: | |
3907 | gold_unreachable(); | |
3908 | } | |
3909 | } | |
3910 | ||
3911 | // Return alignment of an instruction template. | |
3912 | ||
3913 | unsigned | |
3914 | Insn_template::alignment() const | |
3915 | { | |
3916 | switch (this->type()) | |
3917 | { | |
3918 | case THUMB16_TYPE: | |
2fb7225c | 3919 | case THUMB16_SPECIAL_TYPE: |
b569affa DK |
3920 | case THUMB32_TYPE: |
3921 | return 2; | |
3922 | case ARM_TYPE: | |
3923 | case DATA_TYPE: | |
3924 | return 4; | |
3925 | default: | |
3926 | gold_unreachable(); | |
3927 | } | |
3928 | } | |
3929 | ||
3930 | // Stub_template methods. | |
3931 | ||
3932 | Stub_template::Stub_template( | |
2ea97941 ILT |
3933 | Stub_type type, const Insn_template* insns, |
3934 | size_t insn_count) | |
3935 | : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1), | |
b569affa DK |
3936 | entry_in_thumb_mode_(false), relocs_() |
3937 | { | |
2ea97941 | 3938 | off_t offset = 0; |
b569affa DK |
3939 | |
3940 | // Compute byte size and alignment of stub template. | |
2ea97941 | 3941 | for (size_t i = 0; i < insn_count; i++) |
b569affa | 3942 | { |
2ea97941 ILT |
3943 | unsigned insn_alignment = insns[i].alignment(); |
3944 | size_t insn_size = insns[i].size(); | |
3945 | gold_assert((offset & (insn_alignment - 1)) == 0); | |
b569affa | 3946 | this->alignment_ = std::max(this->alignment_, insn_alignment); |
2ea97941 | 3947 | switch (insns[i].type()) |
b569affa DK |
3948 | { |
3949 | case Insn_template::THUMB16_TYPE: | |
089d69dc | 3950 | case Insn_template::THUMB16_SPECIAL_TYPE: |
b569affa DK |
3951 | if (i == 0) |
3952 | this->entry_in_thumb_mode_ = true; | |
3953 | break; | |
3954 | ||
3955 | case Insn_template::THUMB32_TYPE: | |
2ea97941 ILT |
3956 | if (insns[i].r_type() != elfcpp::R_ARM_NONE) |
3957 | this->relocs_.push_back(Reloc(i, offset)); | |
b569affa DK |
3958 | if (i == 0) |
3959 | this->entry_in_thumb_mode_ = true; | |
3960 | break; | |
3961 | ||
3962 | case Insn_template::ARM_TYPE: | |
3963 | // Handle cases where the target is encoded within the | |
3964 | // instruction. | |
2ea97941 ILT |
3965 | if (insns[i].r_type() == elfcpp::R_ARM_JUMP24) |
3966 | this->relocs_.push_back(Reloc(i, offset)); | |
b569affa DK |
3967 | break; |
3968 | ||
3969 | case Insn_template::DATA_TYPE: | |
3970 | // Entry point cannot be data. | |
3971 | gold_assert(i != 0); | |
2ea97941 | 3972 | this->relocs_.push_back(Reloc(i, offset)); |
b569affa DK |
3973 | break; |
3974 | ||
3975 | default: | |
3976 | gold_unreachable(); | |
3977 | } | |
2ea97941 | 3978 | offset += insn_size; |
b569affa | 3979 | } |
2ea97941 | 3980 | this->size_ = offset; |
b569affa DK |
3981 | } |
3982 | ||
bb0d3eb0 DK |
3983 | // Stub methods. |
3984 | ||
3985 | // Template to implement do_write for a specific target endianity. | |
3986 | ||
3987 | template<bool big_endian> | |
3988 | void inline | |
3989 | Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size) | |
3990 | { | |
3991 | const Stub_template* stub_template = this->stub_template(); | |
3992 | const Insn_template* insns = stub_template->insns(); | |
3993 | ||
3994 | // FIXME: We do not handle BE8 encoding yet. | |
3995 | unsigned char* pov = view; | |
3996 | for (size_t i = 0; i < stub_template->insn_count(); i++) | |
3997 | { | |
3998 | switch (insns[i].type()) | |
3999 | { | |
4000 | case Insn_template::THUMB16_TYPE: | |
4001 | elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff); | |
4002 | break; | |
4003 | case Insn_template::THUMB16_SPECIAL_TYPE: | |
4004 | elfcpp::Swap<16, big_endian>::writeval( | |
4005 | pov, | |
4006 | this->thumb16_special(i)); | |
4007 | break; | |
4008 | case Insn_template::THUMB32_TYPE: | |
4009 | { | |
4010 | uint32_t hi = (insns[i].data() >> 16) & 0xffff; | |
4011 | uint32_t lo = insns[i].data() & 0xffff; | |
4012 | elfcpp::Swap<16, big_endian>::writeval(pov, hi); | |
4013 | elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo); | |
4014 | } | |
4015 | break; | |
4016 | case Insn_template::ARM_TYPE: | |
4017 | case Insn_template::DATA_TYPE: | |
4018 | elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data()); | |
4019 | break; | |
4020 | default: | |
4021 | gold_unreachable(); | |
4022 | } | |
4023 | pov += insns[i].size(); | |
4024 | } | |
4025 | gold_assert(static_cast<section_size_type>(pov - view) == view_size); | |
4026 | } | |
4027 | ||
b569affa DK |
4028 | // Reloc_stub::Key methods. |
4029 | ||
4030 | // Dump a Key as a string for debugging. | |
4031 | ||
4032 | std::string | |
4033 | Reloc_stub::Key::name() const | |
4034 | { | |
4035 | if (this->r_sym_ == invalid_index) | |
4036 | { | |
4037 | // Global symbol key name | |
4038 | // <stub-type>:<symbol name>:<addend>. | |
4039 | const std::string sym_name = this->u_.symbol->name(); | |
4040 | // We need to print two hex number and two colons. So just add 100 bytes | |
4041 | // to the symbol name size. | |
4042 | size_t len = sym_name.size() + 100; | |
4043 | char* buffer = new char[len]; | |
4044 | int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_, | |
4045 | sym_name.c_str(), this->addend_); | |
4046 | gold_assert(c > 0 && c < static_cast<int>(len)); | |
4047 | delete[] buffer; | |
4048 | return std::string(buffer); | |
4049 | } | |
4050 | else | |
4051 | { | |
4052 | // local symbol key name | |
4053 | // <stub-type>:<object>:<r_sym>:<addend>. | |
4054 | const size_t len = 200; | |
4055 | char buffer[len]; | |
4056 | int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_, | |
4057 | this->u_.relobj, this->r_sym_, this->addend_); | |
4058 | gold_assert(c > 0 && c < static_cast<int>(len)); | |
4059 | return std::string(buffer); | |
4060 | } | |
4061 | } | |
4062 | ||
4063 | // Reloc_stub methods. | |
4064 | ||
4065 | // Determine the type of stub needed, if any, for a relocation of R_TYPE at | |
4066 | // LOCATION to DESTINATION. | |
4067 | // This code is based on the arm_type_of_stub function in | |
4068 | // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub | |
4069 | // class simple. | |
4070 | ||
4071 | Stub_type | |
4072 | Reloc_stub::stub_type_for_reloc( | |
4073 | unsigned int r_type, | |
4074 | Arm_address location, | |
4075 | Arm_address destination, | |
4076 | bool target_is_thumb) | |
4077 | { | |
4078 | Stub_type stub_type = arm_stub_none; | |
4079 | ||
4080 | // This is a bit ugly but we want to avoid using a templated class for | |
4081 | // big and little endianities. | |
4082 | bool may_use_blx; | |
4083 | bool should_force_pic_veneer; | |
4084 | bool thumb2; | |
4085 | bool thumb_only; | |
4086 | if (parameters->target().is_big_endian()) | |
4087 | { | |
43d12afe | 4088 | const Target_arm<true>* big_endian_target = |
b569affa | 4089 | Target_arm<true>::default_target(); |
43d12afe DK |
4090 | may_use_blx = big_endian_target->may_use_blx(); |
4091 | should_force_pic_veneer = big_endian_target->should_force_pic_veneer(); | |
4092 | thumb2 = big_endian_target->using_thumb2(); | |
4093 | thumb_only = big_endian_target->using_thumb_only(); | |
b569affa DK |
4094 | } |
4095 | else | |
4096 | { | |
43d12afe | 4097 | const Target_arm<false>* little_endian_target = |
b569affa | 4098 | Target_arm<false>::default_target(); |
43d12afe DK |
4099 | may_use_blx = little_endian_target->may_use_blx(); |
4100 | should_force_pic_veneer = little_endian_target->should_force_pic_veneer(); | |
4101 | thumb2 = little_endian_target->using_thumb2(); | |
4102 | thumb_only = little_endian_target->using_thumb_only(); | |
b569affa DK |
4103 | } |
4104 | ||
4105 | int64_t branch_offset = (int64_t)destination - location; | |
4106 | ||
4107 | if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24) | |
4108 | { | |
4109 | // Handle cases where: | |
4110 | // - this call goes too far (different Thumb/Thumb2 max | |
4111 | // distance) | |
4112 | // - it's a Thumb->Arm call and blx is not available, or it's a | |
4113 | // Thumb->Arm branch (not bl). A stub is needed in this case. | |
4114 | if ((!thumb2 | |
4115 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
4116 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
4117 | || (thumb2 | |
4118 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
4119 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
4120 | || ((!target_is_thumb) | |
4121 | && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) | |
4122 | || (r_type == elfcpp::R_ARM_THM_JUMP24)))) | |
4123 | { | |
4124 | if (target_is_thumb) | |
4125 | { | |
4126 | // Thumb to thumb. | |
4127 | if (!thumb_only) | |
4128 | { | |
51938283 DK |
4129 | stub_type = (parameters->options().shared() |
4130 | || should_force_pic_veneer) | |
b569affa DK |
4131 | // PIC stubs. |
4132 | ? ((may_use_blx | |
4133 | && (r_type == elfcpp::R_ARM_THM_CALL)) | |
4134 | // V5T and above. Stub starts with ARM code, so | |
4135 | // we must be able to switch mode before | |
4136 | // reaching it, which is only possible for 'bl' | |
4137 | // (ie R_ARM_THM_CALL relocation). | |
4138 | ? arm_stub_long_branch_any_thumb_pic | |
4139 | // On V4T, use Thumb code only. | |
4140 | : arm_stub_long_branch_v4t_thumb_thumb_pic) | |
4141 | ||
4142 | // non-PIC stubs. | |
4143 | : ((may_use_blx | |
4144 | && (r_type == elfcpp::R_ARM_THM_CALL)) | |
4145 | ? arm_stub_long_branch_any_any // V5T and above. | |
4146 | : arm_stub_long_branch_v4t_thumb_thumb); // V4T. | |
4147 | } | |
4148 | else | |
4149 | { | |
51938283 DK |
4150 | stub_type = (parameters->options().shared() |
4151 | || should_force_pic_veneer) | |
b569affa DK |
4152 | ? arm_stub_long_branch_thumb_only_pic // PIC stub. |
4153 | : arm_stub_long_branch_thumb_only; // non-PIC stub. | |
4154 | } | |
4155 | } | |
4156 | else | |
4157 | { | |
4158 | // Thumb to arm. | |
4159 | ||
4160 | // FIXME: We should check that the input section is from an | |
4161 | // object that has interwork enabled. | |
4162 | ||
4163 | stub_type = (parameters->options().shared() | |
4164 | || should_force_pic_veneer) | |
4165 | // PIC stubs. | |
4166 | ? ((may_use_blx | |
4167 | && (r_type == elfcpp::R_ARM_THM_CALL)) | |
4168 | ? arm_stub_long_branch_any_arm_pic // V5T and above. | |
4169 | : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T. | |
4170 | ||
4171 | // non-PIC stubs. | |
4172 | : ((may_use_blx | |
4173 | && (r_type == elfcpp::R_ARM_THM_CALL)) | |
4174 | ? arm_stub_long_branch_any_any // V5T and above. | |
4175 | : arm_stub_long_branch_v4t_thumb_arm); // V4T. | |
4176 | ||
4177 | // Handle v4t short branches. | |
4178 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) | |
4179 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) | |
4180 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
4181 | stub_type = arm_stub_short_branch_v4t_thumb_arm; | |
4182 | } | |
4183 | } | |
4184 | } | |
4185 | else if (r_type == elfcpp::R_ARM_CALL | |
4186 | || r_type == elfcpp::R_ARM_JUMP24 | |
4187 | || r_type == elfcpp::R_ARM_PLT32) | |
4188 | { | |
4189 | if (target_is_thumb) | |
4190 | { | |
4191 | // Arm to thumb. | |
4192 | ||
4193 | // FIXME: We should check that the input section is from an | |
4194 | // object that has interwork enabled. | |
4195 | ||
4196 | // We have an extra 2-bytes reach because of | |
4197 | // the mode change (bit 24 (H) of BLX encoding). | |
4198 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) | |
4199 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
4200 | || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx) | |
4201 | || (r_type == elfcpp::R_ARM_JUMP24) | |
4202 | || (r_type == elfcpp::R_ARM_PLT32)) | |
4203 | { | |
4204 | stub_type = (parameters->options().shared() | |
4205 | || should_force_pic_veneer) | |
4206 | // PIC stubs. | |
4207 | ? (may_use_blx | |
4208 | ? arm_stub_long_branch_any_thumb_pic// V5T and above. | |
4209 | : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub. | |
4210 | ||
4211 | // non-PIC stubs. | |
4212 | : (may_use_blx | |
4213 | ? arm_stub_long_branch_any_any // V5T and above. | |
4214 | : arm_stub_long_branch_v4t_arm_thumb); // V4T. | |
4215 | } | |
4216 | } | |
4217 | else | |
4218 | { | |
4219 | // Arm to arm. | |
4220 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
4221 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
4222 | { | |
4223 | stub_type = (parameters->options().shared() | |
4224 | || should_force_pic_veneer) | |
4225 | ? arm_stub_long_branch_any_arm_pic // PIC stubs. | |
4226 | : arm_stub_long_branch_any_any; /// non-PIC. | |
4227 | } | |
4228 | } | |
4229 | } | |
4230 | ||
4231 | return stub_type; | |
4232 | } | |
4233 | ||
bb0d3eb0 | 4234 | // Cortex_a8_stub methods. |
b569affa | 4235 | |
bb0d3eb0 DK |
4236 | // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template. |
4237 | // I is the position of the instruction template in the stub template. | |
b569affa | 4238 | |
bb0d3eb0 DK |
4239 | uint16_t |
4240 | Cortex_a8_stub::do_thumb16_special(size_t i) | |
b569affa | 4241 | { |
bb0d3eb0 DK |
4242 | // The only use of this is to copy condition code from a conditional |
4243 | // branch being worked around to the corresponding conditional branch in | |
4244 | // to the stub. | |
4245 | gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond | |
4246 | && i == 0); | |
4247 | uint16_t data = this->stub_template()->insns()[i].data(); | |
4248 | gold_assert((data & 0xff00U) == 0xd000U); | |
4249 | data |= ((this->original_insn_ >> 22) & 0xf) << 8; | |
4250 | return data; | |
b569affa DK |
4251 | } |
4252 | ||
4253 | // Stub_factory methods. | |
4254 | ||
4255 | Stub_factory::Stub_factory() | |
4256 | { | |
4257 | // The instruction template sequences are declared as static | |
4258 | // objects and initialized first time the constructor runs. | |
4259 | ||
4260 | // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx | |
4261 | // to reach the stub if necessary. | |
4262 | static const Insn_template elf32_arm_stub_long_branch_any_any[] = | |
4263 | { | |
4264 | Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] | |
4265 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), | |
4266 | // dcd R_ARM_ABS32(X) | |
4267 | }; | |
4268 | ||
4269 | // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not | |
4270 | // available. | |
4271 | static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] = | |
4272 | { | |
4273 | Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] | |
4274 | Insn_template::arm_insn(0xe12fff1c), // bx ip | |
4275 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), | |
4276 | // dcd R_ARM_ABS32(X) | |
4277 | }; | |
4278 | ||
4279 | // Thumb -> Thumb long branch stub. Used on M-profile architectures. | |
4280 | static const Insn_template elf32_arm_stub_long_branch_thumb_only[] = | |
4281 | { | |
4282 | Insn_template::thumb16_insn(0xb401), // push {r0} | |
4283 | Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] | |
4284 | Insn_template::thumb16_insn(0x4684), // mov ip, r0 | |
4285 | Insn_template::thumb16_insn(0xbc01), // pop {r0} | |
4286 | Insn_template::thumb16_insn(0x4760), // bx ip | |
4287 | Insn_template::thumb16_insn(0xbf00), // nop | |
4288 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), | |
4289 | // dcd R_ARM_ABS32(X) | |
4290 | }; | |
4291 | ||
4292 | // V4T Thumb -> Thumb long branch stub. Using the stack is not | |
4293 | // allowed. | |
4294 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
4295 | { | |
4296 | Insn_template::thumb16_insn(0x4778), // bx pc | |
4297 | Insn_template::thumb16_insn(0x46c0), // nop | |
4298 | Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] | |
4299 | Insn_template::arm_insn(0xe12fff1c), // bx ip | |
4300 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), | |
4301 | // dcd R_ARM_ABS32(X) | |
4302 | }; | |
4303 | ||
4304 | // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not | |
4305 | // available. | |
4306 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] = | |
4307 | { | |
4308 | Insn_template::thumb16_insn(0x4778), // bx pc | |
4309 | Insn_template::thumb16_insn(0x46c0), // nop | |
4310 | Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] | |
4311 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), | |
4312 | // dcd R_ARM_ABS32(X) | |
4313 | }; | |
4314 | ||
4315 | // V4T Thumb -> ARM short branch stub. Shorter variant of the above | |
4316 | // one, when the destination is close enough. | |
4317 | static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] = | |
4318 | { | |
4319 | Insn_template::thumb16_insn(0x4778), // bx pc | |
4320 | Insn_template::thumb16_insn(0x46c0), // nop | |
4321 | Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8) | |
4322 | }; | |
4323 | ||
4324 | // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use | |
4325 | // blx to reach the stub if necessary. | |
4326 | static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] = | |
4327 | { | |
4328 | Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc] | |
4329 | Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip | |
4330 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), | |
4331 | // dcd R_ARM_REL32(X-4) | |
4332 | }; | |
4333 | ||
4334 | // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use | |
4335 | // blx to reach the stub if necessary. We can not add into pc; | |
4336 | // it is not guaranteed to mode switch (different in ARMv6 and | |
4337 | // ARMv7). | |
4338 | static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] = | |
4339 | { | |
4340 | Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4] | |
4341 | Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip | |
4342 | Insn_template::arm_insn(0xe12fff1c), // bx ip | |
4343 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), | |
4344 | // dcd R_ARM_REL32(X) | |
4345 | }; | |
4346 | ||
4347 | // V4T ARM -> ARM long branch stub, PIC. | |
4348 | static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
4349 | { | |
4350 | Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] | |
4351 | Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip | |
4352 | Insn_template::arm_insn(0xe12fff1c), // bx ip | |
4353 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), | |
4354 | // dcd R_ARM_REL32(X) | |
4355 | }; | |
4356 | ||
4357 | // V4T Thumb -> ARM long branch stub, PIC. | |
4358 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
4359 | { | |
4360 | Insn_template::thumb16_insn(0x4778), // bx pc | |
4361 | Insn_template::thumb16_insn(0x46c0), // nop | |
4362 | Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] | |
4363 | Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc | |
4364 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), | |
4365 | // dcd R_ARM_REL32(X) | |
4366 | }; | |
4367 | ||
4368 | // Thumb -> Thumb long branch stub, PIC. Used on M-profile | |
4369 | // architectures. | |
4370 | static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] = | |
4371 | { | |
4372 | Insn_template::thumb16_insn(0xb401), // push {r0} | |
4373 | Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] | |
4374 | Insn_template::thumb16_insn(0x46fc), // mov ip, pc | |
4375 | Insn_template::thumb16_insn(0x4484), // add ip, r0 | |
4376 | Insn_template::thumb16_insn(0xbc01), // pop {r0} | |
4377 | Insn_template::thumb16_insn(0x4760), // bx ip | |
4378 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4), | |
4379 | // dcd R_ARM_REL32(X) | |
4380 | }; | |
4381 | ||
4382 | // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not | |
4383 | // allowed. | |
4384 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
4385 | { | |
4386 | Insn_template::thumb16_insn(0x4778), // bx pc | |
4387 | Insn_template::thumb16_insn(0x46c0), // nop | |
4388 | Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] | |
4389 | Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip | |
4390 | Insn_template::arm_insn(0xe12fff1c), // bx ip | |
4391 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), | |
4392 | // dcd R_ARM_REL32(X) | |
4393 | }; | |
4394 | ||
4395 | // Cortex-A8 erratum-workaround stubs. | |
4396 | ||
4397 | // Stub used for conditional branches (which may be beyond +/-1MB away, | |
4398 | // so we can't use a conditional branch to reach this stub). | |
4399 | ||
4400 | // original code: | |
4401 | // | |
4402 | // b<cond> X | |
4403 | // after: | |
4404 | // | |
4405 | static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] = | |
4406 | { | |
4407 | Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true | |
4408 | Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after | |
4409 | Insn_template::thumb32_b_insn(0xf000b800, -4) // true: | |
4410 | // b.w X | |
4411 | }; | |
4412 | ||
4413 | // Stub used for b.w and bl.w instructions. | |
4414 | ||
4415 | static const Insn_template elf32_arm_stub_a8_veneer_b[] = | |
4416 | { | |
4417 | Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest | |
4418 | }; | |
4419 | ||
4420 | static const Insn_template elf32_arm_stub_a8_veneer_bl[] = | |
4421 | { | |
4422 | Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest | |
4423 | }; | |
4424 | ||
4425 | // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
4426 | // instruction (which switches to ARM mode) to point to this stub. Jump to | |
4427 | // the real destination using an ARM-mode branch. | |
bb0d3eb0 | 4428 | static const Insn_template elf32_arm_stub_a8_veneer_blx[] = |
b569affa DK |
4429 | { |
4430 | Insn_template::arm_rel_insn(0xea000000, -8) // b dest | |
4431 | }; | |
4432 | ||
a2162063 ILT |
4433 | // Stub used to provide an interworking for R_ARM_V4BX relocation |
4434 | // (bx r[n] instruction). | |
4435 | static const Insn_template elf32_arm_stub_v4_veneer_bx[] = | |
4436 | { | |
4437 | Insn_template::arm_insn(0xe3100001), // tst r<n>, #1 | |
4438 | Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n> | |
4439 | Insn_template::arm_insn(0xe12fff10) // bx r<n> | |
4440 | }; | |
4441 | ||
b569affa DK |
4442 | // Fill in the stub template look-up table. Stub templates are constructed |
4443 | // per instance of Stub_factory for fast look-up without locking | |
4444 | // in a thread-enabled environment. | |
4445 | ||
4446 | this->stub_templates_[arm_stub_none] = | |
4447 | new Stub_template(arm_stub_none, NULL, 0); | |
4448 | ||
4449 | #define DEF_STUB(x) \ | |
4450 | do \ | |
4451 | { \ | |
4452 | size_t array_size \ | |
4453 | = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \ | |
4454 | Stub_type type = arm_stub_##x; \ | |
4455 | this->stub_templates_[type] = \ | |
4456 | new Stub_template(type, elf32_arm_stub_##x, array_size); \ | |
4457 | } \ | |
4458 | while (0); | |
4459 | ||
4460 | DEF_STUBS | |
4461 | #undef DEF_STUB | |
4462 | } | |
4463 | ||
56ee5e00 DK |
4464 | // Stub_table methods. |
4465 | ||
2fb7225c | 4466 | // Removel all Cortex-A8 stub. |
56ee5e00 DK |
4467 | |
4468 | template<bool big_endian> | |
4469 | void | |
2fb7225c DK |
4470 | Stub_table<big_endian>::remove_all_cortex_a8_stubs() |
4471 | { | |
4472 | for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); | |
4473 | p != this->cortex_a8_stubs_.end(); | |
4474 | ++p) | |
4475 | delete p->second; | |
4476 | this->cortex_a8_stubs_.clear(); | |
4477 | } | |
4478 | ||
4479 | // Relocate one stub. This is a helper for Stub_table::relocate_stubs(). | |
4480 | ||
4481 | template<bool big_endian> | |
4482 | void | |
4483 | Stub_table<big_endian>::relocate_stub( | |
4484 | Stub* stub, | |
4485 | const Relocate_info<32, big_endian>* relinfo, | |
4486 | Target_arm<big_endian>* arm_target, | |
4487 | Output_section* output_section, | |
4488 | unsigned char* view, | |
4489 | Arm_address address, | |
4490 | section_size_type view_size) | |
56ee5e00 | 4491 | { |
2ea97941 | 4492 | const Stub_template* stub_template = stub->stub_template(); |
2fb7225c DK |
4493 | if (stub_template->reloc_count() != 0) |
4494 | { | |
4495 | // Adjust view to cover the stub only. | |
4496 | section_size_type offset = stub->offset(); | |
4497 | section_size_type stub_size = stub_template->size(); | |
4498 | gold_assert(offset + stub_size <= view_size); | |
4499 | ||
4500 | arm_target->relocate_stub(stub, relinfo, output_section, view + offset, | |
4501 | address + offset, stub_size); | |
4502 | } | |
56ee5e00 DK |
4503 | } |
4504 | ||
2fb7225c DK |
4505 | // Relocate all stubs in this stub table. |
4506 | ||
56ee5e00 DK |
4507 | template<bool big_endian> |
4508 | void | |
4509 | Stub_table<big_endian>::relocate_stubs( | |
4510 | const Relocate_info<32, big_endian>* relinfo, | |
4511 | Target_arm<big_endian>* arm_target, | |
2ea97941 | 4512 | Output_section* output_section, |
56ee5e00 | 4513 | unsigned char* view, |
2ea97941 | 4514 | Arm_address address, |
56ee5e00 DK |
4515 | section_size_type view_size) |
4516 | { | |
4517 | // If we are passed a view bigger than the stub table's. we need to | |
4518 | // adjust the view. | |
2ea97941 | 4519 | gold_assert(address == this->address() |
56ee5e00 DK |
4520 | && (view_size |
4521 | == static_cast<section_size_type>(this->data_size()))); | |
4522 | ||
2fb7225c DK |
4523 | // Relocate all relocation stubs. |
4524 | for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); | |
4525 | p != this->reloc_stubs_.end(); | |
4526 | ++p) | |
4527 | this->relocate_stub(p->second, relinfo, arm_target, output_section, view, | |
4528 | address, view_size); | |
4529 | ||
4530 | // Relocate all Cortex-A8 stubs. | |
4531 | for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); | |
4532 | p != this->cortex_a8_stubs_.end(); | |
4533 | ++p) | |
4534 | this->relocate_stub(p->second, relinfo, arm_target, output_section, view, | |
4535 | address, view_size); | |
a2162063 ILT |
4536 | |
4537 | // Relocate all ARM V4BX stubs. | |
4538 | for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin(); | |
4539 | p != this->arm_v4bx_stubs_.end(); | |
4540 | ++p) | |
4541 | { | |
4542 | if (*p != NULL) | |
4543 | this->relocate_stub(*p, relinfo, arm_target, output_section, view, | |
4544 | address, view_size); | |
4545 | } | |
2fb7225c DK |
4546 | } |
4547 | ||
4548 | // Write out the stubs to file. | |
4549 | ||
4550 | template<bool big_endian> | |
4551 | void | |
4552 | Stub_table<big_endian>::do_write(Output_file* of) | |
4553 | { | |
4554 | off_t offset = this->offset(); | |
4555 | const section_size_type oview_size = | |
4556 | convert_to_section_size_type(this->data_size()); | |
4557 | unsigned char* const oview = of->get_output_view(offset, oview_size); | |
4558 | ||
4559 | // Write relocation stubs. | |
56ee5e00 DK |
4560 | for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); |
4561 | p != this->reloc_stubs_.end(); | |
4562 | ++p) | |
4563 | { | |
4564 | Reloc_stub* stub = p->second; | |
2fb7225c DK |
4565 | Arm_address address = this->address() + stub->offset(); |
4566 | gold_assert(address | |
4567 | == align_address(address, | |
4568 | stub->stub_template()->alignment())); | |
4569 | stub->write(oview + stub->offset(), stub->stub_template()->size(), | |
4570 | big_endian); | |
56ee5e00 | 4571 | } |
2fb7225c DK |
4572 | |
4573 | // Write Cortex-A8 stubs. | |
4574 | for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); | |
4575 | p != this->cortex_a8_stubs_.end(); | |
4576 | ++p) | |
4577 | { | |
4578 | Cortex_a8_stub* stub = p->second; | |
4579 | Arm_address address = this->address() + stub->offset(); | |
4580 | gold_assert(address | |
4581 | == align_address(address, | |
4582 | stub->stub_template()->alignment())); | |
4583 | stub->write(oview + stub->offset(), stub->stub_template()->size(), | |
4584 | big_endian); | |
4585 | } | |
4586 | ||
a2162063 ILT |
4587 | // Write ARM V4BX relocation stubs. |
4588 | for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); | |
4589 | p != this->arm_v4bx_stubs_.end(); | |
4590 | ++p) | |
4591 | { | |
4592 | if (*p == NULL) | |
4593 | continue; | |
4594 | ||
4595 | Arm_address address = this->address() + (*p)->offset(); | |
4596 | gold_assert(address | |
4597 | == align_address(address, | |
4598 | (*p)->stub_template()->alignment())); | |
4599 | (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(), | |
4600 | big_endian); | |
4601 | } | |
4602 | ||
2fb7225c | 4603 | of->write_output_view(this->offset(), oview_size, oview); |
56ee5e00 DK |
4604 | } |
4605 | ||
2fb7225c DK |
4606 | // Update the data size and address alignment of the stub table at the end |
4607 | // of a relaxation pass. Return true if either the data size or the | |
4608 | // alignment changed in this relaxation pass. | |
4609 | ||
4610 | template<bool big_endian> | |
4611 | bool | |
4612 | Stub_table<big_endian>::update_data_size_and_addralign() | |
4613 | { | |
4614 | off_t size = 0; | |
4615 | unsigned addralign = 1; | |
4616 | ||
4617 | // Go over all stubs in table to compute data size and address alignment. | |
4618 | ||
4619 | for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); | |
4620 | p != this->reloc_stubs_.end(); | |
4621 | ++p) | |
4622 | { | |
4623 | const Stub_template* stub_template = p->second->stub_template(); | |
4624 | addralign = std::max(addralign, stub_template->alignment()); | |
4625 | size = (align_address(size, stub_template->alignment()) | |
4626 | + stub_template->size()); | |
4627 | } | |
4628 | ||
4629 | for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); | |
4630 | p != this->cortex_a8_stubs_.end(); | |
4631 | ++p) | |
4632 | { | |
4633 | const Stub_template* stub_template = p->second->stub_template(); | |
4634 | addralign = std::max(addralign, stub_template->alignment()); | |
4635 | size = (align_address(size, stub_template->alignment()) | |
4636 | + stub_template->size()); | |
4637 | } | |
4638 | ||
a2162063 ILT |
4639 | for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); |
4640 | p != this->arm_v4bx_stubs_.end(); | |
4641 | ++p) | |
4642 | { | |
4643 | if (*p == NULL) | |
4644 | continue; | |
4645 | ||
4646 | const Stub_template* stub_template = (*p)->stub_template(); | |
4647 | addralign = std::max(addralign, stub_template->alignment()); | |
4648 | size = (align_address(size, stub_template->alignment()) | |
4649 | + stub_template->size()); | |
4650 | } | |
4651 | ||
2fb7225c DK |
4652 | // Check if either data size or alignment changed in this pass. |
4653 | // Update prev_data_size_ and prev_addralign_. These will be used | |
4654 | // as the current data size and address alignment for the next pass. | |
4655 | bool changed = size != this->prev_data_size_; | |
4656 | this->prev_data_size_ = size; | |
4657 | ||
4658 | if (addralign != this->prev_addralign_) | |
4659 | changed = true; | |
4660 | this->prev_addralign_ = addralign; | |
4661 | ||
4662 | return changed; | |
4663 | } | |
4664 | ||
4665 | // Finalize the stubs. This sets the offsets of the stubs within the stub | |
4666 | // table. It also marks all input sections needing Cortex-A8 workaround. | |
56ee5e00 DK |
4667 | |
4668 | template<bool big_endian> | |
4669 | void | |
2fb7225c | 4670 | Stub_table<big_endian>::finalize_stubs() |
56ee5e00 DK |
4671 | { |
4672 | off_t off = 0; | |
56ee5e00 DK |
4673 | for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); |
4674 | p != this->reloc_stubs_.end(); | |
4675 | ++p) | |
4676 | { | |
4677 | Reloc_stub* stub = p->second; | |
2ea97941 ILT |
4678 | const Stub_template* stub_template = stub->stub_template(); |
4679 | uint64_t stub_addralign = stub_template->alignment(); | |
56ee5e00 DK |
4680 | off = align_address(off, stub_addralign); |
4681 | stub->set_offset(off); | |
2ea97941 | 4682 | off += stub_template->size(); |
56ee5e00 DK |
4683 | } |
4684 | ||
2fb7225c DK |
4685 | for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); |
4686 | p != this->cortex_a8_stubs_.end(); | |
4687 | ++p) | |
4688 | { | |
4689 | Cortex_a8_stub* stub = p->second; | |
4690 | const Stub_template* stub_template = stub->stub_template(); | |
4691 | uint64_t stub_addralign = stub_template->alignment(); | |
4692 | off = align_address(off, stub_addralign); | |
4693 | stub->set_offset(off); | |
4694 | off += stub_template->size(); | |
4695 | ||
4696 | // Mark input section so that we can determine later if a code section | |
4697 | // needs the Cortex-A8 workaround quickly. | |
4698 | Arm_relobj<big_endian>* arm_relobj = | |
4699 | Arm_relobj<big_endian>::as_arm_relobj(stub->relobj()); | |
4700 | arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx()); | |
4701 | } | |
4702 | ||
a2162063 ILT |
4703 | for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); |
4704 | p != this->arm_v4bx_stubs_.end(); | |
4705 | ++p) | |
4706 | { | |
4707 | if (*p == NULL) | |
4708 | continue; | |
4709 | ||
4710 | const Stub_template* stub_template = (*p)->stub_template(); | |
4711 | uint64_t stub_addralign = stub_template->alignment(); | |
4712 | off = align_address(off, stub_addralign); | |
4713 | (*p)->set_offset(off); | |
4714 | off += stub_template->size(); | |
4715 | } | |
4716 | ||
2fb7225c | 4717 | gold_assert(off <= this->prev_data_size_); |
56ee5e00 DK |
4718 | } |
4719 | ||
2fb7225c DK |
4720 | // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS |
4721 | // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address | |
4722 | // of the address range seen by the linker. | |
56ee5e00 DK |
4723 | |
4724 | template<bool big_endian> | |
4725 | void | |
2fb7225c DK |
4726 | Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range( |
4727 | Target_arm<big_endian>* arm_target, | |
4728 | unsigned char* view, | |
4729 | Arm_address view_address, | |
4730 | section_size_type view_size) | |
56ee5e00 | 4731 | { |
2fb7225c DK |
4732 | // Cortex-A8 stubs are sorted by addresses of branches being fixed up. |
4733 | for (Cortex_a8_stub_list::const_iterator p = | |
4734 | this->cortex_a8_stubs_.lower_bound(view_address); | |
4735 | ((p != this->cortex_a8_stubs_.end()) | |
4736 | && (p->first < (view_address + view_size))); | |
4737 | ++p) | |
56ee5e00 | 4738 | { |
2fb7225c DK |
4739 | // We do not store the THUMB bit in the LSB of either the branch address |
4740 | // or the stub offset. There is no need to strip the LSB. | |
4741 | Arm_address branch_address = p->first; | |
4742 | const Cortex_a8_stub* stub = p->second; | |
4743 | Arm_address stub_address = this->address() + stub->offset(); | |
4744 | ||
4745 | // Offset of the branch instruction relative to this view. | |
4746 | section_size_type offset = | |
4747 | convert_to_section_size_type(branch_address - view_address); | |
4748 | gold_assert((offset + 4) <= view_size); | |
4749 | ||
4750 | arm_target->apply_cortex_a8_workaround(stub, stub_address, | |
4751 | view + offset, branch_address); | |
4752 | } | |
56ee5e00 DK |
4753 | } |
4754 | ||
10ad9fe5 DK |
4755 | // Arm_input_section methods. |
4756 | ||
4757 | // Initialize an Arm_input_section. | |
4758 | ||
4759 | template<bool big_endian> | |
4760 | void | |
4761 | Arm_input_section<big_endian>::init() | |
4762 | { | |
2ea97941 ILT |
4763 | Relobj* relobj = this->relobj(); |
4764 | unsigned int shndx = this->shndx(); | |
10ad9fe5 DK |
4765 | |
4766 | // Cache these to speed up size and alignment queries. It is too slow | |
4767 | // to call section_addraglin and section_size every time. | |
2ea97941 ILT |
4768 | this->original_addralign_ = relobj->section_addralign(shndx); |
4769 | this->original_size_ = relobj->section_size(shndx); | |
10ad9fe5 DK |
4770 | |
4771 | // We want to make this look like the original input section after | |
4772 | // output sections are finalized. | |
2ea97941 ILT |
4773 | Output_section* os = relobj->output_section(shndx); |
4774 | off_t offset = relobj->output_section_offset(shndx); | |
4775 | gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx)); | |
4776 | this->set_address(os->address() + offset); | |
4777 | this->set_file_offset(os->offset() + offset); | |
10ad9fe5 DK |
4778 | |
4779 | this->set_current_data_size(this->original_size_); | |
4780 | this->finalize_data_size(); | |
4781 | } | |
4782 | ||
4783 | template<bool big_endian> | |
4784 | void | |
4785 | Arm_input_section<big_endian>::do_write(Output_file* of) | |
4786 | { | |
4787 | // We have to write out the original section content. | |
4788 | section_size_type section_size; | |
4789 | const unsigned char* section_contents = | |
4790 | this->relobj()->section_contents(this->shndx(), §ion_size, false); | |
4791 | of->write(this->offset(), section_contents, section_size); | |
4792 | ||
4793 | // If this owns a stub table and it is not empty, write it. | |
4794 | if (this->is_stub_table_owner() && !this->stub_table_->empty()) | |
4795 | this->stub_table_->write(of); | |
4796 | } | |
4797 | ||
4798 | // Finalize data size. | |
4799 | ||
4800 | template<bool big_endian> | |
4801 | void | |
4802 | Arm_input_section<big_endian>::set_final_data_size() | |
4803 | { | |
4804 | // If this owns a stub table, finalize its data size as well. | |
4805 | if (this->is_stub_table_owner()) | |
4806 | { | |
2ea97941 | 4807 | uint64_t address = this->address(); |
10ad9fe5 DK |
4808 | |
4809 | // The stub table comes after the original section contents. | |
2ea97941 ILT |
4810 | address += this->original_size_; |
4811 | address = align_address(address, this->stub_table_->addralign()); | |
4812 | off_t offset = this->offset() + (address - this->address()); | |
4813 | this->stub_table_->set_address_and_file_offset(address, offset); | |
4814 | address += this->stub_table_->data_size(); | |
4815 | gold_assert(address == this->address() + this->current_data_size()); | |
10ad9fe5 DK |
4816 | } |
4817 | ||
4818 | this->set_data_size(this->current_data_size()); | |
4819 | } | |
4820 | ||
4821 | // Reset address and file offset. | |
4822 | ||
4823 | template<bool big_endian> | |
4824 | void | |
4825 | Arm_input_section<big_endian>::do_reset_address_and_file_offset() | |
4826 | { | |
4827 | // Size of the original input section contents. | |
4828 | off_t off = convert_types<off_t, uint64_t>(this->original_size_); | |
4829 | ||
4830 | // If this is a stub table owner, account for the stub table size. | |
4831 | if (this->is_stub_table_owner()) | |
4832 | { | |
2ea97941 | 4833 | Stub_table<big_endian>* stub_table = this->stub_table_; |
10ad9fe5 DK |
4834 | |
4835 | // Reset the stub table's address and file offset. The | |
4836 | // current data size for child will be updated after that. | |
4837 | stub_table_->reset_address_and_file_offset(); | |
4838 | off = align_address(off, stub_table_->addralign()); | |
2ea97941 | 4839 | off += stub_table->current_data_size(); |
10ad9fe5 DK |
4840 | } |
4841 | ||
4842 | this->set_current_data_size(off); | |
4843 | } | |
4844 | ||
af2cdeae DK |
4845 | // Arm_exidx_cantunwind methods. |
4846 | ||
4847 | // Write this to Output file OF for a fixed endianity. | |
4848 | ||
4849 | template<bool big_endian> | |
4850 | void | |
4851 | Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) | |
4852 | { | |
4853 | off_t offset = this->offset(); | |
4854 | const section_size_type oview_size = 8; | |
4855 | unsigned char* const oview = of->get_output_view(offset, oview_size); | |
4856 | ||
4857 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
4858 | Valtype* wv = reinterpret_cast<Valtype*>(oview); | |
4859 | ||
4860 | Output_section* os = this->relobj_->output_section(this->shndx_); | |
4861 | gold_assert(os != NULL); | |
4862 | ||
4863 | Arm_relobj<big_endian>* arm_relobj = | |
4864 | Arm_relobj<big_endian>::as_arm_relobj(this->relobj_); | |
4865 | Arm_address output_offset = | |
4866 | arm_relobj->get_output_section_offset(this->shndx_); | |
4867 | Arm_address section_start; | |
4868 | if(output_offset != Arm_relobj<big_endian>::invalid_address) | |
4869 | section_start = os->address() + output_offset; | |
4870 | else | |
4871 | { | |
4872 | // Currently this only happens for a relaxed section. | |
4873 | const Output_relaxed_input_section* poris = | |
4874 | os->find_relaxed_input_section(this->relobj_, this->shndx_); | |
4875 | gold_assert(poris != NULL); | |
4876 | section_start = poris->address(); | |
4877 | } | |
4878 | ||
4879 | // We always append this to the end of an EXIDX section. | |
4880 | Arm_address output_address = | |
4881 | section_start + this->relobj_->section_size(this->shndx_); | |
4882 | ||
4883 | // Write out the entry. The first word either points to the beginning | |
4884 | // or after the end of a text section. The second word is the special | |
4885 | // EXIDX_CANTUNWIND value. | |
e7eca48c DK |
4886 | uint32_t prel31_offset = output_address - this->address(); |
4887 | if (utils::has_overflow<31>(offset)) | |
4888 | gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry")); | |
4889 | elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU); | |
af2cdeae DK |
4890 | elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND); |
4891 | ||
4892 | of->write_output_view(this->offset(), oview_size, oview); | |
4893 | } | |
4894 | ||
4895 | // Arm_exidx_merged_section methods. | |
4896 | ||
4897 | // Constructor for Arm_exidx_merged_section. | |
4898 | // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. | |
4899 | // SECTION_OFFSET_MAP points to a section offset map describing how | |
4900 | // parts of the input section are mapped to output. DELETED_BYTES is | |
4901 | // the number of bytes deleted from the EXIDX input section. | |
4902 | ||
4903 | Arm_exidx_merged_section::Arm_exidx_merged_section( | |
4904 | const Arm_exidx_input_section& exidx_input_section, | |
4905 | const Arm_exidx_section_offset_map& section_offset_map, | |
4906 | uint32_t deleted_bytes) | |
4907 | : Output_relaxed_input_section(exidx_input_section.relobj(), | |
4908 | exidx_input_section.shndx(), | |
4909 | exidx_input_section.addralign()), | |
4910 | exidx_input_section_(exidx_input_section), | |
4911 | section_offset_map_(section_offset_map) | |
4912 | { | |
4913 | // Fix size here so that we do not need to implement set_final_data_size. | |
4914 | this->set_data_size(exidx_input_section.size() - deleted_bytes); | |
4915 | this->fix_data_size(); | |
4916 | } | |
4917 | ||
4918 | // Given an input OBJECT, an input section index SHNDX within that | |
4919 | // object, and an OFFSET relative to the start of that input | |
4920 | // section, return whether or not the corresponding offset within | |
4921 | // the output section is known. If this function returns true, it | |
4922 | // sets *POUTPUT to the output offset. The value -1 indicates that | |
4923 | // this input offset is being discarded. | |
4924 | ||
4925 | bool | |
4926 | Arm_exidx_merged_section::do_output_offset( | |
4927 | const Relobj* relobj, | |
4928 | unsigned int shndx, | |
4929 | section_offset_type offset, | |
4930 | section_offset_type* poutput) const | |
4931 | { | |
4932 | // We only handle offsets for the original EXIDX input section. | |
4933 | if (relobj != this->exidx_input_section_.relobj() | |
4934 | || shndx != this->exidx_input_section_.shndx()) | |
4935 | return false; | |
4936 | ||
c7f3c371 DK |
4937 | section_offset_type section_size = |
4938 | convert_types<section_offset_type>(this->exidx_input_section_.size()); | |
4939 | if (offset < 0 || offset >= section_size) | |
af2cdeae DK |
4940 | // Input offset is out of valid range. |
4941 | *poutput = -1; | |
4942 | else | |
4943 | { | |
4944 | // We need to look up the section offset map to determine the output | |
4945 | // offset. Find the reference point in map that is first offset | |
4946 | // bigger than or equal to this offset. | |
4947 | Arm_exidx_section_offset_map::const_iterator p = | |
4948 | this->section_offset_map_.lower_bound(offset); | |
4949 | ||
4950 | // The section offset maps are build such that this should not happen if | |
4951 | // input offset is in the valid range. | |
4952 | gold_assert(p != this->section_offset_map_.end()); | |
4953 | ||
4954 | // We need to check if this is dropped. | |
4955 | section_offset_type ref = p->first; | |
4956 | section_offset_type mapped_ref = p->second; | |
4957 | ||
4958 | if (mapped_ref != Arm_exidx_input_section::invalid_offset) | |
4959 | // Offset is present in output. | |
4960 | *poutput = mapped_ref + (offset - ref); | |
4961 | else | |
4962 | // Offset is discarded owing to EXIDX entry merging. | |
4963 | *poutput = -1; | |
4964 | } | |
4965 | ||
4966 | return true; | |
4967 | } | |
4968 | ||
4969 | // Write this to output file OF. | |
4970 | ||
4971 | void | |
4972 | Arm_exidx_merged_section::do_write(Output_file* of) | |
4973 | { | |
4974 | // If we retain or discard the whole EXIDX input section, we would | |
4975 | // not be here. | |
4976 | gold_assert(this->data_size() != this->exidx_input_section_.size() | |
4977 | && this->data_size() != 0); | |
4978 | ||
4979 | off_t offset = this->offset(); | |
4980 | const section_size_type oview_size = this->data_size(); | |
4981 | unsigned char* const oview = of->get_output_view(offset, oview_size); | |
4982 | ||
4983 | Output_section* os = this->relobj()->output_section(this->shndx()); | |
4984 | gold_assert(os != NULL); | |
4985 | ||
4986 | // Get contents of EXIDX input section. | |
4987 | section_size_type section_size; | |
4988 | const unsigned char* section_contents = | |
4989 | this->relobj()->section_contents(this->shndx(), §ion_size, false); | |
4990 | gold_assert(section_size == this->exidx_input_section_.size()); | |
4991 | ||
4992 | // Go over spans of input offsets and write only those that are not | |
4993 | // discarded. | |
4994 | section_offset_type in_start = 0; | |
4995 | section_offset_type out_start = 0; | |
4996 | for(Arm_exidx_section_offset_map::const_iterator p = | |
4997 | this->section_offset_map_.begin(); | |
4998 | p != this->section_offset_map_.end(); | |
4999 | ++p) | |
5000 | { | |
5001 | section_offset_type in_end = p->first; | |
5002 | gold_assert(in_end >= in_start); | |
5003 | section_offset_type out_end = p->second; | |
5004 | size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1); | |
5005 | if (out_end != -1) | |
5006 | { | |
5007 | size_t out_chunk_size = | |
5008 | convert_types<size_t>(out_end - out_start + 1); | |
5009 | gold_assert(out_chunk_size == in_chunk_size); | |
5010 | memcpy(oview + out_start, section_contents + in_start, | |
5011 | out_chunk_size); | |
5012 | out_start += out_chunk_size; | |
5013 | } | |
5014 | in_start += in_chunk_size; | |
5015 | } | |
5016 | ||
5017 | gold_assert(convert_to_section_size_type(out_start) == oview_size); | |
5018 | of->write_output_view(this->offset(), oview_size, oview); | |
5019 | } | |
5020 | ||
80d0d023 DK |
5021 | // Arm_exidx_fixup methods. |
5022 | ||
5023 | // Append an EXIDX_CANTUNWIND in the current output section if the last entry | |
5024 | // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry | |
5025 | // points to the end of the last seen EXIDX section. | |
5026 | ||
5027 | void | |
5028 | Arm_exidx_fixup::add_exidx_cantunwind_as_needed() | |
5029 | { | |
5030 | if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND | |
5031 | && this->last_input_section_ != NULL) | |
5032 | { | |
5033 | Relobj* relobj = this->last_input_section_->relobj(); | |
2b328d4e | 5034 | unsigned int text_shndx = this->last_input_section_->link(); |
80d0d023 | 5035 | Arm_exidx_cantunwind* cantunwind = |
2b328d4e | 5036 | new Arm_exidx_cantunwind(relobj, text_shndx); |
80d0d023 DK |
5037 | this->exidx_output_section_->add_output_section_data(cantunwind); |
5038 | this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; | |
5039 | } | |
5040 | } | |
5041 | ||
5042 | // Process an EXIDX section entry in input. Return whether this entry | |
5043 | // can be deleted in the output. SECOND_WORD in the second word of the | |
5044 | // EXIDX entry. | |
5045 | ||
5046 | bool | |
5047 | Arm_exidx_fixup::process_exidx_entry(uint32_t second_word) | |
5048 | { | |
5049 | bool delete_entry; | |
5050 | if (second_word == elfcpp::EXIDX_CANTUNWIND) | |
5051 | { | |
5052 | // Merge if previous entry is also an EXIDX_CANTUNWIND. | |
5053 | delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND; | |
5054 | this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; | |
5055 | } | |
5056 | else if ((second_word & 0x80000000) != 0) | |
5057 | { | |
5058 | // Inlined unwinding data. Merge if equal to previous. | |
5059 | delete_entry = (this->last_unwind_type_ == UT_INLINED_ENTRY | |
5060 | && this->last_inlined_entry_ == second_word); | |
5061 | this->last_unwind_type_ = UT_INLINED_ENTRY; | |
5062 | this->last_inlined_entry_ = second_word; | |
5063 | } | |
5064 | else | |
5065 | { | |
5066 | // Normal table entry. In theory we could merge these too, | |
5067 | // but duplicate entries are likely to be much less common. | |
5068 | delete_entry = false; | |
5069 | this->last_unwind_type_ = UT_NORMAL_ENTRY; | |
5070 | } | |
5071 | return delete_entry; | |
5072 | } | |
5073 | ||
5074 | // Update the current section offset map during EXIDX section fix-up. | |
5075 | // If there is no map, create one. INPUT_OFFSET is the offset of a | |
5076 | // reference point, DELETED_BYTES is the number of deleted by in the | |
5077 | // section so far. If DELETE_ENTRY is true, the reference point and | |
5078 | // all offsets after the previous reference point are discarded. | |
5079 | ||
5080 | void | |
5081 | Arm_exidx_fixup::update_offset_map( | |
5082 | section_offset_type input_offset, | |
5083 | section_size_type deleted_bytes, | |
5084 | bool delete_entry) | |
5085 | { | |
5086 | if (this->section_offset_map_ == NULL) | |
5087 | this->section_offset_map_ = new Arm_exidx_section_offset_map(); | |
5088 | section_offset_type output_offset = (delete_entry | |
5089 | ? -1 | |
5090 | : input_offset - deleted_bytes); | |
5091 | (*this->section_offset_map_)[input_offset] = output_offset; | |
5092 | } | |
5093 | ||
5094 | // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of | |
5095 | // bytes deleted. If some entries are merged, also store a pointer to a newly | |
5096 | // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The | |
5097 | // caller owns the map and is responsible for releasing it after use. | |
5098 | ||
5099 | template<bool big_endian> | |
5100 | uint32_t | |
5101 | Arm_exidx_fixup::process_exidx_section( | |
5102 | const Arm_exidx_input_section* exidx_input_section, | |
5103 | Arm_exidx_section_offset_map** psection_offset_map) | |
5104 | { | |
5105 | Relobj* relobj = exidx_input_section->relobj(); | |
5106 | unsigned shndx = exidx_input_section->shndx(); | |
5107 | section_size_type section_size; | |
5108 | const unsigned char* section_contents = | |
5109 | relobj->section_contents(shndx, §ion_size, false); | |
5110 | ||
5111 | if ((section_size % 8) != 0) | |
5112 | { | |
5113 | // Something is wrong with this section. Better not touch it. | |
5114 | gold_error(_("uneven .ARM.exidx section size in %s section %u"), | |
5115 | relobj->name().c_str(), shndx); | |
5116 | this->last_input_section_ = exidx_input_section; | |
5117 | this->last_unwind_type_ = UT_NONE; | |
5118 | return 0; | |
5119 | } | |
5120 | ||
5121 | uint32_t deleted_bytes = 0; | |
5122 | bool prev_delete_entry = false; | |
5123 | gold_assert(this->section_offset_map_ == NULL); | |
5124 | ||
5125 | for (section_size_type i = 0; i < section_size; i += 8) | |
5126 | { | |
5127 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
5128 | const Valtype* wv = | |
5129 | reinterpret_cast<const Valtype*>(section_contents + i + 4); | |
5130 | uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv); | |
5131 | ||
5132 | bool delete_entry = this->process_exidx_entry(second_word); | |
5133 | ||
5134 | // Entry deletion causes changes in output offsets. We use a std::map | |
5135 | // to record these. And entry (x, y) means input offset x | |
5136 | // is mapped to output offset y. If y is invalid_offset, then x is | |
5137 | // dropped in the output. Because of the way std::map::lower_bound | |
5138 | // works, we record the last offset in a region w.r.t to keeping or | |
5139 | // dropping. If there is no entry (x0, y0) for an input offset x0, | |
5140 | // the output offset y0 of it is determined by the output offset y1 of | |
5141 | // the smallest input offset x1 > x0 that there is an (x1, y1) entry | |
5142 | // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1 | |
5143 | // y0 is also -1. | |
5144 | if (delete_entry != prev_delete_entry && i != 0) | |
5145 | this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry); | |
5146 | ||
5147 | // Update total deleted bytes for this entry. | |
5148 | if (delete_entry) | |
5149 | deleted_bytes += 8; | |
5150 | ||
5151 | prev_delete_entry = delete_entry; | |
5152 | } | |
5153 | ||
5154 | // If section offset map is not NULL, make an entry for the end of | |
5155 | // section. | |
5156 | if (this->section_offset_map_ != NULL) | |
5157 | update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry); | |
5158 | ||
5159 | *psection_offset_map = this->section_offset_map_; | |
5160 | this->section_offset_map_ = NULL; | |
5161 | this->last_input_section_ = exidx_input_section; | |
5162 | ||
5163 | return deleted_bytes; | |
5164 | } | |
5165 | ||
07f508a2 DK |
5166 | // Arm_output_section methods. |
5167 | ||
5168 | // Create a stub group for input sections from BEGIN to END. OWNER | |
5169 | // points to the input section to be the owner a new stub table. | |
5170 | ||
5171 | template<bool big_endian> | |
5172 | void | |
5173 | Arm_output_section<big_endian>::create_stub_group( | |
5174 | Input_section_list::const_iterator begin, | |
5175 | Input_section_list::const_iterator end, | |
5176 | Input_section_list::const_iterator owner, | |
5177 | Target_arm<big_endian>* target, | |
5178 | std::vector<Output_relaxed_input_section*>* new_relaxed_sections) | |
5179 | { | |
2b328d4e DK |
5180 | // We use a different kind of relaxed section in an EXIDX section. |
5181 | // The static casting from Output_relaxed_input_section to | |
5182 | // Arm_input_section is invalid in an EXIDX section. We are okay | |
5183 | // because we should not be calling this for an EXIDX section. | |
5184 | gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX); | |
5185 | ||
07f508a2 DK |
5186 | // Currently we convert ordinary input sections into relaxed sections only |
5187 | // at this point but we may want to support creating relaxed input section | |
5188 | // very early. So we check here to see if owner is already a relaxed | |
5189 | // section. | |
5190 | ||
5191 | Arm_input_section<big_endian>* arm_input_section; | |
5192 | if (owner->is_relaxed_input_section()) | |
5193 | { | |
5194 | arm_input_section = | |
5195 | Arm_input_section<big_endian>::as_arm_input_section( | |
5196 | owner->relaxed_input_section()); | |
5197 | } | |
5198 | else | |
5199 | { | |
5200 | gold_assert(owner->is_input_section()); | |
5201 | // Create a new relaxed input section. | |
5202 | arm_input_section = | |
5203 | target->new_arm_input_section(owner->relobj(), owner->shndx()); | |
5204 | new_relaxed_sections->push_back(arm_input_section); | |
5205 | } | |
5206 | ||
5207 | // Create a stub table. | |
2ea97941 | 5208 | Stub_table<big_endian>* stub_table = |
07f508a2 DK |
5209 | target->new_stub_table(arm_input_section); |
5210 | ||
2ea97941 | 5211 | arm_input_section->set_stub_table(stub_table); |
07f508a2 DK |
5212 | |
5213 | Input_section_list::const_iterator p = begin; | |
5214 | Input_section_list::const_iterator prev_p; | |
5215 | ||
5216 | // Look for input sections or relaxed input sections in [begin ... end]. | |
5217 | do | |
5218 | { | |
5219 | if (p->is_input_section() || p->is_relaxed_input_section()) | |
5220 | { | |
5221 | // The stub table information for input sections live | |
5222 | // in their objects. | |
5223 | Arm_relobj<big_endian>* arm_relobj = | |
5224 | Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); | |
2ea97941 | 5225 | arm_relobj->set_stub_table(p->shndx(), stub_table); |
07f508a2 DK |
5226 | } |
5227 | prev_p = p++; | |
5228 | } | |
5229 | while (prev_p != end); | |
5230 | } | |
5231 | ||
5232 | // Group input sections for stub generation. GROUP_SIZE is roughly the limit | |
5233 | // of stub groups. We grow a stub group by adding input section until the | |
5234 | // size is just below GROUP_SIZE. The last input section will be converted | |
5235 | // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add | |
5236 | // input section after the stub table, effectively double the group size. | |
5237 | // | |
5238 | // This is similar to the group_sections() function in elf32-arm.c but is | |
5239 | // implemented differently. | |
5240 | ||
5241 | template<bool big_endian> | |
5242 | void | |
5243 | Arm_output_section<big_endian>::group_sections( | |
5244 | section_size_type group_size, | |
5245 | bool stubs_always_after_branch, | |
5246 | Target_arm<big_endian>* target) | |
5247 | { | |
5248 | // We only care about sections containing code. | |
5249 | if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0) | |
5250 | return; | |
5251 | ||
5252 | // States for grouping. | |
5253 | typedef enum | |
5254 | { | |
5255 | // No group is being built. | |
5256 | NO_GROUP, | |
5257 | // A group is being built but the stub table is not found yet. | |
5258 | // We keep group a stub group until the size is just under GROUP_SIZE. | |
5259 | // The last input section in the group will be used as the stub table. | |
5260 | FINDING_STUB_SECTION, | |
5261 | // A group is being built and we have already found a stub table. | |
5262 | // We enter this state to grow a stub group by adding input section | |
5263 | // after the stub table. This effectively doubles the group size. | |
5264 | HAS_STUB_SECTION | |
5265 | } State; | |
5266 | ||
5267 | // Any newly created relaxed sections are stored here. | |
5268 | std::vector<Output_relaxed_input_section*> new_relaxed_sections; | |
5269 | ||
5270 | State state = NO_GROUP; | |
5271 | section_size_type off = 0; | |
5272 | section_size_type group_begin_offset = 0; | |
5273 | section_size_type group_end_offset = 0; | |
5274 | section_size_type stub_table_end_offset = 0; | |
5275 | Input_section_list::const_iterator group_begin = | |
5276 | this->input_sections().end(); | |
2ea97941 | 5277 | Input_section_list::const_iterator stub_table = |
07f508a2 DK |
5278 | this->input_sections().end(); |
5279 | Input_section_list::const_iterator group_end = this->input_sections().end(); | |
5280 | for (Input_section_list::const_iterator p = this->input_sections().begin(); | |
5281 | p != this->input_sections().end(); | |
5282 | ++p) | |
5283 | { | |
5284 | section_size_type section_begin_offset = | |
5285 | align_address(off, p->addralign()); | |
5286 | section_size_type section_end_offset = | |
5287 | section_begin_offset + p->data_size(); | |
5288 | ||
5289 | // Check to see if we should group the previously seens sections. | |
e9bbb538 | 5290 | switch (state) |
07f508a2 DK |
5291 | { |
5292 | case NO_GROUP: | |
5293 | break; | |
5294 | ||
5295 | case FINDING_STUB_SECTION: | |
5296 | // Adding this section makes the group larger than GROUP_SIZE. | |
5297 | if (section_end_offset - group_begin_offset >= group_size) | |
5298 | { | |
5299 | if (stubs_always_after_branch) | |
5300 | { | |
5301 | gold_assert(group_end != this->input_sections().end()); | |
5302 | this->create_stub_group(group_begin, group_end, group_end, | |
5303 | target, &new_relaxed_sections); | |
5304 | state = NO_GROUP; | |
5305 | } | |
5306 | else | |
5307 | { | |
5308 | // But wait, there's more! Input sections up to | |
5309 | // stub_group_size bytes after the stub table can be | |
5310 | // handled by it too. | |
5311 | state = HAS_STUB_SECTION; | |
2ea97941 | 5312 | stub_table = group_end; |
07f508a2 DK |
5313 | stub_table_end_offset = group_end_offset; |
5314 | } | |
5315 | } | |
5316 | break; | |
5317 | ||
5318 | case HAS_STUB_SECTION: | |
5319 | // Adding this section makes the post stub-section group larger | |
5320 | // than GROUP_SIZE. | |
5321 | if (section_end_offset - stub_table_end_offset >= group_size) | |
5322 | { | |
5323 | gold_assert(group_end != this->input_sections().end()); | |
2ea97941 | 5324 | this->create_stub_group(group_begin, group_end, stub_table, |
07f508a2 DK |
5325 | target, &new_relaxed_sections); |
5326 | state = NO_GROUP; | |
5327 | } | |
5328 | break; | |
5329 | ||
5330 | default: | |
5331 | gold_unreachable(); | |
5332 | } | |
5333 | ||
5334 | // If we see an input section and currently there is no group, start | |
5335 | // a new one. Skip any empty sections. | |
5336 | if ((p->is_input_section() || p->is_relaxed_input_section()) | |
5337 | && (p->relobj()->section_size(p->shndx()) != 0)) | |
5338 | { | |
5339 | if (state == NO_GROUP) | |
5340 | { | |
5341 | state = FINDING_STUB_SECTION; | |
5342 | group_begin = p; | |
5343 | group_begin_offset = section_begin_offset; | |
5344 | } | |
5345 | ||
5346 | // Keep track of the last input section seen. | |
5347 | group_end = p; | |
5348 | group_end_offset = section_end_offset; | |
5349 | } | |
5350 | ||
5351 | off = section_end_offset; | |
5352 | } | |
5353 | ||
5354 | // Create a stub group for any ungrouped sections. | |
5355 | if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION) | |
5356 | { | |
5357 | gold_assert(group_end != this->input_sections().end()); | |
5358 | this->create_stub_group(group_begin, group_end, | |
5359 | (state == FINDING_STUB_SECTION | |
5360 | ? group_end | |
2ea97941 | 5361 | : stub_table), |
07f508a2 DK |
5362 | target, &new_relaxed_sections); |
5363 | } | |
5364 | ||
5365 | // Convert input section into relaxed input section in a batch. | |
5366 | if (!new_relaxed_sections.empty()) | |
5367 | this->convert_input_sections_to_relaxed_sections(new_relaxed_sections); | |
5368 | ||
5369 | // Update the section offsets | |
5370 | for (size_t i = 0; i < new_relaxed_sections.size(); ++i) | |
5371 | { | |
5372 | Arm_relobj<big_endian>* arm_relobj = | |
5373 | Arm_relobj<big_endian>::as_arm_relobj( | |
5374 | new_relaxed_sections[i]->relobj()); | |
2ea97941 | 5375 | unsigned int shndx = new_relaxed_sections[i]->shndx(); |
07f508a2 | 5376 | // Tell Arm_relobj that this input section is converted. |
2ea97941 | 5377 | arm_relobj->convert_input_section_to_relaxed_section(shndx); |
07f508a2 DK |
5378 | } |
5379 | } | |
5380 | ||
2b328d4e DK |
5381 | // Append non empty text sections in this to LIST in ascending |
5382 | // order of their position in this. | |
5383 | ||
5384 | template<bool big_endian> | |
5385 | void | |
5386 | Arm_output_section<big_endian>::append_text_sections_to_list( | |
5387 | Text_section_list* list) | |
5388 | { | |
5389 | // We only care about text sections. | |
5390 | if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0) | |
5391 | return; | |
5392 | ||
5393 | gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0); | |
5394 | ||
5395 | for (Input_section_list::const_iterator p = this->input_sections().begin(); | |
5396 | p != this->input_sections().end(); | |
5397 | ++p) | |
5398 | { | |
5399 | // We only care about plain or relaxed input sections. We also | |
5400 | // ignore any merged sections. | |
5401 | if ((p->is_input_section() || p->is_relaxed_input_section()) | |
5402 | && p->data_size() != 0) | |
5403 | list->push_back(Text_section_list::value_type(p->relobj(), | |
5404 | p->shndx())); | |
5405 | } | |
5406 | } | |
5407 | ||
5408 | template<bool big_endian> | |
5409 | void | |
5410 | Arm_output_section<big_endian>::fix_exidx_coverage( | |
5411 | const Text_section_list& sorted_text_sections, | |
5412 | Symbol_table* symtab) | |
5413 | { | |
5414 | // We should only do this for the EXIDX output section. | |
5415 | gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); | |
5416 | ||
5417 | // We don't want the relaxation loop to undo these changes, so we discard | |
5418 | // the current saved states and take another one after the fix-up. | |
5419 | this->discard_states(); | |
5420 | ||
5421 | // Remove all input sections. | |
5422 | uint64_t address = this->address(); | |
5423 | typedef std::list<Simple_input_section> Simple_input_section_list; | |
5424 | Simple_input_section_list input_sections; | |
5425 | this->reset_address_and_file_offset(); | |
5426 | this->get_input_sections(address, std::string(""), &input_sections); | |
5427 | ||
5428 | if (!this->input_sections().empty()) | |
5429 | gold_error(_("Found non-EXIDX input sections in EXIDX output section")); | |
5430 | ||
5431 | // Go through all the known input sections and record them. | |
5432 | typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; | |
5433 | Section_id_set known_input_sections; | |
5434 | for (Simple_input_section_list::const_iterator p = input_sections.begin(); | |
5435 | p != input_sections.end(); | |
5436 | ++p) | |
5437 | { | |
5438 | // This should never happen. At this point, we should only see | |
5439 | // plain EXIDX input sections. | |
5440 | gold_assert(!p->is_relaxed_input_section()); | |
5441 | known_input_sections.insert(Section_id(p->relobj(), p->shndx())); | |
5442 | } | |
5443 | ||
5444 | Arm_exidx_fixup exidx_fixup(this); | |
5445 | ||
5446 | // Go over the sorted text sections. | |
5447 | Section_id_set processed_input_sections; | |
5448 | for (Text_section_list::const_iterator p = sorted_text_sections.begin(); | |
5449 | p != sorted_text_sections.end(); | |
5450 | ++p) | |
5451 | { | |
5452 | Relobj* relobj = p->first; | |
5453 | unsigned int shndx = p->second; | |
5454 | ||
5455 | Arm_relobj<big_endian>* arm_relobj = | |
5456 | Arm_relobj<big_endian>::as_arm_relobj(relobj); | |
5457 | const Arm_exidx_input_section* exidx_input_section = | |
5458 | arm_relobj->exidx_input_section_by_link(shndx); | |
5459 | ||
5460 | // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND | |
5461 | // entry pointing to the end of the last seen EXIDX section. | |
5462 | if (exidx_input_section == NULL) | |
5463 | { | |
5464 | exidx_fixup.add_exidx_cantunwind_as_needed(); | |
5465 | continue; | |
5466 | } | |
5467 | ||
5468 | Relobj* exidx_relobj = exidx_input_section->relobj(); | |
5469 | unsigned int exidx_shndx = exidx_input_section->shndx(); | |
5470 | Section_id sid(exidx_relobj, exidx_shndx); | |
5471 | if (known_input_sections.find(sid) == known_input_sections.end()) | |
5472 | { | |
5473 | // This is odd. We have not seen this EXIDX input section before. | |
5474 | // We cannot do fix-up. | |
5475 | gold_error(_("EXIDX section %u of %s is not in EXIDX output section"), | |
5476 | exidx_shndx, exidx_relobj->name().c_str()); | |
5477 | exidx_fixup.add_exidx_cantunwind_as_needed(); | |
5478 | continue; | |
5479 | } | |
5480 | ||
5481 | // Fix up coverage and append input section to output data list. | |
5482 | Arm_exidx_section_offset_map* section_offset_map = NULL; | |
5483 | uint32_t deleted_bytes = | |
5484 | exidx_fixup.process_exidx_section<big_endian>(exidx_input_section, | |
5485 | §ion_offset_map); | |
5486 | ||
5487 | if (deleted_bytes == exidx_input_section->size()) | |
5488 | { | |
5489 | // The whole EXIDX section got merged. Remove it from output. | |
5490 | gold_assert(section_offset_map == NULL); | |
5491 | exidx_relobj->set_output_section(exidx_shndx, NULL); | |
e7eca48c DK |
5492 | |
5493 | // All local symbols defined in this input section will be dropped. | |
5494 | // We need to adjust output local symbol count. | |
5495 | arm_relobj->set_output_local_symbol_count_needs_update(); | |
2b328d4e DK |
5496 | } |
5497 | else if (deleted_bytes > 0) | |
5498 | { | |
5499 | // Some entries are merged. We need to convert this EXIDX input | |
5500 | // section into a relaxed section. | |
5501 | gold_assert(section_offset_map != NULL); | |
5502 | Arm_exidx_merged_section* merged_section = | |
5503 | new Arm_exidx_merged_section(*exidx_input_section, | |
5504 | *section_offset_map, deleted_bytes); | |
5505 | this->add_relaxed_input_section(merged_section); | |
5506 | arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx); | |
e7eca48c DK |
5507 | |
5508 | // All local symbols defined in discarded portions of this input | |
5509 | // section will be dropped. We need to adjust output local symbol | |
5510 | // count. | |
5511 | arm_relobj->set_output_local_symbol_count_needs_update(); | |
2b328d4e DK |
5512 | } |
5513 | else | |
5514 | { | |
5515 | // Just add back the EXIDX input section. | |
5516 | gold_assert(section_offset_map == NULL); | |
5517 | Output_section::Simple_input_section sis(exidx_relobj, exidx_shndx); | |
5518 | this->add_simple_input_section(sis, exidx_input_section->size(), | |
5519 | exidx_input_section->addralign()); | |
5520 | } | |
5521 | ||
5522 | processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx)); | |
5523 | } | |
5524 | ||
5525 | // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary. | |
5526 | exidx_fixup.add_exidx_cantunwind_as_needed(); | |
5527 | ||
5528 | // Remove any known EXIDX input sections that are not processed. | |
5529 | for (Simple_input_section_list::const_iterator p = input_sections.begin(); | |
5530 | p != input_sections.end(); | |
5531 | ++p) | |
5532 | { | |
5533 | if (processed_input_sections.find(Section_id(p->relobj(), p->shndx())) | |
5534 | == processed_input_sections.end()) | |
5535 | { | |
5536 | // We only discard a known EXIDX section because its linked | |
5537 | // text section has been folded by ICF. | |
5538 | Arm_relobj<big_endian>* arm_relobj = | |
5539 | Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); | |
5540 | const Arm_exidx_input_section* exidx_input_section = | |
5541 | arm_relobj->exidx_input_section_by_shndx(p->shndx()); | |
5542 | gold_assert(exidx_input_section != NULL); | |
5543 | unsigned int text_shndx = exidx_input_section->link(); | |
5544 | gold_assert(symtab->is_section_folded(p->relobj(), text_shndx)); | |
5545 | ||
5546 | // Remove this from link. | |
5547 | p->relobj()->set_output_section(p->shndx(), NULL); | |
5548 | } | |
5549 | } | |
5550 | ||
5551 | // Make changes permanent. | |
5552 | this->save_states(); | |
5553 | this->set_section_offsets_need_adjustment(); | |
5554 | } | |
5555 | ||
8ffa3667 DK |
5556 | // Arm_relobj methods. |
5557 | ||
44272192 DK |
5558 | // Determine if we want to scan the SHNDX-th section for relocation stubs. |
5559 | // This is a helper for Arm_relobj::scan_sections_for_stubs() below. | |
5560 | ||
5561 | template<bool big_endian> | |
5562 | bool | |
5563 | Arm_relobj<big_endian>::section_needs_reloc_stub_scanning( | |
5564 | const elfcpp::Shdr<32, big_endian>& shdr, | |
5565 | const Relobj::Output_sections& out_sections, | |
2b328d4e DK |
5566 | const Symbol_table *symtab, |
5567 | const unsigned char* pshdrs) | |
44272192 DK |
5568 | { |
5569 | unsigned int sh_type = shdr.get_sh_type(); | |
5570 | if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA) | |
5571 | return false; | |
5572 | ||
5573 | // Ignore empty section. | |
5574 | off_t sh_size = shdr.get_sh_size(); | |
5575 | if (sh_size == 0) | |
5576 | return false; | |
5577 | ||
5578 | // Ignore reloc section with bad info. This error will be | |
5579 | // reported in the final link. | |
5580 | unsigned int index = this->adjust_shndx(shdr.get_sh_info()); | |
5581 | if (index >= this->shnum()) | |
5582 | return false; | |
5583 | ||
5584 | // This relocation section is against a section which we | |
5585 | // discarded or if the section is folded into another | |
5586 | // section due to ICF. | |
5587 | if (out_sections[index] == NULL || symtab->is_section_folded(this, index)) | |
5588 | return false; | |
5589 | ||
2b328d4e DK |
5590 | // Check the section to which relocations are applied. Ignore relocations |
5591 | // to unallocated sections or EXIDX sections. | |
5592 | const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; | |
5593 | const elfcpp::Shdr<32, big_endian> data_shdr(pshdrs + index * shdr_size); | |
5594 | if ((data_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0 | |
5595 | || data_shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) | |
5596 | return false; | |
5597 | ||
44272192 DK |
5598 | // Ignore reloc section with unexpected symbol table. The |
5599 | // error will be reported in the final link. | |
5600 | if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx()) | |
5601 | return false; | |
5602 | ||
b521dfe4 DK |
5603 | unsigned int reloc_size; |
5604 | if (sh_type == elfcpp::SHT_REL) | |
5605 | reloc_size = elfcpp::Elf_sizes<32>::rel_size; | |
5606 | else | |
5607 | reloc_size = elfcpp::Elf_sizes<32>::rela_size; | |
44272192 DK |
5608 | |
5609 | // Ignore reloc section with unexpected entsize or uneven size. | |
5610 | // The error will be reported in the final link. | |
5611 | if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0) | |
5612 | return false; | |
5613 | ||
5614 | return true; | |
5615 | } | |
5616 | ||
5617 | // Determine if we want to scan the SHNDX-th section for non-relocation stubs. | |
5618 | // This is a helper for Arm_relobj::scan_sections_for_stubs() below. | |
5619 | ||
5620 | template<bool big_endian> | |
5621 | bool | |
5622 | Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning( | |
5623 | const elfcpp::Shdr<32, big_endian>& shdr, | |
5624 | unsigned int shndx, | |
5625 | Output_section* os, | |
5626 | const Symbol_table* symtab) | |
5627 | { | |
5628 | // We only scan non-empty code sections. | |
5629 | if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0 | |
5630 | || shdr.get_sh_size() == 0) | |
5631 | return false; | |
5632 | ||
5633 | // Ignore discarded or ICF'ed sections. | |
5634 | if (os == NULL || symtab->is_section_folded(this, shndx)) | |
5635 | return false; | |
5636 | ||
5637 | // Find output address of section. | |
5638 | Arm_address address = os->output_address(this, shndx, 0); | |
5639 | ||
5640 | // If the section does not cross any 4K-boundaries, it does not need to | |
5641 | // be scanned. | |
5642 | if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU)) | |
5643 | return false; | |
5644 | ||
5645 | return true; | |
5646 | } | |
5647 | ||
5648 | // Scan a section for Cortex-A8 workaround. | |
5649 | ||
5650 | template<bool big_endian> | |
5651 | void | |
5652 | Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum( | |
5653 | const elfcpp::Shdr<32, big_endian>& shdr, | |
5654 | unsigned int shndx, | |
5655 | Output_section* os, | |
5656 | Target_arm<big_endian>* arm_target) | |
5657 | { | |
5658 | Arm_address output_address = os->output_address(this, shndx, 0); | |
5659 | ||
5660 | // Get the section contents. | |
5661 | section_size_type input_view_size = 0; | |
5662 | const unsigned char* input_view = | |
5663 | this->section_contents(shndx, &input_view_size, false); | |
5664 | ||
5665 | // We need to go through the mapping symbols to determine what to | |
5666 | // scan. There are two reasons. First, we should look at THUMB code and | |
5667 | // THUMB code only. Second, we only want to look at the 4K-page boundary | |
5668 | // to speed up the scanning. | |
5669 | ||
5670 | // Look for the first mapping symbol in this section. It should be | |
5671 | // at (shndx, 0). | |
5672 | Mapping_symbol_position section_start(shndx, 0); | |
5673 | typename Mapping_symbols_info::const_iterator p = | |
5674 | this->mapping_symbols_info_.lower_bound(section_start); | |
5675 | ||
5676 | if (p == this->mapping_symbols_info_.end() | |
5677 | || p->first != section_start) | |
5678 | { | |
5679 | gold_warning(_("Cortex-A8 erratum scanning failed because there " | |
5680 | "is no mapping symbols for section %u of %s"), | |
5681 | shndx, this->name().c_str()); | |
5682 | return; | |
5683 | } | |
5684 | ||
5685 | while (p != this->mapping_symbols_info_.end() | |
5686 | && p->first.first == shndx) | |
5687 | { | |
5688 | typename Mapping_symbols_info::const_iterator next = | |
5689 | this->mapping_symbols_info_.upper_bound(p->first); | |
5690 | ||
5691 | // Only scan part of a section with THUMB code. | |
5692 | if (p->second == 't') | |
5693 | { | |
5694 | // Determine the end of this range. | |
5695 | section_size_type span_start = | |
5696 | convert_to_section_size_type(p->first.second); | |
5697 | section_size_type span_end; | |
5698 | if (next != this->mapping_symbols_info_.end() | |
5699 | && next->first.first == shndx) | |
5700 | span_end = convert_to_section_size_type(next->first.second); | |
5701 | else | |
5702 | span_end = convert_to_section_size_type(shdr.get_sh_size()); | |
5703 | ||
5704 | if (((span_start + output_address) & ~0xfffUL) | |
5705 | != ((span_end + output_address - 1) & ~0xfffUL)) | |
5706 | { | |
5707 | arm_target->scan_span_for_cortex_a8_erratum(this, shndx, | |
5708 | span_start, span_end, | |
5709 | input_view, | |
5710 | output_address); | |
5711 | } | |
5712 | } | |
5713 | ||
5714 | p = next; | |
5715 | } | |
5716 | } | |
5717 | ||
8ffa3667 DK |
5718 | // Scan relocations for stub generation. |
5719 | ||
5720 | template<bool big_endian> | |
5721 | void | |
5722 | Arm_relobj<big_endian>::scan_sections_for_stubs( | |
5723 | Target_arm<big_endian>* arm_target, | |
5724 | const Symbol_table* symtab, | |
2ea97941 | 5725 | const Layout* layout) |
8ffa3667 | 5726 | { |
2ea97941 ILT |
5727 | unsigned int shnum = this->shnum(); |
5728 | const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; | |
8ffa3667 DK |
5729 | |
5730 | // Read the section headers. | |
5731 | const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), | |
2ea97941 | 5732 | shnum * shdr_size, |
8ffa3667 DK |
5733 | true, true); |
5734 | ||
5735 | // To speed up processing, we set up hash tables for fast lookup of | |
5736 | // input offsets to output addresses. | |
5737 | this->initialize_input_to_output_maps(); | |
5738 | ||
5739 | const Relobj::Output_sections& out_sections(this->output_sections()); | |
5740 | ||
5741 | Relocate_info<32, big_endian> relinfo; | |
8ffa3667 | 5742 | relinfo.symtab = symtab; |
2ea97941 | 5743 | relinfo.layout = layout; |
8ffa3667 DK |
5744 | relinfo.object = this; |
5745 | ||
44272192 | 5746 | // Do relocation stubs scanning. |
2ea97941 ILT |
5747 | const unsigned char* p = pshdrs + shdr_size; |
5748 | for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) | |
8ffa3667 | 5749 | { |
44272192 | 5750 | const elfcpp::Shdr<32, big_endian> shdr(p); |
2b328d4e DK |
5751 | if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab, |
5752 | pshdrs)) | |
8ffa3667 | 5753 | { |
44272192 DK |
5754 | unsigned int index = this->adjust_shndx(shdr.get_sh_info()); |
5755 | Arm_address output_offset = this->get_output_section_offset(index); | |
5756 | Arm_address output_address; | |
5757 | if(output_offset != invalid_address) | |
5758 | output_address = out_sections[index]->address() + output_offset; | |
5759 | else | |
5760 | { | |
5761 | // Currently this only happens for a relaxed section. | |
5762 | const Output_relaxed_input_section* poris = | |
5763 | out_sections[index]->find_relaxed_input_section(this, index); | |
5764 | gold_assert(poris != NULL); | |
5765 | output_address = poris->address(); | |
5766 | } | |
8ffa3667 | 5767 | |
44272192 DK |
5768 | // Get the relocations. |
5769 | const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(), | |
5770 | shdr.get_sh_size(), | |
5771 | true, false); | |
5772 | ||
5773 | // Get the section contents. This does work for the case in which | |
5774 | // we modify the contents of an input section. We need to pass the | |
5775 | // output view under such circumstances. | |
5776 | section_size_type input_view_size = 0; | |
5777 | const unsigned char* input_view = | |
5778 | this->section_contents(index, &input_view_size, false); | |
5779 | ||
5780 | relinfo.reloc_shndx = i; | |
5781 | relinfo.data_shndx = index; | |
5782 | unsigned int sh_type = shdr.get_sh_type(); | |
b521dfe4 DK |
5783 | unsigned int reloc_size; |
5784 | if (sh_type == elfcpp::SHT_REL) | |
5785 | reloc_size = elfcpp::Elf_sizes<32>::rel_size; | |
5786 | else | |
5787 | reloc_size = elfcpp::Elf_sizes<32>::rela_size; | |
44272192 DK |
5788 | |
5789 | Output_section* os = out_sections[index]; | |
5790 | arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs, | |
5791 | shdr.get_sh_size() / reloc_size, | |
5792 | os, | |
5793 | output_offset == invalid_address, | |
5794 | input_view, output_address, | |
5795 | input_view_size); | |
8ffa3667 | 5796 | } |
44272192 | 5797 | } |
8ffa3667 | 5798 | |
44272192 DK |
5799 | // Do Cortex-A8 erratum stubs scanning. This has to be done for a section |
5800 | // after its relocation section, if there is one, is processed for | |
5801 | // relocation stubs. Merging this loop with the one above would have been | |
5802 | // complicated since we would have had to make sure that relocation stub | |
5803 | // scanning is done first. | |
5804 | if (arm_target->fix_cortex_a8()) | |
5805 | { | |
5806 | const unsigned char* p = pshdrs + shdr_size; | |
5807 | for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) | |
8ffa3667 | 5808 | { |
44272192 DK |
5809 | const elfcpp::Shdr<32, big_endian> shdr(p); |
5810 | if (this->section_needs_cortex_a8_stub_scanning(shdr, i, | |
5811 | out_sections[i], | |
5812 | symtab)) | |
5813 | this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i], | |
5814 | arm_target); | |
8ffa3667 | 5815 | } |
8ffa3667 DK |
5816 | } |
5817 | ||
5818 | // After we've done the relocations, we release the hash tables, | |
5819 | // since we no longer need them. | |
5820 | this->free_input_to_output_maps(); | |
5821 | } | |
5822 | ||
5823 | // Count the local symbols. The ARM backend needs to know if a symbol | |
5824 | // is a THUMB function or not. For global symbols, it is easy because | |
5825 | // the Symbol object keeps the ELF symbol type. For local symbol it is | |
5826 | // harder because we cannot access this information. So we override the | |
5827 | // do_count_local_symbol in parent and scan local symbols to mark | |
5828 | // THUMB functions. This is not the most efficient way but I do not want to | |
5829 | // slow down other ports by calling a per symbol targer hook inside | |
5830 | // Sized_relobj<size, big_endian>::do_count_local_symbols. | |
5831 | ||
5832 | template<bool big_endian> | |
5833 | void | |
5834 | Arm_relobj<big_endian>::do_count_local_symbols( | |
5835 | Stringpool_template<char>* pool, | |
5836 | Stringpool_template<char>* dynpool) | |
5837 | { | |
5838 | // We need to fix-up the values of any local symbols whose type are | |
5839 | // STT_ARM_TFUNC. | |
5840 | ||
5841 | // Ask parent to count the local symbols. | |
5842 | Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool); | |
5843 | const unsigned int loccount = this->local_symbol_count(); | |
5844 | if (loccount == 0) | |
5845 | return; | |
5846 | ||
5847 | // Intialize the thumb function bit-vector. | |
5848 | std::vector<bool> empty_vector(loccount, false); | |
5849 | this->local_symbol_is_thumb_function_.swap(empty_vector); | |
5850 | ||
5851 | // Read the symbol table section header. | |
2ea97941 | 5852 | const unsigned int symtab_shndx = this->symtab_shndx(); |
8ffa3667 | 5853 | elfcpp::Shdr<32, big_endian> |
2ea97941 | 5854 | symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); |
8ffa3667 DK |
5855 | gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); |
5856 | ||
5857 | // Read the local symbols. | |
2ea97941 | 5858 | const int sym_size =elfcpp::Elf_sizes<32>::sym_size; |
8ffa3667 | 5859 | gold_assert(loccount == symtabshdr.get_sh_info()); |
2ea97941 | 5860 | off_t locsize = loccount * sym_size; |
8ffa3667 DK |
5861 | const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), |
5862 | locsize, true, true); | |
5863 | ||
20138696 DK |
5864 | // For mapping symbol processing, we need to read the symbol names. |
5865 | unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link()); | |
5866 | if (strtab_shndx >= this->shnum()) | |
5867 | { | |
5868 | this->error(_("invalid symbol table name index: %u"), strtab_shndx); | |
5869 | return; | |
5870 | } | |
5871 | ||
5872 | elfcpp::Shdr<32, big_endian> | |
5873 | strtabshdr(this, this->elf_file()->section_header(strtab_shndx)); | |
5874 | if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB) | |
5875 | { | |
5876 | this->error(_("symbol table name section has wrong type: %u"), | |
5877 | static_cast<unsigned int>(strtabshdr.get_sh_type())); | |
5878 | return; | |
5879 | } | |
5880 | const char* pnames = | |
5881 | reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(), | |
5882 | strtabshdr.get_sh_size(), | |
5883 | false, false)); | |
5884 | ||
8ffa3667 DK |
5885 | // Loop over the local symbols and mark any local symbols pointing |
5886 | // to THUMB functions. | |
5887 | ||
5888 | // Skip the first dummy symbol. | |
2ea97941 | 5889 | psyms += sym_size; |
8ffa3667 DK |
5890 | typename Sized_relobj<32, big_endian>::Local_values* plocal_values = |
5891 | this->local_values(); | |
2ea97941 | 5892 | for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) |
8ffa3667 DK |
5893 | { |
5894 | elfcpp::Sym<32, big_endian> sym(psyms); | |
5895 | elfcpp::STT st_type = sym.get_st_type(); | |
5896 | Symbol_value<32>& lv((*plocal_values)[i]); | |
5897 | Arm_address input_value = lv.input_value(); | |
5898 | ||
20138696 DK |
5899 | // Check to see if this is a mapping symbol. |
5900 | const char* sym_name = pnames + sym.get_st_name(); | |
5901 | if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name)) | |
5902 | { | |
5903 | unsigned int input_shndx = sym.get_st_shndx(); | |
5904 | ||
5905 | // Strip of LSB in case this is a THUMB symbol. | |
5906 | Mapping_symbol_position msp(input_shndx, input_value & ~1U); | |
5907 | this->mapping_symbols_info_[msp] = sym_name[1]; | |
5908 | } | |
5909 | ||
8ffa3667 DK |
5910 | if (st_type == elfcpp::STT_ARM_TFUNC |
5911 | || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0))) | |
5912 | { | |
5913 | // This is a THUMB function. Mark this and canonicalize the | |
5914 | // symbol value by setting LSB. | |
5915 | this->local_symbol_is_thumb_function_[i] = true; | |
5916 | if ((input_value & 1) == 0) | |
5917 | lv.set_input_value(input_value | 1); | |
5918 | } | |
5919 | } | |
5920 | } | |
5921 | ||
5922 | // Relocate sections. | |
5923 | template<bool big_endian> | |
5924 | void | |
5925 | Arm_relobj<big_endian>::do_relocate_sections( | |
8ffa3667 | 5926 | const Symbol_table* symtab, |
2ea97941 | 5927 | const Layout* layout, |
8ffa3667 DK |
5928 | const unsigned char* pshdrs, |
5929 | typename Sized_relobj<32, big_endian>::Views* pviews) | |
5930 | { | |
5931 | // Call parent to relocate sections. | |
2ea97941 | 5932 | Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs, |
43d12afe | 5933 | pviews); |
8ffa3667 DK |
5934 | |
5935 | // We do not generate stubs if doing a relocatable link. | |
5936 | if (parameters->options().relocatable()) | |
5937 | return; | |
5938 | ||
5939 | // Relocate stub tables. | |
2ea97941 | 5940 | unsigned int shnum = this->shnum(); |
8ffa3667 DK |
5941 | |
5942 | Target_arm<big_endian>* arm_target = | |
5943 | Target_arm<big_endian>::default_target(); | |
5944 | ||
5945 | Relocate_info<32, big_endian> relinfo; | |
8ffa3667 | 5946 | relinfo.symtab = symtab; |
2ea97941 | 5947 | relinfo.layout = layout; |
8ffa3667 DK |
5948 | relinfo.object = this; |
5949 | ||
2ea97941 | 5950 | for (unsigned int i = 1; i < shnum; ++i) |
8ffa3667 DK |
5951 | { |
5952 | Arm_input_section<big_endian>* arm_input_section = | |
5953 | arm_target->find_arm_input_section(this, i); | |
5954 | ||
41263c05 DK |
5955 | if (arm_input_section != NULL |
5956 | && arm_input_section->is_stub_table_owner() | |
5957 | && !arm_input_section->stub_table()->empty()) | |
5958 | { | |
5959 | // We cannot discard a section if it owns a stub table. | |
5960 | Output_section* os = this->output_section(i); | |
5961 | gold_assert(os != NULL); | |
5962 | ||
5963 | relinfo.reloc_shndx = elfcpp::SHN_UNDEF; | |
5964 | relinfo.reloc_shdr = NULL; | |
5965 | relinfo.data_shndx = i; | |
5966 | relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size; | |
5967 | ||
5968 | gold_assert((*pviews)[i].view != NULL); | |
5969 | ||
5970 | // We are passed the output section view. Adjust it to cover the | |
5971 | // stub table only. | |
5972 | Stub_table<big_endian>* stub_table = arm_input_section->stub_table(); | |
5973 | gold_assert((stub_table->address() >= (*pviews)[i].address) | |
5974 | && ((stub_table->address() + stub_table->data_size()) | |
5975 | <= (*pviews)[i].address + (*pviews)[i].view_size)); | |
5976 | ||
5977 | off_t offset = stub_table->address() - (*pviews)[i].address; | |
5978 | unsigned char* view = (*pviews)[i].view + offset; | |
5979 | Arm_address address = stub_table->address(); | |
5980 | section_size_type view_size = stub_table->data_size(); | |
8ffa3667 | 5981 | |
41263c05 DK |
5982 | stub_table->relocate_stubs(&relinfo, arm_target, os, view, address, |
5983 | view_size); | |
5984 | } | |
5985 | ||
5986 | // Apply Cortex A8 workaround if applicable. | |
5987 | if (this->section_has_cortex_a8_workaround(i)) | |
5988 | { | |
5989 | unsigned char* view = (*pviews)[i].view; | |
5990 | Arm_address view_address = (*pviews)[i].address; | |
5991 | section_size_type view_size = (*pviews)[i].view_size; | |
5992 | Stub_table<big_endian>* stub_table = this->stub_tables_[i]; | |
5993 | ||
5994 | // Adjust view to cover section. | |
5995 | Output_section* os = this->output_section(i); | |
5996 | gold_assert(os != NULL); | |
5997 | Arm_address section_address = os->output_address(this, i, 0); | |
5998 | uint64_t section_size = this->section_size(i); | |
5999 | ||
6000 | gold_assert(section_address >= view_address | |
6001 | && ((section_address + section_size) | |
6002 | <= (view_address + view_size))); | |
6003 | ||
6004 | unsigned char* section_view = view + (section_address - view_address); | |
6005 | ||
6006 | // Apply the Cortex-A8 workaround to the output address range | |
6007 | // corresponding to this input section. | |
6008 | stub_table->apply_cortex_a8_workaround_to_address_range( | |
6009 | arm_target, | |
6010 | section_view, | |
6011 | section_address, | |
6012 | section_size); | |
6013 | } | |
8ffa3667 DK |
6014 | } |
6015 | } | |
6016 | ||
993d07c1 DK |
6017 | // Create a new EXIDX input section object for EXIDX section SHNDX with |
6018 | // header SHDR. | |
a0351a69 DK |
6019 | |
6020 | template<bool big_endian> | |
993d07c1 DK |
6021 | void |
6022 | Arm_relobj<big_endian>::make_exidx_input_section( | |
6023 | unsigned int shndx, | |
6024 | const elfcpp::Shdr<32, big_endian>& shdr) | |
a0351a69 | 6025 | { |
993d07c1 DK |
6026 | // Link .text section to its .ARM.exidx section in the same object. |
6027 | unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); | |
6028 | ||
6029 | // Issue an error and ignore this EXIDX section if it does not point | |
6030 | // to any text section. | |
6031 | if (text_shndx == elfcpp::SHN_UNDEF) | |
a0351a69 | 6032 | { |
993d07c1 DK |
6033 | gold_error(_("EXIDX section %u in %s has no linked text section"), |
6034 | shndx, this->name().c_str()); | |
6035 | return; | |
6036 | } | |
6037 | ||
6038 | // Issue an error and ignore this EXIDX section if it points to a text | |
6039 | // section already has an EXIDX section. | |
6040 | if (this->exidx_section_map_[text_shndx] != NULL) | |
6041 | { | |
6042 | gold_error(_("EXIDX sections %u and %u both link to text section %u " | |
6043 | "in %s"), | |
6044 | shndx, this->exidx_section_map_[text_shndx]->shndx(), | |
6045 | text_shndx, this->name().c_str()); | |
6046 | return; | |
a0351a69 | 6047 | } |
993d07c1 DK |
6048 | |
6049 | // Create an Arm_exidx_input_section object for this EXIDX section. | |
6050 | Arm_exidx_input_section* exidx_input_section = | |
6051 | new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(), | |
6052 | shdr.get_sh_addralign()); | |
6053 | this->exidx_section_map_[text_shndx] = exidx_input_section; | |
6054 | ||
6055 | // Also map the EXIDX section index to this. | |
6056 | gold_assert(this->exidx_section_map_[shndx] == NULL); | |
6057 | this->exidx_section_map_[shndx] = exidx_input_section; | |
a0351a69 DK |
6058 | } |
6059 | ||
d5b40221 DK |
6060 | // Read the symbol information. |
6061 | ||
6062 | template<bool big_endian> | |
6063 | void | |
6064 | Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd) | |
6065 | { | |
6066 | // Call parent class to read symbol information. | |
6067 | Sized_relobj<32, big_endian>::do_read_symbols(sd); | |
6068 | ||
6069 | // Read processor-specific flags in ELF file header. | |
6070 | const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, | |
6071 | elfcpp::Elf_sizes<32>::ehdr_size, | |
6072 | true, false); | |
6073 | elfcpp::Ehdr<32, big_endian> ehdr(pehdr); | |
6074 | this->processor_specific_flags_ = ehdr.get_e_flags(); | |
993d07c1 DK |
6075 | |
6076 | // Go over the section headers and look for .ARM.attributes and .ARM.exidx | |
6077 | // sections. | |
6078 | const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; | |
6079 | const unsigned char *ps = | |
6080 | sd->section_headers->data() + shdr_size; | |
6081 | for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) | |
6082 | { | |
6083 | elfcpp::Shdr<32, big_endian> shdr(ps); | |
6084 | if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) | |
6085 | { | |
6086 | gold_assert(this->attributes_section_data_ == NULL); | |
6087 | section_offset_type section_offset = shdr.get_sh_offset(); | |
6088 | section_size_type section_size = | |
6089 | convert_to_section_size_type(shdr.get_sh_size()); | |
6090 | File_view* view = this->get_lasting_view(section_offset, | |
6091 | section_size, true, false); | |
6092 | this->attributes_section_data_ = | |
6093 | new Attributes_section_data(view->data(), section_size); | |
6094 | } | |
6095 | else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) | |
6096 | this->make_exidx_input_section(i, shdr); | |
6097 | } | |
d5b40221 DK |
6098 | } |
6099 | ||
99e5bff2 DK |
6100 | // Process relocations for garbage collection. The ARM target uses .ARM.exidx |
6101 | // sections for unwinding. These sections are referenced implicitly by | |
6102 | // text sections linked in the section headers. If we ignore these implict | |
6103 | // references, the .ARM.exidx sections and any .ARM.extab sections they use | |
6104 | // will be garbage-collected incorrectly. Hence we override the same function | |
6105 | // in the base class to handle these implicit references. | |
6106 | ||
6107 | template<bool big_endian> | |
6108 | void | |
6109 | Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab, | |
6110 | Layout* layout, | |
6111 | Read_relocs_data* rd) | |
6112 | { | |
6113 | // First, call base class method to process relocations in this object. | |
6114 | Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); | |
6115 | ||
6116 | unsigned int shnum = this->shnum(); | |
6117 | const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; | |
6118 | const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), | |
6119 | shnum * shdr_size, | |
6120 | true, true); | |
6121 | ||
6122 | // Scan section headers for sections of type SHT_ARM_EXIDX. Add references | |
6123 | // to these from the linked text sections. | |
6124 | const unsigned char* ps = pshdrs + shdr_size; | |
6125 | for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size) | |
6126 | { | |
6127 | elfcpp::Shdr<32, big_endian> shdr(ps); | |
6128 | if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) | |
6129 | { | |
6130 | // Found an .ARM.exidx section, add it to the set of reachable | |
6131 | // sections from its linked text section. | |
6132 | unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); | |
6133 | symtab->gc()->add_reference(this, text_shndx, this, i); | |
6134 | } | |
6135 | } | |
6136 | } | |
6137 | ||
e7eca48c DK |
6138 | // Update output local symbol count. Owing to EXIDX entry merging, some local |
6139 | // symbols will be removed in output. Adjust output local symbol count | |
6140 | // accordingly. We can only changed the static output local symbol count. It | |
6141 | // is too late to change the dynamic symbols. | |
6142 | ||
6143 | template<bool big_endian> | |
6144 | void | |
6145 | Arm_relobj<big_endian>::update_output_local_symbol_count() | |
6146 | { | |
6147 | // Caller should check that this needs updating. We want caller checking | |
6148 | // because output_local_symbol_count_needs_update() is most likely inlined. | |
6149 | gold_assert(this->output_local_symbol_count_needs_update_); | |
6150 | ||
6151 | gold_assert(this->symtab_shndx() != -1U); | |
6152 | if (this->symtab_shndx() == 0) | |
6153 | { | |
6154 | // This object has no symbols. Weird but legal. | |
6155 | return; | |
6156 | } | |
6157 | ||
6158 | // Read the symbol table section header. | |
6159 | const unsigned int symtab_shndx = this->symtab_shndx(); | |
6160 | elfcpp::Shdr<32, big_endian> | |
6161 | symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); | |
6162 | gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); | |
6163 | ||
6164 | // Read the local symbols. | |
6165 | const int sym_size = elfcpp::Elf_sizes<32>::sym_size; | |
6166 | const unsigned int loccount = this->local_symbol_count(); | |
6167 | gold_assert(loccount == symtabshdr.get_sh_info()); | |
6168 | off_t locsize = loccount * sym_size; | |
6169 | const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), | |
6170 | locsize, true, true); | |
6171 | ||
6172 | // Loop over the local symbols. | |
6173 | ||
6174 | typedef typename Sized_relobj<32, big_endian>::Output_sections | |
6175 | Output_sections; | |
6176 | const Output_sections& out_sections(this->output_sections()); | |
6177 | unsigned int shnum = this->shnum(); | |
6178 | unsigned int count = 0; | |
6179 | // Skip the first, dummy, symbol. | |
6180 | psyms += sym_size; | |
6181 | for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) | |
6182 | { | |
6183 | elfcpp::Sym<32, big_endian> sym(psyms); | |
6184 | ||
6185 | Symbol_value<32>& lv((*this->local_values())[i]); | |
6186 | ||
6187 | // This local symbol was already discarded by do_count_local_symbols. | |
6188 | if (!lv.needs_output_symtab_entry()) | |
6189 | continue; | |
6190 | ||
6191 | bool is_ordinary; | |
6192 | unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(), | |
6193 | &is_ordinary); | |
6194 | ||
6195 | if (shndx < shnum) | |
6196 | { | |
6197 | Output_section* os = out_sections[shndx]; | |
6198 | ||
6199 | // This local symbol no longer has an output section. Discard it. | |
6200 | if (os == NULL) | |
6201 | { | |
6202 | lv.set_no_output_symtab_entry(); | |
6203 | continue; | |
6204 | } | |
6205 | ||
6206 | // Currently we only discard parts of EXIDX input sections. | |
6207 | // We explicitly check for a merged EXIDX input section to avoid | |
6208 | // calling Output_section_data::output_offset unless necessary. | |
6209 | if ((this->get_output_section_offset(shndx) == invalid_address) | |
6210 | && (this->exidx_input_section_by_shndx(shndx) != NULL)) | |
6211 | { | |
6212 | section_offset_type output_offset = | |
6213 | os->output_offset(this, shndx, lv.input_value()); | |
6214 | if (output_offset == -1) | |
6215 | { | |
6216 | // This symbol is defined in a part of an EXIDX input section | |
6217 | // that is discarded due to entry merging. | |
6218 | lv.set_no_output_symtab_entry(); | |
6219 | continue; | |
6220 | } | |
6221 | } | |
6222 | } | |
6223 | ||
6224 | ++count; | |
6225 | } | |
6226 | ||
6227 | this->set_output_local_symbol_count(count); | |
6228 | this->output_local_symbol_count_needs_update_ = false; | |
6229 | } | |
6230 | ||
d5b40221 DK |
6231 | // Arm_dynobj methods. |
6232 | ||
6233 | // Read the symbol information. | |
6234 | ||
6235 | template<bool big_endian> | |
6236 | void | |
6237 | Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd) | |
6238 | { | |
6239 | // Call parent class to read symbol information. | |
6240 | Sized_dynobj<32, big_endian>::do_read_symbols(sd); | |
6241 | ||
6242 | // Read processor-specific flags in ELF file header. | |
6243 | const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, | |
6244 | elfcpp::Elf_sizes<32>::ehdr_size, | |
6245 | true, false); | |
6246 | elfcpp::Ehdr<32, big_endian> ehdr(pehdr); | |
6247 | this->processor_specific_flags_ = ehdr.get_e_flags(); | |
993d07c1 DK |
6248 | |
6249 | // Read the attributes section if there is one. | |
6250 | // We read from the end because gas seems to put it near the end of | |
6251 | // the section headers. | |
6252 | const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; | |
6253 | const unsigned char *ps = | |
6254 | sd->section_headers->data() + shdr_size * (this->shnum() - 1); | |
6255 | for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size) | |
6256 | { | |
6257 | elfcpp::Shdr<32, big_endian> shdr(ps); | |
6258 | if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) | |
6259 | { | |
6260 | section_offset_type section_offset = shdr.get_sh_offset(); | |
6261 | section_size_type section_size = | |
6262 | convert_to_section_size_type(shdr.get_sh_size()); | |
6263 | File_view* view = this->get_lasting_view(section_offset, | |
6264 | section_size, true, false); | |
6265 | this->attributes_section_data_ = | |
6266 | new Attributes_section_data(view->data(), section_size); | |
6267 | break; | |
6268 | } | |
6269 | } | |
d5b40221 DK |
6270 | } |
6271 | ||
e9bbb538 DK |
6272 | // Stub_addend_reader methods. |
6273 | ||
6274 | // Read the addend of a REL relocation of type R_TYPE at VIEW. | |
6275 | ||
6276 | template<bool big_endian> | |
6277 | elfcpp::Elf_types<32>::Elf_Swxword | |
6278 | Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()( | |
6279 | unsigned int r_type, | |
6280 | const unsigned char* view, | |
6281 | const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const | |
6282 | { | |
089d69dc DK |
6283 | typedef struct Arm_relocate_functions<big_endian> RelocFuncs; |
6284 | ||
e9bbb538 DK |
6285 | switch (r_type) |
6286 | { | |
6287 | case elfcpp::R_ARM_CALL: | |
6288 | case elfcpp::R_ARM_JUMP24: | |
6289 | case elfcpp::R_ARM_PLT32: | |
6290 | { | |
6291 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
6292 | const Valtype* wv = reinterpret_cast<const Valtype*>(view); | |
6293 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); | |
6294 | return utils::sign_extend<26>(val << 2); | |
6295 | } | |
6296 | ||
6297 | case elfcpp::R_ARM_THM_CALL: | |
6298 | case elfcpp::R_ARM_THM_JUMP24: | |
6299 | case elfcpp::R_ARM_THM_XPC22: | |
6300 | { | |
e9bbb538 DK |
6301 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
6302 | const Valtype* wv = reinterpret_cast<const Valtype*>(view); | |
6303 | Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); | |
6304 | Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
089d69dc | 6305 | return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn); |
e9bbb538 DK |
6306 | } |
6307 | ||
6308 | case elfcpp::R_ARM_THM_JUMP19: | |
6309 | { | |
6310 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
6311 | const Valtype* wv = reinterpret_cast<const Valtype*>(view); | |
6312 | Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); | |
6313 | Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
089d69dc | 6314 | return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn); |
e9bbb538 DK |
6315 | } |
6316 | ||
6317 | default: | |
6318 | gold_unreachable(); | |
6319 | } | |
6320 | } | |
6321 | ||
94cdfcff DK |
6322 | // A class to handle the PLT data. |
6323 | ||
6324 | template<bool big_endian> | |
6325 | class Output_data_plt_arm : public Output_section_data | |
6326 | { | |
6327 | public: | |
6328 | typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> | |
6329 | Reloc_section; | |
6330 | ||
6331 | Output_data_plt_arm(Layout*, Output_data_space*); | |
6332 | ||
6333 | // Add an entry to the PLT. | |
6334 | void | |
6335 | add_entry(Symbol* gsym); | |
6336 | ||
6337 | // Return the .rel.plt section data. | |
6338 | const Reloc_section* | |
6339 | rel_plt() const | |
6340 | { return this->rel_; } | |
6341 | ||
6342 | protected: | |
6343 | void | |
6344 | do_adjust_output_section(Output_section* os); | |
6345 | ||
6346 | // Write to a map file. | |
6347 | void | |
6348 | do_print_to_mapfile(Mapfile* mapfile) const | |
6349 | { mapfile->print_output_data(this, _("** PLT")); } | |
6350 | ||
6351 | private: | |
6352 | // Template for the first PLT entry. | |
6353 | static const uint32_t first_plt_entry[5]; | |
6354 | ||
6355 | // Template for subsequent PLT entries. | |
6356 | static const uint32_t plt_entry[3]; | |
6357 | ||
6358 | // Set the final size. | |
6359 | void | |
6360 | set_final_data_size() | |
6361 | { | |
6362 | this->set_data_size(sizeof(first_plt_entry) | |
6363 | + this->count_ * sizeof(plt_entry)); | |
6364 | } | |
6365 | ||
6366 | // Write out the PLT data. | |
6367 | void | |
6368 | do_write(Output_file*); | |
6369 | ||
6370 | // The reloc section. | |
6371 | Reloc_section* rel_; | |
6372 | // The .got.plt section. | |
6373 | Output_data_space* got_plt_; | |
6374 | // The number of PLT entries. | |
6375 | unsigned int count_; | |
6376 | }; | |
6377 | ||
6378 | // Create the PLT section. The ordinary .got section is an argument, | |
6379 | // since we need to refer to the start. We also create our own .got | |
6380 | // section just for PLT entries. | |
6381 | ||
6382 | template<bool big_endian> | |
2ea97941 | 6383 | Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout, |
94cdfcff DK |
6384 | Output_data_space* got_plt) |
6385 | : Output_section_data(4), got_plt_(got_plt), count_(0) | |
6386 | { | |
6387 | this->rel_ = new Reloc_section(false); | |
2ea97941 | 6388 | layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, |
1a2dff53 ILT |
6389 | elfcpp::SHF_ALLOC, this->rel_, true, false, |
6390 | false, false); | |
94cdfcff DK |
6391 | } |
6392 | ||
6393 | template<bool big_endian> | |
6394 | void | |
6395 | Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os) | |
6396 | { | |
6397 | os->set_entsize(0); | |
6398 | } | |
6399 | ||
6400 | // Add an entry to the PLT. | |
6401 | ||
6402 | template<bool big_endian> | |
6403 | void | |
6404 | Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym) | |
6405 | { | |
6406 | gold_assert(!gsym->has_plt_offset()); | |
6407 | ||
6408 | // Note that when setting the PLT offset we skip the initial | |
6409 | // reserved PLT entry. | |
6410 | gsym->set_plt_offset((this->count_) * sizeof(plt_entry) | |
6411 | + sizeof(first_plt_entry)); | |
6412 | ||
6413 | ++this->count_; | |
6414 | ||
6415 | section_offset_type got_offset = this->got_plt_->current_data_size(); | |
6416 | ||
6417 | // Every PLT entry needs a GOT entry which points back to the PLT | |
6418 | // entry (this will be changed by the dynamic linker, normally | |
6419 | // lazily when the function is called). | |
6420 | this->got_plt_->set_current_data_size(got_offset + 4); | |
6421 | ||
6422 | // Every PLT entry needs a reloc. | |
6423 | gsym->set_needs_dynsym_entry(); | |
6424 | this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_, | |
6425 | got_offset); | |
6426 | ||
6427 | // Note that we don't need to save the symbol. The contents of the | |
6428 | // PLT are independent of which symbols are used. The symbols only | |
6429 | // appear in the relocations. | |
6430 | } | |
6431 | ||
6432 | // ARM PLTs. | |
6433 | // FIXME: This is not very flexible. Right now this has only been tested | |
6434 | // on armv5te. If we are to support additional architecture features like | |
6435 | // Thumb-2 or BE8, we need to make this more flexible like GNU ld. | |
6436 | ||
6437 | // The first entry in the PLT. | |
6438 | template<bool big_endian> | |
6439 | const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] = | |
6440 | { | |
6441 | 0xe52de004, // str lr, [sp, #-4]! | |
6442 | 0xe59fe004, // ldr lr, [pc, #4] | |
6443 | 0xe08fe00e, // add lr, pc, lr | |
6444 | 0xe5bef008, // ldr pc, [lr, #8]! | |
6445 | 0x00000000, // &GOT[0] - . | |
6446 | }; | |
6447 | ||
6448 | // Subsequent entries in the PLT. | |
6449 | ||
6450 | template<bool big_endian> | |
6451 | const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] = | |
6452 | { | |
6453 | 0xe28fc600, // add ip, pc, #0xNN00000 | |
6454 | 0xe28cca00, // add ip, ip, #0xNN000 | |
6455 | 0xe5bcf000, // ldr pc, [ip, #0xNNN]! | |
6456 | }; | |
6457 | ||
6458 | // Write out the PLT. This uses the hand-coded instructions above, | |
6459 | // and adjusts them as needed. This is all specified by the arm ELF | |
6460 | // Processor Supplement. | |
6461 | ||
6462 | template<bool big_endian> | |
6463 | void | |
6464 | Output_data_plt_arm<big_endian>::do_write(Output_file* of) | |
6465 | { | |
2ea97941 | 6466 | const off_t offset = this->offset(); |
94cdfcff DK |
6467 | const section_size_type oview_size = |
6468 | convert_to_section_size_type(this->data_size()); | |
2ea97941 | 6469 | unsigned char* const oview = of->get_output_view(offset, oview_size); |
94cdfcff DK |
6470 | |
6471 | const off_t got_file_offset = this->got_plt_->offset(); | |
6472 | const section_size_type got_size = | |
6473 | convert_to_section_size_type(this->got_plt_->data_size()); | |
6474 | unsigned char* const got_view = of->get_output_view(got_file_offset, | |
6475 | got_size); | |
6476 | unsigned char* pov = oview; | |
6477 | ||
ebabffbd DK |
6478 | Arm_address plt_address = this->address(); |
6479 | Arm_address got_address = this->got_plt_->address(); | |
94cdfcff DK |
6480 | |
6481 | // Write first PLT entry. All but the last word are constants. | |
6482 | const size_t num_first_plt_words = (sizeof(first_plt_entry) | |
6483 | / sizeof(plt_entry[0])); | |
6484 | for (size_t i = 0; i < num_first_plt_words - 1; i++) | |
6485 | elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); | |
6486 | // Last word in first PLT entry is &GOT[0] - . | |
6487 | elfcpp::Swap<32, big_endian>::writeval(pov + 16, | |
6488 | got_address - (plt_address + 16)); | |
6489 | pov += sizeof(first_plt_entry); | |
6490 | ||
6491 | unsigned char* got_pov = got_view; | |
6492 | ||
6493 | memset(got_pov, 0, 12); | |
6494 | got_pov += 12; | |
6495 | ||
6496 | const int rel_size = elfcpp::Elf_sizes<32>::rel_size; | |
6497 | unsigned int plt_offset = sizeof(first_plt_entry); | |
6498 | unsigned int plt_rel_offset = 0; | |
6499 | unsigned int got_offset = 12; | |
6500 | const unsigned int count = this->count_; | |
6501 | for (unsigned int i = 0; | |
6502 | i < count; | |
6503 | ++i, | |
6504 | pov += sizeof(plt_entry), | |
6505 | got_pov += 4, | |
6506 | plt_offset += sizeof(plt_entry), | |
6507 | plt_rel_offset += rel_size, | |
6508 | got_offset += 4) | |
6509 | { | |
6510 | // Set and adjust the PLT entry itself. | |
2ea97941 ILT |
6511 | int32_t offset = ((got_address + got_offset) |
6512 | - (plt_address + plt_offset + 8)); | |
94cdfcff | 6513 | |
2ea97941 ILT |
6514 | gold_assert(offset >= 0 && offset < 0x0fffffff); |
6515 | uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff); | |
94cdfcff | 6516 | elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); |
2ea97941 | 6517 | uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff); |
94cdfcff | 6518 | elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); |
2ea97941 | 6519 | uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff); |
94cdfcff DK |
6520 | elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); |
6521 | ||
6522 | // Set the entry in the GOT. | |
6523 | elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address); | |
6524 | } | |
6525 | ||
6526 | gold_assert(static_cast<section_size_type>(pov - oview) == oview_size); | |
6527 | gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size); | |
6528 | ||
2ea97941 | 6529 | of->write_output_view(offset, oview_size, oview); |
94cdfcff DK |
6530 | of->write_output_view(got_file_offset, got_size, got_view); |
6531 | } | |
6532 | ||
6533 | // Create a PLT entry for a global symbol. | |
6534 | ||
6535 | template<bool big_endian> | |
6536 | void | |
2ea97941 | 6537 | Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout, |
94cdfcff DK |
6538 | Symbol* gsym) |
6539 | { | |
6540 | if (gsym->has_plt_offset()) | |
6541 | return; | |
6542 | ||
6543 | if (this->plt_ == NULL) | |
6544 | { | |
6545 | // Create the GOT sections first. | |
2ea97941 | 6546 | this->got_section(symtab, layout); |
94cdfcff | 6547 | |
2ea97941 ILT |
6548 | this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_); |
6549 | layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, | |
6550 | (elfcpp::SHF_ALLOC | |
6551 | | elfcpp::SHF_EXECINSTR), | |
1a2dff53 | 6552 | this->plt_, false, false, false, false); |
94cdfcff DK |
6553 | } |
6554 | this->plt_->add_entry(gsym); | |
6555 | } | |
6556 | ||
4a657b0d DK |
6557 | // Report an unsupported relocation against a local symbol. |
6558 | ||
6559 | template<bool big_endian> | |
6560 | void | |
6561 | Target_arm<big_endian>::Scan::unsupported_reloc_local( | |
6562 | Sized_relobj<32, big_endian>* object, | |
6563 | unsigned int r_type) | |
6564 | { | |
6565 | gold_error(_("%s: unsupported reloc %u against local symbol"), | |
6566 | object->name().c_str(), r_type); | |
6567 | } | |
6568 | ||
bec53400 DK |
6569 | // We are about to emit a dynamic relocation of type R_TYPE. If the |
6570 | // dynamic linker does not support it, issue an error. The GNU linker | |
6571 | // only issues a non-PIC error for an allocated read-only section. | |
6572 | // Here we know the section is allocated, but we don't know that it is | |
6573 | // read-only. But we check for all the relocation types which the | |
6574 | // glibc dynamic linker supports, so it seems appropriate to issue an | |
6575 | // error even if the section is not read-only. | |
6576 | ||
6577 | template<bool big_endian> | |
6578 | void | |
6579 | Target_arm<big_endian>::Scan::check_non_pic(Relobj* object, | |
6580 | unsigned int r_type) | |
6581 | { | |
6582 | switch (r_type) | |
6583 | { | |
6584 | // These are the relocation types supported by glibc for ARM. | |
6585 | case elfcpp::R_ARM_RELATIVE: | |
6586 | case elfcpp::R_ARM_COPY: | |
6587 | case elfcpp::R_ARM_GLOB_DAT: | |
6588 | case elfcpp::R_ARM_JUMP_SLOT: | |
6589 | case elfcpp::R_ARM_ABS32: | |
be8fcb75 | 6590 | case elfcpp::R_ARM_ABS32_NOI: |
bec53400 DK |
6591 | case elfcpp::R_ARM_PC24: |
6592 | // FIXME: The following 3 types are not supported by Android's dynamic | |
6593 | // linker. | |
6594 | case elfcpp::R_ARM_TLS_DTPMOD32: | |
6595 | case elfcpp::R_ARM_TLS_DTPOFF32: | |
6596 | case elfcpp::R_ARM_TLS_TPOFF32: | |
6597 | return; | |
6598 | ||
6599 | default: | |
6600 | // This prevents us from issuing more than one error per reloc | |
6601 | // section. But we can still wind up issuing more than one | |
6602 | // error per object file. | |
6603 | if (this->issued_non_pic_error_) | |
6604 | return; | |
6605 | object->error(_("requires unsupported dynamic reloc; " | |
6606 | "recompile with -fPIC")); | |
6607 | this->issued_non_pic_error_ = true; | |
6608 | return; | |
6609 | ||
6610 | case elfcpp::R_ARM_NONE: | |
6611 | gold_unreachable(); | |
6612 | } | |
6613 | } | |
6614 | ||
4a657b0d | 6615 | // Scan a relocation for a local symbol. |
bec53400 DK |
6616 | // FIXME: This only handles a subset of relocation types used by Android |
6617 | // on ARM v5te devices. | |
4a657b0d DK |
6618 | |
6619 | template<bool big_endian> | |
6620 | inline void | |
ad0f2072 | 6621 | Target_arm<big_endian>::Scan::local(Symbol_table* symtab, |
2ea97941 | 6622 | Layout* layout, |
bec53400 | 6623 | Target_arm* target, |
4a657b0d | 6624 | Sized_relobj<32, big_endian>* object, |
bec53400 DK |
6625 | unsigned int data_shndx, |
6626 | Output_section* output_section, | |
6627 | const elfcpp::Rel<32, big_endian>& reloc, | |
4a657b0d DK |
6628 | unsigned int r_type, |
6629 | const elfcpp::Sym<32, big_endian>&) | |
6630 | { | |
a6d1ef57 | 6631 | r_type = get_real_reloc_type(r_type); |
4a657b0d DK |
6632 | switch (r_type) |
6633 | { | |
6634 | case elfcpp::R_ARM_NONE: | |
6635 | break; | |
6636 | ||
bec53400 | 6637 | case elfcpp::R_ARM_ABS32: |
be8fcb75 | 6638 | case elfcpp::R_ARM_ABS32_NOI: |
bec53400 DK |
6639 | // If building a shared library (or a position-independent |
6640 | // executable), we need to create a dynamic relocation for | |
6641 | // this location. The relocation applied at link time will | |
6642 | // apply the link-time value, so we flag the location with | |
6643 | // an R_ARM_RELATIVE relocation so the dynamic loader can | |
6644 | // relocate it easily. | |
6645 | if (parameters->options().output_is_position_independent()) | |
6646 | { | |
2ea97941 | 6647 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
bec53400 DK |
6648 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
6649 | // If we are to add more other reloc types than R_ARM_ABS32, | |
6650 | // we need to add check_non_pic(object, r_type) here. | |
6651 | rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE, | |
6652 | output_section, data_shndx, | |
6653 | reloc.get_r_offset()); | |
6654 | } | |
6655 | break; | |
6656 | ||
6657 | case elfcpp::R_ARM_REL32: | |
6658 | case elfcpp::R_ARM_THM_CALL: | |
6659 | case elfcpp::R_ARM_CALL: | |
6660 | case elfcpp::R_ARM_PREL31: | |
6661 | case elfcpp::R_ARM_JUMP24: | |
41263c05 DK |
6662 | case elfcpp::R_ARM_THM_JUMP24: |
6663 | case elfcpp::R_ARM_THM_JUMP19: | |
bec53400 | 6664 | case elfcpp::R_ARM_PLT32: |
be8fcb75 ILT |
6665 | case elfcpp::R_ARM_THM_ABS5: |
6666 | case elfcpp::R_ARM_ABS8: | |
6667 | case elfcpp::R_ARM_ABS12: | |
6668 | case elfcpp::R_ARM_ABS16: | |
6669 | case elfcpp::R_ARM_BASE_ABS: | |
fd3c5f0b ILT |
6670 | case elfcpp::R_ARM_MOVW_ABS_NC: |
6671 | case elfcpp::R_ARM_MOVT_ABS: | |
6672 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: | |
6673 | case elfcpp::R_ARM_THM_MOVT_ABS: | |
c2a122b6 ILT |
6674 | case elfcpp::R_ARM_MOVW_PREL_NC: |
6675 | case elfcpp::R_ARM_MOVT_PREL: | |
6676 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: | |
6677 | case elfcpp::R_ARM_THM_MOVT_PREL: | |
02961d7e ILT |
6678 | case elfcpp::R_ARM_MOVW_BREL_NC: |
6679 | case elfcpp::R_ARM_MOVT_BREL: | |
6680 | case elfcpp::R_ARM_MOVW_BREL: | |
6681 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: | |
6682 | case elfcpp::R_ARM_THM_MOVT_BREL: | |
6683 | case elfcpp::R_ARM_THM_MOVW_BREL: | |
800d0f56 ILT |
6684 | case elfcpp::R_ARM_THM_JUMP6: |
6685 | case elfcpp::R_ARM_THM_JUMP8: | |
6686 | case elfcpp::R_ARM_THM_JUMP11: | |
a2162063 | 6687 | case elfcpp::R_ARM_V4BX: |
b10d2873 ILT |
6688 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
6689 | case elfcpp::R_ARM_ALU_PC_G0: | |
6690 | case elfcpp::R_ARM_ALU_PC_G1_NC: | |
6691 | case elfcpp::R_ARM_ALU_PC_G1: | |
6692 | case elfcpp::R_ARM_ALU_PC_G2: | |
6693 | case elfcpp::R_ARM_ALU_SB_G0_NC: | |
6694 | case elfcpp::R_ARM_ALU_SB_G0: | |
6695 | case elfcpp::R_ARM_ALU_SB_G1_NC: | |
6696 | case elfcpp::R_ARM_ALU_SB_G1: | |
6697 | case elfcpp::R_ARM_ALU_SB_G2: | |
6698 | case elfcpp::R_ARM_LDR_PC_G0: | |
6699 | case elfcpp::R_ARM_LDR_PC_G1: | |
6700 | case elfcpp::R_ARM_LDR_PC_G2: | |
6701 | case elfcpp::R_ARM_LDR_SB_G0: | |
6702 | case elfcpp::R_ARM_LDR_SB_G1: | |
6703 | case elfcpp::R_ARM_LDR_SB_G2: | |
6704 | case elfcpp::R_ARM_LDRS_PC_G0: | |
6705 | case elfcpp::R_ARM_LDRS_PC_G1: | |
6706 | case elfcpp::R_ARM_LDRS_PC_G2: | |
6707 | case elfcpp::R_ARM_LDRS_SB_G0: | |
6708 | case elfcpp::R_ARM_LDRS_SB_G1: | |
6709 | case elfcpp::R_ARM_LDRS_SB_G2: | |
6710 | case elfcpp::R_ARM_LDC_PC_G0: | |
6711 | case elfcpp::R_ARM_LDC_PC_G1: | |
6712 | case elfcpp::R_ARM_LDC_PC_G2: | |
6713 | case elfcpp::R_ARM_LDC_SB_G0: | |
6714 | case elfcpp::R_ARM_LDC_SB_G1: | |
6715 | case elfcpp::R_ARM_LDC_SB_G2: | |
bec53400 DK |
6716 | break; |
6717 | ||
6718 | case elfcpp::R_ARM_GOTOFF32: | |
6719 | // We need a GOT section: | |
2ea97941 | 6720 | target->got_section(symtab, layout); |
bec53400 DK |
6721 | break; |
6722 | ||
6723 | case elfcpp::R_ARM_BASE_PREL: | |
6724 | // FIXME: What about this? | |
6725 | break; | |
6726 | ||
6727 | case elfcpp::R_ARM_GOT_BREL: | |
7f5309a5 | 6728 | case elfcpp::R_ARM_GOT_PREL: |
bec53400 DK |
6729 | { |
6730 | // The symbol requires a GOT entry. | |
6731 | Output_data_got<32, big_endian>* got = | |
2ea97941 | 6732 | target->got_section(symtab, layout); |
bec53400 DK |
6733 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
6734 | if (got->add_local(object, r_sym, GOT_TYPE_STANDARD)) | |
6735 | { | |
6736 | // If we are generating a shared object, we need to add a | |
6737 | // dynamic RELATIVE relocation for this symbol's GOT entry. | |
6738 | if (parameters->options().output_is_position_independent()) | |
6739 | { | |
2ea97941 ILT |
6740 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
6741 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); | |
bec53400 | 6742 | rel_dyn->add_local_relative( |
2ea97941 ILT |
6743 | object, r_sym, elfcpp::R_ARM_RELATIVE, got, |
6744 | object->local_got_offset(r_sym, GOT_TYPE_STANDARD)); | |
bec53400 DK |
6745 | } |
6746 | } | |
6747 | } | |
6748 | break; | |
6749 | ||
6750 | case elfcpp::R_ARM_TARGET1: | |
6751 | // This should have been mapped to another type already. | |
6752 | // Fall through. | |
6753 | case elfcpp::R_ARM_COPY: | |
6754 | case elfcpp::R_ARM_GLOB_DAT: | |
6755 | case elfcpp::R_ARM_JUMP_SLOT: | |
6756 | case elfcpp::R_ARM_RELATIVE: | |
6757 | // These are relocations which should only be seen by the | |
6758 | // dynamic linker, and should never be seen here. | |
6759 | gold_error(_("%s: unexpected reloc %u in object file"), | |
6760 | object->name().c_str(), r_type); | |
6761 | break; | |
6762 | ||
4a657b0d DK |
6763 | default: |
6764 | unsupported_reloc_local(object, r_type); | |
6765 | break; | |
6766 | } | |
6767 | } | |
6768 | ||
6769 | // Report an unsupported relocation against a global symbol. | |
6770 | ||
6771 | template<bool big_endian> | |
6772 | void | |
6773 | Target_arm<big_endian>::Scan::unsupported_reloc_global( | |
6774 | Sized_relobj<32, big_endian>* object, | |
6775 | unsigned int r_type, | |
6776 | Symbol* gsym) | |
6777 | { | |
6778 | gold_error(_("%s: unsupported reloc %u against global symbol %s"), | |
6779 | object->name().c_str(), r_type, gsym->demangled_name().c_str()); | |
6780 | } | |
6781 | ||
6782 | // Scan a relocation for a global symbol. | |
bec53400 DK |
6783 | // FIXME: This only handles a subset of relocation types used by Android |
6784 | // on ARM v5te devices. | |
4a657b0d DK |
6785 | |
6786 | template<bool big_endian> | |
6787 | inline void | |
ad0f2072 | 6788 | Target_arm<big_endian>::Scan::global(Symbol_table* symtab, |
2ea97941 | 6789 | Layout* layout, |
bec53400 | 6790 | Target_arm* target, |
4a657b0d | 6791 | Sized_relobj<32, big_endian>* object, |
bec53400 DK |
6792 | unsigned int data_shndx, |
6793 | Output_section* output_section, | |
6794 | const elfcpp::Rel<32, big_endian>& reloc, | |
4a657b0d DK |
6795 | unsigned int r_type, |
6796 | Symbol* gsym) | |
6797 | { | |
a6d1ef57 | 6798 | r_type = get_real_reloc_type(r_type); |
4a657b0d DK |
6799 | switch (r_type) |
6800 | { | |
6801 | case elfcpp::R_ARM_NONE: | |
6802 | break; | |
6803 | ||
bec53400 | 6804 | case elfcpp::R_ARM_ABS32: |
be8fcb75 | 6805 | case elfcpp::R_ARM_ABS32_NOI: |
bec53400 DK |
6806 | { |
6807 | // Make a dynamic relocation if necessary. | |
6808 | if (gsym->needs_dynamic_reloc(Symbol::ABSOLUTE_REF)) | |
6809 | { | |
6810 | if (target->may_need_copy_reloc(gsym)) | |
6811 | { | |
2ea97941 | 6812 | target->copy_reloc(symtab, layout, object, |
bec53400 DK |
6813 | data_shndx, output_section, gsym, reloc); |
6814 | } | |
6815 | else if (gsym->can_use_relative_reloc(false)) | |
6816 | { | |
6817 | // If we are to add more other reloc types than R_ARM_ABS32, | |
6818 | // we need to add check_non_pic(object, r_type) here. | |
2ea97941 | 6819 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
bec53400 DK |
6820 | rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE, |
6821 | output_section, object, | |
6822 | data_shndx, reloc.get_r_offset()); | |
6823 | } | |
6824 | else | |
6825 | { | |
6826 | // If we are to add more other reloc types than R_ARM_ABS32, | |
6827 | // we need to add check_non_pic(object, r_type) here. | |
2ea97941 | 6828 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
bec53400 DK |
6829 | rel_dyn->add_global(gsym, r_type, output_section, object, |
6830 | data_shndx, reloc.get_r_offset()); | |
6831 | } | |
6832 | } | |
6833 | } | |
6834 | break; | |
6835 | ||
fd3c5f0b ILT |
6836 | case elfcpp::R_ARM_MOVW_ABS_NC: |
6837 | case elfcpp::R_ARM_MOVT_ABS: | |
6838 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: | |
6839 | case elfcpp::R_ARM_THM_MOVT_ABS: | |
c2a122b6 ILT |
6840 | case elfcpp::R_ARM_MOVW_PREL_NC: |
6841 | case elfcpp::R_ARM_MOVT_PREL: | |
6842 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: | |
6843 | case elfcpp::R_ARM_THM_MOVT_PREL: | |
02961d7e ILT |
6844 | case elfcpp::R_ARM_MOVW_BREL_NC: |
6845 | case elfcpp::R_ARM_MOVT_BREL: | |
6846 | case elfcpp::R_ARM_MOVW_BREL: | |
6847 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: | |
6848 | case elfcpp::R_ARM_THM_MOVT_BREL: | |
6849 | case elfcpp::R_ARM_THM_MOVW_BREL: | |
800d0f56 ILT |
6850 | case elfcpp::R_ARM_THM_JUMP6: |
6851 | case elfcpp::R_ARM_THM_JUMP8: | |
6852 | case elfcpp::R_ARM_THM_JUMP11: | |
a2162063 | 6853 | case elfcpp::R_ARM_V4BX: |
b10d2873 ILT |
6854 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
6855 | case elfcpp::R_ARM_ALU_PC_G0: | |
6856 | case elfcpp::R_ARM_ALU_PC_G1_NC: | |
6857 | case elfcpp::R_ARM_ALU_PC_G1: | |
6858 | case elfcpp::R_ARM_ALU_PC_G2: | |
6859 | case elfcpp::R_ARM_ALU_SB_G0_NC: | |
6860 | case elfcpp::R_ARM_ALU_SB_G0: | |
6861 | case elfcpp::R_ARM_ALU_SB_G1_NC: | |
6862 | case elfcpp::R_ARM_ALU_SB_G1: | |
6863 | case elfcpp::R_ARM_ALU_SB_G2: | |
6864 | case elfcpp::R_ARM_LDR_PC_G0: | |
6865 | case elfcpp::R_ARM_LDR_PC_G1: | |
6866 | case elfcpp::R_ARM_LDR_PC_G2: | |
6867 | case elfcpp::R_ARM_LDR_SB_G0: | |
6868 | case elfcpp::R_ARM_LDR_SB_G1: | |
6869 | case elfcpp::R_ARM_LDR_SB_G2: | |
6870 | case elfcpp::R_ARM_LDRS_PC_G0: | |
6871 | case elfcpp::R_ARM_LDRS_PC_G1: | |
6872 | case elfcpp::R_ARM_LDRS_PC_G2: | |
6873 | case elfcpp::R_ARM_LDRS_SB_G0: | |
6874 | case elfcpp::R_ARM_LDRS_SB_G1: | |
6875 | case elfcpp::R_ARM_LDRS_SB_G2: | |
6876 | case elfcpp::R_ARM_LDC_PC_G0: | |
6877 | case elfcpp::R_ARM_LDC_PC_G1: | |
6878 | case elfcpp::R_ARM_LDC_PC_G2: | |
6879 | case elfcpp::R_ARM_LDC_SB_G0: | |
6880 | case elfcpp::R_ARM_LDC_SB_G1: | |
6881 | case elfcpp::R_ARM_LDC_SB_G2: | |
fd3c5f0b ILT |
6882 | break; |
6883 | ||
be8fcb75 ILT |
6884 | case elfcpp::R_ARM_THM_ABS5: |
6885 | case elfcpp::R_ARM_ABS8: | |
6886 | case elfcpp::R_ARM_ABS12: | |
6887 | case elfcpp::R_ARM_ABS16: | |
6888 | case elfcpp::R_ARM_BASE_ABS: | |
6889 | { | |
6890 | // No dynamic relocs of this kinds. | |
6891 | // Report the error in case of PIC. | |
6892 | int flags = Symbol::NON_PIC_REF; | |
6893 | if (gsym->type() == elfcpp::STT_FUNC | |
6894 | || gsym->type() == elfcpp::STT_ARM_TFUNC) | |
6895 | flags |= Symbol::FUNCTION_CALL; | |
6896 | if (gsym->needs_dynamic_reloc(flags)) | |
6897 | check_non_pic(object, r_type); | |
6898 | } | |
6899 | break; | |
6900 | ||
bec53400 | 6901 | case elfcpp::R_ARM_REL32: |
e7eca48c DK |
6902 | break; |
6903 | ||
bec53400 DK |
6904 | case elfcpp::R_ARM_PREL31: |
6905 | { | |
6906 | // Make a dynamic relocation if necessary. | |
6907 | int flags = Symbol::NON_PIC_REF; | |
6908 | if (gsym->needs_dynamic_reloc(flags)) | |
6909 | { | |
6910 | if (target->may_need_copy_reloc(gsym)) | |
6911 | { | |
2ea97941 | 6912 | target->copy_reloc(symtab, layout, object, |
bec53400 DK |
6913 | data_shndx, output_section, gsym, reloc); |
6914 | } | |
6915 | else | |
6916 | { | |
6917 | check_non_pic(object, r_type); | |
2ea97941 | 6918 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
bec53400 DK |
6919 | rel_dyn->add_global(gsym, r_type, output_section, object, |
6920 | data_shndx, reloc.get_r_offset()); | |
6921 | } | |
6922 | } | |
6923 | } | |
6924 | break; | |
6925 | ||
6926 | case elfcpp::R_ARM_JUMP24: | |
f4e5969c | 6927 | case elfcpp::R_ARM_THM_JUMP24: |
41263c05 | 6928 | case elfcpp::R_ARM_THM_JUMP19: |
bec53400 | 6929 | case elfcpp::R_ARM_CALL: |
f4e5969c DK |
6930 | case elfcpp::R_ARM_THM_CALL: |
6931 | ||
6932 | if (Target_arm<big_endian>::Scan::symbol_needs_plt_entry(gsym)) | |
2ea97941 | 6933 | target->make_plt_entry(symtab, layout, gsym); |
f4e5969c DK |
6934 | else |
6935 | { | |
6936 | // Check to see if this is a function that would need a PLT | |
6937 | // but does not get one because the function symbol is untyped. | |
6938 | // This happens in assembly code missing a proper .type directive. | |
6939 | if ((!gsym->is_undefined() || parameters->options().shared()) | |
6940 | && !parameters->doing_static_link() | |
6941 | && gsym->type() == elfcpp::STT_NOTYPE | |
6942 | && (gsym->is_from_dynobj() | |
6943 | || gsym->is_undefined() | |
6944 | || gsym->is_preemptible())) | |
6945 | gold_error(_("%s is not a function."), | |
6946 | gsym->demangled_name().c_str()); | |
6947 | } | |
bec53400 DK |
6948 | break; |
6949 | ||
6950 | case elfcpp::R_ARM_PLT32: | |
6951 | // If the symbol is fully resolved, this is just a relative | |
6952 | // local reloc. Otherwise we need a PLT entry. | |
6953 | if (gsym->final_value_is_known()) | |
6954 | break; | |
6955 | // If building a shared library, we can also skip the PLT entry | |
6956 | // if the symbol is defined in the output file and is protected | |
6957 | // or hidden. | |
6958 | if (gsym->is_defined() | |
6959 | && !gsym->is_from_dynobj() | |
6960 | && !gsym->is_preemptible()) | |
6961 | break; | |
2ea97941 | 6962 | target->make_plt_entry(symtab, layout, gsym); |
bec53400 DK |
6963 | break; |
6964 | ||
6965 | case elfcpp::R_ARM_GOTOFF32: | |
6966 | // We need a GOT section. | |
2ea97941 | 6967 | target->got_section(symtab, layout); |
bec53400 DK |
6968 | break; |
6969 | ||
6970 | case elfcpp::R_ARM_BASE_PREL: | |
6971 | // FIXME: What about this? | |
6972 | break; | |
6973 | ||
6974 | case elfcpp::R_ARM_GOT_BREL: | |
7f5309a5 | 6975 | case elfcpp::R_ARM_GOT_PREL: |
bec53400 DK |
6976 | { |
6977 | // The symbol requires a GOT entry. | |
6978 | Output_data_got<32, big_endian>* got = | |
2ea97941 | 6979 | target->got_section(symtab, layout); |
bec53400 DK |
6980 | if (gsym->final_value_is_known()) |
6981 | got->add_global(gsym, GOT_TYPE_STANDARD); | |
6982 | else | |
6983 | { | |
6984 | // If this symbol is not fully resolved, we need to add a | |
6985 | // GOT entry with a dynamic relocation. | |
2ea97941 | 6986 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
bec53400 DK |
6987 | if (gsym->is_from_dynobj() |
6988 | || gsym->is_undefined() | |
6989 | || gsym->is_preemptible()) | |
6990 | got->add_global_with_rel(gsym, GOT_TYPE_STANDARD, | |
6991 | rel_dyn, elfcpp::R_ARM_GLOB_DAT); | |
6992 | else | |
6993 | { | |
6994 | if (got->add_global(gsym, GOT_TYPE_STANDARD)) | |
6995 | rel_dyn->add_global_relative( | |
6996 | gsym, elfcpp::R_ARM_RELATIVE, got, | |
6997 | gsym->got_offset(GOT_TYPE_STANDARD)); | |
6998 | } | |
6999 | } | |
7000 | } | |
7001 | break; | |
7002 | ||
7003 | case elfcpp::R_ARM_TARGET1: | |
7004 | // This should have been mapped to another type already. | |
7005 | // Fall through. | |
7006 | case elfcpp::R_ARM_COPY: | |
7007 | case elfcpp::R_ARM_GLOB_DAT: | |
7008 | case elfcpp::R_ARM_JUMP_SLOT: | |
7009 | case elfcpp::R_ARM_RELATIVE: | |
7010 | // These are relocations which should only be seen by the | |
7011 | // dynamic linker, and should never be seen here. | |
7012 | gold_error(_("%s: unexpected reloc %u in object file"), | |
7013 | object->name().c_str(), r_type); | |
7014 | break; | |
7015 | ||
4a657b0d DK |
7016 | default: |
7017 | unsupported_reloc_global(object, r_type, gsym); | |
7018 | break; | |
7019 | } | |
7020 | } | |
7021 | ||
7022 | // Process relocations for gc. | |
7023 | ||
7024 | template<bool big_endian> | |
7025 | void | |
ad0f2072 | 7026 | Target_arm<big_endian>::gc_process_relocs(Symbol_table* symtab, |
2ea97941 | 7027 | Layout* layout, |
4a657b0d DK |
7028 | Sized_relobj<32, big_endian>* object, |
7029 | unsigned int data_shndx, | |
7030 | unsigned int, | |
7031 | const unsigned char* prelocs, | |
7032 | size_t reloc_count, | |
7033 | Output_section* output_section, | |
7034 | bool needs_special_offset_handling, | |
7035 | size_t local_symbol_count, | |
7036 | const unsigned char* plocal_symbols) | |
7037 | { | |
7038 | typedef Target_arm<big_endian> Arm; | |
2ea97941 | 7039 | typedef typename Target_arm<big_endian>::Scan Scan; |
4a657b0d | 7040 | |
2ea97941 | 7041 | gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan>( |
4a657b0d | 7042 | symtab, |
2ea97941 | 7043 | layout, |
4a657b0d DK |
7044 | this, |
7045 | object, | |
7046 | data_shndx, | |
7047 | prelocs, | |
7048 | reloc_count, | |
7049 | output_section, | |
7050 | needs_special_offset_handling, | |
7051 | local_symbol_count, | |
7052 | plocal_symbols); | |
7053 | } | |
7054 | ||
7055 | // Scan relocations for a section. | |
7056 | ||
7057 | template<bool big_endian> | |
7058 | void | |
ad0f2072 | 7059 | Target_arm<big_endian>::scan_relocs(Symbol_table* symtab, |
2ea97941 | 7060 | Layout* layout, |
4a657b0d DK |
7061 | Sized_relobj<32, big_endian>* object, |
7062 | unsigned int data_shndx, | |
7063 | unsigned int sh_type, | |
7064 | const unsigned char* prelocs, | |
7065 | size_t reloc_count, | |
7066 | Output_section* output_section, | |
7067 | bool needs_special_offset_handling, | |
7068 | size_t local_symbol_count, | |
7069 | const unsigned char* plocal_symbols) | |
7070 | { | |
2ea97941 | 7071 | typedef typename Target_arm<big_endian>::Scan Scan; |
4a657b0d DK |
7072 | if (sh_type == elfcpp::SHT_RELA) |
7073 | { | |
7074 | gold_error(_("%s: unsupported RELA reloc section"), | |
7075 | object->name().c_str()); | |
7076 | return; | |
7077 | } | |
7078 | ||
2ea97941 | 7079 | gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>( |
4a657b0d | 7080 | symtab, |
2ea97941 | 7081 | layout, |
4a657b0d DK |
7082 | this, |
7083 | object, | |
7084 | data_shndx, | |
7085 | prelocs, | |
7086 | reloc_count, | |
7087 | output_section, | |
7088 | needs_special_offset_handling, | |
7089 | local_symbol_count, | |
7090 | plocal_symbols); | |
7091 | } | |
7092 | ||
7093 | // Finalize the sections. | |
7094 | ||
7095 | template<bool big_endian> | |
7096 | void | |
d5b40221 | 7097 | Target_arm<big_endian>::do_finalize_sections( |
2ea97941 | 7098 | Layout* layout, |
f59f41f3 DK |
7099 | const Input_objects* input_objects, |
7100 | Symbol_table* symtab) | |
4a657b0d | 7101 | { |
d5b40221 DK |
7102 | // Merge processor-specific flags. |
7103 | for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); | |
7104 | p != input_objects->relobj_end(); | |
7105 | ++p) | |
7106 | { | |
7107 | Arm_relobj<big_endian>* arm_relobj = | |
7108 | Arm_relobj<big_endian>::as_arm_relobj(*p); | |
7109 | this->merge_processor_specific_flags( | |
7110 | arm_relobj->name(), | |
7111 | arm_relobj->processor_specific_flags()); | |
a0351a69 DK |
7112 | this->merge_object_attributes(arm_relobj->name().c_str(), |
7113 | arm_relobj->attributes_section_data()); | |
7114 | ||
d5b40221 DK |
7115 | } |
7116 | ||
7117 | for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin(); | |
7118 | p != input_objects->dynobj_end(); | |
7119 | ++p) | |
7120 | { | |
7121 | Arm_dynobj<big_endian>* arm_dynobj = | |
7122 | Arm_dynobj<big_endian>::as_arm_dynobj(*p); | |
7123 | this->merge_processor_specific_flags( | |
7124 | arm_dynobj->name(), | |
7125 | arm_dynobj->processor_specific_flags()); | |
a0351a69 DK |
7126 | this->merge_object_attributes(arm_dynobj->name().c_str(), |
7127 | arm_dynobj->attributes_section_data()); | |
d5b40221 DK |
7128 | } |
7129 | ||
a0351a69 | 7130 | // Check BLX use. |
41263c05 | 7131 | const Object_attribute* cpu_arch_attr = |
a0351a69 | 7132 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
41263c05 | 7133 | if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4) |
a0351a69 DK |
7134 | this->set_may_use_blx(true); |
7135 | ||
41263c05 DK |
7136 | // Check if we need to use Cortex-A8 workaround. |
7137 | if (parameters->options().user_set_fix_cortex_a8()) | |
7138 | this->fix_cortex_a8_ = parameters->options().fix_cortex_a8(); | |
7139 | else | |
7140 | { | |
7141 | // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on | |
7142 | // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown | |
7143 | // profile. | |
7144 | const Object_attribute* cpu_arch_profile_attr = | |
7145 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); | |
7146 | this->fix_cortex_a8_ = | |
7147 | (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7 | |
7148 | && (cpu_arch_profile_attr->int_value() == 'A' | |
7149 | || cpu_arch_profile_attr->int_value() == 0)); | |
7150 | } | |
7151 | ||
a2162063 ILT |
7152 | // Check if we can use V4BX interworking. |
7153 | // The V4BX interworking stub contains BX instruction, | |
7154 | // which is not specified for some profiles. | |
9b2fd367 DK |
7155 | if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING |
7156 | && !this->may_use_blx()) | |
a2162063 ILT |
7157 | gold_error(_("unable to provide V4BX reloc interworking fix up; " |
7158 | "the target profile does not support BX instruction")); | |
7159 | ||
94cdfcff | 7160 | // Fill in some more dynamic tags. |
ea715a34 ILT |
7161 | const Reloc_section* rel_plt = (this->plt_ == NULL |
7162 | ? NULL | |
7163 | : this->plt_->rel_plt()); | |
7164 | layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt, | |
7165 | this->rel_dyn_, true); | |
94cdfcff DK |
7166 | |
7167 | // Emit any relocs we saved in an attempt to avoid generating COPY | |
7168 | // relocs. | |
7169 | if (this->copy_relocs_.any_saved_relocs()) | |
2ea97941 | 7170 | this->copy_relocs_.emit(this->rel_dyn_section(layout)); |
11af873f | 7171 | |
f59f41f3 | 7172 | // Handle the .ARM.exidx section. |
2ea97941 | 7173 | Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); |
f59f41f3 DK |
7174 | if (exidx_section != NULL |
7175 | && exidx_section->type() == elfcpp::SHT_ARM_EXIDX | |
11af873f DK |
7176 | && !parameters->options().relocatable()) |
7177 | { | |
f59f41f3 | 7178 | // Create __exidx_start and __exdix_end symbols. |
99fff23b ILT |
7179 | symtab->define_in_output_data("__exidx_start", NULL, |
7180 | Symbol_table::PREDEFINED, | |
7181 | exidx_section, 0, 0, elfcpp::STT_OBJECT, | |
a0351a69 | 7182 | elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, |
99e5bff2 | 7183 | false, true); |
99fff23b ILT |
7184 | symtab->define_in_output_data("__exidx_end", NULL, |
7185 | Symbol_table::PREDEFINED, | |
7186 | exidx_section, 0, 0, elfcpp::STT_OBJECT, | |
a0351a69 | 7187 | elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, |
99e5bff2 | 7188 | true, true); |
11af873f | 7189 | |
f59f41f3 DK |
7190 | // For the ARM target, we need to add a PT_ARM_EXIDX segment for |
7191 | // the .ARM.exidx section. | |
2ea97941 | 7192 | if (!layout->script_options()->saw_phdrs_clause()) |
11af873f | 7193 | { |
2ea97941 | 7194 | gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 0) |
11af873f DK |
7195 | == NULL); |
7196 | Output_segment* exidx_segment = | |
2ea97941 | 7197 | layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R); |
f5c870d2 ILT |
7198 | exidx_segment->add_output_section(exidx_section, elfcpp::PF_R, |
7199 | false); | |
11af873f DK |
7200 | } |
7201 | } | |
a0351a69 DK |
7202 | |
7203 | // Create an .ARM.attributes section if there is not one already. | |
2ea97941 | 7204 | Output_attributes_section_data* attributes_section = |
a0351a69 | 7205 | new Output_attributes_section_data(*this->attributes_section_data_); |
2ea97941 ILT |
7206 | layout->add_output_section_data(".ARM.attributes", |
7207 | elfcpp::SHT_ARM_ATTRIBUTES, 0, | |
1a2dff53 ILT |
7208 | attributes_section, false, false, false, |
7209 | false); | |
4a657b0d DK |
7210 | } |
7211 | ||
bec53400 DK |
7212 | // Return whether a direct absolute static relocation needs to be applied. |
7213 | // In cases where Scan::local() or Scan::global() has created | |
7214 | // a dynamic relocation other than R_ARM_RELATIVE, the addend | |
7215 | // of the relocation is carried in the data, and we must not | |
7216 | // apply the static relocation. | |
7217 | ||
7218 | template<bool big_endian> | |
7219 | inline bool | |
7220 | Target_arm<big_endian>::Relocate::should_apply_static_reloc( | |
7221 | const Sized_symbol<32>* gsym, | |
7222 | int ref_flags, | |
7223 | bool is_32bit, | |
7224 | Output_section* output_section) | |
7225 | { | |
7226 | // If the output section is not allocated, then we didn't call | |
7227 | // scan_relocs, we didn't create a dynamic reloc, and we must apply | |
7228 | // the reloc here. | |
7229 | if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0) | |
7230 | return true; | |
7231 | ||
7232 | // For local symbols, we will have created a non-RELATIVE dynamic | |
7233 | // relocation only if (a) the output is position independent, | |
7234 | // (b) the relocation is absolute (not pc- or segment-relative), and | |
7235 | // (c) the relocation is not 32 bits wide. | |
7236 | if (gsym == NULL) | |
7237 | return !(parameters->options().output_is_position_independent() | |
7238 | && (ref_flags & Symbol::ABSOLUTE_REF) | |
7239 | && !is_32bit); | |
7240 | ||
7241 | // For global symbols, we use the same helper routines used in the | |
7242 | // scan pass. If we did not create a dynamic relocation, or if we | |
7243 | // created a RELATIVE dynamic relocation, we should apply the static | |
7244 | // relocation. | |
7245 | bool has_dyn = gsym->needs_dynamic_reloc(ref_flags); | |
7246 | bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF) | |
7247 | && gsym->can_use_relative_reloc(ref_flags | |
7248 | & Symbol::FUNCTION_CALL); | |
7249 | return !has_dyn || is_rel; | |
7250 | } | |
7251 | ||
4a657b0d DK |
7252 | // Perform a relocation. |
7253 | ||
7254 | template<bool big_endian> | |
7255 | inline bool | |
7256 | Target_arm<big_endian>::Relocate::relocate( | |
c121c671 DK |
7257 | const Relocate_info<32, big_endian>* relinfo, |
7258 | Target_arm* target, | |
7259 | Output_section *output_section, | |
7260 | size_t relnum, | |
7261 | const elfcpp::Rel<32, big_endian>& rel, | |
4a657b0d | 7262 | unsigned int r_type, |
c121c671 DK |
7263 | const Sized_symbol<32>* gsym, |
7264 | const Symbol_value<32>* psymval, | |
7265 | unsigned char* view, | |
ebabffbd | 7266 | Arm_address address, |
4a657b0d DK |
7267 | section_size_type /* view_size */ ) |
7268 | { | |
c121c671 DK |
7269 | typedef Arm_relocate_functions<big_endian> Arm_relocate_functions; |
7270 | ||
a6d1ef57 | 7271 | r_type = get_real_reloc_type(r_type); |
c121c671 | 7272 | |
2daedcd6 DK |
7273 | const Arm_relobj<big_endian>* object = |
7274 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); | |
c121c671 | 7275 | |
2daedcd6 DK |
7276 | // If the final branch target of a relocation is THUMB instruction, this |
7277 | // is 1. Otherwise it is 0. | |
7278 | Arm_address thumb_bit = 0; | |
c121c671 | 7279 | Symbol_value<32> symval; |
d204b6e9 | 7280 | bool is_weakly_undefined_without_plt = false; |
2daedcd6 | 7281 | if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs) |
c121c671 | 7282 | { |
2daedcd6 DK |
7283 | if (gsym != NULL) |
7284 | { | |
7285 | // This is a global symbol. Determine if we use PLT and if the | |
7286 | // final target is THUMB. | |
7287 | if (gsym->use_plt_offset(reloc_is_non_pic(r_type))) | |
7288 | { | |
7289 | // This uses a PLT, change the symbol value. | |
7290 | symval.set_output_value(target->plt_section()->address() | |
7291 | + gsym->plt_offset()); | |
7292 | psymval = &symval; | |
7293 | } | |
d204b6e9 DK |
7294 | else if (gsym->is_weak_undefined()) |
7295 | { | |
7296 | // This is a weakly undefined symbol and we do not use PLT | |
7297 | // for this relocation. A branch targeting this symbol will | |
7298 | // be converted into an NOP. | |
7299 | is_weakly_undefined_without_plt = true; | |
7300 | } | |
2daedcd6 DK |
7301 | else |
7302 | { | |
7303 | // Set thumb bit if symbol: | |
7304 | // -Has type STT_ARM_TFUNC or | |
7305 | // -Has type STT_FUNC, is defined and with LSB in value set. | |
7306 | thumb_bit = | |
7307 | (((gsym->type() == elfcpp::STT_ARM_TFUNC) | |
7308 | || (gsym->type() == elfcpp::STT_FUNC | |
7309 | && !gsym->is_undefined() | |
7310 | && ((psymval->value(object, 0) & 1) != 0))) | |
7311 | ? 1 | |
7312 | : 0); | |
7313 | } | |
7314 | } | |
7315 | else | |
7316 | { | |
7317 | // This is a local symbol. Determine if the final target is THUMB. | |
7318 | // We saved this information when all the local symbols were read. | |
7319 | elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info(); | |
7320 | unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); | |
7321 | thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; | |
7322 | } | |
7323 | } | |
7324 | else | |
7325 | { | |
7326 | // This is a fake relocation synthesized for a stub. It does not have | |
7327 | // a real symbol. We just look at the LSB of the symbol value to | |
7328 | // determine if the target is THUMB or not. | |
7329 | thumb_bit = ((psymval->value(object, 0) & 1) != 0); | |
c121c671 DK |
7330 | } |
7331 | ||
2daedcd6 DK |
7332 | // Strip LSB if this points to a THUMB target. |
7333 | if (thumb_bit != 0 | |
7334 | && Target_arm<big_endian>::reloc_uses_thumb_bit(r_type) | |
7335 | && ((psymval->value(object, 0) & 1) != 0)) | |
7336 | { | |
7337 | Arm_address stripped_value = | |
7338 | psymval->value(object, 0) & ~static_cast<Arm_address>(1); | |
7339 | symval.set_output_value(stripped_value); | |
7340 | psymval = &symval; | |
7341 | } | |
7342 | ||
c121c671 DK |
7343 | // Get the GOT offset if needed. |
7344 | // The GOT pointer points to the end of the GOT section. | |
7345 | // We need to subtract the size of the GOT section to get | |
7346 | // the actual offset to use in the relocation. | |
7347 | bool have_got_offset = false; | |
7348 | unsigned int got_offset = 0; | |
7349 | switch (r_type) | |
7350 | { | |
7351 | case elfcpp::R_ARM_GOT_BREL: | |
7f5309a5 | 7352 | case elfcpp::R_ARM_GOT_PREL: |
c121c671 DK |
7353 | if (gsym != NULL) |
7354 | { | |
7355 | gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD)); | |
7356 | got_offset = (gsym->got_offset(GOT_TYPE_STANDARD) | |
7357 | - target->got_size()); | |
7358 | } | |
7359 | else | |
7360 | { | |
7361 | unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); | |
7362 | gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD)); | |
7363 | got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD) | |
7364 | - target->got_size()); | |
7365 | } | |
7366 | have_got_offset = true; | |
7367 | break; | |
7368 | ||
7369 | default: | |
7370 | break; | |
7371 | } | |
7372 | ||
d204b6e9 DK |
7373 | // To look up relocation stubs, we need to pass the symbol table index of |
7374 | // a local symbol. | |
7375 | unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); | |
7376 | ||
b10d2873 ILT |
7377 | // Get the addressing origin of the output segment defining the |
7378 | // symbol gsym if needed (AAELF 4.6.1.2 Relocation types). | |
7379 | Arm_address sym_origin = 0; | |
7380 | if (Relocate::reloc_needs_sym_origin(r_type)) | |
7381 | { | |
7382 | if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL) | |
7383 | // R_ARM_BASE_ABS with the NULL symbol will give the | |
7384 | // absolute address of the GOT origin (GOT_ORG) (see ARM IHI | |
7385 | // 0044C (AAELF): 4.6.1.8 Proxy generating relocations). | |
7386 | sym_origin = target->got_plt_section()->address(); | |
7387 | else if (gsym == NULL) | |
7388 | sym_origin = 0; | |
7389 | else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT) | |
7390 | sym_origin = gsym->output_segment()->vaddr(); | |
7391 | else if (gsym->source() == Symbol::IN_OUTPUT_DATA) | |
7392 | sym_origin = gsym->output_data()->address(); | |
7393 | ||
7394 | // TODO: Assumes the segment base to be zero for the global symbols | |
7395 | // till the proper support for the segment-base-relative addressing | |
7396 | // will be implemented. This is consistent with GNU ld. | |
7397 | } | |
7398 | ||
c121c671 DK |
7399 | typename Arm_relocate_functions::Status reloc_status = |
7400 | Arm_relocate_functions::STATUS_OKAY; | |
4a657b0d DK |
7401 | switch (r_type) |
7402 | { | |
7403 | case elfcpp::R_ARM_NONE: | |
7404 | break; | |
7405 | ||
5e445df6 ILT |
7406 | case elfcpp::R_ARM_ABS8: |
7407 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false, | |
7408 | output_section)) | |
be8fcb75 ILT |
7409 | reloc_status = Arm_relocate_functions::abs8(view, object, psymval); |
7410 | break; | |
7411 | ||
7412 | case elfcpp::R_ARM_ABS12: | |
7413 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false, | |
7414 | output_section)) | |
7415 | reloc_status = Arm_relocate_functions::abs12(view, object, psymval); | |
7416 | break; | |
7417 | ||
7418 | case elfcpp::R_ARM_ABS16: | |
7419 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false, | |
7420 | output_section)) | |
7421 | reloc_status = Arm_relocate_functions::abs16(view, object, psymval); | |
5e445df6 ILT |
7422 | break; |
7423 | ||
c121c671 DK |
7424 | case elfcpp::R_ARM_ABS32: |
7425 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7426 | output_section)) | |
7427 | reloc_status = Arm_relocate_functions::abs32(view, object, psymval, | |
2daedcd6 | 7428 | thumb_bit); |
c121c671 DK |
7429 | break; |
7430 | ||
be8fcb75 ILT |
7431 | case elfcpp::R_ARM_ABS32_NOI: |
7432 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7433 | output_section)) | |
7434 | // No thumb bit for this relocation: (S + A) | |
7435 | reloc_status = Arm_relocate_functions::abs32(view, object, psymval, | |
f4e5969c | 7436 | 0); |
be8fcb75 ILT |
7437 | break; |
7438 | ||
fd3c5f0b ILT |
7439 | case elfcpp::R_ARM_MOVW_ABS_NC: |
7440 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7441 | output_section)) | |
7442 | reloc_status = Arm_relocate_functions::movw_abs_nc(view, object, | |
7443 | psymval, | |
2daedcd6 | 7444 | thumb_bit); |
fd3c5f0b ILT |
7445 | else |
7446 | gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making" | |
7447 | "a shared object; recompile with -fPIC")); | |
7448 | break; | |
7449 | ||
7450 | case elfcpp::R_ARM_MOVT_ABS: | |
7451 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7452 | output_section)) | |
7453 | reloc_status = Arm_relocate_functions::movt_abs(view, object, psymval); | |
7454 | else | |
7455 | gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making" | |
7456 | "a shared object; recompile with -fPIC")); | |
7457 | break; | |
7458 | ||
7459 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: | |
7460 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7461 | output_section)) | |
7462 | reloc_status = Arm_relocate_functions::thm_movw_abs_nc(view, object, | |
7463 | psymval, | |
2daedcd6 | 7464 | thumb_bit); |
fd3c5f0b ILT |
7465 | else |
7466 | gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when" | |
7467 | "making a shared object; recompile with -fPIC")); | |
7468 | break; | |
7469 | ||
7470 | case elfcpp::R_ARM_THM_MOVT_ABS: | |
7471 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7472 | output_section)) | |
7473 | reloc_status = Arm_relocate_functions::thm_movt_abs(view, object, | |
7474 | psymval); | |
7475 | else | |
7476 | gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when" | |
7477 | "making a shared object; recompile with -fPIC")); | |
7478 | break; | |
7479 | ||
c2a122b6 | 7480 | case elfcpp::R_ARM_MOVW_PREL_NC: |
02961d7e ILT |
7481 | reloc_status = Arm_relocate_functions::movw_rel_nc(view, object, |
7482 | psymval, address, | |
7483 | thumb_bit); | |
7484 | break; | |
7485 | ||
7486 | case elfcpp::R_ARM_MOVW_BREL_NC: | |
7487 | reloc_status = Arm_relocate_functions::movw_rel_nc(view, object, | |
7488 | psymval, sym_origin, | |
7489 | thumb_bit); | |
7490 | break; | |
7491 | ||
7492 | case elfcpp::R_ARM_MOVW_BREL: | |
7493 | reloc_status = Arm_relocate_functions::movw_rel(view, object, | |
7494 | psymval, sym_origin, | |
7495 | thumb_bit); | |
c2a122b6 ILT |
7496 | break; |
7497 | ||
7498 | case elfcpp::R_ARM_MOVT_PREL: | |
02961d7e ILT |
7499 | reloc_status = Arm_relocate_functions::movt_rel(view, object, |
7500 | psymval, address); | |
7501 | break; | |
7502 | ||
7503 | case elfcpp::R_ARM_MOVT_BREL: | |
7504 | reloc_status = Arm_relocate_functions::movt_rel(view, object, | |
7505 | psymval, sym_origin); | |
c2a122b6 ILT |
7506 | break; |
7507 | ||
7508 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: | |
02961d7e ILT |
7509 | reloc_status = Arm_relocate_functions::thm_movw_rel_nc(view, object, |
7510 | psymval, address, | |
7511 | thumb_bit); | |
7512 | break; | |
7513 | ||
7514 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: | |
7515 | reloc_status = Arm_relocate_functions::thm_movw_rel_nc(view, object, | |
7516 | psymval, | |
7517 | sym_origin, | |
7518 | thumb_bit); | |
7519 | break; | |
7520 | ||
7521 | case elfcpp::R_ARM_THM_MOVW_BREL: | |
7522 | reloc_status = Arm_relocate_functions::thm_movw_rel(view, object, | |
7523 | psymval, sym_origin, | |
7524 | thumb_bit); | |
c2a122b6 ILT |
7525 | break; |
7526 | ||
7527 | case elfcpp::R_ARM_THM_MOVT_PREL: | |
02961d7e ILT |
7528 | reloc_status = Arm_relocate_functions::thm_movt_rel(view, object, |
7529 | psymval, address); | |
c2a122b6 ILT |
7530 | break; |
7531 | ||
02961d7e ILT |
7532 | case elfcpp::R_ARM_THM_MOVT_BREL: |
7533 | reloc_status = Arm_relocate_functions::thm_movt_rel(view, object, | |
7534 | psymval, sym_origin); | |
7535 | break; | |
7536 | ||
c121c671 DK |
7537 | case elfcpp::R_ARM_REL32: |
7538 | reloc_status = Arm_relocate_functions::rel32(view, object, psymval, | |
2daedcd6 | 7539 | address, thumb_bit); |
c121c671 DK |
7540 | break; |
7541 | ||
be8fcb75 ILT |
7542 | case elfcpp::R_ARM_THM_ABS5: |
7543 | if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false, | |
7544 | output_section)) | |
7545 | reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval); | |
7546 | break; | |
7547 | ||
c121c671 | 7548 | case elfcpp::R_ARM_THM_CALL: |
51938283 DK |
7549 | reloc_status = |
7550 | Arm_relocate_functions::thm_call(relinfo, view, gsym, object, r_sym, | |
7551 | psymval, address, thumb_bit, | |
7552 | is_weakly_undefined_without_plt); | |
c121c671 DK |
7553 | break; |
7554 | ||
d204b6e9 DK |
7555 | case elfcpp::R_ARM_XPC25: |
7556 | reloc_status = | |
7557 | Arm_relocate_functions::xpc25(relinfo, view, gsym, object, r_sym, | |
7558 | psymval, address, thumb_bit, | |
7559 | is_weakly_undefined_without_plt); | |
7560 | break; | |
7561 | ||
51938283 DK |
7562 | case elfcpp::R_ARM_THM_XPC22: |
7563 | reloc_status = | |
7564 | Arm_relocate_functions::thm_xpc22(relinfo, view, gsym, object, r_sym, | |
7565 | psymval, address, thumb_bit, | |
7566 | is_weakly_undefined_without_plt); | |
7567 | break; | |
7568 | ||
c121c671 DK |
7569 | case elfcpp::R_ARM_GOTOFF32: |
7570 | { | |
ebabffbd | 7571 | Arm_address got_origin; |
c121c671 DK |
7572 | got_origin = target->got_plt_section()->address(); |
7573 | reloc_status = Arm_relocate_functions::rel32(view, object, psymval, | |
2daedcd6 | 7574 | got_origin, thumb_bit); |
c121c671 DK |
7575 | } |
7576 | break; | |
7577 | ||
7578 | case elfcpp::R_ARM_BASE_PREL: | |
b10d2873 ILT |
7579 | gold_assert(gsym != NULL); |
7580 | reloc_status = | |
7581 | Arm_relocate_functions::base_prel(view, sym_origin, address); | |
c121c671 DK |
7582 | break; |
7583 | ||
be8fcb75 ILT |
7584 | case elfcpp::R_ARM_BASE_ABS: |
7585 | { | |
7586 | if (!should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true, | |
7587 | output_section)) | |
7588 | break; | |
7589 | ||
b10d2873 | 7590 | reloc_status = Arm_relocate_functions::base_abs(view, sym_origin); |
be8fcb75 ILT |
7591 | } |
7592 | break; | |
7593 | ||
c121c671 DK |
7594 | case elfcpp::R_ARM_GOT_BREL: |
7595 | gold_assert(have_got_offset); | |
7596 | reloc_status = Arm_relocate_functions::got_brel(view, got_offset); | |
7597 | break; | |
7598 | ||
7f5309a5 ILT |
7599 | case elfcpp::R_ARM_GOT_PREL: |
7600 | gold_assert(have_got_offset); | |
7601 | // Get the address origin for GOT PLT, which is allocated right | |
7602 | // after the GOT section, to calculate an absolute address of | |
7603 | // the symbol GOT entry (got_origin + got_offset). | |
ebabffbd | 7604 | Arm_address got_origin; |
7f5309a5 ILT |
7605 | got_origin = target->got_plt_section()->address(); |
7606 | reloc_status = Arm_relocate_functions::got_prel(view, | |
7607 | got_origin + got_offset, | |
7608 | address); | |
7609 | break; | |
7610 | ||
c121c671 DK |
7611 | case elfcpp::R_ARM_PLT32: |
7612 | gold_assert(gsym == NULL | |
7613 | || gsym->has_plt_offset() | |
7614 | || gsym->final_value_is_known() | |
7615 | || (gsym->is_defined() | |
7616 | && !gsym->is_from_dynobj() | |
7617 | && !gsym->is_preemptible())); | |
d204b6e9 DK |
7618 | reloc_status = |
7619 | Arm_relocate_functions::plt32(relinfo, view, gsym, object, r_sym, | |
7620 | psymval, address, thumb_bit, | |
7621 | is_weakly_undefined_without_plt); | |
c121c671 DK |
7622 | break; |
7623 | ||
7624 | case elfcpp::R_ARM_CALL: | |
d204b6e9 DK |
7625 | reloc_status = |
7626 | Arm_relocate_functions::call(relinfo, view, gsym, object, r_sym, | |
7627 | psymval, address, thumb_bit, | |
7628 | is_weakly_undefined_without_plt); | |
c121c671 DK |
7629 | break; |
7630 | ||
7631 | case elfcpp::R_ARM_JUMP24: | |
d204b6e9 DK |
7632 | reloc_status = |
7633 | Arm_relocate_functions::jump24(relinfo, view, gsym, object, r_sym, | |
7634 | psymval, address, thumb_bit, | |
7635 | is_weakly_undefined_without_plt); | |
c121c671 DK |
7636 | break; |
7637 | ||
51938283 DK |
7638 | case elfcpp::R_ARM_THM_JUMP24: |
7639 | reloc_status = | |
7640 | Arm_relocate_functions::thm_jump24(relinfo, view, gsym, object, r_sym, | |
7641 | psymval, address, thumb_bit, | |
7642 | is_weakly_undefined_without_plt); | |
7643 | break; | |
7644 | ||
41263c05 DK |
7645 | case elfcpp::R_ARM_THM_JUMP19: |
7646 | reloc_status = | |
7647 | Arm_relocate_functions::thm_jump19(view, object, psymval, address, | |
7648 | thumb_bit); | |
7649 | break; | |
7650 | ||
800d0f56 ILT |
7651 | case elfcpp::R_ARM_THM_JUMP6: |
7652 | reloc_status = | |
7653 | Arm_relocate_functions::thm_jump6(view, object, psymval, address); | |
7654 | break; | |
7655 | ||
7656 | case elfcpp::R_ARM_THM_JUMP8: | |
7657 | reloc_status = | |
7658 | Arm_relocate_functions::thm_jump8(view, object, psymval, address); | |
7659 | break; | |
7660 | ||
7661 | case elfcpp::R_ARM_THM_JUMP11: | |
7662 | reloc_status = | |
7663 | Arm_relocate_functions::thm_jump11(view, object, psymval, address); | |
7664 | break; | |
7665 | ||
c121c671 DK |
7666 | case elfcpp::R_ARM_PREL31: |
7667 | reloc_status = Arm_relocate_functions::prel31(view, object, psymval, | |
2daedcd6 | 7668 | address, thumb_bit); |
c121c671 DK |
7669 | break; |
7670 | ||
a2162063 | 7671 | case elfcpp::R_ARM_V4BX: |
9b2fd367 DK |
7672 | if (target->fix_v4bx() > General_options::FIX_V4BX_NONE) |
7673 | { | |
7674 | const bool is_v4bx_interworking = | |
7675 | (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING); | |
7676 | reloc_status = | |
7677 | Arm_relocate_functions::v4bx(relinfo, view, object, address, | |
7678 | is_v4bx_interworking); | |
7679 | } | |
a2162063 ILT |
7680 | break; |
7681 | ||
b10d2873 ILT |
7682 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
7683 | reloc_status = | |
7684 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0, | |
7685 | address, thumb_bit, false); | |
7686 | break; | |
7687 | ||
7688 | case elfcpp::R_ARM_ALU_PC_G0: | |
7689 | reloc_status = | |
7690 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0, | |
7691 | address, thumb_bit, true); | |
7692 | break; | |
7693 | ||
7694 | case elfcpp::R_ARM_ALU_PC_G1_NC: | |
7695 | reloc_status = | |
7696 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1, | |
7697 | address, thumb_bit, false); | |
7698 | break; | |
7699 | ||
7700 | case elfcpp::R_ARM_ALU_PC_G1: | |
7701 | reloc_status = | |
7702 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1, | |
7703 | address, thumb_bit, true); | |
7704 | break; | |
7705 | ||
7706 | case elfcpp::R_ARM_ALU_PC_G2: | |
7707 | reloc_status = | |
7708 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2, | |
7709 | address, thumb_bit, true); | |
7710 | break; | |
7711 | ||
7712 | case elfcpp::R_ARM_ALU_SB_G0_NC: | |
7713 | reloc_status = | |
7714 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0, | |
7715 | sym_origin, thumb_bit, false); | |
7716 | break; | |
7717 | ||
7718 | case elfcpp::R_ARM_ALU_SB_G0: | |
7719 | reloc_status = | |
7720 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0, | |
7721 | sym_origin, thumb_bit, true); | |
7722 | break; | |
7723 | ||
7724 | case elfcpp::R_ARM_ALU_SB_G1_NC: | |
7725 | reloc_status = | |
7726 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1, | |
7727 | sym_origin, thumb_bit, false); | |
7728 | break; | |
7729 | ||
7730 | case elfcpp::R_ARM_ALU_SB_G1: | |
7731 | reloc_status = | |
7732 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1, | |
7733 | sym_origin, thumb_bit, true); | |
7734 | break; | |
7735 | ||
7736 | case elfcpp::R_ARM_ALU_SB_G2: | |
7737 | reloc_status = | |
7738 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2, | |
7739 | sym_origin, thumb_bit, true); | |
7740 | break; | |
7741 | ||
7742 | case elfcpp::R_ARM_LDR_PC_G0: | |
7743 | reloc_status = | |
7744 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0, | |
7745 | address); | |
7746 | break; | |
7747 | ||
7748 | case elfcpp::R_ARM_LDR_PC_G1: | |
7749 | reloc_status = | |
7750 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1, | |
7751 | address); | |
7752 | break; | |
7753 | ||
7754 | case elfcpp::R_ARM_LDR_PC_G2: | |
7755 | reloc_status = | |
7756 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2, | |
7757 | address); | |
7758 | break; | |
7759 | ||
7760 | case elfcpp::R_ARM_LDR_SB_G0: | |
7761 | reloc_status = | |
7762 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0, | |
7763 | sym_origin); | |
7764 | break; | |
7765 | ||
7766 | case elfcpp::R_ARM_LDR_SB_G1: | |
7767 | reloc_status = | |
7768 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1, | |
7769 | sym_origin); | |
7770 | break; | |
7771 | ||
7772 | case elfcpp::R_ARM_LDR_SB_G2: | |
7773 | reloc_status = | |
7774 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2, | |
7775 | sym_origin); | |
7776 | break; | |
7777 | ||
7778 | case elfcpp::R_ARM_LDRS_PC_G0: | |
7779 | reloc_status = | |
7780 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0, | |
7781 | address); | |
7782 | break; | |
7783 | ||
7784 | case elfcpp::R_ARM_LDRS_PC_G1: | |
7785 | reloc_status = | |
7786 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1, | |
7787 | address); | |
7788 | break; | |
7789 | ||
7790 | case elfcpp::R_ARM_LDRS_PC_G2: | |
7791 | reloc_status = | |
7792 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2, | |
7793 | address); | |
7794 | break; | |
7795 | ||
7796 | case elfcpp::R_ARM_LDRS_SB_G0: | |
7797 | reloc_status = | |
7798 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0, | |
7799 | sym_origin); | |
7800 | break; | |
7801 | ||
7802 | case elfcpp::R_ARM_LDRS_SB_G1: | |
7803 | reloc_status = | |
7804 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1, | |
7805 | sym_origin); | |
7806 | break; | |
7807 | ||
7808 | case elfcpp::R_ARM_LDRS_SB_G2: | |
7809 | reloc_status = | |
7810 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2, | |
7811 | sym_origin); | |
7812 | break; | |
7813 | ||
7814 | case elfcpp::R_ARM_LDC_PC_G0: | |
7815 | reloc_status = | |
7816 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0, | |
7817 | address); | |
7818 | break; | |
7819 | ||
7820 | case elfcpp::R_ARM_LDC_PC_G1: | |
7821 | reloc_status = | |
7822 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1, | |
7823 | address); | |
7824 | break; | |
7825 | ||
7826 | case elfcpp::R_ARM_LDC_PC_G2: | |
7827 | reloc_status = | |
7828 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2, | |
7829 | address); | |
7830 | break; | |
7831 | ||
7832 | case elfcpp::R_ARM_LDC_SB_G0: | |
7833 | reloc_status = | |
7834 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0, | |
7835 | sym_origin); | |
7836 | break; | |
7837 | ||
7838 | case elfcpp::R_ARM_LDC_SB_G1: | |
7839 | reloc_status = | |
7840 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1, | |
7841 | sym_origin); | |
7842 | break; | |
7843 | ||
7844 | case elfcpp::R_ARM_LDC_SB_G2: | |
7845 | reloc_status = | |
7846 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2, | |
7847 | sym_origin); | |
7848 | break; | |
7849 | ||
c121c671 DK |
7850 | case elfcpp::R_ARM_TARGET1: |
7851 | // This should have been mapped to another type already. | |
7852 | // Fall through. | |
7853 | case elfcpp::R_ARM_COPY: | |
7854 | case elfcpp::R_ARM_GLOB_DAT: | |
7855 | case elfcpp::R_ARM_JUMP_SLOT: | |
7856 | case elfcpp::R_ARM_RELATIVE: | |
7857 | // These are relocations which should only be seen by the | |
7858 | // dynamic linker, and should never be seen here. | |
7859 | gold_error_at_location(relinfo, relnum, rel.get_r_offset(), | |
7860 | _("unexpected reloc %u in object file"), | |
7861 | r_type); | |
7862 | break; | |
7863 | ||
7864 | default: | |
7865 | gold_error_at_location(relinfo, relnum, rel.get_r_offset(), | |
7866 | _("unsupported reloc %u"), | |
7867 | r_type); | |
7868 | break; | |
7869 | } | |
7870 | ||
7871 | // Report any errors. | |
7872 | switch (reloc_status) | |
7873 | { | |
7874 | case Arm_relocate_functions::STATUS_OKAY: | |
7875 | break; | |
7876 | case Arm_relocate_functions::STATUS_OVERFLOW: | |
7877 | gold_error_at_location(relinfo, relnum, rel.get_r_offset(), | |
7878 | _("relocation overflow in relocation %u"), | |
7879 | r_type); | |
7880 | break; | |
7881 | case Arm_relocate_functions::STATUS_BAD_RELOC: | |
7882 | gold_error_at_location( | |
7883 | relinfo, | |
7884 | relnum, | |
7885 | rel.get_r_offset(), | |
7886 | _("unexpected opcode while processing relocation %u"), | |
7887 | r_type); | |
7888 | break; | |
4a657b0d DK |
7889 | default: |
7890 | gold_unreachable(); | |
7891 | } | |
7892 | ||
7893 | return true; | |
7894 | } | |
7895 | ||
7896 | // Relocate section data. | |
7897 | ||
7898 | template<bool big_endian> | |
7899 | void | |
7900 | Target_arm<big_endian>::relocate_section( | |
7901 | const Relocate_info<32, big_endian>* relinfo, | |
7902 | unsigned int sh_type, | |
7903 | const unsigned char* prelocs, | |
7904 | size_t reloc_count, | |
7905 | Output_section* output_section, | |
7906 | bool needs_special_offset_handling, | |
7907 | unsigned char* view, | |
ebabffbd | 7908 | Arm_address address, |
364c7fa5 ILT |
7909 | section_size_type view_size, |
7910 | const Reloc_symbol_changes* reloc_symbol_changes) | |
4a657b0d DK |
7911 | { |
7912 | typedef typename Target_arm<big_endian>::Relocate Arm_relocate; | |
7913 | gold_assert(sh_type == elfcpp::SHT_REL); | |
7914 | ||
43d12afe DK |
7915 | Arm_input_section<big_endian>* arm_input_section = |
7916 | this->find_arm_input_section(relinfo->object, relinfo->data_shndx); | |
7917 | ||
7918 | // This is an ARM input section and the view covers the whole output | |
7919 | // section. | |
7920 | if (arm_input_section != NULL) | |
7921 | { | |
7922 | gold_assert(needs_special_offset_handling); | |
7923 | Arm_address section_address = arm_input_section->address(); | |
7924 | section_size_type section_size = arm_input_section->data_size(); | |
7925 | ||
7926 | gold_assert((arm_input_section->address() >= address) | |
7927 | && ((arm_input_section->address() | |
7928 | + arm_input_section->data_size()) | |
7929 | <= (address + view_size))); | |
7930 | ||
2ea97941 ILT |
7931 | off_t offset = section_address - address; |
7932 | view += offset; | |
7933 | address += offset; | |
43d12afe DK |
7934 | view_size = section_size; |
7935 | } | |
7936 | ||
4a657b0d DK |
7937 | gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL, |
7938 | Arm_relocate>( | |
7939 | relinfo, | |
7940 | this, | |
7941 | prelocs, | |
7942 | reloc_count, | |
7943 | output_section, | |
7944 | needs_special_offset_handling, | |
7945 | view, | |
7946 | address, | |
364c7fa5 ILT |
7947 | view_size, |
7948 | reloc_symbol_changes); | |
4a657b0d DK |
7949 | } |
7950 | ||
7951 | // Return the size of a relocation while scanning during a relocatable | |
7952 | // link. | |
7953 | ||
7954 | template<bool big_endian> | |
7955 | unsigned int | |
7956 | Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc( | |
7957 | unsigned int r_type, | |
7958 | Relobj* object) | |
7959 | { | |
a6d1ef57 | 7960 | r_type = get_real_reloc_type(r_type); |
4a657b0d DK |
7961 | switch (r_type) |
7962 | { | |
7963 | case elfcpp::R_ARM_NONE: | |
7964 | return 0; | |
7965 | ||
5e445df6 ILT |
7966 | case elfcpp::R_ARM_ABS8: |
7967 | return 1; | |
7968 | ||
be8fcb75 ILT |
7969 | case elfcpp::R_ARM_ABS16: |
7970 | case elfcpp::R_ARM_THM_ABS5: | |
800d0f56 ILT |
7971 | case elfcpp::R_ARM_THM_JUMP6: |
7972 | case elfcpp::R_ARM_THM_JUMP8: | |
7973 | case elfcpp::R_ARM_THM_JUMP11: | |
be8fcb75 ILT |
7974 | return 2; |
7975 | ||
4a657b0d | 7976 | case elfcpp::R_ARM_ABS32: |
be8fcb75 ILT |
7977 | case elfcpp::R_ARM_ABS32_NOI: |
7978 | case elfcpp::R_ARM_ABS12: | |
7979 | case elfcpp::R_ARM_BASE_ABS: | |
4a657b0d DK |
7980 | case elfcpp::R_ARM_REL32: |
7981 | case elfcpp::R_ARM_THM_CALL: | |
7982 | case elfcpp::R_ARM_GOTOFF32: | |
7983 | case elfcpp::R_ARM_BASE_PREL: | |
7984 | case elfcpp::R_ARM_GOT_BREL: | |
7f5309a5 | 7985 | case elfcpp::R_ARM_GOT_PREL: |
4a657b0d DK |
7986 | case elfcpp::R_ARM_PLT32: |
7987 | case elfcpp::R_ARM_CALL: | |
7988 | case elfcpp::R_ARM_JUMP24: | |
7989 | case elfcpp::R_ARM_PREL31: | |
fd3c5f0b ILT |
7990 | case elfcpp::R_ARM_MOVW_ABS_NC: |
7991 | case elfcpp::R_ARM_MOVT_ABS: | |
7992 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: | |
7993 | case elfcpp::R_ARM_THM_MOVT_ABS: | |
c2a122b6 ILT |
7994 | case elfcpp::R_ARM_MOVW_PREL_NC: |
7995 | case elfcpp::R_ARM_MOVT_PREL: | |
7996 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: | |
7997 | case elfcpp::R_ARM_THM_MOVT_PREL: | |
02961d7e ILT |
7998 | case elfcpp::R_ARM_MOVW_BREL_NC: |
7999 | case elfcpp::R_ARM_MOVT_BREL: | |
8000 | case elfcpp::R_ARM_MOVW_BREL: | |
8001 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: | |
8002 | case elfcpp::R_ARM_THM_MOVT_BREL: | |
8003 | case elfcpp::R_ARM_THM_MOVW_BREL: | |
a2162063 | 8004 | case elfcpp::R_ARM_V4BX: |
b10d2873 ILT |
8005 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
8006 | case elfcpp::R_ARM_ALU_PC_G0: | |
8007 | case elfcpp::R_ARM_ALU_PC_G1_NC: | |
8008 | case elfcpp::R_ARM_ALU_PC_G1: | |
8009 | case elfcpp::R_ARM_ALU_PC_G2: | |
8010 | case elfcpp::R_ARM_ALU_SB_G0_NC: | |
8011 | case elfcpp::R_ARM_ALU_SB_G0: | |
8012 | case elfcpp::R_ARM_ALU_SB_G1_NC: | |
8013 | case elfcpp::R_ARM_ALU_SB_G1: | |
8014 | case elfcpp::R_ARM_ALU_SB_G2: | |
8015 | case elfcpp::R_ARM_LDR_PC_G0: | |
8016 | case elfcpp::R_ARM_LDR_PC_G1: | |
8017 | case elfcpp::R_ARM_LDR_PC_G2: | |
8018 | case elfcpp::R_ARM_LDR_SB_G0: | |
8019 | case elfcpp::R_ARM_LDR_SB_G1: | |
8020 | case elfcpp::R_ARM_LDR_SB_G2: | |
8021 | case elfcpp::R_ARM_LDRS_PC_G0: | |
8022 | case elfcpp::R_ARM_LDRS_PC_G1: | |
8023 | case elfcpp::R_ARM_LDRS_PC_G2: | |
8024 | case elfcpp::R_ARM_LDRS_SB_G0: | |
8025 | case elfcpp::R_ARM_LDRS_SB_G1: | |
8026 | case elfcpp::R_ARM_LDRS_SB_G2: | |
8027 | case elfcpp::R_ARM_LDC_PC_G0: | |
8028 | case elfcpp::R_ARM_LDC_PC_G1: | |
8029 | case elfcpp::R_ARM_LDC_PC_G2: | |
8030 | case elfcpp::R_ARM_LDC_SB_G0: | |
8031 | case elfcpp::R_ARM_LDC_SB_G1: | |
8032 | case elfcpp::R_ARM_LDC_SB_G2: | |
4a657b0d DK |
8033 | return 4; |
8034 | ||
8035 | case elfcpp::R_ARM_TARGET1: | |
8036 | // This should have been mapped to another type already. | |
8037 | // Fall through. | |
8038 | case elfcpp::R_ARM_COPY: | |
8039 | case elfcpp::R_ARM_GLOB_DAT: | |
8040 | case elfcpp::R_ARM_JUMP_SLOT: | |
8041 | case elfcpp::R_ARM_RELATIVE: | |
8042 | // These are relocations which should only be seen by the | |
8043 | // dynamic linker, and should never be seen here. | |
8044 | gold_error(_("%s: unexpected reloc %u in object file"), | |
8045 | object->name().c_str(), r_type); | |
8046 | return 0; | |
8047 | ||
8048 | default: | |
8049 | object->error(_("unsupported reloc %u in object file"), r_type); | |
8050 | return 0; | |
8051 | } | |
8052 | } | |
8053 | ||
8054 | // Scan the relocs during a relocatable link. | |
8055 | ||
8056 | template<bool big_endian> | |
8057 | void | |
8058 | Target_arm<big_endian>::scan_relocatable_relocs( | |
4a657b0d | 8059 | Symbol_table* symtab, |
2ea97941 | 8060 | Layout* layout, |
4a657b0d DK |
8061 | Sized_relobj<32, big_endian>* object, |
8062 | unsigned int data_shndx, | |
8063 | unsigned int sh_type, | |
8064 | const unsigned char* prelocs, | |
8065 | size_t reloc_count, | |
8066 | Output_section* output_section, | |
8067 | bool needs_special_offset_handling, | |
8068 | size_t local_symbol_count, | |
8069 | const unsigned char* plocal_symbols, | |
8070 | Relocatable_relocs* rr) | |
8071 | { | |
8072 | gold_assert(sh_type == elfcpp::SHT_REL); | |
8073 | ||
8074 | typedef gold::Default_scan_relocatable_relocs<elfcpp::SHT_REL, | |
8075 | Relocatable_size_for_reloc> Scan_relocatable_relocs; | |
8076 | ||
8077 | gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL, | |
8078 | Scan_relocatable_relocs>( | |
4a657b0d | 8079 | symtab, |
2ea97941 | 8080 | layout, |
4a657b0d DK |
8081 | object, |
8082 | data_shndx, | |
8083 | prelocs, | |
8084 | reloc_count, | |
8085 | output_section, | |
8086 | needs_special_offset_handling, | |
8087 | local_symbol_count, | |
8088 | plocal_symbols, | |
8089 | rr); | |
8090 | } | |
8091 | ||
8092 | // Relocate a section during a relocatable link. | |
8093 | ||
8094 | template<bool big_endian> | |
8095 | void | |
8096 | Target_arm<big_endian>::relocate_for_relocatable( | |
8097 | const Relocate_info<32, big_endian>* relinfo, | |
8098 | unsigned int sh_type, | |
8099 | const unsigned char* prelocs, | |
8100 | size_t reloc_count, | |
8101 | Output_section* output_section, | |
8102 | off_t offset_in_output_section, | |
8103 | const Relocatable_relocs* rr, | |
8104 | unsigned char* view, | |
ebabffbd | 8105 | Arm_address view_address, |
4a657b0d DK |
8106 | section_size_type view_size, |
8107 | unsigned char* reloc_view, | |
8108 | section_size_type reloc_view_size) | |
8109 | { | |
8110 | gold_assert(sh_type == elfcpp::SHT_REL); | |
8111 | ||
8112 | gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>( | |
8113 | relinfo, | |
8114 | prelocs, | |
8115 | reloc_count, | |
8116 | output_section, | |
8117 | offset_in_output_section, | |
8118 | rr, | |
8119 | view, | |
8120 | view_address, | |
8121 | view_size, | |
8122 | reloc_view, | |
8123 | reloc_view_size); | |
8124 | } | |
8125 | ||
94cdfcff DK |
8126 | // Return the value to use for a dynamic symbol which requires special |
8127 | // treatment. This is how we support equality comparisons of function | |
8128 | // pointers across shared library boundaries, as described in the | |
8129 | // processor specific ABI supplement. | |
8130 | ||
4a657b0d DK |
8131 | template<bool big_endian> |
8132 | uint64_t | |
94cdfcff | 8133 | Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const |
4a657b0d | 8134 | { |
94cdfcff DK |
8135 | gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); |
8136 | return this->plt_section()->address() + gsym->plt_offset(); | |
4a657b0d DK |
8137 | } |
8138 | ||
8139 | // Map platform-specific relocs to real relocs | |
8140 | // | |
8141 | template<bool big_endian> | |
8142 | unsigned int | |
a6d1ef57 | 8143 | Target_arm<big_endian>::get_real_reloc_type (unsigned int r_type) |
4a657b0d DK |
8144 | { |
8145 | switch (r_type) | |
8146 | { | |
8147 | case elfcpp::R_ARM_TARGET1: | |
a6d1ef57 DK |
8148 | // This is either R_ARM_ABS32 or R_ARM_REL32; |
8149 | return elfcpp::R_ARM_ABS32; | |
4a657b0d DK |
8150 | |
8151 | case elfcpp::R_ARM_TARGET2: | |
a6d1ef57 DK |
8152 | // This can be any reloc type but ususally is R_ARM_GOT_PREL |
8153 | return elfcpp::R_ARM_GOT_PREL; | |
4a657b0d DK |
8154 | |
8155 | default: | |
8156 | return r_type; | |
8157 | } | |
8158 | } | |
8159 | ||
d5b40221 DK |
8160 | // Whether if two EABI versions V1 and V2 are compatible. |
8161 | ||
8162 | template<bool big_endian> | |
8163 | bool | |
8164 | Target_arm<big_endian>::are_eabi_versions_compatible( | |
8165 | elfcpp::Elf_Word v1, | |
8166 | elfcpp::Elf_Word v2) | |
8167 | { | |
8168 | // v4 and v5 are the same spec before and after it was released, | |
8169 | // so allow mixing them. | |
8170 | if ((v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5) | |
8171 | || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4)) | |
8172 | return true; | |
8173 | ||
8174 | return v1 == v2; | |
8175 | } | |
8176 | ||
8177 | // Combine FLAGS from an input object called NAME and the processor-specific | |
8178 | // flags in the ELF header of the output. Much of this is adapted from the | |
8179 | // processor-specific flags merging code in elf32_arm_merge_private_bfd_data | |
8180 | // in bfd/elf32-arm.c. | |
8181 | ||
8182 | template<bool big_endian> | |
8183 | void | |
8184 | Target_arm<big_endian>::merge_processor_specific_flags( | |
8185 | const std::string& name, | |
8186 | elfcpp::Elf_Word flags) | |
8187 | { | |
8188 | if (this->are_processor_specific_flags_set()) | |
8189 | { | |
8190 | elfcpp::Elf_Word out_flags = this->processor_specific_flags(); | |
8191 | ||
8192 | // Nothing to merge if flags equal to those in output. | |
8193 | if (flags == out_flags) | |
8194 | return; | |
8195 | ||
8196 | // Complain about various flag mismatches. | |
8197 | elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags); | |
8198 | elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags); | |
8199 | if (!this->are_eabi_versions_compatible(version1, version2)) | |
8200 | gold_error(_("Source object %s has EABI version %d but output has " | |
8201 | "EABI version %d."), | |
8202 | name.c_str(), | |
8203 | (flags & elfcpp::EF_ARM_EABIMASK) >> 24, | |
8204 | (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24); | |
8205 | } | |
8206 | else | |
8207 | { | |
8208 | // If the input is the default architecture and had the default | |
8209 | // flags then do not bother setting the flags for the output | |
8210 | // architecture, instead allow future merges to do this. If no | |
8211 | // future merges ever set these flags then they will retain their | |
8212 | // uninitialised values, which surprise surprise, correspond | |
8213 | // to the default values. | |
8214 | if (flags == 0) | |
8215 | return; | |
8216 | ||
8217 | // This is the first time, just copy the flags. | |
8218 | // We only copy the EABI version for now. | |
8219 | this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK); | |
8220 | } | |
8221 | } | |
8222 | ||
8223 | // Adjust ELF file header. | |
8224 | template<bool big_endian> | |
8225 | void | |
8226 | Target_arm<big_endian>::do_adjust_elf_header( | |
8227 | unsigned char* view, | |
8228 | int len) const | |
8229 | { | |
8230 | gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size); | |
8231 | ||
8232 | elfcpp::Ehdr<32, big_endian> ehdr(view); | |
8233 | unsigned char e_ident[elfcpp::EI_NIDENT]; | |
8234 | memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); | |
8235 | ||
8236 | if (elfcpp::arm_eabi_version(this->processor_specific_flags()) | |
8237 | == elfcpp::EF_ARM_EABI_UNKNOWN) | |
8238 | e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM; | |
8239 | else | |
8240 | e_ident[elfcpp::EI_OSABI] = 0; | |
8241 | e_ident[elfcpp::EI_ABIVERSION] = 0; | |
8242 | ||
8243 | // FIXME: Do EF_ARM_BE8 adjustment. | |
8244 | ||
8245 | elfcpp::Ehdr_write<32, big_endian> oehdr(view); | |
8246 | oehdr.put_e_ident(e_ident); | |
8247 | } | |
8248 | ||
8249 | // do_make_elf_object to override the same function in the base class. | |
8250 | // We need to use a target-specific sub-class of Sized_relobj<32, big_endian> | |
8251 | // to store ARM specific information. Hence we need to have our own | |
8252 | // ELF object creation. | |
8253 | ||
8254 | template<bool big_endian> | |
8255 | Object* | |
8256 | Target_arm<big_endian>::do_make_elf_object( | |
8257 | const std::string& name, | |
8258 | Input_file* input_file, | |
2ea97941 | 8259 | off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr) |
d5b40221 DK |
8260 | { |
8261 | int et = ehdr.get_e_type(); | |
8262 | if (et == elfcpp::ET_REL) | |
8263 | { | |
8264 | Arm_relobj<big_endian>* obj = | |
2ea97941 | 8265 | new Arm_relobj<big_endian>(name, input_file, offset, ehdr); |
d5b40221 DK |
8266 | obj->setup(); |
8267 | return obj; | |
8268 | } | |
8269 | else if (et == elfcpp::ET_DYN) | |
8270 | { | |
8271 | Sized_dynobj<32, big_endian>* obj = | |
2ea97941 | 8272 | new Arm_dynobj<big_endian>(name, input_file, offset, ehdr); |
d5b40221 DK |
8273 | obj->setup(); |
8274 | return obj; | |
8275 | } | |
8276 | else | |
8277 | { | |
8278 | gold_error(_("%s: unsupported ELF file type %d"), | |
8279 | name.c_str(), et); | |
8280 | return NULL; | |
8281 | } | |
8282 | } | |
8283 | ||
a0351a69 DK |
8284 | // Read the architecture from the Tag_also_compatible_with attribute, if any. |
8285 | // Returns -1 if no architecture could be read. | |
8286 | // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c. | |
8287 | ||
8288 | template<bool big_endian> | |
8289 | int | |
8290 | Target_arm<big_endian>::get_secondary_compatible_arch( | |
8291 | const Attributes_section_data* pasd) | |
8292 | { | |
8293 | const Object_attribute *known_attributes = | |
8294 | pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); | |
8295 | ||
8296 | // Note: the tag and its argument below are uleb128 values, though | |
8297 | // currently-defined values fit in one byte for each. | |
8298 | const std::string& sv = | |
8299 | known_attributes[elfcpp::Tag_also_compatible_with].string_value(); | |
8300 | if (sv.size() == 2 | |
8301 | && sv.data()[0] == elfcpp::Tag_CPU_arch | |
8302 | && (sv.data()[1] & 128) != 128) | |
8303 | return sv.data()[1]; | |
8304 | ||
8305 | // This tag is "safely ignorable", so don't complain if it looks funny. | |
8306 | return -1; | |
8307 | } | |
8308 | ||
8309 | // Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
8310 | // The tag is removed if ARCH is -1. | |
8311 | // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c. | |
8312 | ||
8313 | template<bool big_endian> | |
8314 | void | |
8315 | Target_arm<big_endian>::set_secondary_compatible_arch( | |
8316 | Attributes_section_data* pasd, | |
8317 | int arch) | |
8318 | { | |
8319 | Object_attribute *known_attributes = | |
8320 | pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); | |
8321 | ||
8322 | if (arch == -1) | |
8323 | { | |
8324 | known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(""); | |
8325 | return; | |
8326 | } | |
8327 | ||
8328 | // Note: the tag and its argument below are uleb128 values, though | |
8329 | // currently-defined values fit in one byte for each. | |
8330 | char sv[3]; | |
8331 | sv[0] = elfcpp::Tag_CPU_arch; | |
8332 | gold_assert(arch != 0); | |
8333 | sv[1] = arch; | |
8334 | sv[2] = '\0'; | |
8335 | ||
8336 | known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv); | |
8337 | } | |
8338 | ||
8339 | // Combine two values for Tag_CPU_arch, taking secondary compatibility tags | |
8340 | // into account. | |
8341 | // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c. | |
8342 | ||
8343 | template<bool big_endian> | |
8344 | int | |
8345 | Target_arm<big_endian>::tag_cpu_arch_combine( | |
8346 | const char* name, | |
8347 | int oldtag, | |
8348 | int* secondary_compat_out, | |
8349 | int newtag, | |
8350 | int secondary_compat) | |
8351 | { | |
8352 | #define T(X) elfcpp::TAG_CPU_ARCH_##X | |
8353 | static const int v6t2[] = | |
8354 | { | |
8355 | T(V6T2), // PRE_V4. | |
8356 | T(V6T2), // V4. | |
8357 | T(V6T2), // V4T. | |
8358 | T(V6T2), // V5T. | |
8359 | T(V6T2), // V5TE. | |
8360 | T(V6T2), // V5TEJ. | |
8361 | T(V6T2), // V6. | |
8362 | T(V7), // V6KZ. | |
8363 | T(V6T2) // V6T2. | |
8364 | }; | |
8365 | static const int v6k[] = | |
8366 | { | |
8367 | T(V6K), // PRE_V4. | |
8368 | T(V6K), // V4. | |
8369 | T(V6K), // V4T. | |
8370 | T(V6K), // V5T. | |
8371 | T(V6K), // V5TE. | |
8372 | T(V6K), // V5TEJ. | |
8373 | T(V6K), // V6. | |
8374 | T(V6KZ), // V6KZ. | |
8375 | T(V7), // V6T2. | |
8376 | T(V6K) // V6K. | |
8377 | }; | |
8378 | static const int v7[] = | |
8379 | { | |
8380 | T(V7), // PRE_V4. | |
8381 | T(V7), // V4. | |
8382 | T(V7), // V4T. | |
8383 | T(V7), // V5T. | |
8384 | T(V7), // V5TE. | |
8385 | T(V7), // V5TEJ. | |
8386 | T(V7), // V6. | |
8387 | T(V7), // V6KZ. | |
8388 | T(V7), // V6T2. | |
8389 | T(V7), // V6K. | |
8390 | T(V7) // V7. | |
8391 | }; | |
8392 | static const int v6_m[] = | |
8393 | { | |
8394 | -1, // PRE_V4. | |
8395 | -1, // V4. | |
8396 | T(V6K), // V4T. | |
8397 | T(V6K), // V5T. | |
8398 | T(V6K), // V5TE. | |
8399 | T(V6K), // V5TEJ. | |
8400 | T(V6K), // V6. | |
8401 | T(V6KZ), // V6KZ. | |
8402 | T(V7), // V6T2. | |
8403 | T(V6K), // V6K. | |
8404 | T(V7), // V7. | |
8405 | T(V6_M) // V6_M. | |
8406 | }; | |
8407 | static const int v6s_m[] = | |
8408 | { | |
8409 | -1, // PRE_V4. | |
8410 | -1, // V4. | |
8411 | T(V6K), // V4T. | |
8412 | T(V6K), // V5T. | |
8413 | T(V6K), // V5TE. | |
8414 | T(V6K), // V5TEJ. | |
8415 | T(V6K), // V6. | |
8416 | T(V6KZ), // V6KZ. | |
8417 | T(V7), // V6T2. | |
8418 | T(V6K), // V6K. | |
8419 | T(V7), // V7. | |
8420 | T(V6S_M), // V6_M. | |
8421 | T(V6S_M) // V6S_M. | |
8422 | }; | |
8423 | static const int v7e_m[] = | |
8424 | { | |
8425 | -1, // PRE_V4. | |
8426 | -1, // V4. | |
8427 | T(V7E_M), // V4T. | |
8428 | T(V7E_M), // V5T. | |
8429 | T(V7E_M), // V5TE. | |
8430 | T(V7E_M), // V5TEJ. | |
8431 | T(V7E_M), // V6. | |
8432 | T(V7E_M), // V6KZ. | |
8433 | T(V7E_M), // V6T2. | |
8434 | T(V7E_M), // V6K. | |
8435 | T(V7E_M), // V7. | |
8436 | T(V7E_M), // V6_M. | |
8437 | T(V7E_M), // V6S_M. | |
8438 | T(V7E_M) // V7E_M. | |
8439 | }; | |
8440 | static const int v4t_plus_v6_m[] = | |
8441 | { | |
8442 | -1, // PRE_V4. | |
8443 | -1, // V4. | |
8444 | T(V4T), // V4T. | |
8445 | T(V5T), // V5T. | |
8446 | T(V5TE), // V5TE. | |
8447 | T(V5TEJ), // V5TEJ. | |
8448 | T(V6), // V6. | |
8449 | T(V6KZ), // V6KZ. | |
8450 | T(V6T2), // V6T2. | |
8451 | T(V6K), // V6K. | |
8452 | T(V7), // V7. | |
8453 | T(V6_M), // V6_M. | |
8454 | T(V6S_M), // V6S_M. | |
8455 | T(V7E_M), // V7E_M. | |
8456 | T(V4T_PLUS_V6_M) // V4T plus V6_M. | |
8457 | }; | |
8458 | static const int *comb[] = | |
8459 | { | |
8460 | v6t2, | |
8461 | v6k, | |
8462 | v7, | |
8463 | v6_m, | |
8464 | v6s_m, | |
8465 | v7e_m, | |
8466 | // Pseudo-architecture. | |
8467 | v4t_plus_v6_m | |
8468 | }; | |
8469 | ||
8470 | // Check we've not got a higher architecture than we know about. | |
8471 | ||
8472 | if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH) | |
8473 | { | |
8474 | gold_error(_("%s: unknown CPU architecture"), name); | |
8475 | return -1; | |
8476 | } | |
8477 | ||
8478 | // Override old tag if we have a Tag_also_compatible_with on the output. | |
8479 | ||
8480 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
8481 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
8482 | oldtag = T(V4T_PLUS_V6_M); | |
8483 | ||
8484 | // And override the new tag if we have a Tag_also_compatible_with on the | |
8485 | // input. | |
8486 | ||
8487 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
8488 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
8489 | newtag = T(V4T_PLUS_V6_M); | |
8490 | ||
8491 | // Architectures before V6KZ add features monotonically. | |
8492 | int tagh = std::max(oldtag, newtag); | |
8493 | if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ) | |
8494 | return tagh; | |
8495 | ||
8496 | int tagl = std::min(oldtag, newtag); | |
8497 | int result = comb[tagh - T(V6T2)][tagl]; | |
8498 | ||
8499 | // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
8500 | // as the canonical version. | |
8501 | if (result == T(V4T_PLUS_V6_M)) | |
8502 | { | |
8503 | result = T(V4T); | |
8504 | *secondary_compat_out = T(V6_M); | |
8505 | } | |
8506 | else | |
8507 | *secondary_compat_out = -1; | |
8508 | ||
8509 | if (result == -1) | |
8510 | { | |
8511 | gold_error(_("%s: conflicting CPU architectures %d/%d"), | |
8512 | name, oldtag, newtag); | |
8513 | return -1; | |
8514 | } | |
8515 | ||
8516 | return result; | |
8517 | #undef T | |
8518 | } | |
8519 | ||
8520 | // Helper to print AEABI enum tag value. | |
8521 | ||
8522 | template<bool big_endian> | |
8523 | std::string | |
8524 | Target_arm<big_endian>::aeabi_enum_name(unsigned int value) | |
8525 | { | |
8526 | static const char *aeabi_enum_names[] = | |
8527 | { "", "variable-size", "32-bit", "" }; | |
8528 | const size_t aeabi_enum_names_size = | |
8529 | sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]); | |
8530 | ||
8531 | if (value < aeabi_enum_names_size) | |
8532 | return std::string(aeabi_enum_names[value]); | |
8533 | else | |
8534 | { | |
8535 | char buffer[100]; | |
8536 | sprintf(buffer, "<unknown value %u>", value); | |
8537 | return std::string(buffer); | |
8538 | } | |
8539 | } | |
8540 | ||
8541 | // Return the string value to store in TAG_CPU_name. | |
8542 | ||
8543 | template<bool big_endian> | |
8544 | std::string | |
8545 | Target_arm<big_endian>::tag_cpu_name_value(unsigned int value) | |
8546 | { | |
8547 | static const char *name_table[] = { | |
8548 | // These aren't real CPU names, but we can't guess | |
8549 | // that from the architecture version alone. | |
8550 | "Pre v4", | |
8551 | "ARM v4", | |
8552 | "ARM v4T", | |
8553 | "ARM v5T", | |
8554 | "ARM v5TE", | |
8555 | "ARM v5TEJ", | |
8556 | "ARM v6", | |
8557 | "ARM v6KZ", | |
8558 | "ARM v6T2", | |
8559 | "ARM v6K", | |
8560 | "ARM v7", | |
8561 | "ARM v6-M", | |
8562 | "ARM v6S-M", | |
8563 | "ARM v7E-M" | |
8564 | }; | |
8565 | const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]); | |
8566 | ||
8567 | if (value < name_table_size) | |
8568 | return std::string(name_table[value]); | |
8569 | else | |
8570 | { | |
8571 | char buffer[100]; | |
8572 | sprintf(buffer, "<unknown CPU value %u>", value); | |
8573 | return std::string(buffer); | |
8574 | } | |
8575 | } | |
8576 | ||
8577 | // Merge object attributes from input file called NAME with those of the | |
8578 | // output. The input object attributes are in the object pointed by PASD. | |
8579 | ||
8580 | template<bool big_endian> | |
8581 | void | |
8582 | Target_arm<big_endian>::merge_object_attributes( | |
8583 | const char* name, | |
8584 | const Attributes_section_data* pasd) | |
8585 | { | |
8586 | // Return if there is no attributes section data. | |
8587 | if (pasd == NULL) | |
8588 | return; | |
8589 | ||
8590 | // If output has no object attributes, just copy. | |
8591 | if (this->attributes_section_data_ == NULL) | |
8592 | { | |
8593 | this->attributes_section_data_ = new Attributes_section_data(*pasd); | |
8594 | return; | |
8595 | } | |
8596 | ||
8597 | const int vendor = Object_attribute::OBJ_ATTR_PROC; | |
8598 | const Object_attribute* in_attr = pasd->known_attributes(vendor); | |
8599 | Object_attribute* out_attr = | |
8600 | this->attributes_section_data_->known_attributes(vendor); | |
8601 | ||
8602 | // This needs to happen before Tag_ABI_FP_number_model is merged. */ | |
8603 | if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value() | |
8604 | != out_attr[elfcpp::Tag_ABI_VFP_args].int_value()) | |
8605 | { | |
8606 | // Ignore mismatches if the object doesn't use floating point. */ | |
8607 | if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0) | |
8608 | out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value( | |
8609 | in_attr[elfcpp::Tag_ABI_VFP_args].int_value()); | |
8610 | else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0) | |
8611 | gold_error(_("%s uses VFP register arguments, output does not"), | |
8612 | name); | |
8613 | } | |
8614 | ||
8615 | for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i) | |
8616 | { | |
8617 | // Merge this attribute with existing attributes. | |
8618 | switch (i) | |
8619 | { | |
8620 | case elfcpp::Tag_CPU_raw_name: | |
8621 | case elfcpp::Tag_CPU_name: | |
8622 | // These are merged after Tag_CPU_arch. | |
8623 | break; | |
8624 | ||
8625 | case elfcpp::Tag_ABI_optimization_goals: | |
8626 | case elfcpp::Tag_ABI_FP_optimization_goals: | |
8627 | // Use the first value seen. | |
8628 | break; | |
8629 | ||
8630 | case elfcpp::Tag_CPU_arch: | |
8631 | { | |
8632 | unsigned int saved_out_attr = out_attr->int_value(); | |
8633 | // Merge Tag_CPU_arch and Tag_also_compatible_with. | |
8634 | int secondary_compat = | |
8635 | this->get_secondary_compatible_arch(pasd); | |
8636 | int secondary_compat_out = | |
8637 | this->get_secondary_compatible_arch( | |
8638 | this->attributes_section_data_); | |
8639 | out_attr[i].set_int_value( | |
8640 | tag_cpu_arch_combine(name, out_attr[i].int_value(), | |
8641 | &secondary_compat_out, | |
8642 | in_attr[i].int_value(), | |
8643 | secondary_compat)); | |
8644 | this->set_secondary_compatible_arch(this->attributes_section_data_, | |
8645 | secondary_compat_out); | |
8646 | ||
8647 | // Merge Tag_CPU_name and Tag_CPU_raw_name. | |
8648 | if (out_attr[i].int_value() == saved_out_attr) | |
8649 | ; // Leave the names alone. | |
8650 | else if (out_attr[i].int_value() == in_attr[i].int_value()) | |
8651 | { | |
8652 | // The output architecture has been changed to match the | |
8653 | // input architecture. Use the input names. | |
8654 | out_attr[elfcpp::Tag_CPU_name].set_string_value( | |
8655 | in_attr[elfcpp::Tag_CPU_name].string_value()); | |
8656 | out_attr[elfcpp::Tag_CPU_raw_name].set_string_value( | |
8657 | in_attr[elfcpp::Tag_CPU_raw_name].string_value()); | |
8658 | } | |
8659 | else | |
8660 | { | |
8661 | out_attr[elfcpp::Tag_CPU_name].set_string_value(""); | |
8662 | out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(""); | |
8663 | } | |
8664 | ||
8665 | // If we still don't have a value for Tag_CPU_name, | |
8666 | // make one up now. Tag_CPU_raw_name remains blank. | |
8667 | if (out_attr[elfcpp::Tag_CPU_name].string_value() == "") | |
8668 | { | |
8669 | const std::string cpu_name = | |
8670 | this->tag_cpu_name_value(out_attr[i].int_value()); | |
8671 | // FIXME: If we see an unknown CPU, this will be set | |
8672 | // to "<unknown CPU n>", where n is the attribute value. | |
8673 | // This is different from BFD, which leaves the name alone. | |
8674 | out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name); | |
8675 | } | |
8676 | } | |
8677 | break; | |
8678 | ||
8679 | case elfcpp::Tag_ARM_ISA_use: | |
8680 | case elfcpp::Tag_THUMB_ISA_use: | |
8681 | case elfcpp::Tag_WMMX_arch: | |
8682 | case elfcpp::Tag_Advanced_SIMD_arch: | |
8683 | // ??? Do Advanced_SIMD (NEON) and WMMX conflict? | |
8684 | case elfcpp::Tag_ABI_FP_rounding: | |
8685 | case elfcpp::Tag_ABI_FP_exceptions: | |
8686 | case elfcpp::Tag_ABI_FP_user_exceptions: | |
8687 | case elfcpp::Tag_ABI_FP_number_model: | |
8688 | case elfcpp::Tag_VFP_HP_extension: | |
8689 | case elfcpp::Tag_CPU_unaligned_access: | |
8690 | case elfcpp::Tag_T2EE_use: | |
8691 | case elfcpp::Tag_Virtualization_use: | |
8692 | case elfcpp::Tag_MPextension_use: | |
8693 | // Use the largest value specified. | |
8694 | if (in_attr[i].int_value() > out_attr[i].int_value()) | |
8695 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8696 | break; | |
8697 | ||
8698 | case elfcpp::Tag_ABI_align8_preserved: | |
8699 | case elfcpp::Tag_ABI_PCS_RO_data: | |
8700 | // Use the smallest value specified. | |
8701 | if (in_attr[i].int_value() < out_attr[i].int_value()) | |
8702 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8703 | break; | |
8704 | ||
8705 | case elfcpp::Tag_ABI_align8_needed: | |
8706 | if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0) | |
8707 | && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0 | |
8708 | || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value() | |
8709 | == 0))) | |
8710 | { | |
8711 | // This error message should be enabled once all non-conformant | |
8712 | // binaries in the toolchain have had the attributes set | |
8713 | // properly. | |
8714 | // gold_error(_("output 8-byte data alignment conflicts with %s"), | |
8715 | // name); | |
8716 | } | |
8717 | // Fall through. | |
8718 | case elfcpp::Tag_ABI_FP_denormal: | |
8719 | case elfcpp::Tag_ABI_PCS_GOT_use: | |
8720 | { | |
8721 | // These tags have 0 = don't care, 1 = strong requirement, | |
8722 | // 2 = weak requirement. | |
8723 | static const int order_021[3] = {0, 2, 1}; | |
8724 | ||
8725 | // Use the "greatest" from the sequence 0, 2, 1, or the largest | |
8726 | // value if greater than 2 (for future-proofing). | |
8727 | if ((in_attr[i].int_value() > 2 | |
8728 | && in_attr[i].int_value() > out_attr[i].int_value()) | |
8729 | || (in_attr[i].int_value() <= 2 | |
8730 | && out_attr[i].int_value() <= 2 | |
8731 | && (order_021[in_attr[i].int_value()] | |
8732 | > order_021[out_attr[i].int_value()]))) | |
8733 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8734 | } | |
8735 | break; | |
8736 | ||
8737 | case elfcpp::Tag_CPU_arch_profile: | |
8738 | if (out_attr[i].int_value() != in_attr[i].int_value()) | |
8739 | { | |
8740 | // 0 will merge with anything. | |
8741 | // 'A' and 'S' merge to 'A'. | |
8742 | // 'R' and 'S' merge to 'R'. | |
8743 | // 'M' and 'A|R|S' is an error. | |
8744 | if (out_attr[i].int_value() == 0 | |
8745 | || (out_attr[i].int_value() == 'S' | |
8746 | && (in_attr[i].int_value() == 'A' | |
8747 | || in_attr[i].int_value() == 'R'))) | |
8748 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8749 | else if (in_attr[i].int_value() == 0 | |
8750 | || (in_attr[i].int_value() == 'S' | |
8751 | && (out_attr[i].int_value() == 'A' | |
8752 | || out_attr[i].int_value() == 'R'))) | |
8753 | ; // Do nothing. | |
8754 | else | |
8755 | { | |
8756 | gold_error | |
8757 | (_("conflicting architecture profiles %c/%c"), | |
8758 | in_attr[i].int_value() ? in_attr[i].int_value() : '0', | |
8759 | out_attr[i].int_value() ? out_attr[i].int_value() : '0'); | |
8760 | } | |
8761 | } | |
8762 | break; | |
8763 | case elfcpp::Tag_VFP_arch: | |
8764 | { | |
8765 | static const struct | |
8766 | { | |
8767 | int ver; | |
8768 | int regs; | |
8769 | } vfp_versions[7] = | |
8770 | { | |
8771 | {0, 0}, | |
8772 | {1, 16}, | |
8773 | {2, 16}, | |
8774 | {3, 32}, | |
8775 | {3, 16}, | |
8776 | {4, 32}, | |
8777 | {4, 16} | |
8778 | }; | |
8779 | ||
8780 | // Values greater than 6 aren't defined, so just pick the | |
8781 | // biggest. | |
8782 | if (in_attr[i].int_value() > 6 | |
8783 | && in_attr[i].int_value() > out_attr[i].int_value()) | |
8784 | { | |
8785 | *out_attr = *in_attr; | |
8786 | break; | |
8787 | } | |
8788 | // The output uses the superset of input features | |
8789 | // (ISA version) and registers. | |
8790 | int ver = std::max(vfp_versions[in_attr[i].int_value()].ver, | |
8791 | vfp_versions[out_attr[i].int_value()].ver); | |
8792 | int regs = std::max(vfp_versions[in_attr[i].int_value()].regs, | |
8793 | vfp_versions[out_attr[i].int_value()].regs); | |
8794 | // This assumes all possible supersets are also a valid | |
8795 | // options. | |
8796 | int newval; | |
8797 | for (newval = 6; newval > 0; newval--) | |
8798 | { | |
8799 | if (regs == vfp_versions[newval].regs | |
8800 | && ver == vfp_versions[newval].ver) | |
8801 | break; | |
8802 | } | |
8803 | out_attr[i].set_int_value(newval); | |
8804 | } | |
8805 | break; | |
8806 | case elfcpp::Tag_PCS_config: | |
8807 | if (out_attr[i].int_value() == 0) | |
8808 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8809 | else if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0) | |
8810 | { | |
8811 | // It's sometimes ok to mix different configs, so this is only | |
8812 | // a warning. | |
8813 | gold_warning(_("%s: conflicting platform configuration"), name); | |
8814 | } | |
8815 | break; | |
8816 | case elfcpp::Tag_ABI_PCS_R9_use: | |
8817 | if (in_attr[i].int_value() != out_attr[i].int_value() | |
8818 | && out_attr[i].int_value() != elfcpp::AEABI_R9_unused | |
8819 | && in_attr[i].int_value() != elfcpp::AEABI_R9_unused) | |
8820 | { | |
8821 | gold_error(_("%s: conflicting use of R9"), name); | |
8822 | } | |
8823 | if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused) | |
8824 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8825 | break; | |
8826 | case elfcpp::Tag_ABI_PCS_RW_data: | |
8827 | if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel | |
8828 | && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() | |
8829 | != elfcpp::AEABI_R9_SB) | |
8830 | && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() | |
8831 | != elfcpp::AEABI_R9_unused)) | |
8832 | { | |
8833 | gold_error(_("%s: SB relative addressing conflicts with use " | |
8834 | "of R9"), | |
8835 | name); | |
8836 | } | |
8837 | // Use the smallest value specified. | |
8838 | if (in_attr[i].int_value() < out_attr[i].int_value()) | |
8839 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8840 | break; | |
8841 | case elfcpp::Tag_ABI_PCS_wchar_t: | |
8842 | // FIXME: Make it possible to turn off this warning. | |
8843 | if (out_attr[i].int_value() | |
8844 | && in_attr[i].int_value() | |
8845 | && out_attr[i].int_value() != in_attr[i].int_value()) | |
8846 | { | |
8847 | gold_warning(_("%s uses %u-byte wchar_t yet the output is to " | |
8848 | "use %u-byte wchar_t; use of wchar_t values " | |
8849 | "across objects may fail"), | |
8850 | name, in_attr[i].int_value(), | |
8851 | out_attr[i].int_value()); | |
8852 | } | |
8853 | else if (in_attr[i].int_value() && !out_attr[i].int_value()) | |
8854 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8855 | break; | |
8856 | case elfcpp::Tag_ABI_enum_size: | |
8857 | if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused) | |
8858 | { | |
8859 | if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused | |
8860 | || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide) | |
8861 | { | |
8862 | // The existing object is compatible with anything. | |
8863 | // Use whatever requirements the new object has. | |
8864 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8865 | } | |
8866 | // FIXME: Make it possible to turn off this warning. | |
8867 | else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide | |
8868 | && out_attr[i].int_value() != in_attr[i].int_value()) | |
8869 | { | |
8870 | unsigned int in_value = in_attr[i].int_value(); | |
8871 | unsigned int out_value = out_attr[i].int_value(); | |
8872 | gold_warning(_("%s uses %s enums yet the output is to use " | |
8873 | "%s enums; use of enum values across objects " | |
8874 | "may fail"), | |
8875 | name, | |
8876 | this->aeabi_enum_name(in_value).c_str(), | |
8877 | this->aeabi_enum_name(out_value).c_str()); | |
8878 | } | |
8879 | } | |
8880 | break; | |
8881 | case elfcpp::Tag_ABI_VFP_args: | |
8882 | // Aready done. | |
8883 | break; | |
8884 | case elfcpp::Tag_ABI_WMMX_args: | |
8885 | if (in_attr[i].int_value() != out_attr[i].int_value()) | |
8886 | { | |
8887 | gold_error(_("%s uses iWMMXt register arguments, output does " | |
8888 | "not"), | |
8889 | name); | |
8890 | } | |
8891 | break; | |
8892 | case Object_attribute::Tag_compatibility: | |
8893 | // Merged in target-independent code. | |
8894 | break; | |
8895 | case elfcpp::Tag_ABI_HardFP_use: | |
8896 | // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). | |
8897 | if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2) | |
8898 | || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1)) | |
8899 | out_attr[i].set_int_value(3); | |
8900 | else if (in_attr[i].int_value() > out_attr[i].int_value()) | |
8901 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8902 | break; | |
8903 | case elfcpp::Tag_ABI_FP_16bit_format: | |
8904 | if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0) | |
8905 | { | |
8906 | if (in_attr[i].int_value() != out_attr[i].int_value()) | |
8907 | gold_error(_("fp16 format mismatch between %s and output"), | |
8908 | name); | |
8909 | } | |
8910 | if (in_attr[i].int_value() != 0) | |
8911 | out_attr[i].set_int_value(in_attr[i].int_value()); | |
8912 | break; | |
8913 | ||
8914 | case elfcpp::Tag_nodefaults: | |
8915 | // This tag is set if it exists, but the value is unused (and is | |
8916 | // typically zero). We don't actually need to do anything here - | |
8917 | // the merge happens automatically when the type flags are merged | |
8918 | // below. | |
8919 | break; | |
8920 | case elfcpp::Tag_also_compatible_with: | |
8921 | // Already done in Tag_CPU_arch. | |
8922 | break; | |
8923 | case elfcpp::Tag_conformance: | |
8924 | // Keep the attribute if it matches. Throw it away otherwise. | |
8925 | // No attribute means no claim to conform. | |
8926 | if (in_attr[i].string_value() != out_attr[i].string_value()) | |
8927 | out_attr[i].set_string_value(""); | |
8928 | break; | |
8929 | ||
8930 | default: | |
8931 | { | |
8932 | const char* err_object = NULL; | |
8933 | ||
8934 | // The "known_obj_attributes" table does contain some undefined | |
8935 | // attributes. Ensure that there are unused. | |
8936 | if (out_attr[i].int_value() != 0 | |
8937 | || out_attr[i].string_value() != "") | |
8938 | err_object = "output"; | |
8939 | else if (in_attr[i].int_value() != 0 | |
8940 | || in_attr[i].string_value() != "") | |
8941 | err_object = name; | |
8942 | ||
8943 | if (err_object != NULL) | |
8944 | { | |
8945 | // Attribute numbers >=64 (mod 128) can be safely ignored. | |
8946 | if ((i & 127) < 64) | |
8947 | gold_error(_("%s: unknown mandatory EABI object attribute " | |
8948 | "%d"), | |
8949 | err_object, i); | |
8950 | else | |
8951 | gold_warning(_("%s: unknown EABI object attribute %d"), | |
8952 | err_object, i); | |
8953 | } | |
8954 | ||
8955 | // Only pass on attributes that match in both inputs. | |
8956 | if (!in_attr[i].matches(out_attr[i])) | |
8957 | { | |
8958 | out_attr[i].set_int_value(0); | |
8959 | out_attr[i].set_string_value(""); | |
8960 | } | |
8961 | } | |
8962 | } | |
8963 | ||
8964 | // If out_attr was copied from in_attr then it won't have a type yet. | |
8965 | if (in_attr[i].type() && !out_attr[i].type()) | |
8966 | out_attr[i].set_type(in_attr[i].type()); | |
8967 | } | |
8968 | ||
8969 | // Merge Tag_compatibility attributes and any common GNU ones. | |
8970 | this->attributes_section_data_->merge(name, pasd); | |
8971 | ||
8972 | // Check for any attributes not known on ARM. | |
8973 | typedef Vendor_object_attributes::Other_attributes Other_attributes; | |
8974 | const Other_attributes* in_other_attributes = pasd->other_attributes(vendor); | |
8975 | Other_attributes::const_iterator in_iter = in_other_attributes->begin(); | |
8976 | Other_attributes* out_other_attributes = | |
8977 | this->attributes_section_data_->other_attributes(vendor); | |
8978 | Other_attributes::iterator out_iter = out_other_attributes->begin(); | |
8979 | ||
8980 | while (in_iter != in_other_attributes->end() | |
8981 | || out_iter != out_other_attributes->end()) | |
8982 | { | |
8983 | const char* err_object = NULL; | |
8984 | int err_tag = 0; | |
8985 | ||
8986 | // The tags for each list are in numerical order. | |
8987 | // If the tags are equal, then merge. | |
8988 | if (out_iter != out_other_attributes->end() | |
8989 | && (in_iter == in_other_attributes->end() | |
8990 | || in_iter->first > out_iter->first)) | |
8991 | { | |
8992 | // This attribute only exists in output. We can't merge, and we | |
8993 | // don't know what the tag means, so delete it. | |
8994 | err_object = "output"; | |
8995 | err_tag = out_iter->first; | |
8996 | int saved_tag = out_iter->first; | |
8997 | delete out_iter->second; | |
8998 | out_other_attributes->erase(out_iter); | |
8999 | out_iter = out_other_attributes->upper_bound(saved_tag); | |
9000 | } | |
9001 | else if (in_iter != in_other_attributes->end() | |
9002 | && (out_iter != out_other_attributes->end() | |
9003 | || in_iter->first < out_iter->first)) | |
9004 | { | |
9005 | // This attribute only exists in input. We can't merge, and we | |
9006 | // don't know what the tag means, so ignore it. | |
9007 | err_object = name; | |
9008 | err_tag = in_iter->first; | |
9009 | ++in_iter; | |
9010 | } | |
9011 | else // The tags are equal. | |
9012 | { | |
9013 | // As present, all attributes in the list are unknown, and | |
9014 | // therefore can't be merged meaningfully. | |
9015 | err_object = "output"; | |
9016 | err_tag = out_iter->first; | |
9017 | ||
9018 | // Only pass on attributes that match in both inputs. | |
9019 | if (!in_iter->second->matches(*(out_iter->second))) | |
9020 | { | |
9021 | // No match. Delete the attribute. | |
9022 | int saved_tag = out_iter->first; | |
9023 | delete out_iter->second; | |
9024 | out_other_attributes->erase(out_iter); | |
9025 | out_iter = out_other_attributes->upper_bound(saved_tag); | |
9026 | } | |
9027 | else | |
9028 | { | |
9029 | // Matched. Keep the attribute and move to the next. | |
9030 | ++out_iter; | |
9031 | ++in_iter; | |
9032 | } | |
9033 | } | |
9034 | ||
9035 | if (err_object) | |
9036 | { | |
9037 | // Attribute numbers >=64 (mod 128) can be safely ignored. */ | |
9038 | if ((err_tag & 127) < 64) | |
9039 | { | |
9040 | gold_error(_("%s: unknown mandatory EABI object attribute %d"), | |
9041 | err_object, err_tag); | |
9042 | } | |
9043 | else | |
9044 | { | |
9045 | gold_warning(_("%s: unknown EABI object attribute %d"), | |
9046 | err_object, err_tag); | |
9047 | } | |
9048 | } | |
9049 | } | |
9050 | } | |
9051 | ||
55da9579 DK |
9052 | // Return whether a relocation type used the LSB to distinguish THUMB |
9053 | // addresses. | |
9054 | template<bool big_endian> | |
9055 | bool | |
9056 | Target_arm<big_endian>::reloc_uses_thumb_bit(unsigned int r_type) | |
9057 | { | |
9058 | switch (r_type) | |
9059 | { | |
9060 | case elfcpp::R_ARM_PC24: | |
9061 | case elfcpp::R_ARM_ABS32: | |
9062 | case elfcpp::R_ARM_REL32: | |
9063 | case elfcpp::R_ARM_SBREL32: | |
9064 | case elfcpp::R_ARM_THM_CALL: | |
9065 | case elfcpp::R_ARM_GLOB_DAT: | |
9066 | case elfcpp::R_ARM_JUMP_SLOT: | |
9067 | case elfcpp::R_ARM_GOTOFF32: | |
9068 | case elfcpp::R_ARM_PLT32: | |
9069 | case elfcpp::R_ARM_CALL: | |
9070 | case elfcpp::R_ARM_JUMP24: | |
9071 | case elfcpp::R_ARM_THM_JUMP24: | |
9072 | case elfcpp::R_ARM_SBREL31: | |
9073 | case elfcpp::R_ARM_PREL31: | |
9074 | case elfcpp::R_ARM_MOVW_ABS_NC: | |
9075 | case elfcpp::R_ARM_MOVW_PREL_NC: | |
9076 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: | |
9077 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: | |
9078 | case elfcpp::R_ARM_THM_JUMP19: | |
9079 | case elfcpp::R_ARM_THM_ALU_PREL_11_0: | |
9080 | case elfcpp::R_ARM_ALU_PC_G0_NC: | |
9081 | case elfcpp::R_ARM_ALU_PC_G0: | |
9082 | case elfcpp::R_ARM_ALU_PC_G1_NC: | |
9083 | case elfcpp::R_ARM_ALU_PC_G1: | |
9084 | case elfcpp::R_ARM_ALU_PC_G2: | |
9085 | case elfcpp::R_ARM_ALU_SB_G0_NC: | |
9086 | case elfcpp::R_ARM_ALU_SB_G0: | |
9087 | case elfcpp::R_ARM_ALU_SB_G1_NC: | |
9088 | case elfcpp::R_ARM_ALU_SB_G1: | |
9089 | case elfcpp::R_ARM_ALU_SB_G2: | |
9090 | case elfcpp::R_ARM_MOVW_BREL_NC: | |
9091 | case elfcpp::R_ARM_MOVW_BREL: | |
9092 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: | |
9093 | case elfcpp::R_ARM_THM_MOVW_BREL: | |
9094 | return true; | |
9095 | default: | |
9096 | return false; | |
9097 | } | |
9098 | } | |
9099 | ||
9100 | // Stub-generation methods for Target_arm. | |
9101 | ||
9102 | // Make a new Arm_input_section object. | |
9103 | ||
9104 | template<bool big_endian> | |
9105 | Arm_input_section<big_endian>* | |
9106 | Target_arm<big_endian>::new_arm_input_section( | |
2ea97941 ILT |
9107 | Relobj* relobj, |
9108 | unsigned int shndx) | |
55da9579 | 9109 | { |
5ac169d4 | 9110 | Section_id sid(relobj, shndx); |
55da9579 DK |
9111 | |
9112 | Arm_input_section<big_endian>* arm_input_section = | |
2ea97941 | 9113 | new Arm_input_section<big_endian>(relobj, shndx); |
55da9579 DK |
9114 | arm_input_section->init(); |
9115 | ||
9116 | // Register new Arm_input_section in map for look-up. | |
9117 | std::pair<typename Arm_input_section_map::iterator, bool> ins = | |
5ac169d4 | 9118 | this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section)); |
55da9579 DK |
9119 | |
9120 | // Make sure that it we have not created another Arm_input_section | |
9121 | // for this input section already. | |
9122 | gold_assert(ins.second); | |
9123 | ||
9124 | return arm_input_section; | |
9125 | } | |
9126 | ||
9127 | // Find the Arm_input_section object corresponding to the SHNDX-th input | |
9128 | // section of RELOBJ. | |
9129 | ||
9130 | template<bool big_endian> | |
9131 | Arm_input_section<big_endian>* | |
9132 | Target_arm<big_endian>::find_arm_input_section( | |
2ea97941 ILT |
9133 | Relobj* relobj, |
9134 | unsigned int shndx) const | |
55da9579 | 9135 | { |
5ac169d4 | 9136 | Section_id sid(relobj, shndx); |
55da9579 | 9137 | typename Arm_input_section_map::const_iterator p = |
5ac169d4 | 9138 | this->arm_input_section_map_.find(sid); |
55da9579 DK |
9139 | return (p != this->arm_input_section_map_.end()) ? p->second : NULL; |
9140 | } | |
9141 | ||
9142 | // Make a new stub table. | |
9143 | ||
9144 | template<bool big_endian> | |
9145 | Stub_table<big_endian>* | |
9146 | Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner) | |
9147 | { | |
2ea97941 | 9148 | Stub_table<big_endian>* stub_table = |
55da9579 | 9149 | new Stub_table<big_endian>(owner); |
2ea97941 | 9150 | this->stub_tables_.push_back(stub_table); |
55da9579 | 9151 | |
2ea97941 ILT |
9152 | stub_table->set_address(owner->address() + owner->data_size()); |
9153 | stub_table->set_file_offset(owner->offset() + owner->data_size()); | |
9154 | stub_table->finalize_data_size(); | |
55da9579 | 9155 | |
2ea97941 | 9156 | return stub_table; |
55da9579 DK |
9157 | } |
9158 | ||
eb44217c DK |
9159 | // Scan a relocation for stub generation. |
9160 | ||
9161 | template<bool big_endian> | |
9162 | void | |
9163 | Target_arm<big_endian>::scan_reloc_for_stub( | |
9164 | const Relocate_info<32, big_endian>* relinfo, | |
9165 | unsigned int r_type, | |
9166 | const Sized_symbol<32>* gsym, | |
9167 | unsigned int r_sym, | |
9168 | const Symbol_value<32>* psymval, | |
9169 | elfcpp::Elf_types<32>::Elf_Swxword addend, | |
9170 | Arm_address address) | |
9171 | { | |
2ea97941 | 9172 | typedef typename Target_arm<big_endian>::Relocate Relocate; |
eb44217c DK |
9173 | |
9174 | const Arm_relobj<big_endian>* arm_relobj = | |
9175 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); | |
9176 | ||
a2162063 ILT |
9177 | if (r_type == elfcpp::R_ARM_V4BX) |
9178 | { | |
9179 | const uint32_t reg = (addend & 0xf); | |
9b2fd367 DK |
9180 | if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING |
9181 | && reg < 0xf) | |
a2162063 ILT |
9182 | { |
9183 | // Try looking up an existing stub from a stub table. | |
9184 | Stub_table<big_endian>* stub_table = | |
9185 | arm_relobj->stub_table(relinfo->data_shndx); | |
9186 | gold_assert(stub_table != NULL); | |
9187 | ||
9188 | if (stub_table->find_arm_v4bx_stub(reg) == NULL) | |
9189 | { | |
9190 | // create a new stub and add it to stub table. | |
9191 | Arm_v4bx_stub* stub = | |
9192 | this->stub_factory().make_arm_v4bx_stub(reg); | |
9193 | gold_assert(stub != NULL); | |
9194 | stub_table->add_arm_v4bx_stub(stub); | |
9195 | } | |
9196 | } | |
9197 | ||
9198 | return; | |
9199 | } | |
9200 | ||
eb44217c DK |
9201 | bool target_is_thumb; |
9202 | Symbol_value<32> symval; | |
9203 | if (gsym != NULL) | |
9204 | { | |
9205 | // This is a global symbol. Determine if we use PLT and if the | |
9206 | // final target is THUMB. | |
2ea97941 | 9207 | if (gsym->use_plt_offset(Relocate::reloc_is_non_pic(r_type))) |
eb44217c DK |
9208 | { |
9209 | // This uses a PLT, change the symbol value. | |
9210 | symval.set_output_value(this->plt_section()->address() | |
9211 | + gsym->plt_offset()); | |
9212 | psymval = &symval; | |
9213 | target_is_thumb = false; | |
9214 | } | |
9215 | else if (gsym->is_undefined()) | |
9216 | // There is no need to generate a stub symbol is undefined. | |
9217 | return; | |
9218 | else | |
9219 | { | |
9220 | target_is_thumb = | |
9221 | ((gsym->type() == elfcpp::STT_ARM_TFUNC) | |
9222 | || (gsym->type() == elfcpp::STT_FUNC | |
9223 | && !gsym->is_undefined() | |
9224 | && ((psymval->value(arm_relobj, 0) & 1) != 0))); | |
9225 | } | |
9226 | } | |
9227 | else | |
9228 | { | |
9229 | // This is a local symbol. Determine if the final target is THUMB. | |
9230 | target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym); | |
9231 | } | |
9232 | ||
9233 | // Strip LSB if this points to a THUMB target. | |
9234 | if (target_is_thumb | |
9235 | && Target_arm<big_endian>::reloc_uses_thumb_bit(r_type) | |
9236 | && ((psymval->value(arm_relobj, 0) & 1) != 0)) | |
9237 | { | |
9238 | Arm_address stripped_value = | |
9239 | psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1); | |
9240 | symval.set_output_value(stripped_value); | |
9241 | psymval = &symval; | |
9242 | } | |
9243 | ||
9244 | // Get the symbol value. | |
9245 | Symbol_value<32>::Value value = psymval->value(arm_relobj, 0); | |
9246 | ||
9247 | // Owing to pipelining, the PC relative branches below actually skip | |
9248 | // two instructions when the branch offset is 0. | |
9249 | Arm_address destination; | |
9250 | switch (r_type) | |
9251 | { | |
9252 | case elfcpp::R_ARM_CALL: | |
9253 | case elfcpp::R_ARM_JUMP24: | |
9254 | case elfcpp::R_ARM_PLT32: | |
9255 | // ARM branches. | |
9256 | destination = value + addend + 8; | |
9257 | break; | |
9258 | case elfcpp::R_ARM_THM_CALL: | |
9259 | case elfcpp::R_ARM_THM_XPC22: | |
9260 | case elfcpp::R_ARM_THM_JUMP24: | |
9261 | case elfcpp::R_ARM_THM_JUMP19: | |
9262 | // THUMB branches. | |
9263 | destination = value + addend + 4; | |
9264 | break; | |
9265 | default: | |
9266 | gold_unreachable(); | |
9267 | } | |
9268 | ||
a120bc7f | 9269 | Reloc_stub* stub = NULL; |
eb44217c DK |
9270 | Stub_type stub_type = |
9271 | Reloc_stub::stub_type_for_reloc(r_type, address, destination, | |
9272 | target_is_thumb); | |
a120bc7f DK |
9273 | if (stub_type != arm_stub_none) |
9274 | { | |
9275 | // Try looking up an existing stub from a stub table. | |
9276 | Stub_table<big_endian>* stub_table = | |
9277 | arm_relobj->stub_table(relinfo->data_shndx); | |
9278 | gold_assert(stub_table != NULL); | |
eb44217c | 9279 | |
a120bc7f DK |
9280 | // Locate stub by destination. |
9281 | Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend); | |
eb44217c | 9282 | |
a120bc7f DK |
9283 | // Create a stub if there is not one already |
9284 | stub = stub_table->find_reloc_stub(stub_key); | |
9285 | if (stub == NULL) | |
9286 | { | |
9287 | // create a new stub and add it to stub table. | |
9288 | stub = this->stub_factory().make_reloc_stub(stub_type); | |
9289 | stub_table->add_reloc_stub(stub, stub_key); | |
9290 | } | |
9291 | ||
9292 | // Record the destination address. | |
9293 | stub->set_destination_address(destination | |
9294 | | (target_is_thumb ? 1 : 0)); | |
eb44217c DK |
9295 | } |
9296 | ||
a120bc7f DK |
9297 | // For Cortex-A8, we need to record a relocation at 4K page boundary. |
9298 | if (this->fix_cortex_a8_ | |
9299 | && (r_type == elfcpp::R_ARM_THM_JUMP24 | |
9300 | || r_type == elfcpp::R_ARM_THM_JUMP19 | |
9301 | || r_type == elfcpp::R_ARM_THM_CALL | |
9302 | || r_type == elfcpp::R_ARM_THM_XPC22) | |
9303 | && (address & 0xfffU) == 0xffeU) | |
9304 | { | |
9305 | // Found a candidate. Note we haven't checked the destination is | |
9306 | // within 4K here: if we do so (and don't create a record) we can't | |
9307 | // tell that a branch should have been relocated when scanning later. | |
9308 | this->cortex_a8_relocs_info_[address] = | |
9309 | new Cortex_a8_reloc(stub, r_type, | |
9310 | destination | (target_is_thumb ? 1 : 0)); | |
9311 | } | |
eb44217c DK |
9312 | } |
9313 | ||
9314 | // This function scans a relocation sections for stub generation. | |
9315 | // The template parameter Relocate must be a class type which provides | |
9316 | // a single function, relocate(), which implements the machine | |
9317 | // specific part of a relocation. | |
9318 | ||
9319 | // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type: | |
9320 | // SHT_REL or SHT_RELA. | |
9321 | ||
9322 | // PRELOCS points to the relocation data. RELOC_COUNT is the number | |
9323 | // of relocs. OUTPUT_SECTION is the output section. | |
9324 | // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be | |
9325 | // mapped to output offsets. | |
9326 | ||
9327 | // VIEW is the section data, VIEW_ADDRESS is its memory address, and | |
9328 | // VIEW_SIZE is the size. These refer to the input section, unless | |
9329 | // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to | |
9330 | // the output section. | |
9331 | ||
9332 | template<bool big_endian> | |
9333 | template<int sh_type> | |
9334 | void inline | |
9335 | Target_arm<big_endian>::scan_reloc_section_for_stubs( | |
9336 | const Relocate_info<32, big_endian>* relinfo, | |
9337 | const unsigned char* prelocs, | |
9338 | size_t reloc_count, | |
9339 | Output_section* output_section, | |
9340 | bool needs_special_offset_handling, | |
9341 | const unsigned char* view, | |
9342 | elfcpp::Elf_types<32>::Elf_Addr view_address, | |
9343 | section_size_type) | |
9344 | { | |
9345 | typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype; | |
9346 | const int reloc_size = | |
9347 | Reloc_types<sh_type, 32, big_endian>::reloc_size; | |
9348 | ||
9349 | Arm_relobj<big_endian>* arm_object = | |
9350 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); | |
9351 | unsigned int local_count = arm_object->local_symbol_count(); | |
9352 | ||
9353 | Comdat_behavior comdat_behavior = CB_UNDETERMINED; | |
9354 | ||
9355 | for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) | |
9356 | { | |
9357 | Reltype reloc(prelocs); | |
9358 | ||
9359 | typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); | |
9360 | unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); | |
9361 | unsigned int r_type = elfcpp::elf_r_type<32>(r_info); | |
9362 | ||
9363 | r_type = this->get_real_reloc_type(r_type); | |
9364 | ||
9365 | // Only a few relocation types need stubs. | |
9366 | if ((r_type != elfcpp::R_ARM_CALL) | |
9367 | && (r_type != elfcpp::R_ARM_JUMP24) | |
9368 | && (r_type != elfcpp::R_ARM_PLT32) | |
9369 | && (r_type != elfcpp::R_ARM_THM_CALL) | |
9370 | && (r_type != elfcpp::R_ARM_THM_XPC22) | |
9371 | && (r_type != elfcpp::R_ARM_THM_JUMP24) | |
a2162063 ILT |
9372 | && (r_type != elfcpp::R_ARM_THM_JUMP19) |
9373 | && (r_type != elfcpp::R_ARM_V4BX)) | |
eb44217c DK |
9374 | continue; |
9375 | ||
2ea97941 | 9376 | section_offset_type offset = |
eb44217c DK |
9377 | convert_to_section_size_type(reloc.get_r_offset()); |
9378 | ||
9379 | if (needs_special_offset_handling) | |
9380 | { | |
2ea97941 ILT |
9381 | offset = output_section->output_offset(relinfo->object, |
9382 | relinfo->data_shndx, | |
9383 | offset); | |
9384 | if (offset == -1) | |
eb44217c DK |
9385 | continue; |
9386 | } | |
9387 | ||
a2162063 ILT |
9388 | if (r_type == elfcpp::R_ARM_V4BX) |
9389 | { | |
9390 | // Get the BX instruction. | |
9391 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; | |
9392 | const Valtype* wv = reinterpret_cast<const Valtype*>(view + offset); | |
9393 | elfcpp::Elf_types<32>::Elf_Swxword insn = | |
9394 | elfcpp::Swap<32, big_endian>::readval(wv); | |
9395 | this->scan_reloc_for_stub(relinfo, r_type, NULL, 0, NULL, | |
9396 | insn, NULL); | |
9397 | continue; | |
9398 | } | |
9399 | ||
eb44217c DK |
9400 | // Get the addend. |
9401 | Stub_addend_reader<sh_type, big_endian> stub_addend_reader; | |
9402 | elfcpp::Elf_types<32>::Elf_Swxword addend = | |
2ea97941 | 9403 | stub_addend_reader(r_type, view + offset, reloc); |
eb44217c DK |
9404 | |
9405 | const Sized_symbol<32>* sym; | |
9406 | ||
9407 | Symbol_value<32> symval; | |
9408 | const Symbol_value<32> *psymval; | |
9409 | if (r_sym < local_count) | |
9410 | { | |
9411 | sym = NULL; | |
9412 | psymval = arm_object->local_symbol(r_sym); | |
9413 | ||
9414 | // If the local symbol belongs to a section we are discarding, | |
9415 | // and that section is a debug section, try to find the | |
9416 | // corresponding kept section and map this symbol to its | |
9417 | // counterpart in the kept section. The symbol must not | |
9418 | // correspond to a section we are folding. | |
9419 | bool is_ordinary; | |
2ea97941 | 9420 | unsigned int shndx = psymval->input_shndx(&is_ordinary); |
eb44217c | 9421 | if (is_ordinary |
2ea97941 ILT |
9422 | && shndx != elfcpp::SHN_UNDEF |
9423 | && !arm_object->is_section_included(shndx) | |
9424 | && !(relinfo->symtab->is_section_folded(arm_object, shndx))) | |
eb44217c DK |
9425 | { |
9426 | if (comdat_behavior == CB_UNDETERMINED) | |
9427 | { | |
9428 | std::string name = | |
9429 | arm_object->section_name(relinfo->data_shndx); | |
9430 | comdat_behavior = get_comdat_behavior(name.c_str()); | |
9431 | } | |
9432 | if (comdat_behavior == CB_PRETEND) | |
9433 | { | |
9434 | bool found; | |
9435 | typename elfcpp::Elf_types<32>::Elf_Addr value = | |
2ea97941 | 9436 | arm_object->map_to_kept_section(shndx, &found); |
eb44217c DK |
9437 | if (found) |
9438 | symval.set_output_value(value + psymval->input_value()); | |
9439 | else | |
9440 | symval.set_output_value(0); | |
9441 | } | |
9442 | else | |
9443 | { | |
9444 | symval.set_output_value(0); | |
9445 | } | |
9446 | symval.set_no_output_symtab_entry(); | |
9447 | psymval = &symval; | |
9448 | } | |
9449 | } | |
9450 | else | |
9451 | { | |
9452 | const Symbol* gsym = arm_object->global_symbol(r_sym); | |
9453 | gold_assert(gsym != NULL); | |
9454 | if (gsym->is_forwarder()) | |
9455 | gsym = relinfo->symtab->resolve_forwards(gsym); | |
9456 | ||
9457 | sym = static_cast<const Sized_symbol<32>*>(gsym); | |
9458 | if (sym->has_symtab_index()) | |
9459 | symval.set_output_symtab_index(sym->symtab_index()); | |
9460 | else | |
9461 | symval.set_no_output_symtab_entry(); | |
9462 | ||
9463 | // We need to compute the would-be final value of this global | |
9464 | // symbol. | |
9465 | const Symbol_table* symtab = relinfo->symtab; | |
9466 | const Sized_symbol<32>* sized_symbol = | |
9467 | symtab->get_sized_symbol<32>(gsym); | |
9468 | Symbol_table::Compute_final_value_status status; | |
9469 | Arm_address value = | |
9470 | symtab->compute_final_value<32>(sized_symbol, &status); | |
9471 | ||
9472 | // Skip this if the symbol has not output section. | |
9473 | if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION) | |
9474 | continue; | |
9475 | ||
9476 | symval.set_output_value(value); | |
9477 | psymval = &symval; | |
9478 | } | |
9479 | ||
9480 | // If symbol is a section symbol, we don't know the actual type of | |
9481 | // destination. Give up. | |
9482 | if (psymval->is_section_symbol()) | |
9483 | continue; | |
9484 | ||
9485 | this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval, | |
2ea97941 | 9486 | addend, view_address + offset); |
eb44217c DK |
9487 | } |
9488 | } | |
9489 | ||
9490 | // Scan an input section for stub generation. | |
9491 | ||
9492 | template<bool big_endian> | |
9493 | void | |
9494 | Target_arm<big_endian>::scan_section_for_stubs( | |
9495 | const Relocate_info<32, big_endian>* relinfo, | |
9496 | unsigned int sh_type, | |
9497 | const unsigned char* prelocs, | |
9498 | size_t reloc_count, | |
9499 | Output_section* output_section, | |
9500 | bool needs_special_offset_handling, | |
9501 | const unsigned char* view, | |
9502 | Arm_address view_address, | |
9503 | section_size_type view_size) | |
9504 | { | |
9505 | if (sh_type == elfcpp::SHT_REL) | |
9506 | this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>( | |
9507 | relinfo, | |
9508 | prelocs, | |
9509 | reloc_count, | |
9510 | output_section, | |
9511 | needs_special_offset_handling, | |
9512 | view, | |
9513 | view_address, | |
9514 | view_size); | |
9515 | else if (sh_type == elfcpp::SHT_RELA) | |
9516 | // We do not support RELA type relocations yet. This is provided for | |
9517 | // completeness. | |
9518 | this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>( | |
9519 | relinfo, | |
9520 | prelocs, | |
9521 | reloc_count, | |
9522 | output_section, | |
9523 | needs_special_offset_handling, | |
9524 | view, | |
9525 | view_address, | |
9526 | view_size); | |
9527 | else | |
9528 | gold_unreachable(); | |
9529 | } | |
9530 | ||
9531 | // Group input sections for stub generation. | |
9532 | // | |
9533 | // We goup input sections in an output sections so that the total size, | |
9534 | // including any padding space due to alignment is smaller than GROUP_SIZE | |
9535 | // unless the only input section in group is bigger than GROUP_SIZE already. | |
9536 | // Then an ARM stub table is created to follow the last input section | |
9537 | // in group. For each group an ARM stub table is created an is placed | |
9538 | // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further | |
9539 | // extend the group after the stub table. | |
9540 | ||
9541 | template<bool big_endian> | |
9542 | void | |
9543 | Target_arm<big_endian>::group_sections( | |
2ea97941 | 9544 | Layout* layout, |
eb44217c DK |
9545 | section_size_type group_size, |
9546 | bool stubs_always_after_branch) | |
9547 | { | |
9548 | // Group input sections and insert stub table | |
9549 | Layout::Section_list section_list; | |
2ea97941 | 9550 | layout->get_allocated_sections(§ion_list); |
eb44217c DK |
9551 | for (Layout::Section_list::const_iterator p = section_list.begin(); |
9552 | p != section_list.end(); | |
9553 | ++p) | |
9554 | { | |
9555 | Arm_output_section<big_endian>* output_section = | |
9556 | Arm_output_section<big_endian>::as_arm_output_section(*p); | |
9557 | output_section->group_sections(group_size, stubs_always_after_branch, | |
9558 | this); | |
9559 | } | |
9560 | } | |
9561 | ||
9562 | // Relaxation hook. This is where we do stub generation. | |
9563 | ||
9564 | template<bool big_endian> | |
9565 | bool | |
9566 | Target_arm<big_endian>::do_relax( | |
9567 | int pass, | |
9568 | const Input_objects* input_objects, | |
9569 | Symbol_table* symtab, | |
2ea97941 | 9570 | Layout* layout) |
eb44217c DK |
9571 | { |
9572 | // No need to generate stubs if this is a relocatable link. | |
9573 | gold_assert(!parameters->options().relocatable()); | |
9574 | ||
9575 | // If this is the first pass, we need to group input sections into | |
9576 | // stub groups. | |
2b328d4e | 9577 | bool done_exidx_fixup = false; |
eb44217c DK |
9578 | if (pass == 1) |
9579 | { | |
9580 | // Determine the stub group size. The group size is the absolute | |
9581 | // value of the parameter --stub-group-size. If --stub-group-size | |
9582 | // is passed a negative value, we restict stubs to be always after | |
9583 | // the stubbed branches. | |
9584 | int32_t stub_group_size_param = | |
9585 | parameters->options().stub_group_size(); | |
9586 | bool stubs_always_after_branch = stub_group_size_param < 0; | |
9587 | section_size_type stub_group_size = abs(stub_group_size_param); | |
9588 | ||
44272192 DK |
9589 | // The Cortex-A8 erratum fix depends on stubs not being in the same 4K |
9590 | // page as the first half of a 32-bit branch straddling two 4K pages. | |
9591 | // This is a crude way of enforcing that. | |
9592 | if (this->fix_cortex_a8_) | |
9593 | stubs_always_after_branch = true; | |
9594 | ||
eb44217c DK |
9595 | if (stub_group_size == 1) |
9596 | { | |
9597 | // Default value. | |
9598 | // Thumb branch range is +-4MB has to be used as the default | |
9599 | // maximum size (a given section can contain both ARM and Thumb | |
9600 | // code, so the worst case has to be taken into account). | |
9601 | // | |
9602 | // This value is 24K less than that, which allows for 2025 | |
9603 | // 12-byte stubs. If we exceed that, then we will fail to link. | |
9604 | // The user will have to relink with an explicit group size | |
9605 | // option. | |
9606 | stub_group_size = 4170000; | |
9607 | } | |
9608 | ||
2ea97941 | 9609 | group_sections(layout, stub_group_size, stubs_always_after_branch); |
2b328d4e DK |
9610 | |
9611 | // Also fix .ARM.exidx section coverage. | |
9612 | Output_section* os = layout->find_output_section(".ARM.exidx"); | |
9613 | if (os != NULL && os->type() == elfcpp::SHT_ARM_EXIDX) | |
9614 | { | |
9615 | Arm_output_section<big_endian>* exidx_output_section = | |
9616 | Arm_output_section<big_endian>::as_arm_output_section(os); | |
9617 | this->fix_exidx_coverage(layout, exidx_output_section, symtab); | |
9618 | done_exidx_fixup = true; | |
9619 | } | |
eb44217c DK |
9620 | } |
9621 | ||
44272192 DK |
9622 | // The Cortex-A8 stubs are sensitive to layout of code sections. At the |
9623 | // beginning of each relaxation pass, just blow away all the stubs. | |
9624 | // Alternatively, we could selectively remove only the stubs and reloc | |
9625 | // information for code sections that have moved since the last pass. | |
9626 | // That would require more book-keeping. | |
eb44217c | 9627 | typedef typename Stub_table_list::iterator Stub_table_iterator; |
a120bc7f DK |
9628 | if (this->fix_cortex_a8_) |
9629 | { | |
9630 | // Clear all Cortex-A8 reloc information. | |
9631 | for (typename Cortex_a8_relocs_info::const_iterator p = | |
9632 | this->cortex_a8_relocs_info_.begin(); | |
9633 | p != this->cortex_a8_relocs_info_.end(); | |
9634 | ++p) | |
9635 | delete p->second; | |
9636 | this->cortex_a8_relocs_info_.clear(); | |
44272192 DK |
9637 | |
9638 | // Remove all Cortex-A8 stubs. | |
9639 | for (Stub_table_iterator sp = this->stub_tables_.begin(); | |
9640 | sp != this->stub_tables_.end(); | |
9641 | ++sp) | |
9642 | (*sp)->remove_all_cortex_a8_stubs(); | |
a120bc7f DK |
9643 | } |
9644 | ||
44272192 | 9645 | // Scan relocs for relocation stubs |
eb44217c DK |
9646 | for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); |
9647 | op != input_objects->relobj_end(); | |
9648 | ++op) | |
9649 | { | |
9650 | Arm_relobj<big_endian>* arm_relobj = | |
9651 | Arm_relobj<big_endian>::as_arm_relobj(*op); | |
2ea97941 | 9652 | arm_relobj->scan_sections_for_stubs(this, symtab, layout); |
eb44217c DK |
9653 | } |
9654 | ||
2fb7225c DK |
9655 | // Check all stub tables to see if any of them have their data sizes |
9656 | // or addresses alignments changed. These are the only things that | |
9657 | // matter. | |
eb44217c | 9658 | bool any_stub_table_changed = false; |
8923b24c | 9659 | Unordered_set<const Output_section*> sections_needing_adjustment; |
eb44217c DK |
9660 | for (Stub_table_iterator sp = this->stub_tables_.begin(); |
9661 | (sp != this->stub_tables_.end()) && !any_stub_table_changed; | |
9662 | ++sp) | |
9663 | { | |
2fb7225c | 9664 | if ((*sp)->update_data_size_and_addralign()) |
8923b24c DK |
9665 | { |
9666 | // Update data size of stub table owner. | |
9667 | Arm_input_section<big_endian>* owner = (*sp)->owner(); | |
9668 | uint64_t address = owner->address(); | |
9669 | off_t offset = owner->offset(); | |
9670 | owner->reset_address_and_file_offset(); | |
9671 | owner->set_address_and_file_offset(address, offset); | |
9672 | ||
9673 | sections_needing_adjustment.insert(owner->output_section()); | |
9674 | any_stub_table_changed = true; | |
9675 | } | |
9676 | } | |
9677 | ||
9678 | // Output_section_data::output_section() returns a const pointer but we | |
9679 | // need to update output sections, so we record all output sections needing | |
9680 | // update above and scan the sections here to find out what sections need | |
9681 | // to be updated. | |
9682 | for(Layout::Section_list::const_iterator p = layout->section_list().begin(); | |
9683 | p != layout->section_list().end(); | |
9684 | ++p) | |
9685 | { | |
9686 | if (sections_needing_adjustment.find(*p) | |
9687 | != sections_needing_adjustment.end()) | |
9688 | (*p)->set_section_offsets_need_adjustment(); | |
eb44217c DK |
9689 | } |
9690 | ||
2b328d4e DK |
9691 | // Stop relaxation if no EXIDX fix-up and no stub table change. |
9692 | bool continue_relaxation = done_exidx_fixup || any_stub_table_changed; | |
9693 | ||
2fb7225c | 9694 | // Finalize the stubs in the last relaxation pass. |
2b328d4e | 9695 | if (!continue_relaxation) |
e7eca48c DK |
9696 | { |
9697 | for (Stub_table_iterator sp = this->stub_tables_.begin(); | |
9698 | (sp != this->stub_tables_.end()) && !any_stub_table_changed; | |
9699 | ++sp) | |
9700 | (*sp)->finalize_stubs(); | |
9701 | ||
9702 | // Update output local symbol counts of objects if necessary. | |
9703 | for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); | |
9704 | op != input_objects->relobj_end(); | |
9705 | ++op) | |
9706 | { | |
9707 | Arm_relobj<big_endian>* arm_relobj = | |
9708 | Arm_relobj<big_endian>::as_arm_relobj(*op); | |
9709 | ||
9710 | // Update output local symbol counts. We need to discard local | |
9711 | // symbols defined in parts of input sections that are discarded by | |
9712 | // relaxation. | |
9713 | if (arm_relobj->output_local_symbol_count_needs_update()) | |
9714 | arm_relobj->update_output_local_symbol_count(); | |
9715 | } | |
9716 | } | |
2fb7225c | 9717 | |
2b328d4e | 9718 | return continue_relaxation; |
eb44217c DK |
9719 | } |
9720 | ||
43d12afe DK |
9721 | // Relocate a stub. |
9722 | ||
9723 | template<bool big_endian> | |
9724 | void | |
9725 | Target_arm<big_endian>::relocate_stub( | |
2fb7225c | 9726 | Stub* stub, |
43d12afe DK |
9727 | const Relocate_info<32, big_endian>* relinfo, |
9728 | Output_section* output_section, | |
9729 | unsigned char* view, | |
9730 | Arm_address address, | |
9731 | section_size_type view_size) | |
9732 | { | |
9733 | Relocate relocate; | |
2ea97941 ILT |
9734 | const Stub_template* stub_template = stub->stub_template(); |
9735 | for (size_t i = 0; i < stub_template->reloc_count(); i++) | |
43d12afe | 9736 | { |
2ea97941 ILT |
9737 | size_t reloc_insn_index = stub_template->reloc_insn_index(i); |
9738 | const Insn_template* insn = &stub_template->insns()[reloc_insn_index]; | |
43d12afe DK |
9739 | |
9740 | unsigned int r_type = insn->r_type(); | |
2ea97941 | 9741 | section_size_type reloc_offset = stub_template->reloc_offset(i); |
43d12afe DK |
9742 | section_size_type reloc_size = insn->size(); |
9743 | gold_assert(reloc_offset + reloc_size <= view_size); | |
9744 | ||
9745 | // This is the address of the stub destination. | |
41263c05 | 9746 | Arm_address target = stub->reloc_target(i) + insn->reloc_addend(); |
43d12afe DK |
9747 | Symbol_value<32> symval; |
9748 | symval.set_output_value(target); | |
9749 | ||
9750 | // Synthesize a fake reloc just in case. We don't have a symbol so | |
9751 | // we use 0. | |
9752 | unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size]; | |
9753 | memset(reloc_buffer, 0, sizeof(reloc_buffer)); | |
9754 | elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer); | |
9755 | reloc_write.put_r_offset(reloc_offset); | |
9756 | reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type)); | |
9757 | elfcpp::Rel<32, big_endian> rel(reloc_buffer); | |
9758 | ||
9759 | relocate.relocate(relinfo, this, output_section, | |
9760 | this->fake_relnum_for_stubs, rel, r_type, | |
9761 | NULL, &symval, view + reloc_offset, | |
9762 | address + reloc_offset, reloc_size); | |
9763 | } | |
9764 | } | |
9765 | ||
a0351a69 DK |
9766 | // Determine whether an object attribute tag takes an integer, a |
9767 | // string or both. | |
9768 | ||
9769 | template<bool big_endian> | |
9770 | int | |
9771 | Target_arm<big_endian>::do_attribute_arg_type(int tag) const | |
9772 | { | |
9773 | if (tag == Object_attribute::Tag_compatibility) | |
9774 | return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL | |
9775 | | Object_attribute::ATTR_TYPE_FLAG_STR_VAL); | |
9776 | else if (tag == elfcpp::Tag_nodefaults) | |
9777 | return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL | |
9778 | | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT); | |
9779 | else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name) | |
9780 | return Object_attribute::ATTR_TYPE_FLAG_STR_VAL; | |
9781 | else if (tag < 32) | |
9782 | return Object_attribute::ATTR_TYPE_FLAG_INT_VAL; | |
9783 | else | |
9784 | return ((tag & 1) != 0 | |
9785 | ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL | |
9786 | : Object_attribute::ATTR_TYPE_FLAG_INT_VAL); | |
9787 | } | |
9788 | ||
9789 | // Reorder attributes. | |
9790 | // | |
9791 | // The ABI defines that Tag_conformance should be emitted first, and that | |
9792 | // Tag_nodefaults should be second (if either is defined). This sets those | |
9793 | // two positions, and bumps up the position of all the remaining tags to | |
9794 | // compensate. | |
9795 | ||
9796 | template<bool big_endian> | |
9797 | int | |
9798 | Target_arm<big_endian>::do_attributes_order(int num) const | |
9799 | { | |
9800 | // Reorder the known object attributes in output. We want to move | |
9801 | // Tag_conformance to position 4 and Tag_conformance to position 5 | |
9802 | // and shift eveything between 4 .. Tag_conformance - 1 to make room. | |
9803 | if (num == 4) | |
9804 | return elfcpp::Tag_conformance; | |
9805 | if (num == 5) | |
9806 | return elfcpp::Tag_nodefaults; | |
9807 | if ((num - 2) < elfcpp::Tag_nodefaults) | |
9808 | return num - 2; | |
9809 | if ((num - 1) < elfcpp::Tag_conformance) | |
9810 | return num - 1; | |
9811 | return num; | |
9812 | } | |
4a657b0d | 9813 | |
44272192 DK |
9814 | // Scan a span of THUMB code for Cortex-A8 erratum. |
9815 | ||
9816 | template<bool big_endian> | |
9817 | void | |
9818 | Target_arm<big_endian>::scan_span_for_cortex_a8_erratum( | |
9819 | Arm_relobj<big_endian>* arm_relobj, | |
9820 | unsigned int shndx, | |
9821 | section_size_type span_start, | |
9822 | section_size_type span_end, | |
9823 | const unsigned char* view, | |
9824 | Arm_address address) | |
9825 | { | |
9826 | // Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
9827 | // | |
9828 | // The opcode is BLX.W, BL.W, B.W, Bcc.W | |
9829 | // The branch target is in the same 4KB region as the | |
9830 | // first half of the branch. | |
9831 | // The instruction before the branch is a 32-bit | |
9832 | // length non-branch instruction. | |
9833 | section_size_type i = span_start; | |
9834 | bool last_was_32bit = false; | |
9835 | bool last_was_branch = false; | |
9836 | while (i < span_end) | |
9837 | { | |
9838 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
9839 | const Valtype* wv = reinterpret_cast<const Valtype*>(view + i); | |
9840 | uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv); | |
9841 | bool is_blx = false, is_b = false; | |
9842 | bool is_bl = false, is_bcc = false; | |
9843 | ||
9844 | bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000; | |
9845 | if (insn_32bit) | |
9846 | { | |
9847 | // Load the rest of the insn (in manual-friendly order). | |
9848 | insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
9849 | ||
9850 | // Encoding T4: B<c>.W. | |
9851 | is_b = (insn & 0xf800d000U) == 0xf0009000U; | |
9852 | // Encoding T1: BL<c>.W. | |
9853 | is_bl = (insn & 0xf800d000U) == 0xf000d000U; | |
9854 | // Encoding T2: BLX<c>.W. | |
9855 | is_blx = (insn & 0xf800d000U) == 0xf000c000U; | |
9856 | // Encoding T3: B<c>.W (not permitted in IT block). | |
9857 | is_bcc = ((insn & 0xf800d000U) == 0xf0008000U | |
9858 | && (insn & 0x07f00000U) != 0x03800000U); | |
9859 | } | |
9860 | ||
9861 | bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
9862 | ||
9863 | // If this instruction is a 32-bit THUMB branch that crosses a 4K | |
9864 | // page boundary and it follows 32-bit non-branch instruction, | |
9865 | // we need to work around. | |
9866 | if (is_32bit_branch | |
9867 | && ((address + i) & 0xfffU) == 0xffeU | |
9868 | && last_was_32bit | |
9869 | && !last_was_branch) | |
9870 | { | |
9871 | // Check to see if there is a relocation stub for this branch. | |
9872 | bool force_target_arm = false; | |
9873 | bool force_target_thumb = false; | |
9874 | const Cortex_a8_reloc* cortex_a8_reloc = NULL; | |
9875 | Cortex_a8_relocs_info::const_iterator p = | |
9876 | this->cortex_a8_relocs_info_.find(address + i); | |
9877 | ||
9878 | if (p != this->cortex_a8_relocs_info_.end()) | |
9879 | { | |
9880 | cortex_a8_reloc = p->second; | |
9881 | bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0; | |
9882 | ||
9883 | if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL | |
9884 | && !target_is_thumb) | |
9885 | force_target_arm = true; | |
9886 | else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL | |
9887 | && target_is_thumb) | |
9888 | force_target_thumb = true; | |
9889 | } | |
9890 | ||
9891 | off_t offset; | |
9892 | Stub_type stub_type = arm_stub_none; | |
9893 | ||
9894 | // Check if we have an offending branch instruction. | |
9895 | uint16_t upper_insn = (insn >> 16) & 0xffffU; | |
9896 | uint16_t lower_insn = insn & 0xffffU; | |
9897 | typedef struct Arm_relocate_functions<big_endian> RelocFuncs; | |
9898 | ||
9899 | if (cortex_a8_reloc != NULL | |
9900 | && cortex_a8_reloc->reloc_stub() != NULL) | |
9901 | // We've already made a stub for this instruction, e.g. | |
9902 | // it's a long branch or a Thumb->ARM stub. Assume that | |
9903 | // stub will suffice to work around the A8 erratum (see | |
9904 | // setting of always_after_branch above). | |
9905 | ; | |
9906 | else if (is_bcc) | |
9907 | { | |
9908 | offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn, | |
9909 | lower_insn); | |
9910 | stub_type = arm_stub_a8_veneer_b_cond; | |
9911 | } | |
9912 | else if (is_b || is_bl || is_blx) | |
9913 | { | |
9914 | offset = RelocFuncs::thumb32_branch_offset(upper_insn, | |
9915 | lower_insn); | |
9916 | if (is_blx) | |
9917 | offset &= ~3; | |
9918 | ||
9919 | stub_type = (is_blx | |
9920 | ? arm_stub_a8_veneer_blx | |
9921 | : (is_bl | |
9922 | ? arm_stub_a8_veneer_bl | |
9923 | : arm_stub_a8_veneer_b)); | |
9924 | } | |
9925 | ||
9926 | if (stub_type != arm_stub_none) | |
9927 | { | |
9928 | Arm_address pc_for_insn = address + i + 4; | |
9929 | ||
9930 | // The original instruction is a BL, but the target is | |
9931 | // an ARM instruction. If we were not making a stub, | |
9932 | // the BL would have been converted to a BLX. Use the | |
9933 | // BLX stub instead in that case. | |
9934 | if (this->may_use_blx() && force_target_arm | |
9935 | && stub_type == arm_stub_a8_veneer_bl) | |
9936 | { | |
9937 | stub_type = arm_stub_a8_veneer_blx; | |
9938 | is_blx = true; | |
9939 | is_bl = false; | |
9940 | } | |
9941 | // Conversely, if the original instruction was | |
9942 | // BLX but the target is Thumb mode, use the BL stub. | |
9943 | else if (force_target_thumb | |
9944 | && stub_type == arm_stub_a8_veneer_blx) | |
9945 | { | |
9946 | stub_type = arm_stub_a8_veneer_bl; | |
9947 | is_blx = false; | |
9948 | is_bl = true; | |
9949 | } | |
9950 | ||
9951 | if (is_blx) | |
9952 | pc_for_insn &= ~3; | |
9953 | ||
9954 | // If we found a relocation, use the proper destination, | |
9955 | // not the offset in the (unrelocated) instruction. | |
9956 | // Note this is always done if we switched the stub type above. | |
9957 | if (cortex_a8_reloc != NULL) | |
9958 | offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn); | |
9959 | ||
9960 | Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1); | |
9961 | ||
9962 | // Add a new stub if destination address in in the same page. | |
9963 | if (((address + i) & ~0xfffU) == (target & ~0xfffU)) | |
9964 | { | |
9965 | Cortex_a8_stub* stub = | |
9966 | this->stub_factory_.make_cortex_a8_stub(stub_type, | |
9967 | arm_relobj, shndx, | |
9968 | address + i, | |
9969 | target, insn); | |
9970 | Stub_table<big_endian>* stub_table = | |
9971 | arm_relobj->stub_table(shndx); | |
9972 | gold_assert(stub_table != NULL); | |
9973 | stub_table->add_cortex_a8_stub(address + i, stub); | |
9974 | } | |
9975 | } | |
9976 | } | |
9977 | ||
9978 | i += insn_32bit ? 4 : 2; | |
9979 | last_was_32bit = insn_32bit; | |
9980 | last_was_branch = is_32bit_branch; | |
9981 | } | |
9982 | } | |
9983 | ||
41263c05 DK |
9984 | // Apply the Cortex-A8 workaround. |
9985 | ||
9986 | template<bool big_endian> | |
9987 | void | |
9988 | Target_arm<big_endian>::apply_cortex_a8_workaround( | |
9989 | const Cortex_a8_stub* stub, | |
9990 | Arm_address stub_address, | |
9991 | unsigned char* insn_view, | |
9992 | Arm_address insn_address) | |
9993 | { | |
9994 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; | |
9995 | Valtype* wv = reinterpret_cast<Valtype*>(insn_view); | |
9996 | Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); | |
9997 | Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); | |
9998 | off_t branch_offset = stub_address - (insn_address + 4); | |
9999 | ||
10000 | typedef struct Arm_relocate_functions<big_endian> RelocFuncs; | |
10001 | switch (stub->stub_template()->type()) | |
10002 | { | |
10003 | case arm_stub_a8_veneer_b_cond: | |
10004 | gold_assert(!utils::has_overflow<21>(branch_offset)); | |
10005 | upper_insn = RelocFuncs::thumb32_cond_branch_upper(upper_insn, | |
10006 | branch_offset); | |
10007 | lower_insn = RelocFuncs::thumb32_cond_branch_lower(lower_insn, | |
10008 | branch_offset); | |
10009 | break; | |
10010 | ||
10011 | case arm_stub_a8_veneer_b: | |
10012 | case arm_stub_a8_veneer_bl: | |
10013 | case arm_stub_a8_veneer_blx: | |
10014 | if ((lower_insn & 0x5000U) == 0x4000U) | |
10015 | // For a BLX instruction, make sure that the relocation is | |
10016 | // rounded up to a word boundary. This follows the semantics of | |
10017 | // the instruction which specifies that bit 1 of the target | |
10018 | // address will come from bit 1 of the base address. | |
10019 | branch_offset = (branch_offset + 2) & ~3; | |
10020 | ||
10021 | // Put BRANCH_OFFSET back into the insn. | |
10022 | gold_assert(!utils::has_overflow<25>(branch_offset)); | |
10023 | upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset); | |
10024 | lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset); | |
10025 | break; | |
10026 | ||
10027 | default: | |
10028 | gold_unreachable(); | |
10029 | } | |
10030 | ||
10031 | // Put the relocated value back in the object file: | |
10032 | elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); | |
10033 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); | |
10034 | } | |
10035 | ||
4a657b0d DK |
10036 | template<bool big_endian> |
10037 | class Target_selector_arm : public Target_selector | |
10038 | { | |
10039 | public: | |
10040 | Target_selector_arm() | |
10041 | : Target_selector(elfcpp::EM_ARM, 32, big_endian, | |
10042 | (big_endian ? "elf32-bigarm" : "elf32-littlearm")) | |
10043 | { } | |
10044 | ||
10045 | Target* | |
10046 | do_instantiate_target() | |
10047 | { return new Target_arm<big_endian>(); } | |
10048 | }; | |
10049 | ||
2b328d4e DK |
10050 | // Fix .ARM.exidx section coverage. |
10051 | ||
10052 | template<bool big_endian> | |
10053 | void | |
10054 | Target_arm<big_endian>::fix_exidx_coverage( | |
10055 | Layout* layout, | |
10056 | Arm_output_section<big_endian>* exidx_section, | |
10057 | Symbol_table* symtab) | |
10058 | { | |
10059 | // We need to look at all the input sections in output in ascending | |
10060 | // order of of output address. We do that by building a sorted list | |
10061 | // of output sections by addresses. Then we looks at the output sections | |
10062 | // in order. The input sections in an output section are already sorted | |
10063 | // by addresses within the output section. | |
10064 | ||
10065 | typedef std::set<Output_section*, output_section_address_less_than> | |
10066 | Sorted_output_section_list; | |
10067 | Sorted_output_section_list sorted_output_sections; | |
10068 | Layout::Section_list section_list; | |
10069 | layout->get_allocated_sections(§ion_list); | |
10070 | for (Layout::Section_list::const_iterator p = section_list.begin(); | |
10071 | p != section_list.end(); | |
10072 | ++p) | |
10073 | { | |
10074 | // We only care about output sections that contain executable code. | |
10075 | if (((*p)->flags() & elfcpp::SHF_EXECINSTR) != 0) | |
10076 | sorted_output_sections.insert(*p); | |
10077 | } | |
10078 | ||
10079 | // Go over the output sections in ascending order of output addresses. | |
10080 | typedef typename Arm_output_section<big_endian>::Text_section_list | |
10081 | Text_section_list; | |
10082 | Text_section_list sorted_text_sections; | |
10083 | for(typename Sorted_output_section_list::iterator p = | |
10084 | sorted_output_sections.begin(); | |
10085 | p != sorted_output_sections.end(); | |
10086 | ++p) | |
10087 | { | |
10088 | Arm_output_section<big_endian>* arm_output_section = | |
10089 | Arm_output_section<big_endian>::as_arm_output_section(*p); | |
10090 | arm_output_section->append_text_sections_to_list(&sorted_text_sections); | |
10091 | } | |
10092 | ||
10093 | exidx_section->fix_exidx_coverage(sorted_text_sections, symtab); | |
10094 | } | |
10095 | ||
4a657b0d DK |
10096 | Target_selector_arm<false> target_selector_arm; |
10097 | Target_selector_arm<true> target_selector_armbe; | |
10098 | ||
10099 | } // End anonymous namespace. |