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[binutils][aarch64] New sve_size_sd2 iclass.
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
0a57e14f
MM		 12019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
2
3 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
4
c469c864
MM		 52019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
6
7 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
8
116adc27
MM		 92019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
10
11 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
12
3bd82c86
MM		 132019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
14
15 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
16
adccc507
MM		 172019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
18
19 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
20
7ce2460a
MM		 212019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
22
23 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
24 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
25 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
26 feature macros.
27
41cee089
FS		 282019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
29 Faraz Shahbazker <fshahbazker@wavecomp.com>
30
31 * opcode/mips.h (ASE_EVA_R6): New macro.
32 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
33
b83b4b13
SD		 342019-05-01 Sudakshina Das <sudi.das@arm.com>
35
36 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
37 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
38
a45328b9
AB		 392019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
40 Faraz Shahbazker <fshahbazker@wavecomp.com>
41
42 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
43 (M_SCWP_AB, M_SCDP_AB): Likewise.
44
cd092337
MR		 452019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
46
47 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
48
1889da70
AV		 492019-04-15 Sudakshina Das <sudi.das@arm.com>
50
51 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
52
1caf72a5
AV		 532019-04-15 Sudakshina Das <sudi.das@arm.com>
54
55 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
56
e5d6e09e
AV		 572019-04-15 Sudakshina Das <sudi.das@arm.com>
58
59 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
60
031254f2
AV		 612019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
62
63 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
64 (MAX_TAG_CPU_ARCH): Set value to above macro.
65 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
66 (ARM_AEXT_V8_1M_MAIN): Likewise.
67 (ARM_AEXT2_V8_1M_MAIN): Likewise.
68 (ARM_ARCH_V8_1M_MAIN): Likewise.
69
bd7ceb8d
SD		 702019-04-11 Sudakshina Das <sudi.das@arm.com>
71
72 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
73
462cac58
L		 742019-04-08 H.J. Lu <hongjiu.lu@intel.com>
75
76 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
77
07ffcfec
AM		 782019-04-07 Alan Modra <amodra@gmail.com>
79
80 Merge from gcc.
81 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
82 PR89877
83 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
84 (sub_ddmmss): Likewise.
85
5b9c07b2
L		 862019-04-06 H.J. Lu <hongjiu.lu@intel.com>
87
88 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
89
34ef62f4
AV		 902019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
91
92 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
93 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
94 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
95 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
96 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
97 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
98 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
99 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
100
96a86c01
AM		 1012019-03-28 Alan Modra <amodra@gmail.com>
102
103 PR 24390
104 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
105
53b2f36b
TC		 1062019-03-25 Tamar Christina <tamar.christina@arm.com>
107
108 * dis-asm.h (struct disassemble_info): Add stop_offset.
109
1dbade74
SD		 1102019-03-13 Sudakshina Das <sudi.das@arm.com>
111
112 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
113
37c18eed
SD		 1142019-03-13 Sudakshina Das <sudi.das@arm.com>
115 Szabolcs Nagy <szabolcs.nagy@arm.com>
116
117 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
118
cd702818
SD		 1192019-03-13 Sudakshina Das <sudi.das@arm.com>
120
121 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
122 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
123 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
124
e6c3b5bf
AH		 1252019-02-20 Alan Hayward <alan.hayward@arm.com>
126
127 * elf/common.h (NT_ARM_PAC_MASK): Add define.
128
91d78b81
SJ		 1292019-02-15 Saagar Jha <saagar@saagarjha.com>
130
131 * mach-o/loader.h: Use new OS names in comments.
132
e2077304 1332019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
134
135 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
136 (splay_tree_delete_value_fn): Likewise.
137
fc60b8c8
AK		 1382019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
139
140 * opcode/s390.h (enum s390_opcode_cpu_val): Add
141 S390_OPCODE_ARCH13.
142
550fd7bf
SD		 1432019-01-25 Sudakshina Das <sudi.das@arm.com>
144 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
145
146 * opcode/aarch64.h (enum aarch64_opnd): Remove
147 AARCH64_OPND_ADDR_SIMPLE_2.
148 (enum aarch64_insn_class): Remove ldstgv_indexed.
149
71ba91e1
TT		 1502019-01-22 Tom Tromey <tom@tromey.com>
151
152 * coff/ecoff.h: Include coff/sym.h.
153
f974f26c
NC		 1542018-06-24 Nick Clifton <nickc@redhat.com>
155
156 2.32 branch created.
157
2dc8dd17
JW		 1582019-01-16 Kito Cheng <kito@andestech.com>
159
160 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
161 (Tag_RISCV_arch): Likewise.
162 (Tag_RISCV_priv_spec): Likewise.
163 (Tag_RISCV_priv_spec_minor): Likewise.
164 (Tag_RISCV_priv_spec_revision): Likewise.
165 (Tag_RISCV_unaligned_access): Likewise.
166 (Tag_RISCV_stack_align): Likewise.
167
8f0a2148
ПК		 1682019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
169
170 * dis-asm.h: include <string.h>
171
1910070b
NC		 1722019-01-10 Nick Clifton <nickc@redhat.com>
173
174 * Merge from GCC:
175 2018-12-22 Jason Merrill <jason@redhat.com>
176
177 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
178 ARM, HP, and EDG demangling styles.
179
a08da33e
SL		 1802019-01-09 Sandra Loosemore <sandra@codesourcery.com>
181
182 Merge from GCC:
183 PR other/16615
184
185 * libiberty.h: Mechanically replace "can not" with "cannot".
186 * plugin-api.h: Likewise.
187
59581069
YS		 1882018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
189
190 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
191 (E_FLAG_RX_V3): New RXv3 type.
192 * opcode/rx.h (RX_Size): Add double size.
193 (RX_Operand_Type): Add double FPU registers.
194 (RX_Opcode_ID): Add new instuctions.
195
82704155
AM		 1962019-01-01 Alan Modra <amodra@gmail.com>
197
198 Update year range in copyright notice of all files.
199
d5c04e1b 200For older changes see ChangeLog-2018
3499769a 201\f
d5c04e1b 202Copyright (C) 2019 Free Software Foundation, Inc.
3499769a
AM		 203
204Copying and distribution of this file, with or without modification,
205are permitted in any medium without royalty provided the copyright
206notice and this notice are preserved.
207
208Local Variables:
209mode: change-log
210left-margin: 8
211fill-column: 74
212version-control: never
213End:
GDB Binutils - Deliverables
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