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1da177e4 LT |
1 | #ifndef _ASM_GENERIC_PGTABLE_H |
2 | #define _ASM_GENERIC_PGTABLE_H | |
3 | ||
673eae82 RR |
4 | #ifndef __ASSEMBLY__ |
5 | ||
1da177e4 LT |
6 | #ifndef __HAVE_ARCH_PTEP_ESTABLISH |
7 | /* | |
8 | * Establish a new mapping: | |
9 | * - flush the old one | |
10 | * - update the page tables | |
11 | * - inform the TLB about the new one | |
12 | * | |
b8072f09 | 13 | * We hold the mm semaphore for reading, and the pte lock. |
1da177e4 LT |
14 | * |
15 | * Note: the old pte is known to not be writable, so we don't need to | |
16 | * worry about dirty bits etc getting lost. | |
17 | */ | |
18 | #ifndef __HAVE_ARCH_SET_PTE_ATOMIC | |
19 | #define ptep_establish(__vma, __address, __ptep, __entry) \ | |
20 | do { \ | |
21 | set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ | |
22 | flush_tlb_page(__vma, __address); \ | |
23 | } while (0) | |
24 | #else /* __HAVE_ARCH_SET_PTE_ATOMIC */ | |
25 | #define ptep_establish(__vma, __address, __ptep, __entry) \ | |
26 | do { \ | |
27 | set_pte_atomic(__ptep, __entry); \ | |
28 | flush_tlb_page(__vma, __address); \ | |
29 | } while (0) | |
30 | #endif /* __HAVE_ARCH_SET_PTE_ATOMIC */ | |
31 | #endif | |
32 | ||
33 | #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | |
34 | /* | |
35 | * Largely same as above, but only sets the access flags (dirty, | |
36 | * accessed, and writable). Furthermore, we know it always gets set | |
37 | * to a "more permissive" setting, which allows most architectures | |
38 | * to optimize this. | |
39 | */ | |
40 | #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ | |
41 | do { \ | |
42 | set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ | |
43 | flush_tlb_page(__vma, __address); \ | |
44 | } while (0) | |
45 | #endif | |
46 | ||
47 | #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
48 | #define ptep_test_and_clear_young(__vma, __address, __ptep) \ | |
49 | ({ \ | |
50 | pte_t __pte = *(__ptep); \ | |
51 | int r = 1; \ | |
52 | if (!pte_young(__pte)) \ | |
53 | r = 0; \ | |
54 | else \ | |
55 | set_pte_at((__vma)->vm_mm, (__address), \ | |
56 | (__ptep), pte_mkold(__pte)); \ | |
57 | r; \ | |
58 | }) | |
59 | #endif | |
60 | ||
61 | #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
62 | #define ptep_clear_flush_young(__vma, __address, __ptep) \ | |
63 | ({ \ | |
64 | int __young; \ | |
65 | __young = ptep_test_and_clear_young(__vma, __address, __ptep); \ | |
66 | if (__young) \ | |
67 | flush_tlb_page(__vma, __address); \ | |
68 | __young; \ | |
69 | }) | |
70 | #endif | |
71 | ||
72 | #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY | |
73 | #define ptep_test_and_clear_dirty(__vma, __address, __ptep) \ | |
74 | ({ \ | |
75 | pte_t __pte = *__ptep; \ | |
76 | int r = 1; \ | |
77 | if (!pte_dirty(__pte)) \ | |
78 | r = 0; \ | |
79 | else \ | |
80 | set_pte_at((__vma)->vm_mm, (__address), (__ptep), \ | |
81 | pte_mkclean(__pte)); \ | |
82 | r; \ | |
83 | }) | |
84 | #endif | |
85 | ||
86 | #ifndef __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH | |
87 | #define ptep_clear_flush_dirty(__vma, __address, __ptep) \ | |
88 | ({ \ | |
89 | int __dirty; \ | |
90 | __dirty = ptep_test_and_clear_dirty(__vma, __address, __ptep); \ | |
91 | if (__dirty) \ | |
92 | flush_tlb_page(__vma, __address); \ | |
93 | __dirty; \ | |
94 | }) | |
95 | #endif | |
96 | ||
97 | #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
98 | #define ptep_get_and_clear(__mm, __address, __ptep) \ | |
99 | ({ \ | |
100 | pte_t __pte = *(__ptep); \ | |
101 | pte_clear((__mm), (__address), (__ptep)); \ | |
102 | __pte; \ | |
103 | }) | |
104 | #endif | |
105 | ||
a600388d ZA |
106 | #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL |
107 | #define ptep_get_and_clear_full(__mm, __address, __ptep, __full) \ | |
108 | ({ \ | |
109 | pte_t __pte; \ | |
110 | __pte = ptep_get_and_clear((__mm), (__address), (__ptep)); \ | |
111 | __pte; \ | |
112 | }) | |
113 | #endif | |
114 | ||
115 | #ifndef __HAVE_ARCH_PTE_CLEAR_FULL | |
116 | #define pte_clear_full(__mm, __address, __ptep, __full) \ | |
117 | do { \ | |
118 | pte_clear((__mm), (__address), (__ptep)); \ | |
119 | } while (0) | |
120 | #endif | |
121 | ||
1da177e4 LT |
122 | #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH |
123 | #define ptep_clear_flush(__vma, __address, __ptep) \ | |
124 | ({ \ | |
125 | pte_t __pte; \ | |
126 | __pte = ptep_get_and_clear((__vma)->vm_mm, __address, __ptep); \ | |
127 | flush_tlb_page(__vma, __address); \ | |
128 | __pte; \ | |
129 | }) | |
130 | #endif | |
131 | ||
132 | #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT | |
8c65b4a6 | 133 | struct mm_struct; |
1da177e4 LT |
134 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) |
135 | { | |
136 | pte_t old_pte = *ptep; | |
137 | set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); | |
138 | } | |
139 | #endif | |
140 | ||
141 | #ifndef __HAVE_ARCH_PTE_SAME | |
142 | #define pte_same(A,B) (pte_val(A) == pte_val(B)) | |
143 | #endif | |
144 | ||
145 | #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY | |
146 | #define page_test_and_clear_dirty(page) (0) | |
b4955ce3 AK |
147 | #define pte_maybe_dirty(pte) pte_dirty(pte) |
148 | #else | |
149 | #define pte_maybe_dirty(pte) (1) | |
1da177e4 LT |
150 | #endif |
151 | ||
152 | #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG | |
153 | #define page_test_and_clear_young(page) (0) | |
154 | #endif | |
155 | ||
156 | #ifndef __HAVE_ARCH_PGD_OFFSET_GATE | |
157 | #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) | |
158 | #endif | |
159 | ||
160 | #ifndef __HAVE_ARCH_LAZY_MMU_PROT_UPDATE | |
161 | #define lazy_mmu_prot_update(pte) do { } while (0) | |
162 | #endif | |
163 | ||
0b0968a3 | 164 | #ifndef __HAVE_ARCH_MOVE_PTE |
8b1f3124 | 165 | #define move_pte(pte, prot, old_addr, new_addr) (pte) |
8b1f3124 NP |
166 | #endif |
167 | ||
1da177e4 | 168 | /* |
8f6c99c1 HD |
169 | * When walking page tables, get the address of the next boundary, |
170 | * or the end address of the range if that comes earlier. Although no | |
171 | * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. | |
1da177e4 LT |
172 | */ |
173 | ||
1da177e4 LT |
174 | #define pgd_addr_end(addr, end) \ |
175 | ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ | |
176 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
177 | }) | |
1da177e4 LT |
178 | |
179 | #ifndef pud_addr_end | |
180 | #define pud_addr_end(addr, end) \ | |
181 | ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ | |
182 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
183 | }) | |
184 | #endif | |
185 | ||
186 | #ifndef pmd_addr_end | |
187 | #define pmd_addr_end(addr, end) \ | |
188 | ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ | |
189 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
190 | }) | |
191 | #endif | |
192 | ||
1da177e4 LT |
193 | /* |
194 | * When walking page tables, we usually want to skip any p?d_none entries; | |
195 | * and any p?d_bad entries - reporting the error before resetting to none. | |
196 | * Do the tests inline, but report and clear the bad entry in mm/memory.c. | |
197 | */ | |
198 | void pgd_clear_bad(pgd_t *); | |
199 | void pud_clear_bad(pud_t *); | |
200 | void pmd_clear_bad(pmd_t *); | |
201 | ||
202 | static inline int pgd_none_or_clear_bad(pgd_t *pgd) | |
203 | { | |
204 | if (pgd_none(*pgd)) | |
205 | return 1; | |
206 | if (unlikely(pgd_bad(*pgd))) { | |
207 | pgd_clear_bad(pgd); | |
208 | return 1; | |
209 | } | |
210 | return 0; | |
211 | } | |
212 | ||
213 | static inline int pud_none_or_clear_bad(pud_t *pud) | |
214 | { | |
215 | if (pud_none(*pud)) | |
216 | return 1; | |
217 | if (unlikely(pud_bad(*pud))) { | |
218 | pud_clear_bad(pud); | |
219 | return 1; | |
220 | } | |
221 | return 0; | |
222 | } | |
223 | ||
224 | static inline int pmd_none_or_clear_bad(pmd_t *pmd) | |
225 | { | |
226 | if (pmd_none(*pmd)) | |
227 | return 1; | |
228 | if (unlikely(pmd_bad(*pmd))) { | |
229 | pmd_clear_bad(pmd); | |
230 | return 1; | |
231 | } | |
232 | return 0; | |
233 | } | |
234 | #endif /* !__ASSEMBLY__ */ | |
235 | ||
236 | #endif /* _ASM_GENERIC_PGTABLE_H */ |