Commit | Line | Data |
---|---|---|
4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
76582d0a | 23 | #include <linux/types.h> |
74315ccc | 24 | |
4a77a6cf JR |
25 | #define IOMMU_READ (1) |
26 | #define IOMMU_WRITE (2) | |
9cf06697 | 27 | #define IOMMU_CACHE (4) /* DMA cache coherency */ |
4a77a6cf | 28 | |
905d66c1 | 29 | struct iommu_ops; |
d72e31c9 | 30 | struct iommu_group; |
ff21776d | 31 | struct bus_type; |
4a77a6cf | 32 | struct device; |
4f3f8d9d | 33 | struct iommu_domain; |
ba1eabfa | 34 | struct notifier_block; |
4f3f8d9d OBC |
35 | |
36 | /* iommu fault flags */ | |
37 | #define IOMMU_FAULT_READ 0x0 | |
38 | #define IOMMU_FAULT_WRITE 0x1 | |
39 | ||
40 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 41 | struct device *, unsigned long, int, void *); |
4a77a6cf | 42 | |
0ff64f80 JR |
43 | struct iommu_domain_geometry { |
44 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
45 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
46 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
47 | }; | |
48 | ||
4a77a6cf | 49 | struct iommu_domain { |
905d66c1 | 50 | struct iommu_ops *ops; |
4a77a6cf | 51 | void *priv; |
4f3f8d9d | 52 | iommu_fault_handler_t handler; |
77ca2332 | 53 | void *handler_token; |
0ff64f80 | 54 | struct iommu_domain_geometry geometry; |
4a77a6cf JR |
55 | }; |
56 | ||
dbb9fd86 | 57 | #define IOMMU_CAP_CACHE_COHERENCY 0x1 |
323f99cb | 58 | #define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */ |
dbb9fd86 | 59 | |
0cd76dd1 | 60 | enum iommu_attr { |
0ff64f80 | 61 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 62 | DOMAIN_ATTR_PAGING, |
a8b8a88a | 63 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
64 | }; |
65 | ||
39d4ebb9 JR |
66 | #ifdef CONFIG_IOMMU_API |
67 | ||
7d3002cc OBC |
68 | /** |
69 | * struct iommu_ops - iommu ops and capabilities | |
70 | * @domain_init: init iommu domain | |
71 | * @domain_destroy: destroy iommu domain | |
72 | * @attach_dev: attach device to an iommu domain | |
73 | * @detach_dev: detach device from an iommu domain | |
74 | * @map: map a physically contiguous memory region to an iommu domain | |
75 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
76 | * @iova_to_phys: translate iova to physical address | |
77 | * @domain_has_cap: domain capabilities query | |
d72e31c9 AW |
78 | * @add_device: add device to iommu grouping |
79 | * @remove_device: remove device from iommu grouping | |
0cd76dd1 JR |
80 | * @domain_get_attr: Query domain attributes |
81 | * @domain_set_attr: Change domain attributes | |
7d3002cc OBC |
82 | * @pgsize_bitmap: bitmap of supported page sizes |
83 | */ | |
4a77a6cf JR |
84 | struct iommu_ops { |
85 | int (*domain_init)(struct iommu_domain *domain); | |
86 | void (*domain_destroy)(struct iommu_domain *domain); | |
87 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); | |
88 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 89 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
90 | phys_addr_t paddr, size_t size, int prot); |
91 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
92 | size_t size); | |
4a77a6cf JR |
93 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, |
94 | unsigned long iova); | |
dbb9fd86 SY |
95 | int (*domain_has_cap)(struct iommu_domain *domain, |
96 | unsigned long cap); | |
d72e31c9 AW |
97 | int (*add_device)(struct device *dev); |
98 | void (*remove_device)(struct device *dev); | |
1460432c | 99 | int (*device_group)(struct device *dev, unsigned int *groupid); |
0cd76dd1 JR |
100 | int (*domain_get_attr)(struct iommu_domain *domain, |
101 | enum iommu_attr attr, void *data); | |
102 | int (*domain_set_attr)(struct iommu_domain *domain, | |
103 | enum iommu_attr attr, void *data); | |
d7787d57 JR |
104 | |
105 | /* Window handling functions */ | |
106 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
107 | phys_addr_t paddr, u64 size); | |
108 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); | |
109 | ||
7d3002cc | 110 | unsigned long pgsize_bitmap; |
4a77a6cf JR |
111 | }; |
112 | ||
d72e31c9 AW |
113 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
114 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
115 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
116 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
117 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
118 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
119 | ||
ff21776d | 120 | extern int bus_set_iommu(struct bus_type *bus, struct iommu_ops *ops); |
a1b60c1c | 121 | extern bool iommu_present(struct bus_type *bus); |
905d66c1 | 122 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
4a77a6cf JR |
123 | extern void iommu_domain_free(struct iommu_domain *domain); |
124 | extern int iommu_attach_device(struct iommu_domain *domain, | |
125 | struct device *dev); | |
126 | extern void iommu_detach_device(struct iommu_domain *domain, | |
127 | struct device *dev); | |
cefc53c7 | 128 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
129 | phys_addr_t paddr, size_t size, int prot); |
130 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
131 | size_t size); | |
4a77a6cf JR |
132 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, |
133 | unsigned long iova); | |
dbb9fd86 SY |
134 | extern int iommu_domain_has_cap(struct iommu_domain *domain, |
135 | unsigned long cap); | |
4f3f8d9d | 136 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 137 | iommu_fault_handler_t handler, void *token); |
d72e31c9 AW |
138 | |
139 | extern int iommu_attach_group(struct iommu_domain *domain, | |
140 | struct iommu_group *group); | |
141 | extern void iommu_detach_group(struct iommu_domain *domain, | |
142 | struct iommu_group *group); | |
143 | extern struct iommu_group *iommu_group_alloc(void); | |
144 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
145 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
146 | void *iommu_data, | |
147 | void (*release)(void *iommu_data)); | |
148 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
149 | extern int iommu_group_add_device(struct iommu_group *group, | |
150 | struct device *dev); | |
151 | extern void iommu_group_remove_device(struct device *dev); | |
152 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
153 | int (*fn)(struct device *, void *)); | |
154 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
155 | extern void iommu_group_put(struct iommu_group *group); | |
156 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
157 | struct notifier_block *nb); | |
158 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
159 | struct notifier_block *nb); | |
160 | extern int iommu_group_id(struct iommu_group *group); | |
4f3f8d9d | 161 | |
0cd76dd1 JR |
162 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
163 | void *data); | |
164 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
165 | void *data); | |
4f3f8d9d | 166 | |
d7787d57 JR |
167 | /* Window handling function prototypes */ |
168 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
169 | phys_addr_t offset, u64 size); | |
170 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); | |
4f3f8d9d OBC |
171 | /** |
172 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
173 | * @domain: the iommu domain where the fault has happened | |
174 | * @dev: the device where the fault has happened | |
175 | * @iova: the faulting address | |
176 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
177 | * | |
178 | * This function should be called by the low-level IOMMU implementations | |
179 | * whenever IOMMU faults happen, to allow high-level users, that are | |
180 | * interested in such events, to know about them. | |
181 | * | |
182 | * This event may be useful for several possible use cases: | |
183 | * - mere logging of the event | |
184 | * - dynamic TLB/PTE loading | |
185 | * - if restarting of the faulting device is required | |
186 | * | |
187 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
188 | * PTE/TLB loading will one day be supported, implementations will be able | |
189 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
190 | * |
191 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
192 | * (though fault handlers can also return -ENOSYS, in case they want to | |
193 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
194 | */ |
195 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
196 | struct device *dev, unsigned long iova, int flags) | |
197 | { | |
0ed6d2d2 | 198 | int ret = -ENOSYS; |
4a77a6cf | 199 | |
4f3f8d9d OBC |
200 | /* |
201 | * if upper layers showed interest and installed a fault handler, | |
202 | * invoke it. | |
203 | */ | |
204 | if (domain->handler) | |
77ca2332 OBC |
205 | ret = domain->handler(domain, dev, iova, flags, |
206 | domain->handler_token); | |
4a77a6cf | 207 | |
4f3f8d9d | 208 | return ret; |
4a77a6cf JR |
209 | } |
210 | ||
4a77a6cf JR |
211 | #else /* CONFIG_IOMMU_API */ |
212 | ||
39d4ebb9 | 213 | struct iommu_ops {}; |
d72e31c9 | 214 | struct iommu_group {}; |
4a77a6cf | 215 | |
a1b60c1c | 216 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
217 | { |
218 | return false; | |
219 | } | |
220 | ||
905d66c1 | 221 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
222 | { |
223 | return NULL; | |
224 | } | |
225 | ||
226 | static inline void iommu_domain_free(struct iommu_domain *domain) | |
227 | { | |
228 | } | |
229 | ||
230 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
231 | struct device *dev) | |
232 | { | |
233 | return -ENODEV; | |
234 | } | |
235 | ||
236 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
237 | struct device *dev) | |
238 | { | |
239 | } | |
240 | ||
cefc53c7 JR |
241 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
242 | phys_addr_t paddr, int gfp_order, int prot) | |
243 | { | |
244 | return -ENODEV; | |
245 | } | |
246 | ||
247 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
248 | int gfp_order) | |
249 | { | |
250 | return -ENODEV; | |
251 | } | |
252 | ||
d7787d57 JR |
253 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
254 | u32 wnd_nr, phys_addr_t paddr, | |
255 | u64 size) | |
256 | { | |
257 | return -ENODEV; | |
258 | } | |
259 | ||
260 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
261 | u32 wnd_nr) | |
262 | { | |
263 | } | |
264 | ||
4a77a6cf JR |
265 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, |
266 | unsigned long iova) | |
267 | { | |
268 | return 0; | |
269 | } | |
270 | ||
dbb9fd86 SY |
271 | static inline int domain_has_cap(struct iommu_domain *domain, |
272 | unsigned long cap) | |
273 | { | |
274 | return 0; | |
275 | } | |
276 | ||
4f3f8d9d | 277 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 278 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
279 | { |
280 | } | |
281 | ||
bef83de5 AW |
282 | static inline int iommu_attach_group(struct iommu_domain *domain, |
283 | struct iommu_group *group) | |
d72e31c9 AW |
284 | { |
285 | return -ENODEV; | |
286 | } | |
287 | ||
bef83de5 AW |
288 | static inline void iommu_detach_group(struct iommu_domain *domain, |
289 | struct iommu_group *group) | |
d72e31c9 AW |
290 | { |
291 | } | |
292 | ||
bef83de5 | 293 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
294 | { |
295 | return ERR_PTR(-ENODEV); | |
296 | } | |
297 | ||
bef83de5 | 298 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
299 | { |
300 | return NULL; | |
301 | } | |
302 | ||
bef83de5 AW |
303 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
304 | void *iommu_data, | |
305 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
306 | { |
307 | } | |
308 | ||
bef83de5 AW |
309 | static inline int iommu_group_set_name(struct iommu_group *group, |
310 | const char *name) | |
d72e31c9 AW |
311 | { |
312 | return -ENODEV; | |
313 | } | |
314 | ||
bef83de5 AW |
315 | static inline int iommu_group_add_device(struct iommu_group *group, |
316 | struct device *dev) | |
d72e31c9 AW |
317 | { |
318 | return -ENODEV; | |
319 | } | |
320 | ||
bef83de5 | 321 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
322 | { |
323 | } | |
324 | ||
bef83de5 AW |
325 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
326 | void *data, | |
327 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
328 | { |
329 | return -ENODEV; | |
330 | } | |
331 | ||
bef83de5 | 332 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
333 | { |
334 | return NULL; | |
335 | } | |
336 | ||
bef83de5 | 337 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
338 | { |
339 | } | |
340 | ||
bef83de5 AW |
341 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
342 | struct notifier_block *nb) | |
1460432c AW |
343 | { |
344 | return -ENODEV; | |
345 | } | |
346 | ||
bef83de5 AW |
347 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
348 | struct notifier_block *nb) | |
d72e31c9 AW |
349 | { |
350 | return 0; | |
351 | } | |
352 | ||
bef83de5 | 353 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
354 | { |
355 | return -ENODEV; | |
356 | } | |
1460432c | 357 | |
0cd76dd1 JR |
358 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
359 | enum iommu_attr attr, void *data) | |
360 | { | |
361 | return -EINVAL; | |
362 | } | |
363 | ||
364 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
365 | enum iommu_attr attr, void *data) | |
366 | { | |
367 | return -EINVAL; | |
368 | } | |
369 | ||
4a77a6cf JR |
370 | #endif /* CONFIG_IOMMU_API */ |
371 | ||
372 | #endif /* __LINUX_IOMMU_H */ |