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1 | /* |
2 | * OMAP GPMC (General Purpose Memory Controller) defines | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | */ | |
9 | ||
58bc67fc | 10 | #include <linux/platform_data/gpmc-omap.h> |
e639cd5b TL |
11 | |
12 | #define GPMC_CONFIG_WP 0x00000005 | |
13 | ||
384258f2 RQ |
14 | /* IRQ numbers in GPMC IRQ domain for legacy boot use */ |
15 | #define GPMC_IRQ_FIFOEVENTENABLE 0 | |
16 | #define GPMC_IRQ_COUNT_EVENT 1 | |
e639cd5b | 17 | |
f47fcad6 RQ |
18 | /** |
19 | * gpmc_nand_ops - Interface between NAND and GPMC | |
20 | * @nand_write_buffer_empty: get the NAND write buffer empty status. | |
21 | */ | |
22 | struct gpmc_nand_ops { | |
23 | bool (*nand_writebuffer_empty)(void); | |
24 | }; | |
25 | ||
26 | struct gpmc_nand_regs; | |
27 | ||
28 | #if IS_ENABLED(CONFIG_OMAP_GPMC) | |
29 | struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, | |
30 | int cs); | |
31 | #else | |
0680b0ca RQ |
32 | static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, |
33 | int cs) | |
f47fcad6 RQ |
34 | { |
35 | return NULL; | |
36 | } | |
37 | #endif /* CONFIG_OMAP_GPMC */ | |
38 | ||
39 | /*--------------------------------*/ | |
40 | ||
41 | /* deprecated APIs */ | |
42 | #if IS_ENABLED(CONFIG_OMAP_GPMC) | |
43 | void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); | |
44 | #else | |
45 | static inline void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) | |
46 | { | |
47 | } | |
48 | #endif /* CONFIG_OMAP_GPMC */ | |
49 | /*--------------------------------*/ | |
50 | ||
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51 | extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t, |
52 | struct gpmc_settings *gpmc_s, | |
53 | struct gpmc_device_timings *dev_t); | |
54 | ||
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55 | struct device_node; |
56 | ||
e639cd5b TL |
57 | extern int gpmc_get_client_irq(unsigned irq_config); |
58 | ||
59 | extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); | |
60 | ||
61 | extern void gpmc_cs_write_reg(int cs, int idx, u32 val); | |
62 | extern int gpmc_calc_divider(unsigned int sync_clk); | |
2e676901 RA |
63 | extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, |
64 | const struct gpmc_settings *s); | |
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65 | extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p); |
66 | extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); | |
67 | extern void gpmc_cs_free(int cs); | |
68 | extern int gpmc_configure(int cmd, int wval); | |
69 | extern void gpmc_read_settings_dt(struct device_node *np, | |
70 | struct gpmc_settings *p); | |
71 | ||
72 | extern void omap3_gpmc_save_context(void); | |
73 | extern void omap3_gpmc_restore_context(void); | |
74 | ||
75 | struct gpmc_timings; | |
76 | struct omap_nand_platform_data; | |
77 | struct omap_onenand_platform_data; | |
78 | ||
79 | #if IS_ENABLED(CONFIG_MTD_NAND_OMAP2) | |
80 | extern int gpmc_nand_init(struct omap_nand_platform_data *d, | |
81 | struct gpmc_timings *gpmc_t); | |
82 | #else | |
83 | static inline int gpmc_nand_init(struct omap_nand_platform_data *d, | |
84 | struct gpmc_timings *gpmc_t) | |
85 | { | |
86 | return 0; | |
87 | } | |
88 | #endif | |
89 | ||
90 | #if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) | |
91 | extern void gpmc_onenand_init(struct omap_onenand_platform_data *d); | |
92 | #else | |
93 | #define board_onenand_data NULL | |
94 | static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d) | |
95 | { | |
96 | } | |
97 | #endif |