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MSI: Add an arch_msi_check_device()
[deliverable/linux.git] / include / linux / pci.h
CommitLineData
1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
4352dfd5
GKH		 20/* Include the pci register defines */
21#include <linux/pci_regs.h>
1da177e4 22
1da177e4
LT		 23/*
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
27 *
28 * 7:3 = slot
29 * 2:0 = function
30 */
31#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33#define PCI_FUNC(devfn) ((devfn) & 0x07)
34
35/* Ioctls for /proc/bus/pci/X/Y nodes. */
36#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
41
42#ifdef __KERNEL__
43
778382e0
DW		 44#include <linux/mod_devicetable.h>
45
1da177e4 46#include <linux/types.h>
1da177e4
LT		 47#include <linux/ioport.h>
48#include <linux/list.h>
4a7fb636 49#include <linux/compiler.h>
1da177e4 50#include <linux/errno.h>
bae94d02 51#include <asm/atomic.h>
1da177e4
LT		 52#include <linux/device.h>
53
7e7a43c3
AB		 54/* Include the ID list */
55#include <linux/pci_ids.h>
56
1da177e4
LT		 57/* File state for mmap()s on /proc/bus/pci/X/Y */
58enum pci_mmap_state {
59 pci_mmap_io,
60 pci_mmap_mem
61};
62
63/* This defines the direction arg to the DMA mapping routines. */
64#define PCI_DMA_BIDIRECTIONAL 0
65#define PCI_DMA_TODEVICE 1
66#define PCI_DMA_FROMDEVICE 2
67#define PCI_DMA_NONE 3
68
69#define DEVICE_COUNT_COMPATIBLE 4
70#define DEVICE_COUNT_RESOURCE 12
71
72typedef int __bitwise pci_power_t;
73
4352dfd5
GKH		 74#define PCI_D0 ((pci_power_t __force) 0)
75#define PCI_D1 ((pci_power_t __force) 1)
76#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 77#define PCI_D3hot ((pci_power_t __force) 3)
78#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 79#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 80#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4 81
392a1ce7 82/** The pci_channel state describes connectivity between the CPU and
83 * the pci device. If some PCI bus between here and the pci device
84 * has crashed or locked up, this info is reflected here.
85 */
86typedef unsigned int __bitwise pci_channel_state_t;
87
88enum pci_channel_state {
89 /* I/O channel is in normal state */
90 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91
92 /* I/O to channel is blocked */
93 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94
95 /* PCI card is dead */
96 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
97};
98
f7bdd12d
BK		 99typedef unsigned int __bitwise pcie_reset_state_t;
100
101enum pcie_reset_state {
102 /* Reset is NOT asserted (Use to deassert reset) */
103 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104
105 /* Use #PERST to reset PCI-E device */
106 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107
108 /* Use PCI-E Hot Reset to reset device */
109 pcie_hot_reset = (__force pcie_reset_state_t) 3
110};
111
6e325a62
MT		 112typedef unsigned short __bitwise pci_bus_flags_t;
113enum pci_bus_flags {
e778272d 114 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
6e325a62
MT		 115};
116
41017f0c
SL		 117struct pci_cap_saved_state {
118 struct hlist_node next;
119 char cap_nr;
120 u32 data[0];
121};
122
1da177e4
LT		 123/*
124 * The pci_dev structure is used to describe PCI devices.
125 */
126struct pci_dev {
127 struct list_head global_list; /* node in list of all PCI devices */
128 struct list_head bus_list; /* node in per-bus list */
129 struct pci_bus *bus; /* bus this device is on */
130 struct pci_bus *subordinate; /* bus this device bridges to */
131
132 void *sysdata; /* hook for sys-specific extension */
133 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
134
135 unsigned int devfn; /* encoded device & function index */
136 unsigned short vendor;
137 unsigned short device;
138 unsigned short subsystem_vendor;
139 unsigned short subsystem_device;
140 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
141 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
142 u8 rom_base_reg; /* which config register controls the ROM */
ffeff788 143 u8 pin; /* which interrupt pin this device uses */
1da177e4
LT		 144
145 struct pci_driver *driver; /* which driver has allocated this device */
146 u64 dma_mask; /* Mask of the bits of bus address this
147 device implements. Normally this is
148 0xffffffff. You only need to change
149 this if your device has broken DMA
150 or supports 64-bit transfers. */
151
152 pci_power_t current_state; /* Current operating state. In ACPI-speak,
153 this is D0-D3, D0 being fully functional,
154 and D3 being off. */
155
392a1ce7 156 pci_channel_state_t error_state; /* current connectivity state */
1da177e4
LT		 157 struct device dev; /* Generic device interface */
158
159 /* device is compatible with these IDs */
160 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
161 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
162
163 int cfg_size; /* Size of configuration space */
164
165 /*
166 * Instead of touching interrupt line and base address registers
167 * directly, use the values stored here. They might be different!
168 */
169 unsigned int irq;
170 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
171
172 /* These fields are used by common fixups */
173 unsigned int transparent:1; /* Transparent PCI bridge */
174 unsigned int multifunction:1;/* Part of multi-function device */
175 /* keep track of device state */
1da177e4 176 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 177 unsigned int no_msi:1; /* device may not use msi */
ffadcc2f 178 unsigned int no_d1d2:1; /* only allow d0 or d3 */
e04b0ea2 179 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
bd8481e1 180 unsigned int broken_parity_status:1; /* Device generates false positive parity */
99dc804d
SL		 181 unsigned int msi_enabled:1;
182 unsigned int msix_enabled:1;
9ac7849e 183 unsigned int is_managed:1;
bae94d02 184 atomic_t enable_cnt; /* pci_enable_device has been called */
4602b88d 185
1da177e4 186 u32 saved_config_space[16]; /* config space saved at suspend time */
41017f0c 187 struct hlist_head saved_cap_space;
1da177e4
LT		 188 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
189 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
190 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
ded86d8d
EB		 191#ifdef CONFIG_PCI_MSI
192 unsigned int first_msi_irq;
193#endif
1da177e4
LT		 194};
195
196#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
197#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
198#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
199#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
200
a7369f1f
LV		 201static inline int pci_channel_offline(struct pci_dev *pdev)
202{
203 return (pdev->error_state != pci_channel_io_normal);
204}
205
41017f0c
SL		 206static inline struct pci_cap_saved_state *pci_find_saved_cap(
207 struct pci_dev *pci_dev,char cap)
208{
209 struct pci_cap_saved_state *tmp;
210 struct hlist_node *pos;
211
212 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
213 if (tmp->cap_nr == cap)
214 return tmp;
215 }
216 return NULL;
217}
218
219static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
220 struct pci_cap_saved_state *new_cap)
221{
222 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
223}
224
1da177e4
LT		 225/*
226 * For PCI devices, the region numbers are assigned this way:
227 *
228 * 0-5 standard PCI regions
229 * 6 expansion ROM
230 * 7-10 bridges: address space assigned to buses behind the bridge
231 */
232
4352dfd5
GKH		 233#define PCI_ROM_RESOURCE 6
234#define PCI_BRIDGE_RESOURCES 7
235#define PCI_NUM_RESOURCES 11
1da177e4
LT		 236
237#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 238#define PCI_BUS_NUM_RESOURCES 8
1da177e4 239#endif
4352dfd5
GKH		 240
241#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 242
243struct pci_bus {
244 struct list_head node; /* node in list of buses */
245 struct pci_bus *parent; /* parent bus this bridge is on */
246 struct list_head children; /* list of child buses */
247 struct list_head devices; /* list of devices on this bus */
248 struct pci_dev *self; /* bridge device as seen by parent */
249 struct resource *resource[PCI_BUS_NUM_RESOURCES];
250 /* address space routed to this bus */
251
252 struct pci_ops *ops; /* configuration access functions */
253 void *sysdata; /* hook for sys-specific extension */
254 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
255
256 unsigned char number; /* bus number */
257 unsigned char primary; /* number of primary bridge */
258 unsigned char secondary; /* number of secondary bridge */
259 unsigned char subordinate; /* max number of subordinate buses */
260
261 char name[48];
262
263 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
6e325a62 264 pci_bus_flags_t bus_flags; /* Inherited by child busses */
1da177e4
LT		 265 struct device *bridge;
266 struct class_device class_dev;
267 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
268 struct bin_attribute *legacy_mem; /* legacy mem */
269};
270
271#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
272#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
273
274/*
275 * Error values that may be returned by PCI functions.
276 */
277#define PCIBIOS_SUCCESSFUL 0x00
278#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
279#define PCIBIOS_BAD_VENDOR_ID 0x83
280#define PCIBIOS_DEVICE_NOT_FOUND 0x86
281#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
282#define PCIBIOS_SET_FAILED 0x88
283#define PCIBIOS_BUFFER_TOO_SMALL 0x89
284
285/* Low-level architecture-dependent routines */
286
287struct pci_ops {
288 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
289 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
290};
291
292struct pci_raw_ops {
293 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
294 int reg, int len, u32 *val);
295 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
296 int reg, int len, u32 val);
297};
298
299extern struct pci_raw_ops *raw_pci_ops;
300
301struct pci_bus_region {
302 unsigned long start;
303 unsigned long end;
304};
305
306struct pci_dynids {
307 spinlock_t lock; /* protects list, index */
308 struct list_head list; /* for IDs added at runtime */
309 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
310};
311
392a1ce7 312/* ---------------------------------------------------------------- */
313/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
314 * a set fof callbacks in struct pci_error_handlers, then that device driver
315 * will be notified of PCI bus errors, and will be driven to recovery
316 * when an error occurs.
317 */
318
319typedef unsigned int __bitwise pci_ers_result_t;
320
321enum pci_ers_result {
322 /* no result/none/not supported in device driver */
323 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
324
325 /* Device driver can recover without slot reset */
326 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
327
328 /* Device driver wants slot to be reset. */
329 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
330
331 /* Device has completely failed, is unrecoverable */
332 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
333
334 /* Device driver is fully recovered and operational */
335 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
336};
337
338/* PCI bus error event callbacks */
339struct pci_error_handlers
340{
341 /* PCI bus error detected on this device */
342 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
343 enum pci_channel_state error);
344
345 /* MMIO has been re-enabled, but not DMA */
346 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
347
348 /* PCI Express link has been reset */
349 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
350
351 /* PCI slot has been reset */
352 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
353
354 /* Device driver may resume normal operations */
355 void (*resume)(struct pci_dev *dev);
356};
357
358/* ---------------------------------------------------------------- */
359
1da177e4
LT		 360struct module;
361struct pci_driver {
362 struct list_head node;
363 char *name;
1da177e4
LT		 364 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
365 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
366 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
367 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
cbd69dbb
LT		 368 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
369 int (*resume_early) (struct pci_dev *dev);
1da177e4 370 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 371 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 372 void (*shutdown) (struct pci_dev *dev);
1da177e4 373
392a1ce7 374 struct pci_error_handlers *err_handler;
1da177e4
LT		 375 struct device_driver driver;
376 struct pci_dynids dynids;
377};
378
379#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
380
381/**
382 * PCI_DEVICE - macro used to describe a specific pci device
383 * @vend: the 16 bit PCI Vendor ID
384 * @dev: the 16 bit PCI Device ID
385 *
386 * This macro is used to create a struct pci_device_id that matches a
387 * specific device. The subvendor and subdevice fields will be set to
388 * PCI_ANY_ID.
389 */
390#define PCI_DEVICE(vend,dev) \
391 .vendor = (vend), .device = (dev), \
392 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
393
394/**
395 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
396 * @dev_class: the class, subclass, prog-if triple for this device
397 * @dev_class_mask: the class mask for this device
398 *
399 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 400 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 401 * fields will be set to PCI_ANY_ID.
402 */
403#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
404 .class = (dev_class), .class_mask = (dev_class_mask), \
405 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
406 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
407
4352dfd5 408/*
1da177e4
LT		 409 * pci_module_init is obsolete, this stays here till we fix up all usages of it
410 * in the tree.
411 */
412#define pci_module_init pci_register_driver
413
1597cacb
AC		 414/**
415 * PCI_VDEVICE - macro used to describe a specific pci device in short form
416 * @vend: the vendor name
417 * @dev: the 16 bit PCI Device ID
418 *
419 * This macro is used to create a struct pci_device_id that matches a
420 * specific PCI device. The subvendor, and subdevice fields will be set
421 * to PCI_ANY_ID. The macro allows the next field to follow as the device
422 * private data.
423 */
424
425#define PCI_VDEVICE(vendor, device) \
426 PCI_VENDOR_ID_##vendor, (device), \
427 PCI_ANY_ID, PCI_ANY_ID, 0, 0
428
1da177e4
LT		 429/* these external functions are only available when PCI support is enabled */
430#ifdef CONFIG_PCI
431
432extern struct bus_type pci_bus_type;
433
434/* Do NOT directly access these two variables, unless you are arch specific pci
435 * code, or pci core code. */
436extern struct list_head pci_root_buses; /* list of all known PCI buses */
437extern struct list_head pci_devices; /* list of all devices */
438
439void pcibios_fixup_bus(struct pci_bus *);
4a7fb636 440int __must_check pcibios_enable_device(struct pci_dev *, int mask);
1da177e4
LT		 441char *pcibios_setup (char *str);
442
443/* Used only when drivers/pci/setup.c is used */
e31dd6e4
GKH		 444void pcibios_align_resource(void *, struct resource *, resource_size_t,
445 resource_size_t);
1da177e4
LT		 446void pcibios_update_irq(struct pci_dev *, int irq);
447
448/* Generic PCI functions used internally */
449
450extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 451void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 452struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
453static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
454{
c431ada4
RS		 455 struct pci_bus *root_bus;
456 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
457 if (root_bus)
458 pci_bus_add_devices(root_bus);
459 return root_bus;
1da177e4 460}
cdb9b9f7
PM		 461struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
462struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 463int pci_scan_slot(struct pci_bus *bus, int devfn);
464struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 465void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4 466unsigned int pci_scan_child_bus(struct pci_bus *bus);
b19441af 467int __must_check pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 468void pci_read_bridge_bases(struct pci_bus *child);
469struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
470int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
471extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
472extern void pci_dev_put(struct pci_dev *dev);
473extern void pci_remove_bus(struct pci_bus *b);
474extern void pci_remove_bus_device(struct pci_dev *dev);
24f8aa9b 475extern void pci_stop_bus_device(struct pci_dev *dev);
b3743fa4 476void pci_setup_cardbus(struct pci_bus *bus);
6b4b78fe 477extern void pci_sort_breadthfirst(void);
1da177e4
LT		 478
479/* Generic PCI functions exported to card drivers */
480
429538ad 481struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
1da177e4
LT		 482struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
483int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 484int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
3a720d72 485int pci_find_ext_capability (struct pci_dev *dev, int cap);
687d5fe3
ME		 486int pci_find_ht_capability (struct pci_dev *dev, int ht_cap);
487int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap);
29f3eb64 488struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
1da177e4 489
d42552c3
AM		 490struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
491 struct pci_dev *from);
492struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
493 struct pci_dev *from);
494
1da177e4
LT		 495struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
496 unsigned int ss_vendor, unsigned int ss_device,
497 struct pci_dev *from);
498struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
29f3eb64 499struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);
1da177e4
LT		 500struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
501int pci_dev_present(const struct pci_device_id *ids);
d86f90f9 502const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
1da177e4
LT		 503
504int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
505int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
506int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
507int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
508int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
509int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
510
511static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
512{
513 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
514}
515static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
516{
517 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
518}
519static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
520{
521 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
522}
523static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
524{
525 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
526}
527static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
528{
529 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
530}
531static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
532{
533 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
534}
535
4a7fb636
AM		 536int __must_check pci_enable_device(struct pci_dev *dev);
537int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);
9ac7849e
TH		 538int __must_check pcim_enable_device(struct pci_dev *pdev);
539void pcim_pin_device(struct pci_dev *pdev);
540
541static inline int pci_is_managed(struct pci_dev *pdev)
542{
543 return pdev->is_managed;
544}
545
1da177e4
LT		 546void pci_disable_device(struct pci_dev *dev);
547void pci_set_master(struct pci_dev *dev);
f7bdd12d 548int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
1da177e4 549#define HAVE_PCI_SET_MWI
4a7fb636 550int __must_check pci_set_mwi(struct pci_dev *dev);
1da177e4 551void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 552void pci_intx(struct pci_dev *dev, int enable);
f5f2b131 553void pci_msi_off(struct pci_dev *dev);
9c8550ee
LT		 554int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
555int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 556void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
4a7fb636
AM		 557int __must_check pci_assign_resource(struct pci_dev *dev, int i);
558int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
064b53db 559void pci_restore_bars(struct pci_dev *dev);
c87deff7 560int pci_select_bars(struct pci_dev *dev, unsigned long flags);
1da177e4
LT		 561
562/* ROM control related routines */
144a50ea
DJ		 563void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
564void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 565void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
566void pci_remove_rom(struct pci_dev *pdev);
567
568/* Power management related routines */
569int pci_save_state(struct pci_dev *dev);
570int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 571int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
572pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
573int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4
LT		 574
575/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
576void pci_bus_assign_resources(struct pci_bus *bus);
577void pci_bus_size_bridges(struct pci_bus *bus);
578int pci_claim_resource(struct pci_dev *, int);
579void pci_assign_unassigned_resources(void);
580void pdev_enable_device(struct pci_dev *);
581void pdev_sort_resources(struct pci_dev *, struct resource_list *);
582void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
583 int (*)(struct pci_dev *, u8, u8));
584#define HAVE_PCI_REQ_REGIONS 2
4a7fb636 585int __must_check pci_request_regions(struct pci_dev *, const char *);
1da177e4 586void pci_release_regions(struct pci_dev *);
4a7fb636 587int __must_check pci_request_region(struct pci_dev *, int, const char *);
1da177e4 588void pci_release_region(struct pci_dev *, int);
c87deff7
HS		 589int pci_request_selected_regions(struct pci_dev *, int, const char *);
590void pci_release_selected_regions(struct pci_dev *, int);
1da177e4
LT		 591
592/* drivers/pci/bus.c */
4a7fb636
AM		 593int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
594 struct resource *res, resource_size_t size,
595 resource_size_t align, resource_size_t min,
596 unsigned int type_mask,
597 void (*alignf)(void *, struct resource *,
598 resource_size_t, resource_size_t),
599 void *alignf_data);
1da177e4
LT		 600void pci_enable_bridges(struct pci_bus *bus);
601
863b18f4 602/* Proper probing supporting hot-pluggable devices */
725522b5
GKH		 603int __must_check __pci_register_driver(struct pci_driver *, struct module *,
604 const char *mod_name);
4a7fb636 605static inline int __must_check pci_register_driver(struct pci_driver *driver)
863b18f4 606{
725522b5 607 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
863b18f4
L		 608}
609
1da177e4
LT		 610void pci_unregister_driver(struct pci_driver *);
611void pci_remove_behind_bridge(struct pci_dev *);
612struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 613const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
614const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 615int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
616
cecf4864
PM		 617void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
618 void *userdata);
ac7dc65a 619int pci_cfg_space_size(struct pci_dev *dev);
b82db5ce 620unsigned char pci_bus_max_busnr(struct pci_bus* bus);
cecf4864 621
1da177e4
LT		 622/* kmem_cache style wrapper around pci_alloc_consistent() */
623
624#include <linux/dmapool.h>
625
626#define pci_pool dma_pool
627#define pci_pool_create(name, pdev, size, align, allocation) \
628 dma_pool_create(name, &pdev->dev, size, align, allocation)
629#define pci_pool_destroy(pool) dma_pool_destroy(pool)
630#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
631#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
632
e24c2d96
DM		 633enum pci_dma_burst_strategy {
634 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
635 strategy_parameter is N/A */
636 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
637 byte boundaries */
638 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
639 strategy_parameter byte boundaries */
640};
641
1da177e4
LT		 642struct msix_entry {
643 u16 vector; /* kernel uses to write allocated vector */
644 u16 entry; /* driver uses to specify entry, OS writes */
645};
646
0366f8f7 647
1da177e4 648#ifndef CONFIG_PCI_MSI
1da177e4
LT		 649static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
650static inline void pci_disable_msi(struct pci_dev *dev) {}
651static inline int pci_enable_msix(struct pci_dev* dev,
652 struct msix_entry *entries, int nvec) {return -1;}
653static inline void pci_disable_msix(struct pci_dev *dev) {}
654static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
655#else
1da177e4
LT		 656extern int pci_enable_msi(struct pci_dev *dev);
657extern void pci_disable_msi(struct pci_dev *dev);
658extern int pci_enable_msix(struct pci_dev* dev,
659 struct msix_entry *entries, int nvec);
660extern void pci_disable_msix(struct pci_dev *dev);
661extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
662#endif
663
8b955b0d 664#ifdef CONFIG_HT_IRQ
8b955b0d
EB		 665/* The functions a driver should call */
666int ht_create_irq(struct pci_dev *dev, int idx);
667void ht_destroy_irq(unsigned int irq);
8b955b0d
EB		 668#endif /* CONFIG_HT_IRQ */
669
e04b0ea2
BK		 670extern void pci_block_user_cfg_access(struct pci_dev *dev);
671extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
672
4352dfd5
GKH		 673/*
674 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
675 * a PCI domain is defined to be a set of PCI busses which share
676 * configuration space.
677 */
678#ifndef CONFIG_PCI_DOMAINS
679static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
680static inline int pci_proc_domain(struct pci_bus *bus)
681{
682 return 0;
683}
684#endif
1da177e4 685
4352dfd5 686#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 687
688/*
689 * If the system does not have PCI, clearly these return errors. Define
690 * these as simple inline functions to avoid hair in drivers.
691 */
692
1da177e4
LT		 693#define _PCI_NOP(o,s,t) \
694 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
695 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
696#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
697 _PCI_NOP(o,word,u16 x) \
698 _PCI_NOP(o,dword,u32 x)
699_PCI_NOP_ALL(read, *)
700_PCI_NOP_ALL(write,)
701
702static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
703{ return NULL; }
704
705static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
706{ return NULL; }
707
d42552c3
AM		 708static inline struct pci_dev *pci_get_device(unsigned int vendor,
709 unsigned int device, struct pci_dev *from)
710{ return NULL; }
711
712static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
713 unsigned int device, struct pci_dev *from)
1da177e4
LT		 714{ return NULL; }
715
716static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
717unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
718{ return NULL; }
719
720static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
721{ return NULL; }
722
723#define pci_dev_present(ids) (0)
d86f90f9 724#define pci_find_present(ids) (NULL)
1da177e4
LT		 725#define pci_dev_put(dev) do { } while (0)
726
727static inline void pci_set_master(struct pci_dev *dev) { }
728static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
729static inline void pci_disable_device(struct pci_dev *dev) { }
730static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 731static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 732static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 733static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
734static inline void pci_unregister_driver(struct pci_driver *drv) { }
735static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 736static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
3a720d72 737static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
1da177e4
LT		 738static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
739
740/* Power management related routines */
741static inline int pci_save_state(struct pci_dev *dev) { return 0; }
742static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
743static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 744static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 745static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
746
0da0ead9
SS		 747static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) { return -EIO; }
748static inline void pci_release_regions(struct pci_dev *dev) { }
749
a46e8126
KG		 750#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
751
e04b0ea2
BK		 752static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
753static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
754
4352dfd5 755#endif /* CONFIG_PCI */
1da177e4 756
4352dfd5
GKH		 757/* Include architecture-dependent settings and functions */
758
759#include <asm/pci.h>
1da177e4
LT		 760
761/* these helpers provide future and backwards compatibility
762 * for accessing popular PCI BAR info */
763#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
764#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
765#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
766#define pci_resource_len(dev,bar) \
767 ((pci_resource_start((dev),(bar)) == 0 && \
768 pci_resource_end((dev),(bar)) == \
769 pci_resource_start((dev),(bar))) ? 0 : \
770 \
771 (pci_resource_end((dev),(bar)) - \
772 pci_resource_start((dev),(bar)) + 1))
773
774/* Similar to the helpers above, these manipulate per-pci_dev
775 * driver-specific data. They are really just a wrapper around
776 * the generic device structure functions of these calls.
777 */
778static inline void *pci_get_drvdata (struct pci_dev *pdev)
779{
780 return dev_get_drvdata(&pdev->dev);
781}
782
783static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
784{
785 dev_set_drvdata(&pdev->dev, data);
786}
787
788/* If you want to know what to call your pci_dev, ask this function.
789 * Again, it's a wrapper around the generic device.
790 */
791static inline char *pci_name(struct pci_dev *pdev)
792{
793 return pdev->dev.bus_id;
794}
795
2311b1f2
ME		 796
797/* Some archs don't want to expose struct resource to userland as-is
798 * in sysfs and /proc
799 */
800#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
801static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
e31dd6e4
GKH		 802 const struct resource *rsrc, resource_size_t *start,
803 resource_size_t *end)
2311b1f2
ME		 804{
805 *start = rsrc->start;
806 *end = rsrc->end;
807}
808#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
809
810
1da177e4
LT		 811/*
812 * The world is not perfect and supplies us with broken PCI devices.
813 * For at least a part of these bugs we need a work-around, so both
814 * generic (drivers/pci/quirks.c) and per-architecture code can define
815 * fixup hooks to be called for particular buggy devices.
816 */
817
818struct pci_fixup {
819 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
820 void (*hook)(struct pci_dev *dev);
821};
822
823enum pci_fixup_pass {
824 pci_fixup_early, /* Before probing BARs */
825 pci_fixup_header, /* After reading configuration header */
826 pci_fixup_final, /* Final phase of device fixups */
827 pci_fixup_enable, /* pci_enable_device() time */
1597cacb 828 pci_fixup_resume, /* pci_enable_device() time */
1da177e4
LT		 829};
830
831/* Anonymous variables would be nice... */
832#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 833 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 834 __attribute__((__section__(#section))) = { vendor, device, hook };
835#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
836 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
837 vendor##device##hook, vendor, device, hook)
838#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
839 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
840 vendor##device##hook, vendor, device, hook)
841#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
842 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
843 vendor##device##hook, vendor, device, hook)
844#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
845 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
846 vendor##device##hook, vendor, device, hook)
1597cacb
AC		 847#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
848 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
849 resume##vendor##device##hook, vendor, device, hook)
1da177e4
LT		 850
851
852void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
853
5ea81769
AV		 854void __iomem * pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
855void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
856void __iomem * const * pcim_iomap_table(struct pci_dev *pdev);
857int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
ec04b075 858void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
5ea81769 859
1da177e4 860extern int pci_pci_problems;
236561e5 861#define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1da177e4
LT		 862#define PCIPCI_TRITON 2
863#define PCIPCI_NATOMA 4
864#define PCIPCI_VIAETBF 8
865#define PCIPCI_VSFX 16
236561e5
AC		 866#define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
867#define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1da177e4 868
4516a618
AN		 869extern unsigned long pci_cardbus_io_size;
870extern unsigned long pci_cardbus_mem_size;
871
1da177e4
LT		 872#endif /* __KERNEL__ */
873#endif /* LINUX_PCI_H */
Linux kernel - Deliverables
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