tty: serial: 8250_core: allow to set ->throttle / ->unthrottle callbacks
[deliverable/linux.git] / include / linux / serial_core.h
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef LINUX_SERIAL_CORE_H
21#define LINUX_SERIAL_CORE_H
22
1da177e4 23
661f83a6 24#include <linux/compiler.h>
1da177e4
LT
25#include <linux/interrupt.h>
26#include <linux/circ_buf.h>
27#include <linux/spinlock.h>
28#include <linux/sched.h>
29#include <linux/tty.h>
e2862f6a 30#include <linux/mutex.h>
b11115c1 31#include <linux/sysrq.h>
607ca46e 32#include <uapi/linux/serial_core.h>
1da177e4 33
cf0ebee0
SP
34#ifdef CONFIG_SERIAL_CORE_CONSOLE
35#define uart_console(port) \
36 ((port)->cons && (port)->cons->index == (port)->line)
37#else
38#define uart_console(port) (0)
39#endif
40
1da177e4 41struct uart_port;
1da177e4
LT
42struct serial_struct;
43struct device;
44
45/*
e759d7c5
KC
46 * This structure describes all the operations that can be done on the
47 * physical hardware. See Documentation/serial/driver for details.
1da177e4
LT
48 */
49struct uart_ops {
50 unsigned int (*tx_empty)(struct uart_port *);
51 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
52 unsigned int (*get_mctrl)(struct uart_port *);
b129a8cc
RK
53 void (*stop_tx)(struct uart_port *);
54 void (*start_tx)(struct uart_port *);
9aba8d5b
RK
55 void (*throttle)(struct uart_port *);
56 void (*unthrottle)(struct uart_port *);
1da177e4
LT
57 void (*send_xchar)(struct uart_port *, char ch);
58 void (*stop_rx)(struct uart_port *);
59 void (*enable_ms)(struct uart_port *);
60 void (*break_ctl)(struct uart_port *, int ctl);
61 int (*startup)(struct uart_port *);
62 void (*shutdown)(struct uart_port *);
6bb0e3a5 63 void (*flush_buffer)(struct uart_port *);
606d099c
AC
64 void (*set_termios)(struct uart_port *, struct ktermios *new,
65 struct ktermios *old);
d87d9b7d 66 void (*set_ldisc)(struct uart_port *, int new);
1da177e4
LT
67 void (*pm)(struct uart_port *, unsigned int state,
68 unsigned int oldstate);
1da177e4
LT
69
70 /*
71 * Return a string describing the type of the port
72 */
e759d7c5 73 const char *(*type)(struct uart_port *);
1da177e4
LT
74
75 /*
76 * Release IO and memory resources used by the port.
77 * This includes iounmap if necessary.
78 */
79 void (*release_port)(struct uart_port *);
80
81 /*
82 * Request IO and memory resources used by the port.
83 * This includes iomapping the port if necessary.
84 */
85 int (*request_port)(struct uart_port *);
86 void (*config_port)(struct uart_port *, int);
87 int (*verify_port)(struct uart_port *, struct serial_struct *);
88 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
f2d937f3 89#ifdef CONFIG_CONSOLE_POLL
c7f3e708 90 int (*poll_init)(struct uart_port *);
e759d7c5 91 void (*poll_put_char)(struct uart_port *, unsigned char);
f2d937f3
JW
92 int (*poll_get_char)(struct uart_port *);
93#endif
1da177e4
LT
94};
95
f5316b4a 96#define NO_POLL_CHAR 0x00ff0000
1da177e4
LT
97#define UART_CONFIG_TYPE (1 << 0)
98#define UART_CONFIG_IRQ (1 << 1)
99
100struct uart_icount {
101 __u32 cts;
102 __u32 dsr;
103 __u32 rng;
104 __u32 dcd;
105 __u32 rx;
106 __u32 tx;
107 __u32 frame;
108 __u32 overrun;
109 __u32 parity;
110 __u32 brk;
111 __u32 buf_overrun;
112};
113
0077d45e 114typedef unsigned int __bitwise__ upf_t;
299245a1 115typedef unsigned int __bitwise__ upstat_t;
0077d45e 116
1da177e4
LT
117struct uart_port {
118 spinlock_t lock; /* port lock */
0c8946d9 119 unsigned long iobase; /* in/out[bwl] */
1da177e4 120 unsigned char __iomem *membase; /* read/write[bwl] */
7d6a07d1
DD
121 unsigned int (*serial_in)(struct uart_port *, int);
122 void (*serial_out)(struct uart_port *, int, int);
235dae5d
PL
123 void (*set_termios)(struct uart_port *,
124 struct ktermios *new,
125 struct ktermios *old);
b99b121b
SAS
126 int (*startup)(struct uart_port *port);
127 void (*shutdown)(struct uart_port *port);
234abab1
SAS
128 void (*throttle)(struct uart_port *port);
129 void (*unthrottle)(struct uart_port *port);
a74036f5 130 int (*handle_irq)(struct uart_port *);
c161afe9
ML
131 void (*pm)(struct uart_port *, unsigned int state,
132 unsigned int old);
bf03f65b 133 void (*handle_break)(struct uart_port *);
1da177e4 134 unsigned int irq; /* irq number */
1c2f0493 135 unsigned long irqflags; /* irq flags */
1da177e4 136 unsigned int uartclk; /* base uart clock */
947deee8 137 unsigned int fifosize; /* tx fifo size */
1da177e4
LT
138 unsigned char x_char; /* xon/xoff char */
139 unsigned char regshift; /* reg offset shift */
140 unsigned char iotype; /* io access style */
947deee8 141 unsigned char unused1;
1da177e4
LT
142
143#define UPIO_PORT (0)
144#define UPIO_HUB6 (1)
145#define UPIO_MEM (2)
146#define UPIO_MEM32 (3)
c420811f 147#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
3be91ec7 148#define UPIO_TSI (5) /* Tsi108/109 type IO */
1da177e4
LT
149
150 unsigned int read_status_mask; /* driver specific */
151 unsigned int ignore_status_mask; /* driver specific */
ebd2c8f6 152 struct uart_state *state; /* pointer to parent state */
1da177e4
LT
153 struct uart_icount icount; /* statistics */
154
155 struct console *cons; /* struct console, if any */
06e82df0 156#if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
1da177e4
LT
157 unsigned long sysrq; /* sysrq timeout */
158#endif
159
8a949b07 160 /* flags must be updated while holding port mutex */
0077d45e
RK
161 upf_t flags;
162
163#define UPF_FOURPORT ((__force upf_t) (1 << 1))
164#define UPF_SAK ((__force upf_t) (1 << 2))
165#define UPF_SPD_MASK ((__force upf_t) (0x1030))
166#define UPF_SPD_HI ((__force upf_t) (0x0010))
167#define UPF_SPD_VHI ((__force upf_t) (0x0020))
168#define UPF_SPD_CUST ((__force upf_t) (0x0030))
169#define UPF_SPD_SHI ((__force upf_t) (0x1000))
170#define UPF_SPD_WARP ((__force upf_t) (0x1010))
171#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
172#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
173#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
174#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
175#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
b6adea33 176#define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
0077d45e 177#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
dba05832
RK
178/* Port has hardware-assisted h/w flow control (iow, auto-RTS *not* auto-CTS) */
179#define UPF_HARD_FLOW ((__force upf_t) (1 << 21))
2cbacafd
RK
180/* Port has hardware-assisted s/w flow control */
181#define UPF_SOFT_FLOW ((__force upf_t) (1 << 22))
0077d45e
RK
182#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
183#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
06315348 184#define UPF_EXAR_EFR ((__force upf_t) (1 << 25))
bc02d15a 185#define UPF_BUG_THRE ((__force upf_t) (1 << 26))
8e23fcc8
DD
186/* The exact UART type is known and should not be probed. */
187#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
0077d45e 188#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
abb4a239 189#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
68ac64cd 190#define UPF_DEAD ((__force upf_t) (1 << 30))
0077d45e
RK
191#define UPF_IOREMAP ((__force upf_t) (1 << 31))
192
193#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
194#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
1da177e4 195
299245a1
PH
196 /* status must be updated while holding port lock */
197 upstat_t status;
198
199#define UPSTAT_CTS_ENABLE ((__force upstat_t) (1 << 0))
200#define UPSTAT_DCD_ENABLE ((__force upstat_t) (1 << 1))
201
d01f4d18 202 int hw_stopped; /* sw-assisted CTS flow state */
1da177e4
LT
203 unsigned int mctrl; /* current modem ctrl settings */
204 unsigned int timeout; /* character-based timeout */
205 unsigned int type; /* port type */
ba899dbc 206 const struct uart_ops *ops;
1da177e4
LT
207 unsigned int custom_divisor;
208 unsigned int line; /* port index */
4f640efb 209 resource_size_t mapbase; /* for ioremap */
1da177e4
LT
210 struct device *dev; /* parent device */
211 unsigned char hub6; /* this should be in the 8250 driver */
b3b708fa 212 unsigned char suspended;
3f960dbb 213 unsigned char irq_wake;
b3b708fa 214 unsigned char unused[2];
266dcff0
GKH
215 struct attribute_group *attr_group; /* port specific attributes */
216 const struct attribute_group **tty_groups; /* all attributes (serial core use only) */
beab697a 217 void *private_data; /* generic platform data pointer */
1da177e4
LT
218};
219
927353a7
PG
220static inline int serial_port_in(struct uart_port *up, int offset)
221{
222 return up->serial_in(up, offset);
223}
224
225static inline void serial_port_out(struct uart_port *up, int offset, int value)
226{
227 up->serial_out(up, offset, value);
228}
229
6f538fe3
LW
230/**
231 * enum uart_pm_state - power states for UARTs
232 * @UART_PM_STATE_ON: UART is powered, up and operational
233 * @UART_PM_STATE_OFF: UART is powered off
234 * @UART_PM_STATE_UNDEFINED: sentinel
235 */
236enum uart_pm_state {
237 UART_PM_STATE_ON = 0,
238 UART_PM_STATE_OFF = 3, /* number taken from ACPI */
239 UART_PM_STATE_UNDEFINED,
240};
241
ebd2c8f6
AC
242/*
243 * This is the state information which is persistent across opens.
ebd2c8f6
AC
244 */
245struct uart_state {
df4f4dd4 246 struct tty_port port;
ebd2c8f6 247
6f538fe3 248 enum uart_pm_state pm_state;
1da177e4 249 struct circ_buf xmit;
1da177e4 250
ebd2c8f6 251 struct uart_port *uart_port;
f751928e
AC
252};
253
254#define UART_XMIT_SIZE PAGE_SIZE
255
256
1da177e4
LT
257/* number of characters left in xmit buffer before we ask for more */
258#define WAKEUP_CHARS 256
259
260struct module;
261struct tty_driver;
262
263struct uart_driver {
264 struct module *owner;
265 const char *driver_name;
266 const char *dev_name;
1da177e4
LT
267 int major;
268 int minor;
269 int nr;
270 struct console *cons;
271
272 /*
273 * these are private; the low level driver should not
274 * touch these; they should be initialised to NULL
275 */
276 struct uart_state *state;
277 struct tty_driver *tty_driver;
278};
279
280void uart_write_wakeup(struct uart_port *port);
281
282/*
283 * Baud rate helpers.
284 */
285void uart_update_timeout(struct uart_port *port, unsigned int cflag,
286 unsigned int baud);
606d099c
AC
287unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
288 struct ktermios *old, unsigned int min,
1da177e4
LT
289 unsigned int max);
290unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
291
54381067
AV
292/* Base timer interval for polling */
293static inline int uart_poll_timeout(struct uart_port *port)
294{
295 int timeout = port->timeout;
296
297 return timeout > 6 ? (timeout / 2 - 2) : 1;
298}
299
1da177e4
LT
300/*
301 * Console helpers.
302 */
9aac5887
RH
303struct earlycon_device {
304 struct console *con;
305 struct uart_port port;
306 char options[16]; /* e.g., 115200n8 */
307 unsigned int baud;
308};
309int setup_earlycon(char *buf, const char *match,
310 int (*setup)(struct earlycon_device *, const char *));
311
b0b6abd3
RH
312extern int of_setup_earlycon(unsigned long addr,
313 int (*setup)(struct earlycon_device *, const char *));
314
9aac5887
RH
315#define EARLYCON_DECLARE(name, func) \
316static int __init name ## _setup_earlycon(char *buf) \
317{ \
318 return setup_earlycon(buf, __stringify(name), func); \
319} \
320early_param("earlycon", name ## _setup_earlycon);
321
b0b6abd3
RH
322#define OF_EARLYCON_DECLARE(name, compat, fn) \
323 _OF_DECLARE(earlycon, name, compat, fn, void *)
324
1da177e4
LT
325struct uart_port *uart_get_console(struct uart_port *ports, int nr,
326 struct console *c);
327void uart_parse_options(char *options, int *baud, int *parity, int *bits,
328 int *flow);
329int uart_set_options(struct uart_port *port, struct console *co, int baud,
330 int parity, int bits, int flow);
331struct tty_driver *uart_console_device(struct console *co, int *index);
d358788f
RK
332void uart_console_write(struct uart_port *port, const char *s,
333 unsigned int count,
334 void (*putchar)(struct uart_port *, int));
1da177e4
LT
335
336/*
337 * Port/driver registration/removal
338 */
339int uart_register_driver(struct uart_driver *uart);
340void uart_unregister_driver(struct uart_driver *uart);
1da177e4
LT
341int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
342int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
343int uart_match_port(struct uart_port *port1, struct uart_port *port2);
344
345/*
346 * Power Management
347 */
348int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
349int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
350
351#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
352#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
353
354#define uart_circ_chars_pending(circ) \
355 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
356
357#define uart_circ_chars_free(circ) \
358 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
359
f751928e
AC
360static inline int uart_tx_stopped(struct uart_port *port)
361{
ebd2c8f6 362 struct tty_struct *tty = port->state->port.tty;
d01f4d18 363 if (tty->stopped || port->hw_stopped)
f751928e
AC
364 return 1;
365 return 0;
366}
1da177e4 367
299245a1
PH
368static inline bool uart_cts_enabled(struct uart_port *uport)
369{
370 return uport->status & UPSTAT_CTS_ENABLE;
371}
372
1da177e4
LT
373/*
374 * The following are helper functions for the low level drivers.
375 */
027d7dac
JS
376
377extern void uart_handle_dcd_change(struct uart_port *uport,
378 unsigned int status);
379extern void uart_handle_cts_change(struct uart_port *uport,
380 unsigned int status);
381
382extern void uart_insert_char(struct uart_port *port, unsigned int status,
383 unsigned int overrun, unsigned int ch, unsigned int flag);
384
385#ifdef SUPPORT_SYSRQ
1da177e4 386static inline int
7d12e780 387uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
1da177e4
LT
388{
389 if (port->sysrq) {
390 if (ch && time_before(jiffies, port->sysrq)) {
f335397d 391 handle_sysrq(ch);
1da177e4
LT
392 port->sysrq = 0;
393 return 1;
394 }
395 port->sysrq = 0;
396 }
397 return 0;
398}
027d7dac
JS
399#else
400#define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
4e149184 401#endif
1da177e4
LT
402
403/*
404 * We do the SysRQ and SAK checking like this...
405 */
406static inline int uart_handle_break(struct uart_port *port)
407{
ebd2c8f6 408 struct uart_state *state = port->state;
bf03f65b
DW
409
410 if (port->handle_break)
411 port->handle_break(port);
412
1da177e4
LT
413#ifdef SUPPORT_SYSRQ
414 if (port->cons && port->cons->index == port->line) {
415 if (!port->sysrq) {
416 port->sysrq = jiffies + HZ*5;
417 return 1;
418 }
419 port->sysrq = 0;
420 }
421#endif
27ae7a74 422 if (port->flags & UPF_SAK)
ebd2c8f6 423 do_SAK(state->port.tty);
1da177e4
LT
424 return 0;
425}
426
1da177e4
LT
427/*
428 * UART_ENABLE_MS - determine if port should enable modem status irqs
429 */
430#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
431 (cflag) & CRTSCTS || \
432 !((cflag) & CLOCAL))
433
1da177e4 434#endif /* LINUX_SERIAL_CORE_H */
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