[deliverable/binutils-gdb.git] / include / opcode / s390.h

/* s390.h -- Header file for S390 opcode table
   Copyright 2000, 2001, 2003, 2010 Free Software Foundation, Inc.
   Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).

   This file is part of BFD, the Binary File Descriptor library.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
   02110-1301, USA.  */

#ifndef S390_H
#define S390_H

/* List of instruction sets variations. */

enum s390_opcode_mode_val
  {
    S390_OPCODE_ESA = 0,
    S390_OPCODE_ZARCH
  };

enum s390_opcode_cpu_val
  {
    S390_OPCODE_G5 = 0,
    S390_OPCODE_G6,
    S390_OPCODE_Z900,
    S390_OPCODE_Z990,
    S390_OPCODE_Z9_109,
    S390_OPCODE_Z9_EC,
    S390_OPCODE_Z10,
    S390_OPCODE_Z196,
    S390_OPCODE_MAXCPU
  };

/* The opcode table is an array of struct s390_opcode.  */

struct s390_opcode
  {
    /* The opcode name.  */
    const char * name;

    /* The opcode itself.  Those bits which will be filled in with
       operands are zeroes.  */
    unsigned char opcode[6];

    /* The opcode mask.  This is used by the disassembler.  This is a
       mask containing ones indicating those bits which must match the
       opcode field, and zeroes indicating those bits which need not
       match (and are presumably filled in by operands).  */
    unsigned char mask[6];

    /* The opcode length in bytes. */
    int oplen;

    /* An array of operand codes.  Each code is an index into the
       operand table.  They appear in the order which the operands must
       appear in assembly code, and are terminated by a zero.  */
    unsigned char operands[6];

    /* Bitmask of execution modes this opcode is available for.  */
    unsigned int modes;

    /* First cpu this opcode is available for.  */
    enum s390_opcode_cpu_val min_cpu;
  };

/* The table itself is sorted by major opcode number, and is otherwise
   in the order in which the disassembler should consider
   instructions.  */
extern const struct s390_opcode s390_opcodes[];
extern const int                s390_num_opcodes;

/* A opcode format table for the .insn pseudo mnemonic.  */
extern const struct s390_opcode s390_opformats[];
extern const int                s390_num_opformats;

/* Values defined for the flags field of a struct powerpc_opcode.  */

/* The operands table is an array of struct s390_operand.  */

struct s390_operand
  {
    /* The number of bits in the operand.  */
    int bits;

    /* How far the operand is left shifted in the instruction.  */
    int shift;

    /* One bit syntax flags.  */
    unsigned long flags;
  };

/* Elements in the table are retrieved by indexing with values from
   the operands field of the powerpc_opcodes table.  */

extern const struct s390_operand s390_operands[];

/* Values defined for the flags field of a struct s390_operand.  */

/* This operand names a register.  The disassembler uses this to print
   register names with a leading 'r'.  */
#define S390_OPERAND_GPR 0x1

/* This operand names a floating point register.  The disassembler
   prints these with a leading 'f'. */
#define S390_OPERAND_FPR 0x2

/* This operand names an access register.  The disassembler
   prints these with a leading 'a'.  */
#define S390_OPERAND_AR 0x4

/* This operand names a control register.  The disassembler
   prints these with a leading 'c'.  */
#define S390_OPERAND_CR 0x8

/* This operand is a displacement.  */
#define S390_OPERAND_DISP 0x10

/* This operand names a base register.  */
#define S390_OPERAND_BASE 0x20

/* This operand names an index register, it can be skipped.  */
#define S390_OPERAND_INDEX 0x40

/* This operand is a relative branch displacement.  The disassembler
   prints these symbolically if possible.  */
#define S390_OPERAND_PCREL 0x80

/* This operand takes signed values.  */
#define S390_OPERAND_SIGNED 0x100

/* This operand is a length.  */
#define S390_OPERAND_LENGTH 0x200

/* This operand is optional. Only a single operand at the end of
   the instruction may be optional.  */
#define S390_OPERAND_OPTIONAL 0x400

/* The operand needs to be a valid GP or FP register pair.  */
#define S390_OPERAND_REG_PAIR 0x800

	#endif /* S390_H */
Commit	Line	Data
a85d7ed0	1	/* s390.h -- Header file for S390 opcode table
e4e42b45	2	Copyright 2000, 2001, 2003, 2010 Free Software Foundation, Inc.
a85d7ed0 NC	3	Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
	4
	5	This file is part of BFD, the Binary File Descriptor library.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
e4e42b45	9	the Free Software Foundation; either version 3 of the License, or
a85d7ed0 NC	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
e172dbf8 NC	19	Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
e172dbf8 NC	20	02110-1301, USA. */
a85d7ed0 NC	21
	22	#ifndef S390_H
	23	#define S390_H
	24
	25	/* List of instruction sets variations. */
	26
1bd490c4	27	enum s390_opcode_mode_val
a85d7ed0 NC	28	{
a85d7ed0 NC	29	S390_OPCODE_ESA = 0,
1bd490c4 MS	30	S390_OPCODE_ZARCH
	31	};
	32
	33	enum s390_opcode_cpu_val
	34	{
	35	S390_OPCODE_G5 = 0,
	36	S390_OPCODE_G6,
c72a8f69	37	S390_OPCODE_Z900,
8c929562	38	S390_OPCODE_Z990,
b5639b37	39	S390_OPCODE_Z9_109,
5746fb46	40	S390_OPCODE_Z9_EC,
d9aee5d7	41	S390_OPCODE_Z10,
1e8766d7 AK	42	S390_OPCODE_Z196,
1e8766d7 AK	43	S390_OPCODE_MAXCPU
a85d7ed0 NC	44	};
	45
	46	/* The opcode table is an array of struct s390_opcode. */
	47
	48	struct s390_opcode
	49	{
	50	/* The opcode name. */
	51	const char * name;
	52
	53	/* The opcode itself. Those bits which will be filled in with
	54	operands are zeroes. */
	55	unsigned char opcode[6];
	56
	57	/* The opcode mask. This is used by the disassembler. This is a
	58	mask containing ones indicating those bits which must match the
	59	opcode field, and zeroes indicating those bits which need not
	60	match (and are presumably filled in by operands). */
	61	unsigned char mask[6];
	62
	63	/* The opcode length in bytes. */
	64	int oplen;
	65
	66	/* An array of operand codes. Each code is an index into the
	67	operand table. They appear in the order which the operands must
	68	appear in assembly code, and are terminated by a zero. */
	69	unsigned char operands[6];
	70
1bd490c4 MS	71	/* Bitmask of execution modes this opcode is available for. */
	72	unsigned int modes;
	73
	74	/* First cpu this opcode is available for. */
	75	enum s390_opcode_cpu_val min_cpu;
a85d7ed0 NC	76	};
	77
	78	/* The table itself is sorted by major opcode number, and is otherwise
	79	in the order in which the disassembler should consider
	80	instructions. */
	81	extern const struct s390_opcode s390_opcodes[];
	82	extern const int s390_num_opcodes;
	83
	84	/* A opcode format table for the .insn pseudo mnemonic. */
	85	extern const struct s390_opcode s390_opformats[];
	86	extern const int s390_num_opformats;
	87
	88	/* Values defined for the flags field of a struct powerpc_opcode. */
	89
	90	/* The operands table is an array of struct s390_operand. */
	91
	92	struct s390_operand
	93	{
	94	/* The number of bits in the operand. */
	95	int bits;
	96
	97	/* How far the operand is left shifted in the instruction. */
	98	int shift;
	99
	100	/* One bit syntax flags. */
	101	unsigned long flags;
	102	};
	103
	104	/* Elements in the table are retrieved by indexing with values from
	105	the operands field of the powerpc_opcodes table. */
	106
	107	extern const struct s390_operand s390_operands[];
	108
	109	/* Values defined for the flags field of a struct s390_operand. */
	110
	111	/* This operand names a register. The disassembler uses this to print
	112	register names with a leading 'r'. */
	113	#define S390_OPERAND_GPR 0x1
	114
	115	/* This operand names a floating point register. The disassembler
	116	prints these with a leading 'f'. */
	117	#define S390_OPERAND_FPR 0x2
	118
	119	/* This operand names an access register. The disassembler
	120	prints these with a leading 'a'. */
	121	#define S390_OPERAND_AR 0x4
	122
	123	/* This operand names a control register. The disassembler
	124	prints these with a leading 'c'. */
	125	#define S390_OPERAND_CR 0x8
	126
	127	/* This operand is a displacement. */
	128	#define S390_OPERAND_DISP 0x10
	129
	130	/* This operand names a base register. */
	131	#define S390_OPERAND_BASE 0x20
	132
	133	/* This operand names an index register, it can be skipped. */
	134	#define S390_OPERAND_INDEX 0x40
	135
	136	/* This operand is a relative branch displacement. The disassembler
	137	prints these symbolically if possible. */
	138	#define S390_OPERAND_PCREL 0x80
	139
140	/* This operand takes signed values. */
141	#define S390_OPERAND_SIGNED 0x100
142
143	/* This operand is a length. */
144	#define S390_OPERAND_LENGTH 0x200
145
8c929562 MS	146	/* This operand is optional. Only a single operand at the end of
	147	the instruction may be optional. */
	148	#define S390_OPERAND_OPTIONAL 0x400
	149
c8fa16ed AK	150	/* The operand needs to be a valid GP or FP register pair. */
c8fa16ed AK	151	#define S390_OPERAND_REG_PAIR 0x800
5e4b319c	152
8c929562	153	#endif /* S390_H */